SYSTEM DESIGN PROCESS
NASA WIRELESS SMART PLUG (NWSP)
Experimental Control Logic Laboratory (XCLL)
Authors:
Akeem Whitehead
Derek Garsee
Jeffrey Jordan
Christian Carmichael
Project Manager
Software Engineer
Hardware Engineer
System Integrations Engineer
Faculty Advisor:
Dr. Jay Porter
Electronics and Telecommunications Engineering Technology, Texas A&M University
Sponsor:
Dr. Scott A. Howe
National Aeronautics and Space Administration (NASA)
Due: October 10, 2012
Delivered: October 10, 2012
Responsibility: Group
Contact Information: xcllabs@gmail.com
Edited by: ___________________________
Signature: ___________________________
Contents
1.
Problem Statement ................................................................................................................. 4
1.1
High-Level Problem Statement ........................................................................................ 4
1.2
Background....................................................................................................................... 4
1.3
Solution ............................................................................................................................ 4
2.
Concept of Operation ............................................................................................................. 4
3.
Functional Requirements ........................................................................................................ 5
3.1
Power Control .................................................................................................................. 5
3.2
Communications .............................................................................................................. 5
3.3
Form Factor & Fit ............................................................................................................. 5
4.
Conceptual Block Diagram ...................................................................................................... 6
5.
Performance Specifications .................................................................................................... 7
5.1
Voltage Source ................................................................................................................. 7
5.2
Monitor Current ............................................................................................................... 7
5.3
Control Power .................................................................................................................. 7
5.4
Data Collection and Response.......................................................................................... 7
5.5
User Interface ................................................................................................................... 7
5.6
Networking and Communications ................................................................................... 7
5.7
Size.................................................................................................................................... 7
5.8
Failure Recovery ............................................................................................................... 7
5.9
Power Consumption ......................................................................................................... 8
5.10
6.
Deliverables .................................................................................................................. 8
Technology Survey Assessment .............................................................................................. 9
6.1
Current Sensor ................................................................................................................. 9
6.2
Voltage Sensor................................................................................................................ 10
6.3
DC-DC Converter ............................................................................................................ 10
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6.4
Voltage Switch ................................................................................................................ 11
6.5
Physical Connector ......................................................................................................... 12
6.6
Microcontroller .............................................................................................................. 13
7.
Functional Block Diagram ..................................................................................................... 14
8.
Sensor Characterization ........................................................................................................ 17
8.1
9.
Current Sensor ............................................................................................................... 17
Communications Interfaces/Protocols ................................................................................. 18
9.1
Microcontroller .............................................................................................................. 18
9.2
Nivis Wireless Network - VersaNode 210 ...................................................................... 18
10.
Deliverables........................................................................................................................ 20
11.
Milestones.......................................................................................................................... 21
12.
Gantt Chart......................................................................................................................... 22
13.
Test Matrix ......................................................................................................................... 23
14.
Technical Merit .................................................................................................................. 24
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1. Problem Statement
1.1 High-Level Problem Statement
The National Aeronautics and Space Administration (NASA) requires the control and monitoring
of DC power distribution and utilization of applicable systems for deep space exploration on
NASA’s Deep Space Habitat (DSH).
1.2 Background
Deep space missions will be characterized by continually changing demands on the power
systems of a habitat’s environment. Automated monitoring and control of the load on the
power system must be possible to offload the astronauts from excessive power management
overhead, yet still provide an overriding capability to sense and regulate power consumption
throughout the habitat. The ability to disconnect any device which exceeds its expected load
consumption automatically or to shed load based on a prioritized process is crucial to managing
the habitat’s power system over extended periods of time needed for deep space missions.
Having the ability to database and control all power consumption from anywhere within the
habitat via a wireless mesh network will provide adaptability for the crew.
Currently, no system exists that can meet these demanding needs set forth by the Advanced
Exploration Systems (AES) Habitation Systems Deep Space Habitat project. This lack of
technology has been addressed by the eXploration Habitat (X-Hab) 2013 Academic Innovation
Challenge. In this solicitation, the ASE has identified various technological capabilities that it
envisions for the DSH, but has not yet developed.
1.3 Solution
The solution will be the development of the NASA Wireless Smart Plug (NWSP).
2. Concept of Operation
The NASA Wireless Smart Plug (NWSP) delivered by the Texas A&M University Electronics
Engineering Technology Capstone and Mobile Integrated Solutions Laboratory (MISL) is a proof
of concept prototype that will extend the mock-up version of the Deep Space Habitat’s (DSH)
capabilities to monitor and control power usage while on Earth. This version of the NWSP will
be used for testing and mock-up evaluation purposes only, and is to be removed before flight
and actual implementation in space.
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3. Functional Requirements
As specified in the original contract solicitation, several key functional requirements have been
outlined for the NASA Wireless Smart Plug. These requirements have been set to fully define
the scope of the NWSP project.
3.1 Power Control
•Support for 120V/28V DC
The NWSP will be able to run on 120V or 28V DC input whether one or both are present.
•Near real-time monitoring/control
The NWSP will be able to provide as near real-time as possible control and monitoring of
current and voltage.
•Fail safe
The NWSP will be able to fail safely in the event of failure. Safely is currently understood
as failing closed.
•Windows based master control client
The NWSP will feed data to a Windows-based client for user interactivity and monitoring.
3.2 Communications
•Wireless configuration, control, monitoring and reporting
The NWSP system will be controlled and monitored wirelessly via the master control
unit.
•Data rate: 1 sample/second
The NWSP embedded software will be able to sample the current at least once per
second and send this data to the master control unit.
•Use a Nivis VN210 radio
The NWSP will use a Nivis VN210 radio as its wireless radio peripheral to integrate with
other NASA systems.
•Support a Nivis VR900 router Standards: UART, ISA 100.11a
The NWSP will be able to communicate with the master control unit through the Nivis
VR900 routers via UART and ISA 100.11a standards.
3.3 Form Factor & Fit
•Small form factor
The NWSP will fit into the smallest practical package to limit its stowage footprint.
•Cannon-type connector
The NWSP will be able to input and output via 5-pin Cannon-type connectors.
•Integration with DSH
The NWSP system will be able to integrate and operate within the DSH system.
•Deliver five NWSP units for evaluation
Five operational test units will be delivered for installation and evaluation on the DSH
mockup.
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4. Conceptual Block Diagram
The NWSP will be a physical unit and require the execution of a companion GUI. A five pin
connecter will serve as the input and output terminals of the NWSP, whereby 120V-DC and/or
28V-DC will be expected on the input terminal, while only 120V-DC or 28V-DC will be available
on the output terminal based on the connected application’s requirements. The monitoring and
control of measurements and parameters will be wirelessly managed through the interaction of
a Nivis VersaNode 210 radio and Nivis VersaRouter 900 gateway using the ISA100.11a standard.
The IEEE 802.15.4 standard is the physical layer and media access control for low-rate wireless
personal area networks (LR-WPANs). *Because the monitoring and control is critical to an end
device’s condition and health, a minimum of 1 sample per second data rate must be maintained
between the NWSP and the client software. The client software is a LabVIEW executable
running on a Windows operating system (Win XP OS or beyond), and must be configurable to
monitor and control multiple NWSP devices simultaneously.
Figure 1. System Architecture in Pictorial Diagram Format
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5. Performance Specifications
5.1 Voltage Source
The NWSP will be able to connect to a 28 VDC and/or 120 VDC source. If both sources are
present, the NWSP will default to the 28 VDC input for internal power.
5.2 Monitor Current
The NWSP will be able to monitor current up to 5 A with an accuracy of at least ± 3% of full
scale.
5.3 Control Power
The NWSP will be able to set and control current from 0 to 5 A in 0.1 A increments. If the
current flowing through the NWSP ever exceeds the set point, the load will be disconnected. As
an added measure, *a fuse will be placed in line with the load to ensure that the current is not
allowed to exceed 5 A.
5.4 Data Collection and Response
To allow for near real-time monitoring, the NWSP will be able to transmit at least 1 sample per
second *. Furthermore, loads exceeding the set current limit will be disconnected from power
within 3 seconds of *continual over-current.
5.5 User Interface
NWSP configuration and monitoring will be done remotely using a LabVIEW GUI. This
standalone GUI will run on a Windows 7 based master computer and allow users to monitor
NWSPs and set control routines. The source code for the GUI will be included in the
deliverables package.
5.6 Networking and Communications
In order to integrate into the current DSH wireless mesh network, the NWSP will use the Nivis
VersaNode 210 wireless radio to communicate with the master control unit through the Nivis
VersaRouter 900 gateway located onboard the DSH. This requires that the NWSP implement
the ISA100.11a standard.
5.7 Size
The NWSP will be no larger than a typical AC to DC converter. This limits the packaging to being
no larger than 3” x 3” x 3”.
5.8 Failure Recovery
In the event of failure, the NWSP must maintain safety. This safety measure is also taken if the
NWSP loses its connection with the master control for prolonged periods of time.
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5.9 Power Consumption
The NWSP will act as a low power node when integrated into the DHS network. The Texas
Instruments MSP430-F5438 microcontroller will be used as its central control intelligence in
order to minimize power requirements.
5.10 Deliverables
There will be at least 5 NWSP units delivered and installed for testing and validation in the
NASA DSH.
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6. Technology Survey Assessment
The technical survey assessments are used when considering components for the NWSP. These
are for critical used components that must be researched to find the most appropriate
manufacturer and model suited for the functionality needed in this device.
6.1 Current Sensor
The ACS714 hall-effect linear current sensor was selected due to its low power requirements
and it will not load down our circuit. It has the ability to with stand the 5A required by the Deep
Space Habitat and is in a very small package.
Device
*ACS714
Type
Hall Effect
Pros
Cons


Small Packaging
No power
dissipation
5v Input V
5A range

185 mV/A output
Electrical Isolation
No heat
Monitors currents
from 1A-100A
Small Package
Non inductive, noncapacitive
No ringing


Large
Not practical for PCB
application
$62.14


Power Dissipation
Heat
$20


CR4295
Current Sensing
Relay



VCS1625
High Precision
Shunt Resistor



Cost
$3.89
Table 6.1: Technical Survey – Current Sensor
Note: * denotes preferred solution component
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6.2 Voltage Sensor
Our voltage sensors will measure the voltage at different points along the voltage input to
ensure proper operation. The sensors we looked at cover a few different technical options: a
resistive voltage divider, linear photoelectric isolation, and Hall effect voltage sensing.
Unfortunately, these sensors all require unacceptable amounts of power and are worryingly
large. Research is ongoing for a practical solution. Prices noted with an asterisk are awaiting
confirmation via e-mail.
Device
3509_0 - CEVZ02-32MS20.5 DC Voltage
Sensor 0-200V
ACPL-C87B
Type
DC Voltage sensor
Pros
Cons




Massive package
12V power supply
Linear
Photoelectric
Isolation





Massive package
12V power supply
N/A
CYHVS025A
Hall Effect Voltage
Sensor


15V Power supply
N/A
All-in-one package
Linearly
proportional 0-5V
DC Output
Electrical Isolation
200V input
Linearly
proportional DC
output
Relatively Small
Package
Electrical Isolation
500V


Cost
$111.55
Table 6.2: Technical Survey – Voltage Sensor
6.3 DC-DC Converter
The NWSP must be able to operate when either 120 V-DC or 28 V-DC is present at the wall. The
120 V will be stepped down to 28V which will be fed into the main voltage regulator. A TL783
linear voltage regulator will be used to step down the 120V to 28V. This voltage regulator has
an adjustable output and will operate with the 120V source from the Deep Space Habitat.
Device
667-ERA8AHD300V
Type
Voltage Divider
Pros
Cons


In expensive
Small
DBS150A24
DC/DC Converter

Over current
protection
Steady output
voltage
Adjustable Vout





Power loss
Heat
Fluctuations in output
Large
Expensive


Limited output current
Heat

*TL783
High Voltage
Regulator

Cost
$2.53
$179.19
$2.55
Table 6.3: Technical Survey – DC-DC Converter
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6.4 Voltage Switch
The NASA Wireless Smart Plug must not only sense current, but autonomously disconnect
power. The Micropac 53238 solid-state relay will accomplish this task. This relay can operate
within the 28 V-DC or 120V-DC required by the Deep Space Habitat. It can be controlled from a
pin on the MSP430 to disconnect the load from the source. This relay is much more expensive
than other solutions, but offers isolation and a much longer life span than a mechanical relay.
Device
*Micropac
53238
Type
Power Mosfet
Optocoupler
Pros
Cons




Heat
Power loss


Mechanical
Power loss
$1.61

Cannot be controlled
remotely
Power loss
$23.56



AV3712613
611-12012
Relay

Switch



Small packaging
Operates up to
125V
Can handle 5A
continuous
Radiation tolerant
Can be controlled
with pin from
MSP430
Can be controlled
with pin from
MSP430
Cheap
Can handle 5A
continuous
Operates up to
240V

Cost
N/A
Table 6.4: Technical Survey – Voltage Switch
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6.5 Physical Connector
The Deep Space Habitat has a 5 pin quarter turn Cannon type connector. The smart plug must
be compatible with NASA’s existing standard. The Veam GRH can operate at 120V and with
stand the 5A current from the DSH. This connector will match the NASA standard.
Device
163-2325-E
Manufacturer
Kobiconn
Pros
Cons


Not NASA Standard
Cost
$2.10

Fits NASA Standard
N/A

No 5 pin layout
available
Will not fit NASA
Standard
N/A

*Veam GRH

Cannon

PDS-222-4
Amphenol



Operates up to
250V
Can handle 5A
continuous
Operates up to
250V
Can handle 15A
continuous
Quarter turn
Designed for space
operation
Quarter turn

Table 6.5: Technical Survey – Physical Connector
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6.6 Microcontroller
The microcontroller for this project must have a Serial Peripheral Interface (SPI) and/or
Universal Asynchronous Receiver/Transmitter (UART) to communicate with the Nivis
VersaNode 210 radios. The microcontroller must have I/O pins available for the current sensors,
voltage sensors, and switch enables. Precision at or beyond 0.1A increments for a 0 to 5A range
must be available for precision calculations of measured values. The clock rate must ne 1
sample per second requirement such that a measurement, calculation, and transmission of data
occur within this limit. Table 6.6 shows the microcontrollers we considered for the NWSP.
Manufacturer Microcontroller
Pros
Cons
*Texas
Instruments
MSP430F5438A


Microchip
PIC24FJ128GA110
Freescale
MC56F8257VLH
Fast processing speed of
60MHz
Less precise A/D convertor $4.76
of 10 bits
$7.15
 No UART
communication
 Higher supply voltage
necessary
Large memory size of
256KB
 Low operating
voltage (1.8 ~ 3.6V)
Cost
High cost
Price per
Unit
$11.73
Table 6.6: Technical Survey – Microcontroller
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7. Functional Block Diagram
The functional block diagram provides a walkthrough of how the input from the DSH is handled
by every component from a high level perspective and down to specific manufacturer part
numbers and pin level configurations. Figure 7.0.1 provides a top level overview of how the
internal design of the NWSP wirelessly integrates with the DSH’s master control unit.
1
3
120V-DC Input
from DSH
5
120V-DC Excess
Current Trip
Disconnect
120V-DC Device
Current Sense
120V-DC
Output to
Device
2
28V-DC Input
from DSH
4
28V-DC Device
Current Sense
120V-DC Fuse
Disconnect
120V-DC
Signal Control
6
28V-DC Excess
Current Trip
Disconnect
28V-DC Output
to Device
28V-DC Fuse
Disconnect
DC-DC
Converter
Voltage
Regulation
7
MSP430F5438A
Microcontroller
Legend:
Potential Emergency / Trip
Voltage Measurement
Nivis VN210
Nivis VR900
LabVIEW GUI
DSH Master Control
1 | 2 | 3 | 4 | 5| 6 | 7
Figure 7.0.1: Top Level Functional Block Diagram
The DSH will be sourcing either or both 28V-DC and 120V-DC. Due to the possibility that both
voltage sources will be available, the NWSP need only to utilize a single supply voltage, thus, to
prevent any idle supply voltage from consuming power resources, the 120V-DC power supply is
to be dismissed (opened/grounded) in the case that both voltage sources are available *The
120V-DC signal is dismissed given that more overhead is required to utilize and reduce this
higher voltage rating to practical values for internal NWSP component operations (such as
supply voltages necessary for the microcontroller and radio module).
The fuse disconnect feature will be optional for the possibility that the NWSP is needs to be
protected in isolation from the main power supply line that is being monitored.
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Post
Post DC-DC
DC-DC
1
1
120V-DC Input
from DSH
2
3
2
SN74HC151-Q1
8-to-1
Multiplexer
4
28V-DC Input
from DSH
5
6
GND
GND
7
28V-DC Fuse
Disconnect
OUT
IN
LM317L
Voltage Regulation
28V-DC to 3V-DC
OUT
100
99
98
97
P6.0/A0 (GPIO)
(GPIO)
P6.0/A0
TL783
DC-DC
Converter
12
P6.1/A1 (GPIO)
(GPIO)
P6.1/A1
IN
11
P6.2/A2 (GPIO)
(GPIO)
P6.2/A2
OUT
OUT
P6.3/A3 (GPIO)
(GPIO)
P6.3/A3
ADJ
AVSS (GND)
(GND)
AVSS
Micropac
53238
GND
VCC
VCC
Vref
IN
28V-DC to
3.3V-DC
Converter
S1
S1 || S2
S2 || S3
S3
AVCC
AVCC
120V-DC Fuse
Disconnect
IN
TI MSP430F5438A
Microcontroller
7
Figure 7.0.2: Voltage Step Down and Regulation Block Diagram
An NPN transistor acts as a switch that determines whether the 120V signal shall proceed
onwards through the NWSP circuitry. There exist four cases of voltage sourced from the DSH: 1.
None; 2. Only 28V-DC; 3. Only 120V-DC; 4. Both 28V-DC and 120V-DC. Thus, the only case when
120V-DC must be utilized is case 3, otherwise the signal is to be stopped by the NPN transistor,
which is configured such that the 28V-DC signal acts as a NOT Enable signal. If the 120V-DC is
the active signal, then the voltage must be stepped down to 28V-DC to be utilized as an input to
the 3-terminal adjustable regulator. This regulator provides 3V output for the microcontroller,
multiplexer, radio, and other components to operate as a supply voltage.
The main objective to sense current is achieved through the use of a hall-effect linear current
sensor that is tied to the microcontroller for processing. Based on whether the preconfigured
parameter of current thresholds is exceed, the current trip disconnect on the main line may be
triggered. This is the only autonomous disconnect feature of the NWSP as considered for
standard operation. Any other disconnects or reason for the NWSP to discontinue operation
would be due to the potential failure modes.
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SYSTEM DESIGN PROCESS
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IN
3
120V-DC Input
from DSH
IN
120V-DC ACS714
Current Sense
GND
5
+VC
IP+
OUT
4
28V-DC Input
from DSH
IN
28V-DC ACS714
Current Sense
120V-DC
Output to
Device
120V-DC Micropac
53238 Disconnect
VI-OUT
6
IN
VI-OUT
28V-DC Output
to Device
GND
28V-DC Micropac
53238 Disconnect
IP+
82
75
74
P9.7 (GPIO)
(GPIO)
P9.7
P9.6 (GPIO)
(GPIO)
P9.6
P10.7 (GPIO)
(GPIO)
P10.7
83
P10.6 (GPIO)
(GPIO)
P10.6
+VC
OUT
TI MSP430F5438A
Microcontroller
Figure 7.0.3: Current Sense and Disconnect Block Diagram
To achieve wireless communication between the microcontroller and radio, the Nivis
VersaNode 210 has the ability to communicate in either UART or SPI mode. UART mode has
been selected for the NWSP application given less pin count overhead. The Nivis radio has the
option of also utilizing the onboard antenna for wireless communication, or the use of a custom
or external antenna through pin contact 50 (optional).
(GPIO)
(GPIO) UART-RTS
UART-RTS 41
1 EXTRTS
EXTRTS
(GPIO)
(GPIO) UART-CTS
UART-CTS 42
2 EXTCTS
EXTCTS
TI MSP430F5438A
Microcontroller
UCA0TXD
UCA0TXD 39
3 UART2-RXD
UART2-RXD
UCA0RXD
UCA0RXD 40
4 UART2-TXD
UART2-TXD
(GPIO)
(GPIO) RDY_RADIO
RDY_RADIO 43
11 TMR1
TMR1
(GPIO)
(GPIO) WKU_RADIO
WKU_RADIO 44
30 KBI4
KBI4
GND
GND
Nivis
VersaNode 210
GND
GND
50
Figure 7.0.4: Microcontroller and Radio
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8. Sensor Characterization
8.1 Current Sensor
The current sensor must be accurate to within 0.1A. The ACS714 hall-effect linear current
sensor can accomplish this without loading down our power line. This sensor uses the halleffect to detect fluctuation in the magnetic field as the current changes. The sensor will output
a linear voltage proportional to the current with an offset of 2.5 V. The output voltage will
change at a rate of 185 mV/A. The output of the ACS714 will be tied to an ADC pin on the
MSP430. The ADC is 12 bits and can support up to 3.6V. Since 2 bits are for noise, this gives the
ADC a voltage resolution of 0.00356V or 3.56mV, which is much less than the voltage difference
of 18.5mV for every 0.1A coming from the ACS714.
Figure 8.1: Current Sensor Characterization Graphed
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9. Communications Interfaces/Protocols
9.1 Microcontroller
Digital I/O
There are up to ten 8-bit I/O ports implemented: For 100-pin options, P1 through P10 are complete. P11 contains
three individual I/O ports. For 80-pin options, P1 through P7 are complete. P8 contains seven individual I/O ports.
P9 through P11 do not exist. Port PJ contains four individual I/O ports, common to all devices.
• All individual I/O bits are independently programmable.
• Any combination of input, output, and interrupt conditions is possible.
• Pullup or pulldown on all ports is programmable.
• Drive strength on all ports is programmable.
• Edge-selectable interrupt and LPM4.5 wakeup input capability is available for all bits of ports P1 and P2.
• Read/write access to port-control registers is supported by all instructions.
• Ports can be accessed byte-wise (P1 through P11) or word-wise in pairs (PA through PF).
Oscillator and System Clock
The clock system in the MSP430x5xx family of devices is supported by the Unified Clock System (UCS) module that
includes support for a 32-kHz watch crystal oscillator (XT1 LF mode), an internal very-low-power low-frequency
oscillator (VLO), an internal trimmed low-frequency oscillator (REFO), an integrated internal digitally controlled
oscillator (DCO), and a high-frequency crystal oscillator (XT1 HF mode or XT2). The UCS module is designed to meet
the requirements of both low system cost and low power consumption. The UCS module features digital frequency
locked loop (FLL) hardware that, in conjunction with a digital modulator, stabilizes the DCO frequency to a
programmable multiple of the selected FLL reference frequency. The internal DCO provides a fast turn-on clock
source and stabilizes in less than 5μs. The UCS module provides the following clock signals:
• Auxiliary clock (ACLK), sourced from a 32-kHz watch crystal, a high-frequency crystal, the internal low-frequency
oscillator (VLO), the trimmed low-frequency oscillator (REFO), or the internal digitally controlled oscillator DCO.
• Main clock (MCLK), the system clock used by the CPU. MCLK can be sourced by same sources made available to
ACLK.
• Sub-Main clock (SMCLK), the subsystem clock used by the peripheral modules. SMCLK can be sourced by same
sources made available to ACLK.
• ACLK/n, the buffered output of ACLK, ACLK/2, ACLK/4, ACLK/8, ACLK/16, ACLK/32.
9.2 Nivis Wireless Network - VersaNode 210
ISA100.11a
ISA100.11a is a wireless networking technology standard developed by the International
Society of Automation (ISA). The official description is "Wireless Systems for Industrial
Automation: Process Control and Related Applications". THE ISA-100.11standards document is
available for a cost of $220.00 through the ISA official website. Until the standards
documentation is purchased, information on this standard is limited.
• Release 1 provides reliable and secure operation for non-critical monitoring, alerting,
supervisory control, open loop control, and closed loop control applications.
– defines the specifications for low data rate wireless connectivity with fixed,
portable, and moving devices supporting very limited power consumption
requirements
• Application focused on needs for monitoring and process control
– where latencies on the order of 100 ms can be tolerated
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•
•
•
– with optional behavior for shorter latency
Provides robustness in the presence of interference found in harsh industrial
environments and with legacy systems.
Coexists with other wireless devices anticipated in the industrial work space as well as
providing interoperability of ISA100 devices.
Open standard that is intended to be of low complexity for end users to use and deploy
Universal Asynchronous Receiver/Transmitter
The Universal Asynchronous Receiver/Transmitter (UART) takes bytes of data and transmits the
individual bits in a sequential fashion. At the destination, a second UART re-assembles the bits
into complete bytes. Each UART contains a shift register, which is the fundamental method of
conversion between serial and parallel forms. Serial transmission of digital information (bits)
through a single wire or other medium is much more cost effective than parallel transmission
through multiple wires.
Figure 9.2: UART Character Framing
The idle, no data state is high-voltage, or powered. This is a historic legacy from telegraphy, in
which the line is held high to show that the line and transmitter are not damaged. Each
character is sent as a logic low start bit, a configurable number of data bits (usually 8, but legacy
systems can use 5, 6, 7 or 9), an optional parity bit, and one or more logic high stop bits. The
start bit signals the receiver that a new character is coming. The next five to eight bits,
depending on the code set employed, represent the character. Following the data bits may be a
parity bit. The next one or two bits are always in the mark (logic high, i.e., '1') condition and
called the stop bit(s). They signal the receiver that the character is completed. Since the start
bit is logic low (0) and the stop bit is logic high (1) there are always at least two guaranteed
signal changes between characters.
A UART usually contains the following components:
 a clock generator, usually a multiple of the bit rate to allow sampling in the middle of a
bit period.
 input and output shift registers
 transmit/receive control
 read/write control logic
 transmit/receive buffers (optional)
 parallel data bus buffer (optional)
 First-in, first-out (FIFO) buffer memory (optional)
Serial Peripheral Interface Bus
The SPI bus can operate with a single master device and with one or more slave devices.
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If a single slave device is used, the SS pin may be fixed to logic low if the slave permits it. Some
slaves require the falling edge (high→low transition) of the chip select to initiate an action such
as the Maxim MAX1242 ADC, which starts conversion on said transition. With multiple slave
devices, an independent SS signal is required from the master for each slave device.
Most slave devices have tri-state outputs so their MISO signal becomes high impedance
(disconnected) when the device is not selected. Devices without tri-state outputs can't share
SPI bus segments with other devices; only one such slave could talk to the master, and only its
chip select could be activated.
10. Deliverables
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11. Milestones
13/2/13
Progress Checkpoint #1
3/4/13
Progress Checkpoint #2
15/5/13
Progress Checkpoint #3
20/5/13
Final Presentation
Presentation and PPT Slides
Alpha Schematic
Alpha Board Layout
Software Hierarchical Charts
Test Matrix
Final Schematics
Final Board Layout
Software Flow Charts
Test Plan
Final Demonstration
Final Report
Five Smart Plugs
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12. Gantt Chart
The project has been divided into seven phases: Research, Design, Simulation, Implementation,
Testing, Documentation, and Close-out. The duration of these seven phases is outlined in the
Gantt chart. Research is the first phase, followed by the Design phase. The third phase is
Simulation followed by Implementation and Testing. Each of these phases has overlap to allow
for a parallel approach to the project. The Documentation phase will start in the middle of the
Research phase and continue till the end of the project. Close-out will be the final phase in the
project and will end with the completion of the project.
NWSP Gantt
Chart
Duration
28-Aug-12
17-Oct-12
Research
Phase
Design
6-Dec-12
25-Jan-13
16-Mar-13
5-May-13
11/1/12
11/25/12
Simulation
4/17/13
Implementation
4/18/13
Testing
4/29/13
Documentation
5/6/13
Close-out
5/10/13
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13. Test Matrix
XCLL has created a Test Matrix (below) to ensure that crucial tests are performed on the NWSP in order
to validate all of its functionality. On the top of our Test Matrix (x-axis) we can find all the functional
requirements that the NWSP must implement as a final product. The column on the left (y-axis) contains
all the test cases to be performed on the NWSP in order to validate its functionality. We marked with an
“X” the test cases that validate one or more of the functional requirements.
Figure 13.0: Test Matrix
•*The NWSP will be tested to make sure we can monitor data in real time. This will involve reading data
directly from the device while using exterior sensing methods to ensure accuracy.
•The NWSP will be tested to make sure we have met the small form factor requirements and will also be
tested to make sure we have met the requested enclosure attributes to the best of our ability (i.e.
kickoff strength, snag resistant, etc.).
•We will test the Master Control Client to ensure that is displaying data properly and ensure the
accuracy of the data it is receiving. This will involve testing the sampled data rate and packet testing.
•We will test the NWSP for proper operation under 120V, 28V, and simultaneous input.
•The NWSP will be tested to ensure proper fail safe functionality (failing closed, indicate failure LED,
indicate failure on Master Control Client).
•We will test the proper configuration and function of the wireless functionality on the NWSP. This will
involve packet testing and software debugging on the embedded software and Master Control Client.
•We will perform a load test of 5+ NWSP devices operating simultaneously to ensure proper
functionality of the whole system under maximum stress.
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•We will ensure all automation requirements of the NWSP are met. This will involve testing the NWSP
under various conditions and ensuring the embedded software responds appropriately by load shedding
or warning the Master Control Client.
14. Technical Merit
Experimental Control Logic Laboratory uses a technical merit matrix during project selection to
weigh certain aspects of a given project being considered. For a project to be *selected and
approved for credit, a technical merit greater than 1.0 must be calculated. For the NWSP, the
summation of each technical merit category results in a value of 1.5, thus satisfying our 1.0
minimum requirement. Table 14.0 lists each technical merit factor, and justification for
assessing value of each factor is provided below.
#
Technical Merit Factors
1
Contains a clearly described and completely understood technical challenge
2
Contains a requirement for system integration
3
Contains a requirement for system testing
4
Contains a requirement for theoretical analysis and simulation
5
Contains hardware design, development and test
6
Contains software design, development and test
7
Contains an enclosure design/fabrication requirement
8
Contains a requirement for documentation other than the project related
9
Contains a requirement for intellectual property protection
10 Contains requirement beyond Capstone
Total
Table 14.0: Technical Merit
Weight
0.1 / 0.1
0.2 / 0.2
0.2 / 0.2
0.0 / 0.2
0.3 / 0.3
0.3 / 0.3
0.2 / 0.2
0.2 / 0.2
0.0 / 0.1
0.0 / 0.1
1.5 / 1.9
1. Contains a clearly described and completely understood technical challenge
The use of both 120V-DC and 28V-DC are high voltage signals that have not been handled previously
given their near exclusive use in space applications. The ISA100.11a is an industry standard not learned
in the TAMU EET course load.
2. Contains a requirement for system integration
The NWSP devices are to be utilized in NASA’s Deep Space Habitat for monitoring and control of
targeted application devices. Either a Smart Plug GUI will be provided as independent software to be run
on NASA’s computers, or data transmitted from the Smart Plug will be formatted for NASA’s proprietary
software.
3. Contains a requirement for system testing
NWSP will require system testing to ensure that all performance and functional requirements are met,
especially due to the lack of technical support or exchangeability when actual implementation is
achieved outside of Earth in a deep space habitat.
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4. Contains a requirement for theoretical analysis and simulation
Before proceeding with physical construction and microcontroller programming, the functionality of the
NWSP will be simulated on National Instrument’s Multisim to simulate and extract theoretical values at
designated test points. Failures and emergency scenarios will also be simulated for non-ideal conditions.
LabVIEW may be used as alternative software.
5. Contains hardware design, development and test
Multisim schematics and Ultiboard PCB layouts will be provided, as well as component population for a
board of at least 2 layers. Test points will be populated on the final board for testing purposes in the
case that NASA astronauts must troubleshoot.
6. Contains software design, development and test
NASA requires that the NWSP use a TI MSP430F5438 microcontroller to handle all operations, both
manual and autonomous. In-Circuit Debugging pins will be provided for NASA astronauts to debug or reprogram the onboard microcontroller. A LabVIEW based Graphic User Interface (GUI) will be developed
as an executable on a Windows based operating system.
7. Contains an enclosure design/fabrication requirement
A custom 3”x3”x3” cube enclosure will be provided to enclose the input/output receptacles, custom
PCB, Nivis radio, and potentially an external button and LCD configuration for local non-GUI monitoring.
8. Contains a requirement for documentation other than the project related
Report on Educational Outreach activity (details on bullet # 10).
9. Contains a requirement for intellectual property protection
The NWSP will be protected under the intellectual property law, with the intention of selling NASA or
the competing private-sector based Space X (Space Exploration Technologies Corporation) the IP rights.
10. Contains requirement beyond Capstone
This section is not applicable to the NWSP project.
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