UNIVERSITY OF BELIZE FACULTY OF SCIENCE & TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY Digital Logics Signal Processing (CMPS 322) Course Outline Semester 1 (August –December 2008) Instructor: Course Description: Ms. Freida Palma MSc. This course provides an in-depth examination of the basic components and Operating Principles of Digital Circuits. Basic Components - Logic Gates, Multiplexers, Demultiplexers, Encoders, Decoders, Arithmetic Circuits. Underlying Principles Truth Tables, Boolean Algebra, Karnaugh Maps, Binary and Other Number Systems and Codes. Office: Jag- D4 Telephone: Pre-requisites 822-3681 ext 303 CMPS 213- Basic PC Repair Email: Objectives cmps322@freidapalma.com At the end of this course students will be able to : Website: www.cmps322.freidapalma.com Office Hours: Tuesday and Thursday 10:00 am -11:00 am 1. Discuss the advantages of digital systems over analogue systems. 2. Explain the methods of representation of binary numbers. 3. Carry out Boolean algebraic manipulations and reductions 4. Draw truth tables for digital circuits. 5. Analyze circuit diagrams of AND, OR and NAND functions. 6. Use ICs to build/ implement complex logical circuits. 7. Combine digital logic elements to build half and full adders. 8. Explain the functions and applications of different flip-flop circuits. 9. Explain the principles of counters and counting circuits. 10. Discuss the principles of timing and triggering circuits. Class Hours: Textbook: Tuesday and Thursday Leach and Malvino. Digital Principles and Applications. 5th Edition 8:00 am to 9:15 am Reference Text: Class Room: Mano Morris, M. Digital Design. 2nd Edition Jag-BSCL Page 1 of 7 UNIVERSITY OF BELIZE FACULTY OF SCIENCE & TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY Digital Logics Signal Processing (CMPS 322) Course Outline Semester 1 (August –December 2008) Course Schedule The following schedule is tentative and may be modified as necessary to accomplish the course objectives: Topic Date Course Outline and Overview Unit I: General Aspect 21- Aug-2008 26- Aug-2008 28- Aug-2008 02-Sept-2008 Difference between analogue and digital signals Advantages of digital signals Digital waveforms Digital logic Moving and storing digital information Digital operations Digital computers Digital integrated circuits 04-Sept-2008 Unit II: Digital Logic Binary number system Basic Gates Boolean Algebra NOR gates NAND gates AND , OR, INVERT gates Positive and negative logic Lab Session #1 Given 09- Sept-2008 Assignment #1 Given 09- Sept-2008 Unit III: Combinational Logic Circuit 11- Sept-2008 16- Sept-2008 Boolean laws and theorems Sum-of products methods Page 2 of 7 UNIVERSITY OF BELIZE FACULTY OF SCIENCE & TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY Digital Logics Signal Processing (CMPS 322) Course Outline Semester 1 (August –December 2008) Truth table to karnaugh map Pairs, Quads, and Octets Karnaugh simplification Don’t care conditions Product of Sums method Product of sums simplification Test #1 18- Sept-2008 Unit IV: Data Processing Circuits 23- Sept-2008 Multiplexers Demultiplexers 1-of -16 decoders BCD- to- decimal decoders Lab Session #2 Given Seven segment decoders Encoders Exclusive –or-gates Parity generators and checkers Read only memory Programmable array logic Programmable logic array 25- Sept-2008 30- Sept-2008 02-Oct-2008 Assignment #2 Given 07-Oct-2008 Lab Session #3 Given 07-Oct-2008 Unit V: Binary System Arithmetic 09- Oct-2008 14- Oct-2008 Binary to Decimal conversion Decimal to Binary conversion Octal numbers Hexadecimal numbers Page 3 of 7 UNIVERSITY OF BELIZE FACULTY OF SCIENCE & TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY Digital Logics Signal Processing (CMPS 322) Course Outline Semester 1 (August –December 2008) ASCII code Excess-3 code Gray Code 16- Oct-2008 21-Oct-2008 Unit VI: Arithmetic Circuits Binary addition Binary Subtraction Unsigned Binary numbers Sign-magnitude numbers 2’s complement representation 2’s complement arithmetic Arithmetic building blocks The adders-Subtract or Binary multiplication and division Test #2 23-Oct-2008 Assignment #3 Given 23-Oct-2008 Lab Session #4 Given 28- Oct-2008 Unit VII: Flip-Flops and Registers 30-Oct-2008 04-Nov-200 RS- Flip-Flops Gated Flip-Flops Edge triggered RS flip flops Edge triggered D flip flops Edge triggered JK flip-flops Flip-flop timing JK master slave flip flops Switch contact bounce circuit Lab Session #5 Given 06-Nov-2008 Unit VIII: Registers 11-Nov-2008 Page 4 of 7 UNIVERSITY OF BELIZE FACULTY OF SCIENCE & TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY Digital Logics Signal Processing (CMPS 322) Course Outline Semester 1 (August –December 2008) Types of Registers Serial In- Serial Out Serial In- Parallel Out Parallel In- Serial Out Parallel In- Parallel Out Ring Counters Assignment #4 Given 11-Nov-2008 Unit IX: Counters 11-Nov-2008 13-Nov-2008 Asynchronous counters Decoding gates Synchronous counters Counter modules Decade counters Pre-settable counters Shift counters Mod-10 shift counter with decoding Lab Session #6 Given 18-Nov-2008 Unit X: Oscillators and Timers TBA (If time permits) Schmitt trigger circuit Monostable multivibrator circuit Astable multivibrator circuit Test #3 20-Nov-2008 Assignment #5 Given 20-Nov-2008 Final Exam Practical 27-Nov-2008 Page 5 of 7 UNIVERSITY OF BELIZE FACULTY OF SCIENCE & TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY Digital Logics Signal Processing (CMPS 322) Course Outline Semester 1 (August –December 2008) Assignments and Lab Due Dates: Assignments Assignment# 1 Assignment # 2 Assignment # 3 Assignment # 4 Assignment # 5 Due Date 18-Sept-2008 16-Oct-2008 04-Novt-2008 18-Nov-2008 02-Dec-2008 Labs Lab # 1 Lab # 2 Lab # 3 Lab # 4 Lab # 5 Lab # 6 Due Date 18-Sept-2008 07-Oct-2008 16-Oct-2008 06-Nov-2008 18-Nov-2008 27-Nov-2008 Final Exam : 8-15 December-2008 Evaluation This course will be evaluated using five evaluative tools: Lab Reports, Assignments, Tests, quizzes and a comprehensive Final Examination which includes a practical and a theory exam. Quiz Quizzes will be based on lectures, and will be given at random. Evaluation Weight Area Of Course Lab Reports(6) Assignments(5) Tests (3) Quiz (5) Final Exam(Theory) Final Exam(Practical) Total Weight 20% 15% 30% 5% 15% 15% 100% Final letter grade is given according to the standard UB grading scale. A = 95-100% A- = 90-94% B+ = 85-89% B = 80-84% C+ = 75-79% C = 70-74% D+ = 65-69% D = 60-64% F = below 59% Page 6 of 7 UNIVERSITY OF BELIZE FACULTY OF SCIENCE & TECHNOLOGY DEPARTMENT OF INFORMATION TECHNOLOGY Digital Logics Signal Processing (CMPS 322) Course Outline Semester 1 (August –December 2008) Late Penalties Assignments and Lab Reports submitted late will be penalized by deducting 10% per day. Cheating Policy I strongly urge students not to cheat, any form of cheating, be it in Exam, Assignments, Tests or Lab Reports will result with the student receiving a grade of zero. I encourage students to do individual work, and not share their work with their colleagues but rather assist their fellow colleagues to understand the problem and develop a solution method. Miscellaneous: The following will be the rules of conduct to be observed during this course: Since the course will be implemented in a Computer Lab, students are to follow the instructions of the lecturer and to abide by the rules of the Labs. While in class students will not be allowed to check e-mail, browse the Internet, play games or open other applications than instructed; any student found not abiding by this will be requested to leave the class and return the next class period. Neither eating nor drinking is allowed under any circumstances. Cell phones must be turned off (or place on vibrate) upon entering the classroom. Students who fail to comply will be asked to leave the classroom and return the next class period. If a student is inconsiderate and creating a lot of noise; he/she will be asked to leave. If a student is late or absent, it is his/her responsibility to find out what information have missed and what assignments are due. This does not mean coming to the lecturer to find out what you have missed or asking for a recap on what was presented earlier. Class/Academic Policies Refer to the University's Academic Policies in the Student Handbook. ****** Page 7 of 7