ECE 507 Seminar (Spring 2015)
2.00–3.15pm Friday, April 24th, Room EB-103
“DARPA Has Seen the Future of Computing …
And it’s Analog …” Wired Magazine.
Dan Hammerstrom, Program Manager,
Microsystems Technology Office, DARPA
Abstract
Today’s defense missions rely on massive amounts of sensor data collected by
intelligence, surveillance and reconnaissance (ISR) platforms. Not only has the
volume of sensor data increased exponentially, there has also been a dramatic
increase in the complexity of the required analysis. Moore’s Law is slowing down
and will be ending soon, and power scaling (via Dennard Scaling) has already
stopped, significantly limiting the speed and type of analyses that can be done.
DARPA’s Unconventional Processing of Signals for Intelligent Data Exploitation
(UPSIDE) program seeks orders of magnitude improvements in power efficiency
by breaking the status quo of digital processing with methods of video and imagery
analysis using computation based on the physics of nanoscale devices. UPSIDE
processing will be non-digital and fundamentally different from current digital
processors and are not subject to the power and speed limitations associated with
them.
The key is to find a computational abstraction that can be used throughout a signal
processing pipeline and that also can be mapped directly to devices. The
abstraction used by UPSIDE is based on probabilistic inference, the “Inference
Module,” which becomes a building block for creating complex data analysis
systems with orders of magnitude improvements in speed and power efficiency.
Furthermore these arrays would self-organize and adapt to inputs, and would not
be manually programmed.
Biography
Dan Hammerstrom joined DARPA as a Program Manager in March, 2012. He
came to DARPA from Portland State University, where he is a Professor in the
Electrical and Computer Engineering (ECE) department.
From 1977 to 1980, Dr. Hammerstrom was an Assistant Professor in the Electrical
Engineering Department at Cornell University. In 1980 he joined Intel in Oregon,
where he was involved in computer architecture and VLSI design. In 1988 he
founded Adaptive Solutions, Inc., which specialized in high performance silicon
technology (the CNAPS chip set) for image processing, neural network emulation,
and pattern recognition. In 1998 he joined the Oregon Graduate Institute. He then
moved to Portland State in 2005.
Dr. Hammerstrom is a Life Fellow of the Institute of Electrical and Electronic
Engineers (IEEE). He has been a Visiting Scientist at the Royal Institute of
Technology in Stockholm, Sweden and the NASA Ames Research Center.
Currently he has a joint faculty appointment with Halmstad University, Halmstad
Sweden. He received a PhD in Electrical Engineering from the University of
Illinois at Urbana-Champaign in 1977.
All welcome