17-level three phase Cascaded H-bridge multilevel
Inverter with improving efficiency
M.Devarajan, pg student, Kingston engineering college, vellore
deva3232@gmail.com
Abstract—This paper presents a 17-level
cascade
multilevel inverter. Multilevel converters are generate
near sinusoidal voltages by using near fundamental
switching. the multi level converters are mainly used to
neglect transformers to avoid losses using pwm
techniques. Simulation and experimental results are
shown for voltage and current during synchronization
mode and power transferring mode to validate the
methodology. the simulation of 17-level cascaded
inverter is done by using MATLAB software.
II.
MULTILEVEL INVERTER ARCHITECTURE
To operate a cascade multilevel inverter using a
single DC source, it is proposed to use capacitors as
the DC sources fo all but the first source[4]. Consider a
simple cascade multilevel inverter with two H-bridges
as shown in Fig.1.
Key words-multi level converter, cascade inverter, pwm.
I. INTRODUCTION
Multilevel
power
conversion
has
become
increasingly popular in recent years due to
advantages of high power quality waveforms, low
electromagnetic compatibility (EMC) concerns, low
switching losses, and high-voltage capability[1].A
cascade multilevel inverter is a power electronic
device built to synthesize a desired AC voltage from
several levels of DC voltages. Such inverters have
been the subject of research in the last several years
where the DC levels were considered to be identical
in that all of them were a multilevel converter was
presented in which the two separate DC sources were
the secondaries of two transformers coupled to the
utility AC power. In contrast, in this paper, only one
source is used without the use of transformers. The
interest here is interfacing a single DC power source
with a cascade multilevel inverter where the other
DC sources are capacitors[3]. Currently, each phase
of a cascade multilevel inverter requires n DC
sources for 2n+1 levels in applications that involve
real power transfer. In this work, with the remaining
n − 1 DC sources being capacitors. It is shown that
one can simultaneously maintain the DC voltage
level of the capacitors and choose a fundamental
frequency switching pattern to produce a nearly
sinusoidal output.
Fig. 1. Single-phase structure of a multilevel cascaded H-bridges
inverter.
The DC source for the first H-bridge (H1) is a DC
power source with an output voltage of Vdc, while
the DC source for the second H-bridge (H2) is a
capacitor voltage to be held at Vdc/2. The output
voltage of the first H-bridge is denoted by v1 and the
output of the second H-bridge is denoted by v2 so
that the output of this two DC source cascade
multilevel inverter is v(t) = v1(t)+v2(t)[6]. By
opening and closing the switches of H1
appropriately, the output voltage v1 can be made
equal to −Vdc, 0, or Vdc while the output voltage of
H2 can be made equal to −Vdc/2, 0, or Vdc/2 by
opening and closing its switches appropriately.
Therefore, the output voltage of the inverter can have
the values −3Vdc/2, −Vdc, −Vdc/2, 0, Vdc/2, Vdc,
3Vdc/2, which is seven levels and is illustrated in
Fig. 2(a). Table I shows how a waveform can be
generated using the topology of Fig.1.
III.
GENERALIZED CASCADED TOPOLOGY
Fig. 3 shows the structure of the generalized
multilevel in- verter.Therein, each phaseconsistof
multilevelH-bridge cells each with an isolated dc
source. One advantage of this structure is that more
or fewer H-bridge cells can be cascaded depending
on the desired power quality. For system symmetry,
it is reason- able to utilize the same set of dc voltages
for each phase (i.e., where )[1]. As can be seen, the
inverter ground is isolated from the machine neutral
point and each phase-to-ground voltage , and is
directly controlled by the ac output of the individual
multilevel H-bridge cells as
where represents the phase and can be a,b or c[1] .
The machine phase voltages may be expressed in
terms of the line-to-ground voltages by
For analysis purposes, it is sometimes helpful to
transform the machine voltages into the – stationary
reference fame using
Fig. 2. (a) Output waveform of an 7-level cascade
multilevel inverter. (b) and (c) H-bridge voltages v1
and v2 which achieve the same output voltage
waveform v = v1 + v2.
Fig. 2(b) shows how the waveform of Fig. 2(a) is
generated if, for θ1 ≤ θ ≤ θ2, v1 = Vdc and v2 =
−Vdc/2 is chosen. Similarly, Fig. 2(c) shows how the
waveform of Fig. 2(a) is generated if, for θ1 ≤ θ ≤ θ2,
v1 = 0 and v2 = Vdc/2 is chosen. The fact that the
output voltage level Vdc/2 can be achieved in two
different ways is exploited to keep the capacitor
voltage regulated. Specifically, one measures the
capacitor voltage vc and the inverter current i. Then,
if vc < Vdc/2 and i > 0, one sets v1 = Vdc and v2 =
−Vdc/2 and the capacitor is being charged[6].
As with the standard cascaded H-bridge inverter the
power quality of the cascaded multilevel H-bridge
inverter may be greatly improved through utilization
of different dc voltages on each cell[1]. If the
nominal capacitor voltage is chosen as Vdc/2, then
one can compute the switching angles θ1, θ2, and θ3 \
as in Following the development in the Fourier series
expansion of the (staircase) output voltage waveform
of the multilevel inverter as shown in Fig. 2(a)
Fig.5 output waveform AT T=0.04
Fig.3 Topology of cascaded multilevel H-bridge drive.
IV. SWITCHING ANGLES
Ideally, given a desired fundamental voltage V1, one
wants to determine the switching angles θ1, θ2, and
θ3 so that becomes V (ωt) = V1 sin(ωt). In practice,
one is left with trying to do this approximately. For
three-phase systems, the triplen harmonics in each
phase need not be canceled as they automatically
cancel in the line-to-line voltages. In this case where
there are 3 DC sources, the desire is to cancel the 5th
and 7th order harmonics as they tend to dominate the
total harmonic distortion. The mathematical
statement of these conditions is then
Fig.6 output waveform AT T=0.15
This is a system of three transcendental equations in
the three unknowns θ1, θ2, and θ3.
V.
EXPERIMENTAL RESULTS
To validate the proposed topology and theory,
simulation of the three phase 17 level cascaded H
bridge multilevel inverter has been done by using
MATLAB software.
Fig.7 output waveform AT T=0.5
[6] Zhong Du1, Leon M. Tolbert2,3, John N. Chiasson2, and
Burak Özpineci3 1Semiconductor Power Electronics Center
Electrical and Computer Engineering North Carolina State
University” A Cascade Multilevel Inverter Using
a Single DC Source”.
[7] Gobinath., Mahendran., Gnanambal. PG Scholar, ,
K.S.Rangasamy College of Technology, Tiruchengode, India
Assistant Professor, Department of Electrical and Electronics
Engineering, K.S.Rangasamy Professor, Department of Electrical
and Electronics Engineering, Government College of Engineering,
Salem, India “new cascaded h-bridge multilevel inverter with
improved efficiency” International Journal of Advanced Research
in Electrical, Electronics and Instrumentation Engineering
Vol. 2, Issue 4, April 2013.
Fig.8 output waveform AT T=1
From the simulation circuit the various waveforms
depends upon the time as shown in figure (5, 6, 7,8).
In three phase 17 level inverter is achieved nearly
sine wave by increasing the level of the cascaded Hbridge cascaded and switching to achieve the desired
level output.
VI. CONCLUSION
The 17 level multi level inverter achieved sine wave
by using fundamental switching and the output is
done by using matlab software package. The main
purpose of multi level inverter to neglect
transformer in the circuit to avoid losses on the
transformer.
REFERENCES
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Knoxville, TN 37996-2100, USA “11-level Cascaded H-bridge
Grid-tied Inverter Interface with Solar Panels”
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