CHAMALA PAVANI REDDY h.no:2-1-66/A, Laxma Reddy Colony Uppal,Hyderabad-500039 Email: chamalapavani55@gmail.com Mobile no:+91-9177529951 LandLine: 040-27200224 Qualified professional possessed B.Tech (ECE) and M.Tech in Signals and Systems processing from Osmania University, interests in VLSI , microprocessors and microcontrollers, digital signal processing. Proven, strong Project & People management skills. Exceptionally well organized with a track record that demonstrates self-motivation, creativity and initiative to achieve both personal and corporate goals. A team player with strong communication, leadership, analytical, organizational and relationship management skills. Successful track record in accomplishing assigned projects within agreed cost/timelines without incidences of overruns. Detail-oriented with strong tactical skills but also skilled at keeping sight of larger strategic business picture and making optimal long-term business decisions. Excellent Relationship management and Team management skills with expertise in training, motivating and mentoring onsite and offshore junior managers, engineers, developers and technicians. Technical Skills: Operating Systems: Languages : frameworks : Windows, Unix C, C++, Core Java, J2EE Struts, Spring, hibernate Others: Verilog (CMOS vlsi design) EDUCATIONAL AND PROFESSIONAL DEVELOPMENT Sri Aurobindo International School, 1995, first Division with 82%. St Ann’s Junior College, 1997, First Division with 77.7%. B.Tech (Electronics & Communications Engineering) 2001 G. Narayanamma Institute of Technology and Science (JNTU University), First Division with 60%. M.Tech (Signals and Systems Processing) 2009 Osmania University, First Division with 78%. * Certified in C, C++, UNIX, from SSI Hyderabad * Certified in Java from Sathya techologies Hyderabad * Certified in CMOS VLSI design from Somorouthu Technologies, Hyderabad. WORK EXPERIENCE: 1. Worked as Assistant Professor in Bharat Engineering college for three years. 1.Worked as Assistant Professor in Mahatma Gandhi Institute of Technology for two years. 2.Worked as Assistant Professor in Teegala Krishna Reddy Institute of Technology for one year. PROJECTS UNDERTAKEN AS PART OF ACADEMICS Project Title: Intelligent Auto meter (B.Tech) Synopsis: The project was undertaken to display the amount spent on travel through an automobile. The tariff or the fare is then displayed on a four digit Light emitting diode (LED), display that would be showing the amount to be paid. Project Title: FFT implementation using FPGA for real time signal and image processing (M.Tech) Synopsis: To try to reconcile the dual requirements of high performance and ease of development ,this project reports on the design and realization of highlevel framework for the implementation of 1-D FFTs for realtime applications. PROJECTS UNDERTAKEN APART FROM ACADEMICS Project title: Design of IEEE 1149.1 Testing Bus Controller IP Core Synopsis: The project describes an original design of IEEE1149.1 testing bus controller IP core using reusable technology. The IP core can complete the JTAG Protocol conversion ,increase speed of auto data loading greatly and improve testing efficiency. Date of Birth: 1 August, 1980 Language Proficiency: English, Hindi and Telugu References: Available on request