Item
Spec's
Spec's with Sw
DL 3155M18T DIGITAL EXPERIMENTS - didactic equipment - circuit blocks: logic gates, DIGITAL EXPERIMENTS - didactic equipment - circuit blocks: logic gates,
Boolean Algebra, Karnaugh’s maps and combinatory networks, encoder
and decoder, Multiplexer and demultiplexer, Flip - Flop, counters, shift
registers - theoretical topics: binary system, logic functions and truth
tables, the theorems of the Boolean Algebra, fundamental logic
operators, NOT, AND and OR logic operators, operation of the AND and
OR operators as control devices in the transfer of logic signals, ORexclusive logic operator, canonical form of a function, graphic
representation of the functions, AND-OR-NOT function, NAND and NOR
logic operators, operation of the NAND and NOR operators as control
devices in the transfer of logic signals, carrying out of logic functions
with NAND and NOR universal operators, definition and characteristics
of a combinatory logic network, minimization of the combinatory
networks, minimization techniques of logic functions by means of the
Karnaugh's maps, the BCD code, encoders, decoders, multiplexer and
demultiplexer, generalities and definition of flip -flop, S-R flip-flop with
NOR and NAND operators, J-K flip flop and J-K Master-Slave flip -flop, T
and D flip -flop, 4 bit asynchronous and synchronous binary counter,
asynchronous and synchronous decimal counter, shift registers. Fault
simulation. It must be possible to perform the following experiences:
NOT logic gate and verification of the double negation property, AND
logic gate, OR logic gate, EX-OR (exclusive OR) logic gate, NAND logic
gate, NOR logic gate, EX-NOR (exclusive NOR) logic gate, Verification of
the associative property for the AND operator, Carrying out of a four
input AND operator, Verification of the associative properties for the OR
operator, Verification of operation of the AND and OR operators as
control devices in the data transfer, Verification of the Boolean algebra
theorems: theorems for one variable, theorems between one variable
and one constant, absorption theorems, Morgan's theorem, Functional
verification of the canonical forms of the EX-OR operator, Functional
verification of the first canonical form of a function assigned by means of
its truth table, Functional verification of a logic circuit by means of the
comparison with the truth table of its logic function, Functional
verification of the minimization of logic functions by means of the
Boolean Algebra, Karnaugh’s maps and combinatory networks, encoder
and decoder, Multiplexer and demultiplexer, Flip - Flop, counters, shift
registers - theoretical topics: binary system, logic functions and truth
tables, the theorems of the Boolean Algebra, fundamental logic
operators, NOT, AND and OR logic operators, operation of the AND and
OR operators as control devices in the transfer of logic signals, ORexclusive logic operator, canonical form of a function, graphic
representation of the functions, AND-OR-NOT function, NAND and NOR
logic operators, operation of the NAND and NOR operators as control
devices in the transfer of logic signals, carrying out of logic functions with
NAND and NOR universal operators, definition and characteristics of a
combinatory logic network, minimization of the combinatory networks,
minimization techniques of logic functions by means of the Karnaugh's
maps, the BCD code, encoders, decoders, multiplexer and demultiplexer,
generalities and definition of flip -flop, S-R flip-flop with NOR and NAND
operators, J-K flip flop and J-K Master-Slave flip -flop, T and D flip -flop, 4
bit asynchronous and synchronous binary counter, asynchronous and
synchronous decimal counter, shift registers. Fault simulation. It must be
possible to perform the following experiences: NOT logic gate and
verification of the double negation property, AND logic gate, OR logic
gate, EX-OR (exclusive OR) logic gate, NAND logic gate, NOR logic gate, EXNOR (exclusive NOR) logic gate, Verification of the associative property
for the AND operator, Carrying out of a four input AND operator,
Verification of the associative properties for the OR operator, Verification
of operation of the AND and OR operators as control devices in the data
transfer, Verification of the Boolean algebra theorems: theorems for one
variable, theorems between one variable and one constant, absorption
theorems, Morgan's theorem, Functional verification of the canonical
forms of the EX-OR operator, Functional verification of the first canonical
form of a function assigned by means of its truth table, Functional
verification of a logic circuit by means of the comparison with the truth
table of its logic function, Functional verification of the minimization of
logic functions by means of the Karnaugh's maps, Control of a lamp with
Karnaugh's maps, Control of a lamp with control combinatory logic
circuit, Automatic selection of events, BCD decimal-binary code
converter circuit, BCD - 7 segments binary code converter circuit, 4 to 1
line multiplexer or data selector switch, 1 to 4 line de multiplexer,
Verification of the logic operation of a J-K flipflop of Master-Slave type,
Verification of the logic operation of a D flipflop, Verification of the logic
operation of a T type flip-flop, Parallel-serial shift registers, Serialparallel shift registers, 4 bit asynchronous binary counter
forward/backward synchronous binary counter. The faults must be
inserted by microswitches mounted on the board; the module must be
provided with a EISA BUS 31+18 INTERFACE, connections and test points
by 2mm terminals.
Dimensions of the module: 297x260mm.
The module must be supplied with a theoretical and practical manual.
control combinatory logic circuit, Automatic selection of events, BCD
decimal-binary code converter circuit, BCD - 7 segments binary code
converter circuit, 4 to 1 line multiplexer or data selector switch, 1 to 4 line
de multiplexer, Verification of the logic operation of a J-K flipflop of
Master-Slave type, Verification of the logic operation of a D flipflop,
Verification of the logic operation of a T type flip-flop, Parallel-serial shift
registers, Serial-parallel shift registers, 4 bit asynchronous binary counter
forward/backward synchronous binary counter. The faults must be
inserted by software and by microswitches mounted on the board. The
module must be provided with a EISA BUS 31+18 INTERFACE for
connection to power supply and PC, with a software able to allow the
study of theoretical topics through PC with hyper textual navigation
according to the HTML standard. Connections and test points by 2mm
terminals.
Dimensions of the module: 297x260mm.
The module must be supplied with a theoretical and practical manual..