In the single-precision format, base 2 is used, thus allowing the use

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78
COMPUTER ARITHMETIC
Exponent E2
Exponent E1
Mantissa M2
Subtract
Mantissa M1
Divide
Result normalization and round logic
Result Exponent
Result Mantissa
Figure 4.15
FP division
In the single-precision format, base 2 is used, thus allowing the use of a hidden
bit. The exponent field is 8 bits. The IEEE single-precision representation is shown
in Figure 4.16.
The 8-bit exponent allows for any of 256 combinations. Among these, two combinations are reserved for special values:
1. e ¼ 0 is reserved for zero (with fraction m ¼ 0) and denormalized numbers
(with fraction m = 0).
2. e ¼ 255 is reserved for +1 (with fraction m ¼ 0) and not a number (NaN)
(with fraction m = 0).
e¼0
e ¼ 255
m¼0
m=0
0
+1
Denormalized
NaN
The single extended IEEE format extends the exponent field from 8 to 11 bits and
the mantissa field from 23þ1 to 32 or more bits (without a hidden bit). This results in
a total length of at least 44 bits. The single extended format is used in calculating
intermediate results.
4.3.4. Double-Precision IEEE Format
Here the exponent field is 11 bits and the significant field is 52 bits. The format is
shown in Figure 4.17.
Similar to the single-precision format, the extreme values of e (0 and 2047) are
reserved for the same purpose.
Figure 4.16
IEEE single-precision representation
EXERCISES
Figure 4.17
79
Double-precision representation
TABLE 4.2 Characteristics of the IEEE Single and Double
Floating-Point Formats
Characteristic
Length in bits
Fraction part in bits
Hidden bits
Exponent length in bits
Bias
Approximate range
Smallest normalized number
Single-precision
Double-precision
32
23
1
8
127
2128 _ 3:8 _ 1038
2_126 _ 10_38
64
52
1
11
1023
21024 _ 9:0 _ 10307
2_1022 _ 10_308
A number of attributes characterizing the IEEE single- and double-precision
formats are summarized in Table 4.2.
4.4. SUMMARY
In this chapter, we have discussed a number of issues related to computer arithmetic.
Our discussion started with an introduction to number representation and radix conversion techniques. We then discussed integer arithmetic and, in particular, we discussed the four main operations, that is, addition, subtraction, multiplication, and
division. In each case, we have shown basic architectures and organization. The
last topic discussed in the chapter has been floating-point representation and arithmetic. We have also shown the basic architectures needed to perform basic floating-point operations such as addition, subtraction, multiplication, and division.
We ended our discussion in the chapter with the IEEE floating-point number
representation.
EXERCISES
1. Represent the decimal values 26, 2123 as signed, 10-bit numbers using each
of the following binary formats:
(a) Sign-and-magnitude;
(b) 2’s complement.
2. Compute the decimal value of the binary number 1011 1101 0101 0110 if the
given number represents unsigned integer. Repeat if the number represents
2’s complement. Repeat if the number represents sign-magnitude integer.
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