Characterization of electronic structure of periodically strained
graphene
Marjan Aslani1*, C. Michael Garner1,a), Suhas Kumar1,2*, Dennis Nordlund3, Piero Pianetta1,3, and Yoshio
Nishi1
1
Department of Electrical Engineering, Stanford University, Stanford, California, 94305, USA
2
Hewlett-Packard Laboratories, 1501 Page Mill Road, Palo Alto, California, 94304, USA
3
Stanford Synchrotron Radiation Lightsource, SLAC National Accelerator Laboratory, 2575 Sand Hill
Road, Menlo Park, California, 94025, USA
Supplemental material
1. Calculation of strain in graphene
For a detailed background on the following analysis, please see literature cited here. 1-4 Using the formula
∆𝜔
𝜔0
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= 𝛾(𝜀𝑥𝑥 + 𝜀𝑦𝑦 ) ± 2 𝛾𝑆ℎ𝑒𝑎𝑟 (𝜀𝑥𝑥 − 𝜀𝑦𝑦 ) where ∆𝜔 is the change in Raman band frequency, 𝜔0 is the
Raman band frequency, 𝛾 is the Guneisen parameter (~1.24, calculated from carbon nanotubes), 𝛾𝑆ℎ𝑒𝑎𝑟 is
an equivalent constant for shear strain and 𝜀𝑥𝑥 and 𝜀𝑦𝑦 are components of strain in perpendicular lateral
dimensions. We consider contributions from shear strain to be negligible and hence ignore the second term
in the equation. For example, a shift in the D peak by -22 cm-1, centered at 1350 cm-1 implies biaxial strain
of 0.66% in both the lateral dimensions and alternately, uniaxial strain of 1.61% in either of the two lateral
dimensions.
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Figure S1: (a) Raman 2D peaks from strained and unstrained graphene with a lorentzian peak fit to the
data. The vertical dashed lines indicate the centroid of the peaks, also showing that there were shifts in the
peaks in the order of tens of cm-1 of wavenumbers. (b) Several acquisitions of the Raman 2D peak at
random positions in a strained sample (with 90 nm pillars) that were used to obtain the averaged 2D peak,
also shown in bold in the same plot. The 2D peak from unstrained graphene is shown for comparison.
2. Fabrication of nano-pillars
300 nm of thermal oxide is first grown on a silicon wafer. The wafer is then coated with 300 nm Ma-N
2403 resist and baked at 90C for 1 min. A layer of conductive polymer, e-spacer, is additionally spun on
before e-beam exposure to reduce charging effects. The nanopillar e-beam pattern consists of 200 nm-wide
circles spaced 400 nm apart. The resulting pattern was developed with Ma-D 525 after washing the Espacer off of the resist-coated surface with water.
To form the oxide nanopillars, reactive ion etching (RIE) is used. First, the wafer is baked at 90C to harden
the developed resist structures. RIE then proceeds using gases O2 and CHF3, etching to a final depth of
either 90nm or 105nm. Afterward, the remaining Ma-N resist on top of the pillars is removed using a plasma
asher followed by Pirahna cleaning.
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Transfer process:
CVD grown graphene on copper (Cu) is used in this experiment. First, a 300nm layer of 495K PMMA is
spun on graphene grown on top of the Cu film. Graphene grown on the backside of the Cu film is then
removed using an oxygen plasma. Next, the PMMA/graphene/Cu stack is placed in FeCl 3 to remove the
copper, leaving behind the PMMA/graphene stack. To remove any organic and metal impurities,
PMMA/graphene is cleaned up using 5:1:1 H2O: NH4OH: H2O2, followed by 5:1:1 H2O: HCl: H2O2. In the
last cleaning cycle, the graphene/PMMA stack is left floating in the water before transferring to the final
substrate.
To control for effects caused by variations in fabrication procedure or graphene quality, flat and strained
graphene are created at once on a single piece of SiO2 wafer by laying a large piece of graphene over an
area both with and without SiO2 nanopillars. Once fully dried at room temperature, the substrate goes
through a gentle bake before the PMMA is removed from graphene in a forming gas furnace. Finally, as a
reference for work function calibration, gold is evaporated around the strained and flat graphene regions.
3. Back-gated Field-Effect Transistor (FETs) prepared for electrical measurements
3-terminal, back-gated field effect transistors are fabricated on strained and flat graphene regions for
electrical characterization. 150nm of thermal oxide is first grown on a highly p++ doped silicon wafer (<1
Ω-cm). Fabrication of the nanopillars and transfer of graphene over flat and nanopillar regions are carried
as described above. Once graphene is transferred, ebeam lithography is used to define FET areas and excess
graphene is removed using 250W O2 plasma (150 mTorr, 100 SCCM). Source and drain regions are created
using ebeam lithography. Next, 50nm of gold (Au) on top of 5nm of Titanium (Ti) is deposited in the
contact regions using e-beam evaporation. The fabrication is completed by liftoff in acetone. Contact width
is 40 um. The spacing between these contacts, which is the devices channel length, is 1um. Samples are
annealed at 300C in vacuum before electrical measurements are carried.
3
It is important to note that the amount of graphene available in the channel region of each strained graphene
FET varies from one device to another. Due to peeling, graphene may delaminate from parts of the
nanopillar structure and rip. Therefore there may be more graphene available in one channel and less in
another. This is why we believe the shape of the conductance graphs (Id-Vg) is more important the absolute
magnitude of the current.
4. X-ray absorption spectroscopy
The spectra were normalized to the total yield from a gold grid that was located just upstream of the
sample. In this case, the grid, which is electroformed and has an 80% transmission, was freshly coated
with gold. As a result, there was no interfering carbon signal which you would see from a grid that has
been sitting around for a while. In the region of interest, the gold grid gave a relatively flat response in
this energy range so we could just use the measured yield. So in the absence of graphene, there was not
too many other sources of carbon that could provide a signal in this energy range. We have nonetheless
included this background absorption in Figure S2.
Figure S2: X-ray absorption from C-1s levels with no graphene in place. There was no other source of
carbon absorption in the chamber due to which we saw a relatively flat response.
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5. PMMA annealing
We believe we got rid of most of the PMMA during the forming gas anneal. To check this, we made a
wafer with no graphene go through the same PMMA process. We then measured the photoemission of the
surface in the carbon energies and saw only SiO2 and no carbon, hence, it is unlikely that there was a
significant amount of PMMA left behind. We have included this specific data in Figure 2b.
Also, we fabricated devices of unstrained and strained graphene using an identical PMMA+anneal
process. So even if there were residual particles of PMMA, they must have affected the strain in both the
samples in an identical way. Hence the relative differences between them must not have been affected to a
significant extent.
1
2
3
4
Ni, Z. H. et al. Uniaxial strain on graphene: Raman spectroscopy study and band-gap opening.
ACS nano 2, 2301-2305 (2008).
Huang, M. et al. Phonon softening and crystallographic orientation of strained graphene studied
by Raman spectroscopy. Proceedings of the National Academy of Sciences 106, 7304-7308
(2009).
Thomsen, C., Reich, S. & Ordejon, P. Ab initio determination of the phonon deformation
potentials of graphene. Physical Review B 65, 073403 (2002).
Reich, S., Jantoljak, H. & Thomsen, C. Shear strain in carbon nanotubes under hydrostatic
pressure. Physical Review B 61, R13389 (2000).
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