Kevin Forgie
Partner: Becky Ripley
TA: Tom Tyson
Section: 001(H)
EE 210H
Lab 6
Fall 2010
10/12/10
Operational Amplifier Circuit Design Lab
Task 1
1.1 Design Objective
The focus of this task was to design a basic amplifying circuit to amplify a mono audio signal from a
dynamic microphone, utilizing the LF412CN operational amplifier (op amp). The maximum amplitude of
the input signal is fairly weak, and the goal of the amplifier is to invert and amplify this signal to larger
amplitude so that it can drive audio equipment. This equipment is sensitive, however, so it is important
that the output signal’s amplitude be limited because too large of an amplitude will damage the
equipment.
1.2 Schematic
Figure 1: Schematic of basic amplifier circuit, resistors used are those shown with nominal values
1.3 Theory of Operation
An Op amp is a fairly complicated circuit within itself that is powered separately from the rest of the
circuit. It has two input terminals, an inverting and non-inverting, and combines and amplifies these
inputs into one output terminal. The op amp has a maximum output voltage, which is determined by
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the value of the voltage powering the op amp. Left on its own with an input signal, the op amp will
automatically amplify the signal to its maximum, or saturation, voltage. Therefore, if a non-saturated
value is desired, or a value within the linear region of the op amp’s operation, “negative feedback” in
the form of resistors is required. This feedback keeps the op amp operating linearly by connecting the
output terminal to the negative input terminal with a resistor to dissipate some of the voltage. The
degree of amplification, or gain, within the linear region is controlled by another resistor placed before
the negative input terminal, and is described quantitatively by the ratio of resistances of the feedback
resistor to the input resistor.
In this circuit, there is a simple alternating input voltage, and because a simple inverted output is
wanted, this is fed into the inverting terminal of the op amp. Appropriate source and feedback resistors
are chosen to achieve the desired gain within the linear region of the op amp’s operation. The positive
input terminal of the op amp is grounded because there is not a non-inverted aspect of the output.
1.4 Derivations and Analysis
This task considers a system with the following parameters. The mono audio signal from the
microphone serving as the input signal has a maximum amplitude of 200mVPP and a frequency of 440Hz,
and can therefore be modeled as:
(1)
Vin  0.1 sin(2 440t V
The desired output has a maximum amplitude of 16 VPP and it is inverted, and can be modeled as:
Vout  8 sin(2 440tV
(2)
The gain of the inverting op amp circuit can be described by the ratio of Vout to Vin, namely:

G
Vout
Vin
(3)
(3), it is shown that a gain of -80 is required for this circuit. This is achieved
Using equations (1), (2), and
by choosing appropriate values for the feedback and input resistors, according to:
Rf
(4)

G
Ri
Using equation (4), it is shown that the feedback resistance must be 80 times as large as the input
resistance. Using this criterion, values of 400kΩ for Rf and 5kΩ for Ri were chosen.

1.5 Experimental Results
The closest available resistors to the calculated values for Rf and Ri were nominally 400kΩ and 5.1kΩ,
and measured to be 395.5kΩ and 5.18kΩ. Based on these actual resistance values and equation (4), a
gain of -76.35 was expected for the circuit. An oscilloscope was utilized to measure the input and
output signals in the circuit, and display their amplitudes.
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Figure 2: Oscilloscope capture of circuit (input channel 1, output channel 2)
Using these amplitudes and equation (3), a gain of -74.77 was observed in the circuit. In order to
compare the desired, theoretical, and actual gains, a percent error calculation can be utilized:
AcceptedValue ExperimentalValue

%Error 
 100%
AcceptedValue


(5)
The difference between the desired gain (accepted, 80) and the actual gain (experimental, 74.77) is
6.54%, by equation (5). The difference between the theoretical (accepted, 76.35) and actual
(experimental, 74.77) gains is 2.07%, by equation (5).

1.6 Conclusions
There was a somewhat significant difference (6.54%) between the gain actually generated by the circuit
and the gain the circuit was designed to generate. This stems from several factors. Firstly, the closest
resistor available to the 5kΩ was 5.1kΩ, and its actual resistance was 5.18kΩ. This increased value for Ri
caused a decrease in the gain. Also, the 400kΩ resistor had an actual resistance of 395.5kΩ, and this
smaller value for Rf caused a decrease in the gain. Lastly, the amplitude of the input signal was slightly
larger than what was supposed to be used in the circuit, causing another decrease in the gain. Despite
the actual gain being less than desired, the circuit still functioned to produce a 16VPP output signal,
which would not damage the equipment receiving the signal.
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There was a slight difference (2.07%) between the gain that the circuit should have produced, given the
actual values of the equipment, and what was actually observed. This stems from several factors. There
is an increased amount of resistance in the entire circuit from the wires; the calculations assume ideal
wires with no resistance, but in reality they have a small resistance. The oscilloscope measuring the
input and output has a limited degree of accuracy, causing small rounding errors. Additionally, because
of the alternating nature of the voltage source, the values for Vin and Vout being measured by the
oscilloscope were constantly fluctuating. Therefore, the screenshot taken for analysis may not be
representative of the truest values. Lastly, the voltage source was assumed to be ideal (i.e. no internal
resistance); however, as a practical voltage source it has an internal resistance that will affect the circuit.
The design overall worked pretty well to achieve its purpose. To improve it, keeping all other things the
same, replacing the input resistor with one of a resistance of 4.94kΩ would result in the exact gain the
circuit was designed to produce.
1.7 Additional Problem
If instead a variable-gain amplifier with an output signal in the voltage range of 8VPP – 16VPP was to be
designed, only couple minor changes to the circuit used above would be necessary. Keeping the input
resistance the same, the value of the feedback resistor would need to be cut in half; also, a
potentiometer (pot) with resistance equal to the feedback resistor would be placed in series with it.
This results in values of Ri = 5kΩ, and Rf = Rpot = 200kΩ. Therefore, when the potentiometer is
minimized, and therefore has effectively no resistance, Rf,total is 200kΩ and the gain of the circuit is 40, by
equation (4). This results in an output amplitude of 8VPP. When the potentiometer is maximized, with
200kΩ resistance, Rf,total is 400kΩ and the gain of the circuit is 80, by equation (4). This results in an
output amplitude of 16VPP. Thus, the desired swing in the output signal’s voltage has been achieved.
Task 2
2.1 Design Objective
The purpose of this task was to design a weighted summing amplifying circuit that would modify a
stereo audio signal with unbalanced left and right channels. It must produce an amplified output that is
a balanced and inverted sum of the two channels. Therefore, different amplification of each channel is
necessary to compensate for the unbalanced input signal amplitudes. The output must also be limited,
because the circuit is feeding sensitive audio equipment that will be damaged if the signal exceeds a
certain maximum value.
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2.2 Schematic
Figure 3: Schematic of weighted summing amplifier circuit, resistors used are those shown with nominal
values
2.3 Theory of Operation
In this circuit, there are two simple alternating voltage sources, and the output is an equally weighted
and inverted sum. Therefore, both of the inputs are fed into the inverting input terminal of the op amp.
To keep the op amp operating linearly, a feedback resistor is utilized. Because different gains are
required for each of the input signals, each is assigned its own input resistor, and these have different
values. The input resistor for the larger input signal will have a larger value to achieve a smaller gain,
and the input resistor for the smaller input signal will have a smaller value to achieve a larger gain. The
input signals have different frequencies, so they will combine out of phase in the output; however, this
is not a concern, as it has no bearing on the amplitudes. The positive input terminal of the op amp is
grounded because there is not a non-inverted aspect of the output.
2.4 Derivations and Analysis
This task considers a system with the following parameters. The input signal from the left channel has a
maximum amplitude of 500mVPP and a frequency of 3520Hz, and can therefore be modeled as:
Vin,left  (0.25 sin(2  3520t))V
(6)

5
The input signal from the right channel has a maximum amplitude of 200mVPP and a frequency of 440Hz,
and can be modeled as:
Vin,right (0.1 sin(2  440t))V
(7)
The desired output signal has a total amplitude of 16VPP, and is an equally balanced signal, so the
contribution of each input to the output will have an amplitude of 8VPP. This results in the following
model for the output: 
Vout  (4 sin(2  440t)  4 sin(2  3520t))V
(8)
Because the circuit is a linear circuit, the gains for each of the inputs can be calculated individually using
superposition and added to achieve the output using equations (3), (6), and (7), which shows that a gain
of -40 is necessary for the right channel and a gain of -16 is required for the left channel. The

appropriate resistor values for the input resistors, Ri,l and Ri,r, and the feedback resistor, Rf, can be
calculated using equation (4). Thus it is shown that the feedback resistance must be 40 times the right
input resistance and also 16 times the left feedback resistance. Using this criterion, values of 40kΩ for
Rf, 2.5kΩ for Ri,l, and 1kΩ for Ri,r were chosen.
2.5 Experimental Results
The resistor values chosen above were available, and their actual resistances were measured to be:
Rf=39.39kΩ, Ri,l=2.378kΩ, and Ri,r=0.996kΩ. An oscilloscope was used to measure the input signals and
display their amplitudes.
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Figure 4: Oscilloscope capture of inputs (right input channel 1, left input channel 2)
The combined output signal was also captured using an oscilloscope, and its amplitude displayed.
Figure 5: Oscilloscope capture of output (channel 2 only)
In order to compare the actual output with the desired output of the design and the expected output
given the actual values, a linear combination of equations (3), (4), (6), and (7) results in:
𝑅𝑓
𝑅𝑓
(9)
𝑉𝑜𝑢𝑡 = − (
∙ 𝑉𝑖𝑛, 𝑙 +
∙ 𝑉𝑖𝑛, 𝑟) 𝑉
𝑅𝑖, 𝑙
𝑅𝑖, 𝑟
Using equation (9), the theoretical expected output amplitude is 17.29V. The difference between the
desired output (accepted, 16V) and the actual output (experimental, 16.4V) is 2.5%, by equation (5).
The difference between the theoretical (accepted, 17.29V) and actual (experimental, 16.4V) outputs is
5.15%, by equation (5).
2.6 Conclusions
There was a somewhat significant difference (2.5%) between the output actually generated by the
circuit and the output the circuit was designed to generate. This stems from several factors. Firstly, the
value of Ri,l was actually 2.378kΩ and the value of Rf was actually 39.39kΩ. This resulted in a gain of the
left channel of 16.56 rather than the ideal 16, and therefore a significantly larger output. The value of
Ri,r was actually 0.996, which resulted in a gain in the right channel of 39.55 rather than the ideal 40, and
therefore a slightly smaller output. The effect on the left channel had an increased effect since its
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amplitude was initially larger, causing the output to be larger than intended. Also, both of the input
signals had slightly larger amplitudes than desired, so the output was caused to be slightly larger. Since
the output signal’s amplitude was 16.4VPP, it was slightly over the limit prescribed for the task, and
would have potentially damaged the sensitive audio equipment it was driving. This would have to be
corrected for in the circuit and retested before actually using the circuit for this purpose.
There was a slight difference (5.15%) between the output that the circuit should have produced, given
the actual values of the equipment, and what was actually observed. This stems from several factors.
There is an increased amount of resistance in the entire circuit from the wires; the calculations assume
ideal wires with no resistance, but in reality they have a small resistance. The oscilloscope measuring
the input and output has a limited degree of accuracy, causing small rounding errors. Additionally,
because of the alternating nature of the voltage source, the values for Vin and Vout being measured by
the oscilloscope were constantly fluctuating. Therefore, the screenshots taken for analysis may not be
representative of the truest values. Lastly, the voltage sources were assumed to be ideal (no internal
resistance); however, as practical voltage sources they have an internal resistance that will affect the
circuit slightly.
Overall the design worked pretty well to fulfill its purpose. The output signal’s amplitude was too high,
so to correct for this a larger resistor (2.79kΩ) for Ri,l should be used while keeping everything else the
same.
2.7 Additional Problem
If instead the balanced output signal was not to be inverted, there is a very easy change to the circuit
that would be necessary. This is to add a second amplifier to the circuit. The original circuit would
remain unchanged, except for the output, which would be fed into the negative input terminal of the
second op amp. This op amp would function as an inverting buffer, with negative feedback but no
resistance, so that it will invert the signal but not affect its amplitude. Thus the overall output signal will
have the same characteristics as before, except that it will be inverted again, and effectively uninverted.
Task 3
3.1 Design Objective
The purpose of this task was to design a weighted summing amplifying circuit that would modify a
stereo audio signal with balanced left and right channels. It must produce an amplified output that is an
inverted sum of the two channels; however it must also be able to independently vary the gain of each
channel. The overall output amplitude must vary between specified minimum (nonzero) and maximum
values. The output must also be limited to this maximum value, because the circuit is feeding sensitive
audio equipment that will be damaged if it is exceeded.
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3.2 Schematic
Figure 6: Schematic of two channel Mixer with balanced inputs, resistors used are those shown with
nominal values
3.3 Theory of Operation
In this circuit, there are two simple alternating voltage sources, and the output is an independentlyvarying weighted and inverted sum of the inputs. Therefore, both of the inputs are fed into the
inverting input terminal of the op amp. To keep the op amp operating linearly, a feedback resistor is
utilized. Because variable gains are required for each of the input signals, each is assigned its own input
resistor along with a potentiometer, which functions as a variable resistor. The input resistors have the
same values because the signals are initially balanced, and are required because there is gain in the
circuit regardless of if the potentiometers are turned all the way up (maximum resistance) or down (no
resistance). The input signals have different frequencies, so they will combine out of phase in the
output; however, this is not a concern, as it has no bearing on the amplitudes. The positive input
terminal of the op amp is grounded because there is not a non-inverted aspect of the output.
3.4 Derivations and Analysis
This task considers a system with the following parameters. The input signal from the left channel has a
maximum amplitude of 500mVPP and a frequency of 3520Hz, and can therefore be modeled as:
9
Vin,left  (0.25 sin(2  3520t))V
(10)
The input signal from the right channel also has a maximum amplitude of 500mVPP, and a frequency of
440Hz, and can be modeled as:
(11)
Vin, right (0.25 sin(2  440t ))V

The desired output signal must range from a total maximum amplitude of 16VPP to a total minimum
amplitude of 0.4VPP, and the contributions from each are variable. Therefore the output signal can be
modeled as:
(12)
Vout  ( A  sin( 2  440 t )  B  sin( 2  3520 t ))V
where A and B represent the gains for each channel and range from 0.1 to 4, which is found using
equation (3).
Because the circuit is linear, the gains for each of the inputs can be dealt with individually using
superposition and added to achieve the output. Because only 20kΩ potentiometers are available, the
other resistor values will be based around them. Equation (4) is modified appropriately to yield
equations for maximum and minimum gain of each channel:
𝑅𝑓
(13)
𝐺𝑚𝑖𝑛 = −
𝑅𝑝𝑜𝑡 + 𝑅𝑖
𝑅𝑓
(14)
𝐺𝑚𝑎𝑥 = −
𝑅𝑖
Using equations (10), (11), and (12), it is shown that a gain of 0.4 is necessary to achieve the minimum
output amplitude, and a gain of 16 is necessary to achieve the maximum output amplitude. The
appropriate resistor values for Ri and Rf can then be calculated using equations (13) and (14). Thus it is
shown that the feedback resistance must be 16 times as large as the input resistance alone, and 0.4
times as large as the input resistance and maximum potentiometer resistance combined. Using this
criterion, values of 8kΩ for Rf and 0.5kΩ for Ri were chosen.
3.5 Experimental Results
The closest resistor values to those chosen above were 8.2kΩ and 0.5kΩ nominally, and were measured
to be 8.08kΩ, 0.5029kΩ (Ri,l), and 0.5067kΩ (Ri,r). An oscilloscope was used to measure the input signals
and display their amplitude.
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Figure 7: Oscilloscope capture of inputs (right input channel 1, left input channel 2)
The oscilloscope was also used to display the maximum output and its amplitude.
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Figure 8: Oscilloscope capture of maximum output
Finally, the oscilloscope was used to display the minimum output and measure its amplitude.
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Figure 9: Oscilloscope capture of minimum output
In order to compare the actual output with the desired output of the design and the expected output
given the actual values, a combination of equations (12), (13), (14) results in:
𝑅𝑓
𝑅𝑓
(15)
𝑉𝑜𝑢𝑡, 𝑚𝑖𝑛 = − (
∙ 𝑉𝑖𝑛, 𝑙 +
∙ 𝑉𝑖𝑛, 𝑟) 𝑉
𝑅𝑖, 𝑙 + 𝑅𝑝𝑜𝑡
𝑅𝑖, 𝑟 + 𝑅𝑝𝑜𝑡
𝑅𝑓
𝑅𝑓
(16)
𝑉𝑜𝑢𝑡, 𝑚𝑎𝑥 = − (
∙ 𝑉𝑖𝑛, 𝑙 +
∙ 𝑉𝑖𝑛, 𝑟) 𝑉
𝑅𝑖, 𝑙
𝑅𝑖, 𝑟
Using equations (15), the theoretical minimum expected output amplitude is 0.413V. Using equation
(16), the theoretical maximum expected output amplitude is 16.77V. The difference between the
desired minimum output (accepted, 0.4V) and the actual minimum output (experimental, 0.426V) is
6.5%, by equation (5). The difference between the theoretical (accepted, 0.413V) and actual
(experimental, 0.426V) minimum outputs is 3.15%, by equation (5). The difference between the desired
maximum output (accepted, 16V) and the actual maximum output (experimental, 15.5V) is 3.13%, by
equation (5). The difference between the theoretical (accepted, 16.78V) and actual (experimental,
15.5V) maximum outputs is 7.63%, by equation (5).
3.6 Conclusions
There was a slight difference in the outputs generated by the circuit and what it was designed to
generate, namely 6.5% for the minimum and 3.13% for the maximum. This stems from several factors.
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Firstly, the resistors available did not exactly match those used in the design, and their measured values
differed slightly from the nominal values. This resulted in a slightly larger gain than anticipated. The
input signal amplitudes were also slightly different from what was called for by the problem, which
caused another increase in the output amplitude. The potentiometers we nominally 20kΩ, however
their actual resistances are unknown and can this can affect the circuit somewhat as well. Since the
output signal’s amplitude ranged from 0.426VPP to 15.5VPP, its overall range was slightly less than the
range the circuit was designed to produce. However, its maximum amplitude did not exceed the 16VPP
maximum, so the sensitive equipment it was driving would not be damaged.
There was also a small difference between what the circuit should have produced, given the actual
values of the equipment being used, and what was actually observed, namely 3.15% for the minimum
and 7.63% for the maximum. This stems from several factors. There is an increased amount of
resistance in the entire circuit from the wires; the calculations assume ideal wires with no resistance,
but in reality they have a small resistance. The oscilloscope measuring the input and output has a
limited degree of accuracy, causing small rounding errors. Additionally, because of the alternating
nature of the voltage source, the values for Vin and Vout being measured by the oscilloscope were
constantly fluctuating. Therefore, the screenshots taken for analysis may not be representative of the
truest values. Lastly, the voltage sources were assumed to be ideal (no internal resistance); however, as
practical voltage sources they have an internal resistance that will affect the circuit slightly.
This design worked pretty well to achieve its purpose. The desired output voltage swing was very nearly
achieved, and was within its upper and lower bounds. To get it closer, better potentiometers with
known actual resistances could be used, and then appropriate adjustments could be made to the other
resistors.
3.7 Additional Problem
If instead an output voltage swing of 0VPP to 16VPP were desired, significant changes would have to be
made to the circuit. Each input signal would be fed into the negative terminal of a separate op amp.
Each input signal would have an input resistor of 1.25kΩ, and a 20kΩ potentiometer would serve as the
feedback resistor for each op amp. The outputs from each op amp would be connected to provide an
overall output for the circuit. When the potentiometer is turned down all the way, there is no feedback
resistance so the gain is equal to 0. Therefore there is an output voltage of 0V from both op amps, and
0V overall. When the potentiometer is turned up all the way, the feedback resistance is equal to 20kΩ,
so the gain is equal to 16 for each op amp. Therefore there is an output voltage of 8VPP from both op
amps, and 16VPP overall.
Task 4
4.1 Design Objective
The purpose of this task was to design a level-shifting amplifying circuit that would modify a mono audio
from an electret condenser microphone. This type of microphone always includes a DC offset in
addition to the signal itself. This output signal must be inverted, amplified, and have the DC offset
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removed to drive sensitive audio equipment. The output must not exceed a certain maximum
amplitude or else it will damage the equipment.
4.2 Schematic
Figure 10: Level-shifting amplifier, resistors used are those shown with nominal values
4.3 Theory of Operation
In this circuit, there is a complex input signal, consisting of an alternating voltage and a dc offset voltage.
The output must be inverted, amplified, and have the dc offset removed, so the input signal is fed into
the inverting terminal of the op amp. To keep the op amp operating linearly, a feedback resistor is
utilized. For amplification to occur, an input resistor is used. To eliminate the DC offset of the input
signal, a dc voltage source with a specific voltage is fed into the non-inverting terminal of the op amp.
4.4 Derivation and Analysis
This task considers a system with the following parameters. The mono audio signal from the
microphone serving as the input signal has a maximum amplitude of 600mVPP, a frequency of 440Hz,
and a DC offset of 2.5V, and can therefore be modeled as:
Vin  0.3 sin(2  440t   2.5)V
(17)
The desired output has a maximum amplitude of 16 VPP, it is inverted, and has no DC offset, and can be
modeled as:
(18)
Vout   8  sin(2  440t  0V
15
Because the circuit is linear, the amplification and inversion of the alternating voltage can be dealt with
separately from the removal of the DC offset. Using equations (17), (18), and (3), it can be shown that a
gain of -26.67 is necessary for this circuit. Using equation (4), the appropriate feedback and input
resistors can be chosen to achieve this gain. This results in Ri=3kΩ and Rf=80kΩ.
To eliminate the DC offset, a DC voltage source must be fed into the non-inverting terminal of the op
amp. Its value is found using a ratio of the inverting gain and the DC offset to the non-inverting gain and
the DC voltage source. The non-inverting gain is described as:
(19)
Rf  Ri
G
Ri
To find the value of the DC voltage source, the following equation is solved:
𝑅𝑓
𝑅𝑓+𝑅𝑖
(20)
(− ) ∙ 𝐷𝐶𝑜𝑓𝑓𝑠𝑒𝑡 + (
) ∙ 𝐷𝐶𝑣𝑜𝑙𝑡𝑎𝑔𝑒𝑠𝑜𝑢𝑟𝑐𝑒=0
𝑅𝑖
𝑅𝑖
The solution of equation (20) yields a voltage of 2.41V that must be fed into the non-inverting terminal
to cancel out the DC offset of the input signal.
4.5 Experimental Results
The closest resistor values to those chosen above were 82kΩ and 3kΩ nominally, and were measured to
be 81.8kΩ and 2.966kΩ. With these values, a gain of -27.58 is expected in this circuit. An oscilloscope
was used to measure the input and output signals, and display their amplitudes and means.
Figure 11: Oscilloscope capture of circuit (input channel 1, output channel 2)
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Using these amplitudes and equation (3), a gain of -26.88 was observed in the circuit. The means for
channel 1 and 2 represent the DC offset of the input and output signals, respectively. The difference
between the desired gain (accepted, 26.67) and the actual gain (experimental, 26.88) is 0.79%, by
equation (5). The difference between the theoretical (accepted, 27.58) and actual (experimental, 26.88)
gains is 2.54%, by equation (5).
4.6 Conclusions
There was a very slight difference (0.79%) between the gain actually generated by the circuit and the
gain the circuit was designed to generate. This stems from several factors. Firstly, the closest resistor
available to the 80kΩ was 82kΩ, and its actual resistance was 81.8kΩ. This increased value for Rf caused
an increase in the gain. Also, the 3kΩ resistor had an actual resistance of 2.966kΩ, and this smaller
value for Ri caused another increase in the gain. Lastly, the amplitude of the input signal was slightly
larger than what was supposed to be used in the circuit, causing the output amplitude to be higher.
Because of these things, the circuit functioned to produce a 17.2VPP output signal, which would damage
the equipment receiving the signal. This could easily be corrected for by using a smaller value of Rf,
which would have been done if an 80kΩ resistor was available.
There was a slight difference (2.54%) between the gain that the circuit should have produced, given the
actual values of the equipment, and what was actually observed. This stems from several factors. There
is an increased amount of resistance in the entire circuit from the wires; the calculations assume ideal
wires with no resistance, but in reality they have a small resistance. The oscilloscope measuring the
input and output has a limited degree of accuracy, causing small rounding errors. Additionally, because
of the alternating nature of the voltage source, the values for Vin and Vout being measured by the
oscilloscope were constantly fluctuating. Therefore, the screenshot taken for analysis may not be
representative of the truest values. Lastly, the voltage source was assumed to be ideal (i.e. no internal
resistance); however, as a practical voltage source it has an internal resistance that will affect the circuit.
All of these things serve to decrease the actual gain and the output from the circuit.
Other than producing an output that was slightly too large, this circuit functioned really well to eliminate
the DC offset of the input signal. This is shown by the output mean of -4.55mV, which is effectively 0.
Given all of the slight uncertainties and imperfections in the circuit, it would be very hard to improve
this value.
4.7 Additional Problem
If a variable signal amplification in addition to the removal of the DC offset was desired, the circuit could
be modified according to the following. There would be two op amps used in series. The first op amp
would have the original input signal being fed into the inverting input terminal, and a DC voltage source
equal to 2.5V being fed into the non-inverting terminal. There would negative feedback with no
resistance, so this first op amp would act as an inverting buffer that would not affect the amplitude, but
would invert the signal and eliminate the DC offset. Then the output from this op amp would be fed
into the non-inverting input terminal of the second op amp. This op amp would have a negative
feedback resistance from a 20kΩ potentiometer, and a 1.28kΩ resistor as a grounded input resistor for
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the inverting terminal. These values, using equation (19) provide a gain between 1 and 26.67, and
therefore an output voltage amplitude between -0.6VPP and -16VPP. Thus this achieves removal of the
DC offset as well as an inverting amplification of the input signal.
Task 5
5.1 Design Objective
The purpose of this task was to design a variable level-shifting amplifying circuit that would modify a
mono audio from an electric condenser microphone. This type of microphone always includes a DC
offset in addition to the signal itself; however its exact value is unknown, its range is known. This output
signal must be inverted, amplified, and have the DC offset removed for any value within its range to
drive sensitive audio equipment. The output must not exceed a certain maximum amplitude or else it
will damage the equipment.
5.2 Schematic
Figure 12: Variable Level-Shifting Amplifier, resistors used are those shown with nominal values
5.3 Theory of Operation
In this circuit, there is a complex input signal, consisting of an alternating voltage and a variable dc offset
voltage. The output must be inverted, amplified, and have the DC offset removed, so the input signal is
fed into the inverting terminal of the op amp. To keep the op amp operating linearly, a feedback
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resistor is utilized. For amplification to occur, an input resistor is used. To eliminate the DC offset of the
input signal, a DC voltage source with a specific voltage is fed into the non-inverting terminal of the op
amp. But because the input DC offset is variable, a potentiometer must be used in parallel with another
input resistor for the non-inverting terminal to provide control for the amount of voltage going into the
op amp.
5.4 Derivations and Analysis
This task considers a system with the following parameters. The mono audio signal from the
microphone serving as the input signal has a maximum amplitude of 600mVPP, a frequency of 440Hz,
and a variable DC offset ‘B’, which varies between 1V and 3V, and can therefore be modeled as:
Vin  0.3  sin(2  440t   B)V
(21)
The desired output has a maximum amplitude of 16 VPP, it is inverted, and has no DC offset, and can be
modeled as:
(22)
Vout   8  sin(2  440t)  0V
Because the circuit is linear, the amplification and inversion of the alternating voltage can be dealt with
separately from the removal of the DC offset. Using equations (21), (22), and (3), it can be shown that a
gain of -26.67 is necessary for this circuit. Using equation (4), the appropriate feedback and input
resistors can be chosen to achieve this gain. This results in Ri=3kΩ and Rf=80kΩ.
To eliminate the DC offset, a DC voltage source must be fed into the non-inverting terminal of the op
amp. Its value is found using equations (19) and (20) with B=3V. This corresponds to the maximum
cancellation, and corresponds with the potentiometer being turned off so that no voltage division
occurs. This yields a voltage of 2.89V that must be fed into the non-inverting terminal. In order to
decrease this value to cancel out the DC offset when B=1V, voltage division is implemented with the
potentiometer turned to its maximum resistance in parallel with another resistor, R1. This is modeled by
the following:
𝑅1
(23)
1𝑉 = (
) ∙ 2.89𝑉
𝑅1 + 20𝑘Ω
This yields a value of 10kΩ for R1.
5.5 Experimental Results
The closest resistor values to those chosen above were 82kΩ, 3kΩ, and 10kΩ nominally, and were
measured to be 81.8kΩ, 2.966kΩ, and 10.04kΩ. With these values, a gain of -27.58 is expected in this
circuit. An oscilloscope was used to measure the input and output signals, and display their amplitudes
and means. This was done for an input DC offset of 1V with the potentiometer turned all the way up,
and an input DC offset of 3V with the potentiometer turned all the way down.
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Figure 13: Oscilloscope capture of the circuit with 1V DC offset (input channel 1, output channel 2)
Figure 14: Oscilloscope capture of the circuit with 3V DC offset (input channel 1, output channel 2)
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Using these amplitudes and equation (3), a gain of -23.24 was observed in the circuit with the 1V DC
offset and the potentiometer all the way on, and -24.57 with the 3V DC offset and the potentiometer all
the way off. The means for channel 1 and 2 represent the DC offset of the input and output signals,
respectively. The differences between the desired gain (accepted, 26.67) and the actual gains
(experimental, 23.24 and 24.57) are 12.86% and 7.87%, by equation (5). The differences between the
theoretical (accepted, 27.58) and actual (experimental, 23.24 and 24.57) gains are 15.74% and 10.91%,
by equation (5).
5.6 Conclusions
There were significant differences (12.86% and 7.87%) between the gain actually generated by the
circuit and the gain the circuit was designed to generate. This stems from several factors. Firstly, the
closest resistor available to the 80kΩ was 82kΩ, and its actual resistance was 81.8kΩ. Also, the 3kΩ
resistor had an actual resistance of 2.966kΩ. Lastly, the amplitude of the input signal was slightly larger
than what was supposed to be used in the circuit, causing the output amplitude to be higher. Because
of these things, the circuit functioned to produce a 17.2VPP output signal, which would damage the
equipment receiving the signal. This could easily be corrected for by using a smaller value of Rf, which
would have been done if an 80kΩ resistor was available.
There was also a significant difference (15.74% and 10.91%) between the gain that the circuit should
have produced, given the actual values of the equipment, and what was actually observed. This stems
from several factors. There is an increased amount of resistance in the entire circuit from the wires; the
calculations assume ideal wires with no resistance, but in reality they have a small resistance. The
oscilloscope measuring the input and output has a limited degree of accuracy, causing small rounding
errors. Additionally, because of the alternating nature of the voltage source, the values for Vin and Vout
being measured by the oscilloscope were constantly fluctuating. Therefore, the screenshot taken for
analysis may not be representative of the truest values. Lastly, the voltage source was assumed to be
ideal (i.e. no internal resistance); however, as a practical voltage source it has an internal resistance that
will affect the circuit. All of these things serve to decrease the actual gain and the output from the
circuit.
Other than producing an output that was slightly too large, this circuit functioned fairly well to eliminate
the DC offset of the input signal. This is shown by the output means of 143mV and 47.4mV, which are
small enough to cause minimal interference in a circuit. Given all of the slight uncertainties and
imperfections in the circuit, it would be very hard to improve this value.
5.7 Additional Problem
If instead of only ranging from 1V to 3V, the input DC offset could be positive or negative, i.e. ranging
from -3V to 3V, a significant change would have to be made to the circuit. The input and feedback
resistors would remain the same, since the gain for the circuit is not changing. However the input for
the non-inverting terminal would be much different. A voltage dividing rail with 15V and -15V at its
extremities would have 2 resistors and a 20kΩ potentiometer in between them. The potentiometer
would be the part of the rail actually connected to the non-inverting terminal. The nodes on either end
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of the potentiometer would correspond to V1=2.89V and V2=-2.89V, which as shown earlier are the
voltages that cancel the maximum B-values (i.e. 3V and -3V) for the input DC offset. Using nodal analysis
down the rail, the following relations are obtained:
15𝑉 − 𝑉1 𝑉1 − 𝑉2 𝑉2 − 15𝑉
(24)
=
=
𝑅1
20𝑘Ω
𝑅2
Solving these yields R1=R2=42kΩ. The voltages that would cancel out B-values in between 3V and -3V
are obtained by adjusting the potentiometer.
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