James Kreibick
EE 310
Lab 6:
11/07/2012
Lab 6
Introduction:
In the first part of this lab, a PMOS current mirror circuit will be designed. This circuit will provide
a constant 100 μA of bias current to an amplifying device while simultaneously functioning as an
active load. Next, an NMOS single-stage amplifier will be designed and connected in the
common-source configuration. This amplifier will use the current mirror/active load developed in
the previous step. After putting the two circuits together, the DC operating point [(the Q point) of
the circuit will be adjusted so that the DC drain voltage is half way between the power supply
voltage and ground, and the drain current is 100 μA. When the device is properly biased, the
voltage gain of the circuit will be measured and compared to the model calculations.
In the second part of this lab, with the same bias conditions and active load maintained from the
first part, the amplifier will be reconfigured to form a current-gate configuration. The voltage gain
for this circuit will be measured and compared with earlier current-source models. The body
transconductance gmb will be calculated using the information gathered, and from this, the body
transconductance η, will be calculated for the NMOS amplifying device using the information
gathered. In the end, a test circuit will be designed that directly measures gmb and η, and these
values will be compared to the values obtained in the previous step.
Brief introduction to NMOS amplifier circuits with active loads
For an NMOS amplifying circuits with an active load, one can observe that the body effect can
influence the small signal gain performance if the circuit is configured accordingly. In both
common gate and common drain amplifier circuits, when the source node of a device is
isolated, one can observe that there is a change in the overall voltage gain.
Table listing of the parameters for the MOSFETs from Lab 4
VTN and VTP (V)
0.93
NMOS device #1
0.919
NMOS device #2
0.92
NMOS device #3
-1.28
PMOS device #1
-1.283
PMOS device #2
-1.29
PMOS device #3
Kn and Kp μA/V2
184
179
184
130
127.9
127.5
λ(for PMOS) = Id2 – Id1 / ((Vds2*Id1) - (Vsd1 * Id2))= 7.6 * 10-3
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James Kreibick
EE 310
Lab 6:
11/07/2012
Circuit Schematics:
Task 1 – Current Mirror/Active Load Schematic
Task 2 – Common-Source Amplifier Circuit Schematic
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James Kreibick
EE 310
Lab 6:
11/07/2012
Task 5 – Common-Gate Amplifier Circuit Schematic
Task 7 – Directly Measuring the Body Effect Schematic
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James Kreibick
EE 310
Lab 6:
11/07/2012
Data and Graphs:
Task 1 Theoretical calculation of VGS2, R3
VSG3 = sqrt(Iref/Kp3) + Vtp = sqrt(100 micro / 127.5 micro) +1.29 = 2.17 V
R3 = ((VDD - VSS) – VSG3) / Iref = 80 kΩ
Measure R3
R3= 7.83 / 100 micro = 78.3 k ohms
Task 2 Theoretical calculation of VGS1, R1, R2
VGS1 = sqrt(I0 / Kn1) +Vtn = sqrt(100 / 184) + 0.912 = 1.649 V
R1 = (VDD – VSS) – VGS1) / 10 micro = 835 k ohms
R2 = VGS1 / 10 micro = 1.649 / 10 micro= 164.92 k ohms
Task 3 Record method used to adjust R1/R2, Record actual R1, R2, Vo
Method used to adjust R1 / R2: Adjusting Q point conditions by adjusting
the potentiometer so that the DC drain voltage is at a value equal to half the
supply voltage.
Actual values:
R1 = 843 kΩ
R2 = 199 kΩ
Vo = 5.02 V
Measure VGS1, VGS2, ID1
VGS1 = 1.6 V
VGS2 = 4.92 V
Id1 = 100.12 µA
Task 4 Small signal equivalent circuit & calculation of Av, Rin, Rout
Av=Vo / Vi = -gm1(ro1 // ro2)= -60 V/V
Rin =
Rout =
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James Kreibick
EE 310
Lab 6:
11/07/2012
Plot of Vi and Vo & measurement of Av
Measured Av = 1.32V/28.8mV = 45.83 v/v
Task 5 Small signal equivalent circuit & calculation of Av, Rin, Rout
Rin = 51 ohm // (1 / gm) = 51Ω
Rout = ro2 = 153.8 kΩ
Av =(gm1 + n gm1) (ro1 // ro2) = 82 V/V
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James Kreibick
EE 310
Lab 6:
11/07/2012
Plot of Vi and Vo & measurement of Av
Measured Av= vo/vi = 2.297 V / 22.34 mV =102.82 V/V
Task 6 Calculate gmb and η from your measurements
gm= 2 * sqrt((kn * Idq) * (1 + lambda * Vds)) = 275 micro
n = (AVCG / AVCS) – 1 = 1.2
gmb = (1.2) * (275 micro) = 330 micro
Task 7 Small signal analysis of test circuit
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James Kreibick
EE 310
Lab 6:
11/07/2012
Results (plots and measurements to find gmb and η)
gmb = 326 micro
η = 1.1
Av = vo/vi = 1.328 V / 23.52 mV = 56.46 V/V
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James Kreibick
EE 310
Lab 6:
11/07/2012
Multisim:
Multisim schematic of circuit in Figure 3
Measure voltage gain of the amplifier
Measured voltage gain = 46.428 V/V
Discussion:
Reasoning behind task 7 test circuit (How does it work?)
In the test circuit, Vo is directly related to gmb. Bias conditions are the same
so that we can compare our results with the ones previously measured using
common gate configuration.
Compare theoretical values to measurements
When comparing the theoretical values we calculated in each task to the
measurements, the values were very close.
Compare measurements to simulated values
For the circuit in Figure 3, the resistor value for R3 turned out to be 80k-ohm, slightly smaller
than the 97k-ohm resistor value that we used. In terms of gain comparison, for this circuit I
obtained a gain of 35. This was off from our measurement of 46.428 V/V.
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James Kreibick
EE 310
Lab 6:
11/07/2012
Amount of errors and reasons for errors
In task 5, we first measured a gain of 102.82 V/V, and then after adjusting the circuit we
measured the gain again which turned out to be 46.428 V/V which is a much appropriate value
for the gain.
Answer questions related to different configurations
Task 4:
How does the calculated voltage gain compare with the experimental value determined for the
amplifier?
The calculated voltage gain is very close to the experimental value determined for the amplifier
(45.8 V/V).
Task 5:
Can you explain why the voltage gain for the CG amplifier is larger than the magnitude for the
CS amplifier?
The voltage gain for the CG amplifier is larger because the gate is grounded so the drain-source
has a small effect overall.
Task 7:
How do the experimental values of gmb and η obtained by this test circuit compare with those
previously determined?
Experimental values: gmb = (Av / (ro1 // ro2))=396 micro n = gmb / gm = 1.4
The values are very close to those previously determined in Task 6.
Summary, Conclusions, and Attachments:
Summary and Conclusions
During this two-session lab, we focused on the PMOS active load and both the common source
and the common gate amplifiers. We investigated the test circuit for directly measuring the body
transconductance and the body effect parameter while observing how the body effect influences
the small signal gain.
Lab notebook pages and design proposal
(see attached)
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