http://openflowswitch.org
Vinesh Gudla, Saurav Das, Anujit Shastri,
Guru Parulkar, Nick McKeown, Leonid Kazovsky
Stanford University
Shinji Yamashita
Fujitsu Laboratories, Japan http://www.openflowswitch.org/wk/index.php/PAC.C
Controller
OpenFlow Switch sw
Secure
Channel hw
Flow
Table
• Add/delete flow entry
• Encapsulated packets
• Controller discovery described in the Rule
A Flow is the fundamental unit of manipulation within a switch
Rule Action Statistics
Rule Action Statistics
OpenFlow
Protocol
Rule Action Statistics
OpenFlow
Controller
OpenFlow Protocol
NetFPGA based
OpenFlow packet switch NF1
E-O
GE
192.168.3.12
to OSA
192.168.3.15
Video Clients to OSA
25 km SMF
AWG
λ1 1553.3 nm
λ2 1554.1 nm
1X9 Wavelength
Selective Switch (WSS)
WSS based OpenFlow circuit switch
GE to DWDM SFP convertor
O-E
NF2
GE
192.168.3.10
Video Server
An Open Platform for Gigabit-Rate Network Switching and Routing. A complete network www.netfpga.org
hardware platform implemented with FPGA logic
Fiber
Collimator
Array
OUT
IN
Output
Input l l
1 l
2 l
3 l
4 l
5 l
6 l
7
DEMUX SW l
1 l
2 l
3
MUX
Control l
7 l l
1 l l l
2 l
4 l
5 l
6 l l
3 l
7
Grating Lens MEMS Mirror Array
IN
OUT1
IN
OUT2
6
Switching output port by tilting
MEMS mirror
OpenFlow packet switch
OpenFlow packet switch
25 km SMF
GE-Optical
GE-Optical
Mux/Demux
Openflow Circuit Switch
OpenFlow
Controller
OpenFlow Protocol
NetFPGA based
OpenFlow packet switch NF1
E-O
GE
192.168.3.12
to OSA
192.168.3.15
Video Clients to OSA
25 km SMF
AWG
λ1 1553.3 nm
λ2 1554.1 nm
1X9 Wavelength
Selective Switch (WSS)
WSS based OpenFlow circuit switch
GE to DWDM SFP convertor
O-E
NF2
GE
192.168.3.10
Video Server
/* Description of a physical port */ struct ofp_phy_port { uint16_t port_no; uint8_t hw_addr[OFP_ETH_ALEN]; /* 00:00:00:00:00:00 if not an Ethernet port */ uint8_t name[OFP_MAX_PORT_NAME_LEN]; /* Null-terminated*/ uint32_t config; uint32_t state;
/* Bitmap of OFPPC_* flags */
/* Bitmap of OFPPS_* flags */
/* Bitmaps of OFPPF_* that describe features. All bits zeroed if
* unsupported or unavailable. */ uint32_t curr; /* Current features. */ uint32_t advertised; uint32_t supported; uint32_t peer;
/* Features being advertised by the port. */
/* Features supported by the port. */
/* Features advertised by peer. */ uint16_t supp_swtype; unit16_t peer_swtype;
/* Bitmap of switching type OFPST_* flags */
/* Bitmap of peer’s switching type */ uint32_t supp_sw_tdm_gran; /* TDM switching granularity OFPTSG_* flags uint32_t peer_sw_tdm_gran; /* Bitmap of peer’s switching granularity */ unit64_t bandwidth1; uint64_t bandwidth2;
/* Bitmap of the OFPCBL_* or OFPCBT_* flags */
/* Same type as supp_bandwidth1 */
};
OFP_ASSERT(sizeof ( struct ofp_phy_cport) == 80);
Wavelength Switch Port
63
1
9
1
3
ITU grid Frequencies supported
63
ITU grid Frequencies currently being used
10 9 8 7 6 5 4 3 2 1 0
1
9
6
7
T
L
S
O
S
C
C
/
L
1
/
5
F
/
W
10 9 8 7 6 5 4 3 2 1 0
SONET/SDH Switch Port (OC-768 line rate)
63 56 55 32 31 26 25 20 8 7 6 5 4 3 2 1 0
63 54 53 44 43 34 33 24 23 16 15 8 7 0
/*Description of a cross-connection*/ struct ofp_connect{ uint16_t wildcards; /* identifies which two ports to use below */ uint16_t num_components; /* identifies number of cross-connect to be made uint8_t pad[4]; /*
– ie. num array elems*/ uint16_t in_port[0]; uint16_t out_port[0];
/* OFPP_* ports – real or virtual */
/* OFPP_* ports – real or virtual */ struct ofp_tdm_port in_tport[0]; struct ofp_tdm_port out_tport[0];
/* description of TDM channel */ struct ofp_wave_port in_wport[0]; struct ofp_wave_port out_wport[0];
};
OFP_ASSERT(sizeof(struct ofp_connect) == 8 );
/* description of lambda channel */
/* Description of a TDM port */ struct ofp_tdm_port { uint16_t tport; uint16_t tstart; uint32_t tsignal;
};
/*Description of a wavelength port */ struct ofp_wave_port { uint16_t wport; uint8_t pad[6]; uint64_t wavelength
};
Traffic
Engineering
Traffic
Engineering
..via Dynamic Automated Optical
Bypass
Controller
NOX
OpenFlow protocol
NetFPGA based
OF packet switch
Hosts
Ethernet
AWG
WSS
(1 × 9)
AWG
WSS
(1 × 9)
Fujitsu WSS based
OF circuit switch
• Integrated network recovery
• Service classification and Quality-of-service
Identify aggregated packet flows & classify them
- some take all packet paths, all circuit paths, or mix of circuit/packet paths
- some allocated different levels of bandwidths, some unallocated
• In - Datacenter
– variable bandwidth between clusters
• Unified slicing of network resources
– both packet & circuit
• Integrated routing
• OpenFlow is a large clean-slate program with many motivations and goals
• convergence of packet & circuit networks is one such goal
• OpenFlow simplifies and unifies across layers and technologies
• packet and circuit infrastructures
• electronics and photonics
• and enables new capabilities in converged networks
• with real circuits or virtual circuits
• Next Demos
• larger demo of QoS capabilities enabled in converged networks
• business models for ISPs and TSPs enabled by unified virtualization