Toward Effective Utilization of Timing
Exceptions in Design Optimization
Kwangok Jeong, Andrew B. Kahng and Seokhyeong Kang
VLSI CAD LABORATORY, UCSD
UCSD VLSI CAD Laboratory - ISQED10, March. 23, 2010
(1/25)
Outline
•
•
•
•
•
•
Timing exceptions vs. design outcomes
Q1. Do timing exceptions help or hurt?
Q2. Which exceptions give net benefit when inserted?
Q3. When should exceptions be identified and applied?
Guidelines to timing exceptions
Conclusion and ongoing work
(2/25)
Timing Exceptions vs. Design Outcomes
• Advantage
• Timing exceptions reduce pessimism in STA
• Help ease the task of timing closure step
• Rutime increase with
small improvement
in TNS
1.1
Testcase: AES cipher
30
runtime
25
1.05
area
20
1
15
10
0.95
TNS
5
0.9
0
0
• Our target
Normalized area & TNS
• Adding exceptions
doesn’t always lead
to better QoR
Normalized runtime
35
2819
7048
14096
28193
Number of timing exceptions
• Evaluate the impact of timing exceptions
• Give guidelines for designers / EDA vendors
(3/25)
Q1. Do timing exceptions help or hurt?
Impact of timing exceptions in optimization
(4/25)
Do Timing Exceptions Help or Hurt?
• Help
• Remove over-constraint
• Prevent excessive optimization
• Hurt
• Add complexity in optimization
• Prevent restructuring
A
B
Cin
XOR2
S
INV
S
XOR2
A
XOR2
XNOR2
INV
B
Cout
Cin
Cout
• Restructuring
of full-adder
circuit
OR3
AOI21
AND2
(A)
INV
AND2
(B)
(5/25)
Impact of Timing Exceptions in Optimization
• Quality of optimization in commercial tools after applying
different types of exceptions
• Test case : 4-bit ripple carry adder
• Timing is improved without ‘through’ points
• FP and MCP have the same impacts on timing and area
(6/25)
Experiment with Artificial Circuit
Restructured unit
• Applying different number of FPs
• Optimization results in 2-stage and 8-stage circuit.
(7/25)
Q2. Which exceptions give net benefit
when inserted?
Critical and effective timing exceptions
(8/25)
Which exceptions give net benefit when inserted?
• Exceptions space according to format and criticality
Timing Slack
0
Type of Exceptions
Critical exceptions
w/o ‘through’ points
Non-critical
exceptions
w/o ‘through’ point
Critical exceptions
with ‘through’ points
Non-critical
exceptions
with ‘through’ point
Effective exceptions
Ineffective exceptions
• Critical / effective exceptions will give benefit
• Need to audit exceptions to obtain beneficial timing
exceptions
(9/25)
Critical Timing Exceptions
• WNS after applying top-k% of exceptions (AES cipher)
• Timing slack is not improved by non-critical exceptions
• Critical timing exceptions without “through” (Critical
MCP) effectively reduce the WNS
(10/25)
Effective Timing Exceptions
• Ineffective exceptions
• Many false paths are not effective due to
an interleaved true path
• Do not contribute on reducing constraints
and increase the runtime
• Path A is ineffective false path
because of a true path B
• Method for filtering out ineffective exceptions
• Use for metrics to quantify the effectiveness of timing exceptions
• c : cell, p : path
• s’c (sc) slack of timing point c after
(before) defining p as a false path
• nc : number of timing point in p
• sc_end : end point
(11/25)
Q3. When should exceptions be
identified and applied?
Design stages to extract and apply
timing exceptions
(12/25)
When should exceptions be identified and applied?
• Identify the most beneficial design stages for extraction /
application
Non-feasible for exceptions
with “through” points
Extract
DC
Apply
PLACE
PLACE-OPT
CTS
CTS-OPT
ROUTE
• Higher benefit can be obtained when exceptions are
1.extracted as late as possible
2.applied as early as possible
(13/25)
Timing correlation between design stages
• Timing between synthesis and placement is not well correlated
• After placement, timing correlation is improved
(14/25)
Design Stages to Extract and Apply TE
• QoR after applying false path exceptions in each stage
• Timing exceptions need
to be extracted after
placement or placement
optimization stages.
(15/25)
Outline
•
•
•
•
•
•
Timing exceptions vs. design outcomes
Q1. Do timing exceptions help or hurt?
Q2. Which exceptions give net benefit when inserted?
Q3. When should exceptions be identified and applied?
Guidelines to timing exceptions
Conclusion and ongoing work
(16/25)
Guidelines to Timing Exceptions
• Recommended flow for timing
• Use only clearly effective
exceptions
timing exceptions.
• With ‘through’ points, the
optimization quality is not
improved, and can even be
degraded.
• The declaration form must be
as compact as possible.
• Timing exceptions should be
extracted after placement.
• Non-effective false paths
should be filtered.
(17/25)
Conclusion and Ongoing Work
• Impact of timing exceptions - inserting exceptions could
be beneficial or harmful
• Critical and effective timing exceptions should be
extracted and applied after the placement stage
• Ineffective false paths should be pruned for better QoR.
• Ongoing work
• Seek the ways of extracting and auditing consistently
• Seek quantified metrics of both user- and automatically-defined
TE
• Pursue timing exception methodology for general SOC
implementation
(18/25)
THANK YOU
UCSD VLSI CAD Laboratory - ISQED10, March. 23, 2010
(19/25)
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UCSD VLSI CAD Laboratory - ISQED10, March. 23, 2010
(20/25)