Enabling Power Aware Emulation in Big CPU
Project
Adriana Wolffberg
Vinay Vaddepalli , Osama Neiroukh
Introduction Foundations Challenges
Pioneering
Agenda
• Introduction
• Power Aware Emulation Foundations
• Power Aware Emulation Challenges
• Pioneering work
• Summary
Summary
Introduction Foundations Challenges
Pioneering
Summary
Background
• Number of power planes per
chip constantly increasing due
to aggressive power goals
• Power-aware simulation is
already part of main validation
methodology
• Emulation is becoming key technology in Pre-Si verification
•
Long Tests involving many power on/off states are verified only in
emulation
Introduction Foundations Challenges
Pioneering
Summary
Power Aware Emulation Basics
• Emulation tool is extended with Power
Aware capabilities
• Based on joint specification and
prototyping
• Emulator takes as input the power
architecture of the design from UPF
(Unified Power Format - IEEE standard)
• No RTL or UPF special changes for
Emulation compared with Simulation
RTL
Power
Aware
Simulator
UPF
Power Aware
Emulator
Introduction Foundations Challenges
Pioneering
Summary
Power Aware Simulation
Power aware simulation mimics
circuit behavior for power
up/down events
• When block is powered off
– Internals and outputs corrupted
to “X”
• When block powered on
– Start simulation as if @ time
zero
VCC1
OFF
All internals and
outputs corrupted to X
X
X
X
Regular
Simulation
X
Regular
Simulation
Corrupt
to X
X
VCC2
ON
VCC3
OFF
VCC4
ON
Introduction Foundations Challenges
Pioneering
Summary
Power Aware Emulation Foundations
• No X’s in emulation, the emulation engine
randomizes powered down domains
according to:
VCC1
Random outputs and states
– Internal state elements are randomized at the
time of switching off
?
– Dynamic randomization of outputs of power
domains
• Emulator uses additional circuits to
randomize logic
OFF
?
?
Regular
Emulation
?
Random
outputs
and
states
Regular
Emulation
?
VCC2
ON
VCC3
OFF
VCC4
ON
Introduction Foundations Challenges
Pioneering
Summary
Power Aware Emulation Challenges
Combinationa
l clouds
Assertions
Cascade
Power
Switches
Multiply
instantiated
Instance
Constant
Propagation
Randomizatio
n
Robustness
Re-trigger
Inits
Multiple driven
wires
Power
Aware
Emulatio
n
Continuous
Assignments
Hierarchical
references
Forces
Introduction Foundations Challenges
Pioneering
Summary
Power Aware Emulation Challenges
Cascade
Power
Switches
Multiply
Instantiated
Instances
Constant
Propagation
Randomizatio
n
Robustness
Combinationa
l
Clouds
Assertions
Re-trigger
Inits
Multiple driven
wires
Power
Aware
Emulatio
n
Continuous
Assignments
Hierarchical
references
Forces
Introduction Foundations Challenges
Pioneering
Summary
Randomization Robustness - example
Domain A
Domain B
Din
Rst
Clk
DomainA
VCC
DomainB
VCC
Clk
Rst
Dout
D
• Power Domain A is turned on ahead of Power
Domain B and needs to propagate reset on to
Domain B
• Clock Clk gets shut off before Domain B is turned on
while reset remains asserted
• Receiver flop D is turned on after Clk was shut off so
it remains stuck at X
– Note that Rst is synchronous
• This bug cannot be found without power supply
modeling. In regular emulation, the reset would be
observed by D and the flop would reset
Can we “catch” this bug with chosen approach of randomization?
Introduction Foundations Challenges
Pioneering
Summary
Randomization Robustness - options
• Different approaches, what is the impact on capacity/performance?
– Randomization of state elements
– Currently: first cycle after a domain switches off
– Option: Randomization at given intervals during power off
– Randomization of interface of power domains:
– Currently: only outputs of power-down domains
– Option: also the inputs of power-down domains
• A test can be run multiple times with different seeds :
– Invert all values at switch off instead of randomizing them
– Force all state elements to 0 or force all of them to 1.
Introduction Foundations Challenges
Pioneering
Summary
Constant Propagation
• Emulation propagates constant as far as possible for
optimization
• Proposal: stop constant propagation across power boundaries
• Open question: Is there capacity or performance penalty when
disabling constant propagation?
Domain A
0
Domain B
Introduction Foundations Challenges
Pioneering
Summary
Multiply instantiated hierarchies
• Instances of same module can be in
different power domains
• Simple example: SUB1 and SUB2 are
instances of same module .
• Emulation must factor this in carefully,
especially when some hierarchies are
power-managed and others are alwayson.
TOP - ON
SUB1 – Power OFF
SUB2 - Power ON
Introduction Foundations Challenges
Pioneering
Summary
Mini Testcases Flow
• We developed a test plan
covering all known challenges
• For each item in the testplan a
simple test case was written
• Work with Emulator
developers to build confidence
before starting on big CPU
model
RTL
UPF
Simulation
build and
run
Emulation
build
Simulatio
n dump
Merged
Emulation
dump
inferX
Emulation
Emulation
Emulation
vcd
vcddump
dump
dump
Emulatio
n model
seed
Introduction Foundations Challenges
Pioneering
Summary
Summary
• Power Aware Emulation is highly required in big CPU project
• We took the heavy-lifting of specifying, documenting and
productizing power-aware emulation from scratch
• Many challenges were found, part are unique to emulation and can
be addressed by multiple approaches
• Currently deploying Power Aware Emulation in big CPU
model