Fault Equivalence
Number of fault sites in a Boolean gate circuit is
= #PI + #gates + # (fanout branches)
Fault equivalence: Two faults f1 and f2 are equivalent if all
tests that detect f1 also detect f2.
If faults f1 and f2 are equivalent then the corresponding faulty
functions are identical.
Fault collapsing: All single faults of a logic circuit can be
divided into disjoint equivalence subsets, where all faults in a
subset are mutually equivalent.
A collapsed fault set contains one fault from each equivalence
subset.
Fault equivalence & collapsing
Combinational circuits
• faults f and g are equivalent iff Zf(x) = Zg(x)
• equivalent faults are not distinguishable
For gate with controlling value c and inversion i :
all input sac faults and output sa(c  i) faults are
equivalent
Equivalence Rules
sa0 sa1
sa0 sa1
AND
sa0 sa1
OR
sa0 sa1
WIRE/BUFFER
sa0
sa0
sa1
sa1
sa0 sa1
sa0 sa1
INVERTER
sa0
NOT
sa1
sa0 sa1
NAND
sa0 sa1
sa0 sa1
sa0 sa1
NOR
sa0 sa1
sa0 sa1
sa0
sa1
FANOUT
sa1
sa0
sa0
sa1
sa0
sa1
Equivalence Example
sa0 sa1
Faults in red
removed by
equivalence
collapsing
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
Collapse ratio =
20
32
= 0.625
Fault Dominance
• If all tests of some fault F1 detect another fault F2, then
F2 is said to dominate F1.
• Dominance fault collapsing: If fault F2 dominates F1,
then F2 is removed from the fault list.
• Any set that detects F1 also detects F2 (that dominates F1)
• When dominance fault collapsing is used, it is sufficient
to consider only the input faults of Boolean gates.
• In a tree circuit (without fanouts) PI faults form a
dominance collapsed fault set.
Fault dominace
Combinational circuits
If f dominates g => any test that detects g will also
detect f .
Therefore, only dominating faults must be detected
Example :
x
y
z
[x, y]=[1 0] is the only test to detect
f1 = y sa1,
Since it also detects
f2 = z sa0 => f2 dominates
Fault dominance & collapsing
For gate with controlling value c &
inversion i, the output sa(c’i)
dominates any input sac’
sequential circuits
dominance fault collapsing is not useful
Dominance Example
F1
s-a-1
All tests of F2
F2
s-a-1
110
101
s-a-1
s-a-1
s-a-1
s-a-0
A dominance collapsed fault set
(after equivalence collapsing)
001
000
010
011
100
The only test of F1
MINIMAL SETS OF NON-DOMINATING
FAULTS FOR TWO-INPUT GATES
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
0
1
0
1
1
0
1
0
Or equivalently
1
Dominance Example
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
Faults in red
removed by
equivalence
collapsing
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
Faults in green
removed by
dominance
collapsing
15
Collapse ratio = ── = 0.47
32
CIRCUIT WITH FANOUT-FREE SUBCIRCUITS SHOWN
M
P
L
J
EXAMPLE OF AN FANOUT-FREE CIRCUIT WITH SET OF
DOMINANCE-REDUCED FAULTS
0
Equivalent to sa1 at the input
b
e
1
0
1
1
a
0
c
0
J
f
0
h
Z
0
0
0
0
d
g
1
0
Equivalent to sa0 at the input
L
M
in dominance fault collapsing
it is sufficient to consider only
the input faults
Checkpoint Theorem
• Primary inputs and fanout branches of a combinational circuit
are called checkpoints.
• Checkpoint theorem: A test set that detects all single (multiple)
stuck-at faults on all checkpoints of a combinational circuit,
also detects all single (multiple) stuck-at faults in that circuit.
Total fault sites = 16
Checkpoints ( ) = 10
DOMINANCE-REDUCED FAULT LIST
0
0,1
x1
b
1
0
e
c
0
1
0
1
1
1
d
h
f
0
0
0
0
M
1
L1
P0
0
g
1
EXAMPLE OF PRUNING AND STRIPPING
b
b
e
c
J
f
J
f
h
1
d
d
M
L
P
M
L
g
Unused
h
The multiple stuck-fault model
Definition :
Let Tg be the set of all tests that detect a fault g, we say
that a fault f functionally masks the fault g iff the
multiple fault {f, g} is not detected by any test in Tg
If f masks g then {f, g} is not detected by t Tg
but it may be detected by other tests
The multiple stuck-fault model
Example :
Consider the faults c sa0, a sa1
t= 011 is the only test that detects fault c sa0
but t does not detect {c sa0, a sa1} =>
a sa1 masks c sa0
a
b
c
0/1
1/0
1/1 if double fault
d
0 if a single fault
1
1/0
0/1
The multiple stuck-fault model
Example :
Test set T= {1111, 0111, 1110, 1001, 1010, 0101}
detects all SSF in following circuit, but the only
test which detects B sa1 and C sa1 is 1001
A 1
B 0/1
1/0
0/1
1
0
C 0/1
D 1
0/1
1/0
1
The multiple stuck-fault model
Example :
Using Rajski’s method
B sa1 detectable if no A sa0
while C sa1 detected with no conditions
A 11,00
B 00,11
11,00
01,00,11
10,00,11
01,00,11
C 01,00,11
D 00,11
00,11
11,00,10
11,00,01
The multiple stuck-fault model
Properties of MSF(Multiple Stuck Faults)
in a irredundant two_level circuit , any complete test set
for SSF detects all MSF
in a fanout-free circuit , any complete test set for SSF
detects all double and triple faults & there is a complete
test set for SSF that detects all MSF
The multiple stuck-fault model
in an internal fanout-free circuit, any
complete test for SSF detects at least 98% of
MSF with K < 6 and detects all MSF unless C
contains a subcircuit with interconnection
A
B
1/0
0/1
1
0
C
D
0/1
1/0
1