EE4271 VLSI Design, Fall 2013
VLSI Channel Routing
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Objectives
• Definition of VLSI channel routing problem
• How to perform channel routing for width optimization
• Lower bound proof for channel routing
• Understand that channel routing problem is difficult to solve
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Routing Problem
Routing to reduce the area
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Top view
Routing Anatomy
3D view
©Bazargan
Metal layer 3
Via
Metal layer 2
Metal layer 1
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Routing Grid
Vertical Routing
Track
Horizontal
Routing Track
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Channel Routing Terminology
Terminals (Gate Pins)
Via
Upper boundary
Tracks
Lower boundary
Assume that there are only one horizontal layer and only one vertical layer, i.e., no overlap among horizontal wires and no overlap among vertical wires will be allowed.
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Width
(# of Horizontal Routing Tracks)
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Channel Routing Problem - I
• Input:
– Two vectors of the same length to represent the pins on two sides of the channel.
– One horizontal layer and one vertical layer in the routing grid.
• Output:
– Connect pins of the same net together such that there is no overlap among horizontal wires and there is no overlap among vertical wires.
– Minimize the channel width.
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Channel Routing Problem - II
0 1 2 2 0 3 0 4
1 2 0 3 3 4 4 0
Example: (01220304)
(12033440) where 0 = no terminal
Route all the pins with the same index
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A Channel Routing Example
2 3 5 3 5 2 6 8 9 8 7 9
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A Simpler Example - I
Is this routing with the minimum width?
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A Simpler Example - II
Is this routing with the minimum width?
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Lower Bound on Channel Width
0 1 6 1 2 3 5
6 3 5 4 0 2 4
0 1 6 1 2 3 5
6
1
3
5
2
4
Channel density =
Maximum local density
Local density
6 3 5 4 0 2 4
1 3 4 4 4 4 2
Lower bound = 4
Lower bound on channel width = Channel density
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Exercise
• Use minimum number of tracks to route the following nets. Is your result the best possible one?
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Lower Bound Always Achievable?
• Is the channel routing lower bound always achievable for any channel routing problem?
1 2 1
2 1 2
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A More Complex Example
# columns =174, # nets=72, density =19
Routing result: number of tracks=20
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Realistic Design
Different colors refer to different wire densities.
Red color means large congestion.
Congestion=
# routes actually on a track max # routes allowed on a track
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From DAC Knowledge Center
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Summary
• Definition of VLSI channel routing problem
• Channel routing for width optimization
• Lower bound for channel routing
– Local Density and Channel Density
• Lower bound is not always achievable
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