Faculty of Electronic Engineering – Dept. of Computer Science

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Microprocessors
Chapter 5
Arithmetic And Logic Instructions
prepared by
Dr. Mohamed A. Shohla
Chapter Overview
•
•
•
•
•
‫جام ع ة ال م نوف ي ة‬
Addition, Subtraction, and Comparison
Multiplication and Division
Basic Logic Instructions
Shift and Rotate
String Comparisons
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5-2
Addition
• Addition (ADD) appears in many forms in the microprocessor. This
section details the use of the ADD instruction for 8-, 16-, and 32-bit
binary addition.
• A second form of addition, called add-with-carry, is introduced with
the ADC instruction.
• Finally, the increment instruction (INC) is presented. Increment is a
special type of addition that adds a one to a number.
•
Examples of the ADD instructions.
Assembly Language
ADD AL, BL
ADD CX, DI
ADD EBP, EAX
ADD CL, 44H
ADD EDX, 12345H
ADD [BX], AL
‫جام ع ة ال م نوف ي ة‬
Operation
AL = AL + BL
CX = CX + Dl
EBP = EBP + EAX
CL = CL + 44H
EDX = EDX + 00012345H
AL adds to the contents of the data segment
memory location addressed by BX with the sum
stored in the same memory location
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Microprocessors Course
5-3
Example :A procedure that sums data in
locations NUMB and NUMB+1;the result is
returned in AX.
SUMS
SUMS
‫جام ع ة ال م نوف ي ة‬
PROC
MOV
MOV
ADD
ADD
RET
ENDP
NEAR
DI, OFFSET NUMB
AL, 0
AL, [DI]
AL, [DI+1]
;address NUMB
;clear sum
;add NUMB
;add NUMB+1
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5-4
Example :A procedure that sums of 8-bit ARRAY
elements 3, 5, and 7; the result is returned in AL.
SUM
SUM
‫جام ع ة ال م نوف ي ة‬
PROC
MOV
MOV
ADD
ADD
ADD
RET
ENDP
NEAR
AL, 0
SI, 3
AL, ARRAY[SI]
AL, ARRAY [SI+2 ]
AL, ARRAY [SI+4]
;clear sum
;address element 3
;add element 3
;add element 5
;add element 7
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5-5
Increment Addition:
• Increment addition (INC) adds 1 to a register or a memory location.
The INC instruction can add 1 to any register or memory location,
• With indirect memory increments, the size of the data must be
described by using the BYTE PTR, WORD PTR, or DWORD PTR
directives.
Assembly Language
INC
INC
INC
INC
Operation
BL = BL + 1
SP = SP + 1
EAX = EAX + 1
Adds 1 to the byte contents of the data segment
memory location addressed by BX
INC WORD PTR [SI]
Adds 1 to the word contents of the data segment
memory location addressed by SI
INC DWORD PTR [ECX] Adds 1 to the doubleword contents of the data
segment memory location addressed by ECX
INC DATA1
Increments the contents of data segment memory
location DATA1
‫جام ع ة ال م نوف ي ة‬
BL
SP
EAX
BYTE PTR [BX]
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Addition-With-Carry
• An addition-with-carry instruction (ADC) adds the bit
in the carry flag (C) to the operand data.
A s s e m b ly L a n g u a g e
ADC
ADC
ADC
ADC
AL, AH
CX. BX
EBX. EDX
D H , [B X ]
A D C B X , [B P + 2 ]
A D C E C X , [E B X ]
‫جام ع ة ال م نوف ي ة‬
O p e ra tio n
A L = A L + A H + c a rry
C X = C X + B X + c a rry
E B X = E B X + E D X + c a rry
T h e b yte c o n te n ts o f th e d a ta s e g m e n t m em o ry
lo c a tio n a d d re s s e d b y B X a d d to D H w ith c a rry
w ith th e s u m s to re d in D H
T h e w o rd c o n te n ts o f th e s ta c k s e gm e n t m em o ry
lo c a tio n a d d re s s e d b y B P p lu s 2 a d d to B X w ith
c a rry w ith th e s u m s to re d in B X
T h e d o u b le w o rd c o n te n ts o f th e d a ta s e g m e n t
m em ory lo c a tio n a d d re s s e d b y E B X a d d to E C X
w ith c a rry w ith th e s u m s to re d in E C X
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Example :A procedure that sums NUMB and
NUMB+1; the result is returned in AL.
PROC
SUMS
‫جام ع ة ال م نوف ي ة‬
NEAR
MOV
MOV
ADD
INC
ADD
RET
ENDP
DI, OFFSET NUMB
AL, 0
AL, [DI]
DI
AL, [DI]
;address NUMB
;clear sum
; add NUMB
;address NUMB+1
;add NUMB+1
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Example :A procedure that sums of 16-bit
ARRAY elements 3, 5 and 7;the result is returned
in AX.
SUM
SUM
‫جام ع ة ال م نوف ي ة‬
PROC NEAR
MOV EBX, OFFSET ARRAY
MOV ECX, 3
MOV AX, [EBX+2*ECX)
MOV ECX, 5
ADD AX, [EBX+2*ECX]
MOV ECX, 7
ADD AX, [EBX+2*ECX]
RET
ENDP
;address ARRAY
;address element 3
;get element 3
;address element 5
;add element 5
;address element 7
;add element 7
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Exchange and Add for the 80486-Pentium 4
• The XADD instruction adds the source to the destination
and stores the sum in the destination, as with any
addition.
• The difference is that after the addition takes place, the
original value of the destination is copied into the source
operand.
• For example, if BL = 12H and DL = 02H, and the XADD
BL,DL instruction executes, the BL register contains the
sum of 14H and DL becomes 12H.
• The sum of 14H is generated and the original destination
of 12H replaces the source.
‫جام ع ة ال م نوف ي ة‬
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5 - 10
Subtraction
• Many forms of subtraction (SUB) appear in the instruction set.
• These forms use any addressing mode with 8-, 16-, or 32-bit data.
A special form of subtraction (decrement, or DEC) subtracts a 1
from any register or memory location.
•
Examples of the SUB instructions.
Assembly Language
SUB CL, BL
SUB AX, SP
SUB ECX, EBP
SUB DH, 6FH
SUB AX, 0CCCCH
SUB ESI, 2000300H
SUB [DI], CH
SUB CH, [BP]
‫جام ع ة ال م نوف ي ة‬
Operation
CL = CL - BL
AX = AX - SP
ECX = ECX - EBP
DH = DH - 6FH
AX = AX - CCCCH
ESI = ESI - 2000300H
Subtracts the contents of CH from the contents of the
data segment memory location addressed by Dl
Subtracts the byte contents of the stack segment memory
location addressed by BP from CH
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Decrement Subtraction:
•
•
Decrement subtraction (DEC) subtracts a 1 from a register or the contents of a
memory location.
The decrement indirect memory data instructions require BYTE PTR, WORD
PTR, or DWORD PTR because the assembler cannot distinguish a byte from
a word or doubleword when an index register addresses memory.
Assembly Language
DEC BH
BH = BH - 1
DEC CX
CX = CX - 1
DEC EDX
EDX = EDX - 1
DEC BYTE PTR [Dl]
Subtracts 1 from the byte contents of
the data segment memory location
a
es
d 1
byfr
Do
lm the word contents of
Sd
ud
br
te
rs
as
ct
the stack segment memory location
S
au
db
dt
rr
ea
sc
st
es
d 1
byfr
Bo
Pm the doubleword
contents of the data segment memory
l
So
uc
ba
tt
ri
ao
cn
tsad
1dr
fe
rs
os
med
thb
ey cE
oB
nX
tents of the
data segment memory location NUMB
DEC WORD PTR[BP]
DEC DWORD PTR[EBX]
DEC NUMB
‫جام ع ة ال م نوف ي ة‬
Operation
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Subtract-with-Borrow:
•
A subtraction-with-borrow (SBB) instruction functions as a regular subtraction,
except that the carry flag (C), which holds the borrow, also subtracts from the
difference.
Assembly Language
‫جام ع ة ال م نوف ي ة‬
Operation
SBB AH, AL
AH = AH - AL - carry
SBB AX, BX
AX = AX - BX - carry
SBB EAX, ECX
EAX = EAX- ECX -carry
SBB CL, 2
CL = CL - 2 - carry
SBB BYTE PTR[DI], 3
Both a 3 and carry subtract from the contents of the data segment memory
location addressed by Dl
SBB [DI], AL
Both AL and carry subtract from the data segment memory location
addressed by Dl
SBB DI, [BP + 2]
Both carry and the word contents of the stack segment memory location
addressed by the sum of BP and 2 subtract from Dl
SBB AL.IEBX + ECX]
Both carry and the byte contents of the data segment memory location
addressed by the sum of EBX and ECX subtract from AL
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Comparison
• The comparison instruction (CMP) is a subtraction that changes
only the flag bits; the destination operand never changes.
• A comparison is useful for checking the entire contents of a
register or a memory location against another value.
• A CMP is normally followed by a conditional jump instruction,
which tests the condition of the flag bits.
•
Examples of the CMP instructions.
Assembly Language
CMP CL, BL
CMP AX, SP
CMP EBP, ESI
CMP AX, 2000H
CMP [DI], CH
CMP CL, [BP]
CMP AH, TEMP
‫جام ع ة ال م نوف ي ة‬
Operation
CL - BL
AX - SP
EBP - ESI
AX - 2000H
CH subtracts from the contents of the data segment memory
location addressed by Dl
The byte contents of the stack segment memory location
addressed by BP subtract from CL
The byte contents of the data segment memory location TEMP
subtract from AH
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Compare and Exchange
• The compare and exchange instruction (CMPXCHG),
found only in the 80486 through the Pentium 4
instruction sets, compares the destination operand
with the accumulator. If they are equal, the source
operand is copied into the destination; if they are not
equal, the destination operand is copied into the
accumulator. This instruction functions with 8-, 16-, or
32-bit data.
• The CMPXCHG CX,DX instruction is an example of
the compare and exchange instruction. This
instruction first compares the contents of CX with AX.
If CX equals AX, DX is copied into CX; if CX is not
equal to AX, CX is copied into AX.
‫جام ع ة ال م نوف ي ة‬
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Multiplication and Division
•
•
•
•
‫جام ع ة ال م نوف ي ة‬
Only modem microprocessors contain multiplication and division
instructions.
Earlier 8-bit microprocessors could not multiply or divide without
the use of a program that multiplied or divided by using a series of
shifts and additions or subtractions.
Because microprocessor manufacturers were aware of this
inadequacy, they incorporated multiplication and division
instructions into the instruction sets of the newer microprocessors.
The Pentium-Pentium 4 processors contain special circuitry that
performs a multiplication in as little as one clocking period, while it
took over 40 clocking periods to perform the same multiplication in
earlier Intel microprocessors.
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MUL Instruction
• The MUL (unsigned multiply) instruction multiplies an
8-, 16-, or 32-bit operand by either AL, AX, or EAX.
• The instruction formats are:
• MUL r/m8
• MUL r/m16
• MUL r/m32
Implied operands:
‫جام ع ة ال م نوف ي ة‬
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8-bit Multiplication:
• With 8-bit multiplication, the multiplicand is always in the AL
register, whether signed or unsigned. The multiplier can be any 8bit register or any memory location.
• The multiplication instruction contains one operand because it
always multiplies the operand times the contents of register AL.
• Examples of 8-bit multiplication instructions.
Assembly Language
MUL CL
IMUL DH
IMUL BYTE PTR[BX]
MUL TEMP
‫جام ع ة ال م نوف ي ة‬
Operation
AL is multiplied by CL; the unsigned product is in AX
AL is multiplied by DH; the signed product is in AX
AL is multiplied by the byte contents of the data
segment memory addressed by BX; the signed
product is in AX
AL is multiplied by the byte contents of the data
segment memory addressed by TEMP; the
unsigned product is in AX
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16-bit Multiplication:
• Word multiplication is very similar to byte multiplication. The
difference is that AX contains the multiplicand instead of AL, and
the product appears in DX-AX instead of AX.
• The DX register always contains the most-significant 16 bits of
the product, and AX contains the least-significant 16 bits.
• Examples of 16-bit multiplication instructions.
Assembly Language
MUL CX
IMUL DI
MUL WORD PTR[SI]
‫جام ع ة ال م نوف ي ة‬
Operation
AX is multiplied by CX; the unsigned product is in DX-AX
AX is multiplied by Dl; the signed product is in DX-AX
AX is multiplied by the word contents of the data segment
addressed by SI; the unsigned product is in DX-AX
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32-bit Multiplication:
•
•
•
As with 8- and 16-bit multiplication, 32-bit multiplication can be signed or
unsigned by using the IMUL and MUL instructions.
With 32-bit multiplication, the contents of EAX are multiplied by the
operand specified with the instruction.
The product (64 bits wide) is found in EDX-EAX, where EAX contains the
least-significant 32 bits of the product.
• Examples of 32-bit multiplication instructions.
Assembly Language
MUL ECX
IMUL EDI
MUL DWORD PTR[ECX]
‫جام ع ة ال م نوف ي ة‬
Operation
EAX is multiplied by ECX; the unsigned product is in EDX-EAX
EAX is multiplied by EDI; the signed product is in EDX-EAX
EAX is multiplied by the doubleword contents of the data
segment addressed by ECX; the product is in EDX-EAX
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Example: Suppose that BL and CL each contain
two 8-bit unsigned numbers. Write a program to
generates DX = BL x CL.
MOV
MOV
MOV
MUL
MOV
‫جام ع ة ال م نوف ي ة‬
BL, 5
CL, 10
AL, CL
BL
DX, AX
;load data
;position data
;multiply
;position product
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DIV Instruction
• The DIV (unsigned divide) instruction performs 8-bit,
16-bit, and 32-bit division on unsigned integers
• A single operand is supplied (register or memory
operand), which is assumed to be the divisor
• Instruction formats:
• DIV r/m8
• DIV r/m16
• DIV r/m32
‫جام ع ة ال م نوف ي ة‬
Default Operands:
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8-bit Division
•
•
•
An 8-bit division uses the AX register to store the dividend that is divided
by the contents of any 8-bit register or memory location.
The quotient moves into AL after the division with AH containing a whole
number remainder.
For a signed division, the quotient is positive or negative; the remainder
always assumes the sign of the dividend and is always an integer.
• Examples of 8-bit Division instructions.
Assembly Language
DIV CL
IDIV BL
DIV BYTE PTR[BP]
‫جام ع ة ال م نوف ي ة‬
Operation
AX is divided by CL; the unsigned quotient is in AL and
the remainder is in AH
AX is divided by BL; the signed quotient is in AL and the
remainder is in AH
AX is divided by the byte contents of the stack segment
memory location addressed by BP; the unsigned quotient
in AL and the remainder in AH
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16-bit Division
•
•
16-bit division is similar to 8-bit division, except that instead of dividing
into AX, the 16-bit number is divided into DX-AX, a 32-bit dividend.
The quotient appears in AX and the remainder appears in DX after a 16bit division.
• Examples of 16-bit Division instructions.
Assembly Language
DIV CX
IDIV SI
DIV NUMB
‫جام ع ة ال م نوف ي ة‬
Operation
DX-AX is divided by CX; the unsigned quotient
is in AX and the remainder is in DX
DX-AX is divided by SI; the signed quotient is in
AX and the remainder is in DX
AX is divided by the contents of the data
segment memory location NUMB; the unsigned
quotient is in AX and the remainder is in DX
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32-bit Division
•
•
The 80386 through the Pentium 4 processors perform 32-bit division on
signed or unsigned numbers.
The 64-bit contents of EDX-EAX are divided by the operand specified by
the instruction, leaving a 32-bit quotient in EAX and a 32-bit remainder in
EDX.
• Examples of 32-bit Division instructions.
Assembly Language
DIV ECX
DIV DATA2
IDIV DWORD PTR[EDI]
‫جام ع ة ال م نوف ي ة‬
Operation
EDX-EAX is divided by ECX; the unsigned quotient is
in EAX and the remainder is in EDX
EDX-EAX is divided by the doubleword contents of
data segment memory location DATA2; the unsigned
quotient is in EAX and the remainder is in EDX
EDX-EAX is divided by the doubleword contents of the
data segment memory location addressed by EDI; the
signed quotient is in EAX and the remainder is in EAX
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Example to illustrates a short program that
divides the unsigned byte contents of memory
location NUMB by the unsigned contents of
memory location NUMB1
MOV
MOV
DIV
MOV
MOV
‫جام ع ة ال م نوف ي ة‬
AL, NUMB
AH, 0
NUMB1
ANSQ, AL
ANSR, AH
;get NUMB
;zero-extend
;divide by NUMB1
;save quotient
;save remainder
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Example to shows the same basic program
except that the numbers are signed numbers.
MOV
CBW
IDIV
MOV
MOV
‫جام ع ة ال م نوف ي ة‬
AL, NUMB
NUME1
ANSQ, AL
ANSR, AH
;get NUMB
;sign-extend
;divide by NUMB1
;save quotient
;save remainder
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BCD and ASCII Arithmetic
• The microprocessor allows arithmetic manipulation of both
BCD (binary-coded decimal) and ASCII (American
Standard Code for Information Interchange) data.
‫جام ع ة ال م نوف ي ة‬
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BCD Arithmetic
• Two arithmetic techniques operate with BCD data:
addition and subtraction.
• The instruction set provides two instructions that
correct the result of a BCD addition and a BCD
subtraction.
• The DAA (decimal adjust after addition) instruction
follows BCD addition.
• The DAS (decimal adjust after subtraction) follows
BCD subtraction.
• Both instructions correct the result of the addition or
subtraction so that it is a BCD number.
‫جام ع ة ال م نوف ي ة‬
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DAA Instruction
• The DAA instruction follows the ADD or ADC instruction to adjust the
result into a BCD result. Suppose that DX and BX each contain 4-digit
packed BCD numbers.
• A short sample program that adds the BCD numbers in DX and BX,
and stores the result in CX.
MOV
MOV
MOV
ADD
DAA
MOV
MOV
ADC
DAA
MOV
‫جام ع ة ال م نوف ي ة‬
DX, 1234H
BX, 3099H
AL, BL
AL, DL
CL, AL
AL, BH
AL, DH
CH, AL
;load 1,234
;load 3,099
;sum BL with DL
;adjust
;answer to CL
;sum BH, DH, and carry
;adjust
;answer to CH
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DAS Instruction
• The DAS instruction functions as does the DAA instruction, except that
it follows a subtraction instead of an addition.
• A short sample program that subtracts the BCD numbers in DX and
BX, and stores the result in CX.
MOV
MOV
MOV
SUB
DAS
MOV
MOV
SBB
DAS
MOV
‫جام ع ة ال م نوف ي ة‬
DX, 1234H
BX, 3099H
AL, BL
AL, DL
CL, AL
AL, BH
AL, DH
CH, AL
; load 1,234
; load 3,099
;subtract DL from BL
;adjust
; answer to CL
; subtract DH
;adjust
;answer to CH
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ASCII Arithmetic
• The ASCII arithmetic instructions function with ASCIIcoded numbers.
• These numbers range in value from 30H to 39H for
the numbers 0-9.
• There are four instructions used with ASCII arithmetic
operations:
•
•
•
•
AAA (ASCII adjust after addition),
AAD (ASCII adjust before division),
AAM (ASCII adjust after multiplication), and
AAS (ASCII adjust after subtraction).
• These instructions use register AX as the source and
as the destination.
‫جام ع ة ال م نوف ي ة‬
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AAA Instruction
• The addition of two one-digit ASCII-coded numbers will not
result in any useful data.
• For example, if 31H and 39H are added, the result is 6AH. This
ASCII addition (1+9) should produce a two-digit ASCII result
equivalent to a 10 decimal, which is a 31H and a 30H in ASCII
code.
• If the AAA instruction is executed after this addition, the AX
register will contain a 0100H.
MOV
ADD
AAA
ADD
‫جام ع ة ال م نوف ي ة‬
AX, 31H
AL, 39H
AX, 3030H
;load ASCII 1
;add ASCII 9
;adjust
;answer to ASCII
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AAD Instruction
• Unlike all other adjustment instructions, the AAD instruction
appears before a division.
• The AAD instruction requires that the AX register contain a twodigit unpacked BCD number (not ASCII) before executing.
• After adjusting the AX register with AAD, it is divided by an
unpacked BCD number to generate a single-digit result in AL
with any remainder in AH.
• To illustrates how a 72 in unpacked BCD is divided by 9 to
produce a quotient of 8. The 0702H loaded into the AX register
is adjusted by the AAD instruction to 0048H. The AAD
instruction converts the unpacked BCD numbers between 00
and 99 into binary.
MOV
MOV
AAD
DIV
‫جام ع ة ال م نوف ي ة‬
BL, 9
AX, 0702H
;load divisor
;load dividend
;adjust
BL
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AAM Instruction
• The AAM instruction follows the multiplication instruction after
multiplying two one-digit unpacked BCD numbers.
• A short program that multiplies 5 times 5.
• The result after the multiplication is 0019H in the AX register.
• After adjusting the result with the AAM instruction, AX contains a
0205H.
• This is an unpacked BCD result of 25. If 3030H is added to
0205H, it has an ASCII result of 3235H.
MOV
MOV
MUL
AAM
‫جام ع ة ال م نوف ي ة‬
AL, 5
CL, 5
CL
;load multiplicand
; load multiplier
;adjust
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Basic Logic Instructions
•
•
•
‫جام ع ة ال م نوف ي ة‬
The basic logic instructions include AND, OR,
Exclusive-OR, and NOT.
Another logic instruction is TEST, which is explained
in this section of the text because the operation of
the TEST instruction is a special form of the AND
instruction.
Also explained is the NEG instruction, which is
similar to the NOT instruction.
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AND
•
•
The AND operation performs logical multiplication. The AND operation
clears bits of a binary number.
The task of clearing a bit in a binary number is called masking.
• Examples of AND instructions.
Assembly Language
AND AL, BL
AND ECX, EDI
AND CL, 33H
AND DI, 4FFFH
AND ESI, 34H
AND AX, [DI]
Operation
AL = AL AND BL
ECX = ECX AND EDI
CL = CL AND 33H
Dl = Dl AND 4FFFH
ESI = ESI AND 00000034H
AX is ANDed with the word contents of the data segment
memory location addressed by Dl
MOV BX, 3135H
AND BX, 0F0FH
‫جام ع ة ال م نوف ي ة‬
;load ASCII
;mask BX
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OR
•
The OR operation performs logical addition and is often called the
Inclusive-OR function.
• Examples of OR instructions.
Assembly Language
OR AH, BL
OR EAX, EBX
OR SP, 990DH
OR EBP, 10
OR DX, [BX]
MOV
MOV
MUL
AAM
OR
‫جام ع ة ال م نوف ي ة‬
Operation
AH = AH OR BL
EAX = EAX OR EBX
SP = SP OR 990DH
EBP = EBP OR 0000000AH
DX is ORed with the word contents of the data
segment memory location addressed by BX
AL, 5
BL, 7
BL
AX, 3030H
; load data
;adjust
; to ASCII
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
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XOR
•
The Exclusive-OR instruction (XOR) differs from Inclusive-OR (OR).
The XOR instruction uses any addressing mode except segment register
addressing.
• Examples of XOR instructions.
Assembly Language
Operation
XOR CH, DL
CH = CH XOR DL
XOR SI, BX
SI = SI XOR BX
XOR EBX, EDI
EBX = EBX XOR EDI
XORAH, 0EEH
AH = AH XOR EEH
XOR DI. 0DDH
Dl = Dl XOR OODDH
XOR ESI.100
ESI = ESI XOR 00000064H
XOR DX, [SI]
DX is Exclusive-ORed with the word contents of the data
segment memory location addressed by SI
‫جام ع ة ال م نوف ي ة‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 39
Test Instructions
•
•
The TEST instruction performs the AND operation.
The difference is that the AND instruction changes the destination operand,
while the TEST instruction does not.
Assembly Language
TEST DL, DH
TEST CX, BX
TEST EDX, ECX
TEST AH, 4
TEST EAX, 256
TESTAL, 1
JNZ RIGHT
TESTAL, 128
JNZ LEFT
‫جام ع ة ال م نوف ي ة‬
Operation
DL is ANDed with DH
CX is ANDed with BX
EDX is ANDed with ECX
AH is ANDed with 4
EAX is ANDed with 256
; test right bit
; if set
;test left bit
;if set
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 40
Bit Test Instructions
•
•
•
•
BT AX,4 instruction tests bit position 4 in AX. The result of the test is
located in the carry flag bit. If bit position 4 is a 1, carry is set; if bit position 4 is a 0, carry is cleared.
BTC AX,4 instruction complements bit position 4 after testing it,
BTR AX,4 instruction clears it (0) after the test, and
BTS AX,4 instruction sets it (1) after the test.
Assembly
Language
BT
BTC
BTR
BTS
‫جام ع ة ال م نوف ي ة‬
Operation
Tests a bit in the destination operand specified by the source operand
Tests and complements a bit in the destination operand specified by the source operand
Tests and resets a bit in the destination operand specified by the source operand
Tests and sets a bit in the destination operand specified by the source operand
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 41
NOT and NEG
•
•
Logical inversion, or the one’s complement (NOT); and arithmetic sign
inversion, or the two’s complement (NEG) are the last two logic functions
presented
These are two of a few instructions that contain only one operand.
• Examples of XOR instructions.
Assembly Language
NOT CH
NEG CH
NEG AX
NOT EBX
NEG ECX
NOT TEMP
‫جام ع ة ال م نوف ي ة‬
Operation
CH is one's complemented
CH is two's complemented
AX is two's complemented
EBX is one's complemented
ECX is two's complemented
The contents of the data segment memory
location TEMP is one’s complemented is one's
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 42
Shift
• Shift instructions position or move numbers to the left
or right within a register or memory location.
• They also perform simple arithmetic such as
multiplication by powers of 2+n (left shift) and division
by powers of 2-n (right shift).
‫جام ع ة ال م نوف ي ة‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 43
• Example of Shift instructions.
Assembly Language
SHL AX, 1
SHR BX,12
SHR ECX,10
SAR Sl, 2
SAR EDX, 14
‫جام ع ة ال م نوف ي ة‬
Operation
AX is logically shifted left 1 place
BX is logically shifted right 12 places
ECX is logically shifted right 10 places
SI is arithmetically shifted right 2 places
EDX is arithmetically shifted right 14 places
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 44
•Examples:
;Multiply AX by 10 (1010)
SHL
AX, 1
MOV BX, AX
SHL
AX, 2
ADD AX, BX
;Multiply AX by 18 (10010)
SHL AX, 1
MOV BX., AX
SHL AX, 3
ADD AX, BX
; Multiply AX by 5 (101)
MOV BX, AX
SHL
AX, 1
SHL
AX, 1
ADD AX, BX
‫جام ع ة ال م نوف ي ة‬
;AX times 2
;AX times 8
;10 times AX
;AX times 2
;AX times 16
;18 times AX
;AX times 2
;AX times 4
;5 times AX
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
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Rotate
‫جام ع ة ال م نوف ي ة‬
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•Examples of Rotate instructions.
Assembly Language
ROL SI, 14
RCL BL, 6
ROL ECX, 18
RCR AH, CL
ROR WORD PTR[BP], 2
‫جام ع ة ال م نوف ي ة‬
Operation
SI rotates left 14 places
BL rotates left through carry 6 places
ECX rotates left 18 places
AH rotates right through carry the number of places
specified by CL
The word contents of the stack segment memory location
addressed by BP rotate right 2 places
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 47
String Comparisons:
SCAS
• The SCAS (string scan instruction) compares the AL register with
a byte block of memory, the AX register with a word block of
memory, or the EAX register (80386-Pentium 4) with a
doubleword block of memory.
• The SCAS instruction subtracts memory from AL, AX, or EAX
without affecting either the register or the memory location.
• The opcode used for byte comparison is SCASB,
• The opcode used for the word comparison is SCASW, and
• The opcode used for a doubleword comparison is SCASD.
• the contents of the extra segment memory location addressed by
DI is compared with AL, AX, or EAX.
• Like the other string instructions, SCAS instructions use the
direction flag (D) to select either auto-increment or autodecrement operation for DI.
‫جام ع ة ال م نوف ي ة‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 48
A program shows how to search this part of
memory for a 00H using the SCASB instruction.
MOV
CLD
MOV
XOR
REPNE
‫جام ع ة ال م نوف ي ة‬
DI, OFFSET BLOCK
CX, 100
AL, AL
SCASB
;address data
;auto-increment
;load counter
;clear AL
;search
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
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String Comparisons:
CMPS
• The CMPS (compare strings instruction) always compares two
sections of memory data as bytes (CMPSB), words (CMPSW), or
doublewords (CMPSD).
• Note that only the 80386/80486/ Pentium can use doublewords.
The contents of the data segment memory location addressed by
SI is compared with the contents of the extra segment memory
location addressed by DI.
• The CMPS instruction increments or decrements both SI and DI.
‫جام ع ة ال م نوف ي ة‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 50
A short procedure that compares two sections
of memory searching for a match. The CMPSB
instruction is prefixed with a REPE.
MATCH
MATCH
‫جام ع ة ال م نوف ي ة‬
PROC
MOV
MOV
CLD
MOV
REPE
RET
ENDP
FAR
SI, OFFSET LINE
DI, OFFSET TABLE
CX, 10
CMPSB
;address LINE
;address TABLE
;auto-increment
;counter
;search
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 51
Questions and Answers
‫جام ع ة ال م نوف ي ة‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 52
Select an ADD instruction that will:
(a)
add BX to AX
(b)
add l2H to AL
(c)
add EDI and EBP
(d)
add 22H to CX
(e)
add the data addressed by SI to AL
(f)
add CX to the data stored at memory location
FROG
a)
b)
c)
d)
e)
f)
‫جام ع ة ال م نوف ي ة‬
ADD
ADD
ADD
ADD
ADD
ADD
AX, BX
AL, 12H
EDI,EBP
CX, 22H
AL, [SI]
CX, PROG
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 53
If AX = 1001H and DX = 20FFH, list the sum
and the contents of each flag register bit (C,
A, S, Z, and O) after the ADD AX, DX
instruction executes.
AX
1001H
0001 0000 0000 0001 B
+ DX
20FFH
0010 0000 1111 1111 B
3100H
0011 0001 0000 0000 B
C = 0,
‫جام ع ة ال م نوف ي ة‬
A = 1,
S = 0,
Z = 0,
O=0
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 54
Develop a short sequence of instructions
that adds AL, BL, CL, DL, and AH. Save the
sum in the DH register.
ADD
ADD
ADD
ADD
MOV
‫جام ع ة ال م نوف ي ة‬
AL, BL
AL, CL
AL,DL
AL, AH
DH, AL
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 55
Develop a short sequence of instructions
that adds AX, BX, CX, DX, and SP. Save the
sum in the DI register.
ADD
ADD
ADD
ADD
MOV
‫جام ع ة ال م نوف ي ة‬
AX, BX
AX, CX
AX,DX
AX, SP
DI, AX
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 56
Select a SUB instruction that will:
a)
subtract BX from CX
b)
subtract EEH from DH
c)
subtract DI from SI
d)
subtract 3322H from EBP
e)
subtract the data address by SI from CH
f)
subtract the data stored 10 words after the
location addressed by SI from DX
a)
b)
c)
d)
e)
f)
‫جام ع ة ال م نوف ي ة‬
SUB
SUB
SUB
SUB
SUB
SUB
CX, BX
DH, EEH
SI, DI
EBP, 3322H
CH, [SI]
DX, [SI + 10]
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 57
Write a short sequence of instructions that
subtracts the numbers in DI, SI, and BP from
the AX register. Store the difference in
register BX.
SUB
SUB
SUB
MOV
‫جام ع ة ال م نوف ي ة‬
AX, DI
AX, SI
AX, BP
BX, AX
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 58
Write a procedure that adds BX, CX, and DX.
Save the sum in the AX register.
ADDS
ADDS
‫جام ع ة ال م نوف ي ة‬
PROC
ADD
ADD
MOV
ENDP
NEAR
BX, CX
BX, DX
AX, BX
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 59
Write a procedure that adds data in memory
locations NUMB and NUMB+1. Save the sum
in the AX register.
SUMS
PROC
SUMS
NEAR
MOV
MOV
ADD
ADD
ENDP
DI, OFFEST NUMB
AL, 0
AL, [DI]
AL, [DI+1]
NEAR
MOV
MOV
ADD
INC
ADD
ENDP
DI, OFFEST NUMB
AL, 0
AL, [DI]
DI
AL, [DI]
or
SUMS
SUMS
‫جام ع ة ال م نوف ي ة‬
PROC
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 60
Write a sequence of instructions that cube
the 8-bit number found in DL. Load DL with a
5 initially, and make sure that your result is a
16-bit number.
MOV
MOV
MUL
MUL
‫جام ع ة ال م نوف ي ة‬
DL, 5
AL, DL
DL
DL
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 61
Write a procedure that adds the contents of
array elements 3, 5, and 7.
;A procedure that sums ARRAY elements 3, 5, and 7;
; the result is returned in AL.
SUM
SUM
‫جام ع ة ال م نوف ي ة‬
PROC NEAR
MOV
AL, 0
MOV
SI, 3
ADD
AL, ARRAY[SI]
ADD
AL, ARRAY [SI+2]
ADD
AL, ARRAY [SI+4]
RET
ENDP
;clear sum
;address element 3
;add element 3
;add element 5
;add element 7
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 62
Write a procedure that adds two 32-bit
numbers. The first number stored in BX and
AX registers and the second number stored
in DX and CX registers. Store the result in
BX and AX registers. The most significant
16-bit are in BX and DX.
;A procedure that sums BX-AX and DX-CX
;the result is returned in BX-AX.
SUM32
SUM32
‫جام ع ة ال م نوف ي ة‬
PROC
NEAR
ADD AX, CX
ADC BX, DX
RET
ENDP
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 63
Write a procedure that adds two 64-bit
numbers. The first number stored in EBX
and EAX registers and the second number
stored in EDX and ECX registers. Store the
result in EBX and EAX registers. The most
significant 16-bit are in BX and DX.
;A procedure that sums EBX-EAX and EDX-ECX
;the result is returned in EBX-EAX.
SUM64
SUM64
‫جام ع ة ال م نوف ي ة‬
PROC NEAR
ADD EAX, ECX
ADC EBX, EDX
RET
ENDP
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 64
Write a short sequence of instructions that
divides the number in BL by the number in
CL, and then multiplies the result by 2. The
final answer must be a 16-bit number stored
in the DX register.
MOV
MOV
DIV
MOV
MUL
‫جام ع ة ال م نوف ي ة‬
AL, BL
AH, 0
CL
BH, 2
BH
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 65
Select an AND instruction that will:
1.
AND BX with DX and save the result in BX.
2.
AND OEAH with DH.
3.
AND DI with BP and save the result in DI.
4.
AND 1122H with EAX.
5.
AND the data addressed by BP with CX and save
the result in memory.
1.
2.
3.
4.
5.
‫جام ع ة ال م نوف ي ة‬
AND
AND
AND
AND
AND
BX, DX
DH, EAH
DI, BP
EAX, 1122H
[BP], CX
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 66
Develop a short sequence of instructions that
clears (0) the three leftmost bits of DH without
changing the remainder DH and stores the
result in BH.
MOV
AND
‫جام ع ة ال م نوف ي ة‬
BH, DH
BH, 1FH
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 67
Develop a short sequence of instructions that
sets (1) the rightmost five bits of DI without
changing the remaining bits of DI. Save the
results in SI.
MOV
OR
‫جام ع ة ال م نوف ي ة‬
SI, DI
SI, 1FH
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 68
Develop a sequence of instructions that sets (1)
the rightmost four bits of AX; clears (0) the
leftmost three bits of AX; and inverts bits 7,8,
and 9 of AX.
OR
AND
XOR
‫جام ع ة ال م نوف ي ة‬
AX, 0FH
AX, 1FFFH
AX, E0H
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 69
Select the correct instruction to perform each of the following tasks:
1. shift DI right three places, with zeros moved into the leftmost bit
2. move all bits in AL left one place, making sure that a 0 moves
into the rightmost bit position
3. rotate all the bits of AL left three places
4. rotate carry right one place through EDX
5. move the DH register right one place, making sure that the sign of
the result is the same as the sign of the original number
1.
2.
3.
4.
5.
‫جام ع ة ال م نوف ي ة‬
SHR
SHL
ROL
RCR
SAR
DL, 3
AL, 1
AL, 3
EDX, 1
DH, 1
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 70
Write a program to add 20-word of memory
in data segment beginning at address
ARRAY. Store the result in memory location
RESULT.
MOV
MOV
MOV
AX, 0
SI, OFFEST ARRAY
CX, 20
; count
ADD
ADD
Loop
MOV
AX, WORD PTR [SI]
SI, 2
L1
RESULT, AX
L1:
‫جام ع ة ال م نوف ي ة‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 71
Write an assembly language program to
divide 166H by 25H (unsigned 16-bit
numbers). Store the quotient at the
beginning of memory location 0200 and the
reminder at the beginning of memory
location 0202.
MOV
MOV
MOV
DIV
MOV
MOV
‫جام ع ة ال م نوف ي ة‬
AX, 166H
DX, 0
BX, 25H
BX
[0200], AX
[0202], DX
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 72
Develop a sequence of instructions that
scans through a 300H-byte section of
memory called LIST, located in the data
segment searching for a 66H.
MOV
CLD
MOV
MOV
REPNE
‫جام ع ة ال م نوف ي ة‬
DI, OFFSET LIST
CX, 300
AL, 66H
SCASB
;address data
;auto-increment
;load counter
;put 66 IN AL
;search
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
5 - 73
Write an assembly language program to find the number of negative
elements in the 100H-byte block of memory (BLOCK). Store the result
in memory location RESULT. Assume that the numbers in the block
are all 8-bit signed binary numbers.
DATA1
RESULT
L2:
‫جام ع ة ال م نوف ي ة‬
.MODEL SMALL
.DATA
DW
2000H
DW
?
.CODE
.STARTUP
MOV
DI, OFFSET BLOCK
MOV
CX, 100h
MOV
BX, 0
MOV
AX, [DI]
CMP
AX, 0
JA
L2
INC
BX
INC
DI
LOOP
L1
MOV
RESULT, BX
.EXIT
END
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
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