Analog-to-Digital Converter (ADC)
Introduction to Mechatronics
Fall 2012
Craig Woodin
Ali AlSaibie
Ehsan Maleki

Background Information
 What is ADC?
 Conversion Process
 Accuracy
 Examples of ADC applications
Presenter: Craig Woodin

Signal Types
Analog Signals
 Any continuous signal that a time varying variable of the signal is a representation of some other time varying quantity
 Measures one quantity in terms of some other quantity
 Examples
• Speedometer needle as function of speed
• Radio volume as function of knob movement t

Signal Types
Digital Signals
 Consist of only two states
 Binary States
 On and off
 Computers can only perform processing on digitized signals
1
0

Analog-Digital Converter (ADC)
 An electronic integrated circuit which converts a signal from analog (continuous) to digital
(discrete) form
 Provides a link between the analog world of transducers and the digital world of signal processing and data handling

Analog-Digital Converter (ADC)
 An electronic integrated circuit which converts a signal from analog ( continuous ) to digital
(discrete) form
 Provides a link between the analog world of transducers and the digital world of signal processing and data handling t

Analog-Digital Converter (ADC)
 An electronic integrated circuit which converts a signal from analog (continuous) to digital
( discrete ) form
 Provides a link between the analog world of transducers and the digital world of signal processing and data handling t

ADC Conversion Process
Two main steps of process
1. Sampling and Holding
2. Quantization and Encoding
Analog-to-Digital Converter
Quantizing and
Encoding
Sampling and
Hold
Input: Analog Signal t t

ADC Process
Sampling & Hold
 Measuring analog signals at uniform time intervals
 Ideally twice as fast as what we are sampling
 Digital system works with discrete states
 Taking samples from each location
 Reflects sampled and hold signal
 Digital approximation
Continuous Signal t

ADC Process
Sampling & Hold
 Measuring analog signals at uniform time intervals
 Ideally twice as fast as what we are sampling
 Digital system works with discrete states
 Taking samples from each location
 Reflects sampled and hold signal
 Digital approximation t

ADC Process
Sampling & Hold
 Measuring analog signals at uniform time intervals
 Ideally twice as fast as what we are sampling
 Digital system works with discrete states
 Taking a sample from each location
 Reflects sampled and hold signal
 Digital approximation t

ADC Process
Sampling & Hold
 Measuring analog signals at uniform time intervals
 Ideally twice as fast as what we are sampling
 Digital system works with discrete states
 Taking samples from each location
 Reflects sampled and hold signal
 Digital approximation t

ADC Process
Quantizing
 Separating the input signal into a discrete states with K increments
 K=2 N
 N is the number of bits of the
ADC
 Analog quantization size
 Q=(V max
-V min
)/2 N
 Q is the Resolution
Encoding
 Assigning a unique digital code to each state for input into the microprocessor

ADC Process
Quantization & Coding
 Use original analog signal

ADC Process
Quantization & Coding
 Use original analog signal
 Apply 2 bit coding
11
10
01
00
K=2 2 00
01
10
11

ADC Process
Quantization & Coding
 Use original analog signal
 Apply 2 bit coding
11
10
01
00
K=2 2 00
01
10
11

ADC Process
Quantization & Coding
 Use original analog signal
 Apply 3 bit coding
K=2 3 000
001
010
011
100
101
110
111

ADC Process
Quantization & Coding
 Use original analog signal
 Apply 3 bit coding
 Better representation of input information with additional bits
 MCS12 has max of 10 bits
K=2 3 000
001
010
011
100
101
110
111
K=16 0000 K=…
.
.
.
1111

ADC Process-Accuracy
The accuracy of an ADC can be improved by increasing:
Sampling Rate, Ts
 Based on number of steps required in the conversion process
 Increases the maximum frequency that can be measured t
Resolution, Q
 Improves accuracy in measuring amplitude of analog signal
 Limited by the signal-tonoise ratio (~6dB) t

ADC Process-Accuracy
The accuracy of an ADC can be improved by increasing:
Sampling Rate, Ts
 Based on number of steps required in the conversion process
 Increases the maximum frequency that can be measured t
Resolution (bit depth), Q
 Improves accuracy in measuring amplitude of analog signal t

ADC-Error Possibilities
 Aliasing (sampling)
 Occurs when the input signal is changing much faster than the sample rate
 Should follow the Nyquist Rule when sampling
• Answers question of what sample rate is required
• Use a sampling frequency at least twice as high as the maximum frequency in the signal to avoid aliasing
• f sample
>2*f signal
 Quantization Error (resolution)
 Optimize resolution
 Dependent on ADC converter of microcontoller

ADC Applications
 ADC are used virtually everywhere where an analog signal has to be processed, stored, or transported in digital form
 Microphones
 Strain Gages
 Thermocouple
 Digital Multimeters

Types of ADC
 Successive Approximation A/D Converter
 Flash A/D Converter
 Dual Slope A/D Converter
 Delta-Sigma A/D Converter
Presenter: Ali AlSaibie

Successive Approximation ADC
 Elements
• DAC = Digital to Analog Converter
• EOC = End of Conversion
• SAR = Successive Approximation Register
• S/H = Sample and Hold Circuit
• V in
= Input Voltage
• Comparator
• V ref
= Reference Voltage

Successive Approximation ADC
 Algorithm
• Uses an n-bit DAC and original analog results
• Performs a binary comparison of V
DAC
• MSB is initialized at 1 for DAC and V in
• If V in
< V
DAC
(V
REF
/ 2 ^n=1 ) then MSB is reset to 0
• If V in
> V
DAC
(V
REF
/ 2 ^n ) Successive Bits set to 1 otherwise 0
• Algorithm is repeated up to LSB
• At end DAC in = ADC out
• N-bit conversion requires N comparison cycles

Successive Approximation ADC -
 5-bit ADC, V in
=0.6V, V ref
=1V
Example
Bit 4 3 2
 Cycle 1 => MSB=1
DAC bit/voltage
1
Voltage .5 .25
.125
.0625
.03125
SAR = 1 0 0 0 0
0
V
DAC
= V ref
/2 ^1 = .5
 Cycle 2
V in
> V
DAC
SAR unchanged = 1 0 0 0 0
SAR = 1 1 0 0 0
SAR bit3 reset to 0 = 1 0 0 0 0 V
DAC
= .5 +.25 = .75
 Cycle 3
SAR = 1 0 1 0 0
V
DAC
= .5 + .125 = .625
 Cycle 4
V in
< V
DAC
V in
< V
DAC
SAR = 1 0 0 1 0
V
DAC
= .5+.0625=.5625
 Cycle 5
SAR = 1 0 0 1 1
V
DAC
= .5+.0625+.03125= .59375
V in
> V
DAC
V in
> V
DAC
SAR bit2 reset to 0 = 1 0 0 0 0
SAR unchanged = 1 0 0 1 0
SAR unchanged = 1 0 0 1 1

Flash ADC
 Also known as parallel ADC
 Elements
• Encoder – Converts output of comparators to binary
• Comparators

Flash ADC
 Algorithm
 V in value lies between two comparators
 Resolution ∆𝑉 =
𝑉 𝑟𝑒𝑓
2 𝑁
;
 N= Encoder Output bits
 Comparators => 2 N -1
 Example: V ref
8V, Encoder 3-bit
• Resolution ∆𝑉 =
8
2 3
• Comparators 2 3 -1=7
= 1.0V
 1 additional encoder bit -> 2 x # Comparators

Flash ADC Example
V in
= 5.5V, V ref
= 8V
V in lies in between V comp5
& V comp6
V comp5
= V ref
*5/8 = 5V
V comp6
= V ref
*6/8 = 6V
0
0
1
1
Comparator 1 - 5 => output 1
Comparator 6 - 7 => output 0
Encoder Octal Input = sum(0011111) = 5
Encoder Binary Output = 1 0 1
5.5V
1
1
1

Dual Slope A/D Converter
 Also known as an Integrating ADC
Clock
Start
Control
Logic
Stop
Counter

Dual-Slope ADC – How It Works
 An unknown input voltage is applied to the input of the integrator and allowed to ramp for a fixed time period (t u
)
 Then, a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (t d
)
 The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period
 The run-down time measurement is usually made in units of the converter's clock, so longer integration times allow for higher resolutions
 The speed of the converter can be improved by sacrificing resolution
V in
 
V ref t d t u

Delta-Sigma A/D Converter
Analog
Input
Delta-Sigma
Modulator
Low-Pass
Filter
Digital
Output

Delta-Sigma ADC – How It Works
 Input over sampled, goes to integrator
 Integration compared with ground
 Iteration drives integration of error to zero
 Output is a stream of serial bits

Comparison of ADC’s
Type
Dual Slope
Flash
Successive
Approx
Sigma – Delta
Speed
(relative)
Slow
Very Fast
Medium –
Fast
Slow
Cost
(relative)
Med
High
Low
Low
Resolution
(bits)
12-16
4-12
8-16
12-24

ADC Subsystem of MC9S12C32
Input Pins
ADC Built-into
MC9S12C32
Presenter: Ehsan Maleki

ADC - Schematic Diagram
ATD
Port AD

High/Low
Ref Voltage
Power
Supplies
ATD 10B8C - Block Diagram
Analog Input
General Purpose I/O
External Trigger
Analog Input
General Purpose I/O

ATD 10B8C – Key Features
 Resolution: 8/10 bits
 Conversion time: 7 μsec (10 bit)
 8-channel multiplexed inputs
 Successive Approximation ADC
 External trigger control
 Conversion Modes:
 Single or continuous conversion
 Single channel or multiple channels

Operating Modes
 Modes:
 Stop Mode: All clocks halt; conversion aborts; minimum recovery delay (~ 20μs)
 Wait Mode: Reduced MCU power; can resume
 Freeze Mode: Breakpoint for debugging an application

Registers
 MC9S12C Family Reference Manual: Ch. 8
 REGISTERS
 6 Control Registers (first 2 are reserved!)
 2 Status Registers
 2 Test Registers
 1 Digital Input Enable Register
 1 Digital Port Data Register
 8 Result Registers

Control Register (2)
This register controls power down, interrupt, and external trigger.
Writes to this register will abort current conversion sequence but will not start a new sequence.
ATD
Power
External Trigger
( Tab. 8-2 )
Interrupt
Enable

Control Register (3)
This register controls the conversion sequence length, FIFO for results registers and behavior in Freeze Mode.
Writes to this register will abort current conversion sequence but will not start a new sequence.
Conversion
Sequence length
( Tab. 8-4 )
Background Debug
Freeze Enable
(Tab. 8-5)

Control Register (4)
This register selects the conversion clock frequency, the length of the second phase of the sample time and the resolution of the A/D conversion (i.e.: 8-bits or 10-bits).
Writes to this register will abort current conversion sequence but will not start a new sequence.
Resolution
(0=10 bit)
Clock Prescaler
(Default=5)
(Tab. 8-8)

Control Register (5)
This register selects the type of conversion sequence and the analog input channels sampled.
Writes to this register will abort current conversion sequence and start a new conversion sequence.
Single (0) / Continuous (1)
Analog Input Channel Select
Conversion Mode
(Tab. 8-12)
Result Register
Data Justification
RRD Unsigned (0)
/ Signed (1)
(Tab. 8-10/11)
Single (0) / Multi (1)
Channel Mode

Status Register (0)
This read-only register contains the sequence complete flag, overrun flags for external trigger and FIFO mode, and the conversion counter.
Sequence
Complete Flag
Conversion
Counter

Status Register (1)
This read-only register contains the Conversion Complete Flags.

Reserved
Test Registers
This register contains the SC bit used to enable special channel conversions.

Port Data Register
The data port associated with the ATD is general purpose I/O.

Digital Input Enable Register
This bit controls the digital input buffer from the analog input pin to PTADx data register.

Results Registers – Left Justified

Results Registers – Right Justified

Setting Up & Starting the ADC
 Step 1: Power up ATD and define settings in ATDCTL2
 ADPU = 1 (power up the ATD)
 ASCIE = 1 (enables interrupt, if needed)
 Step 2: Wait for ATD recovery time (~ 20μs)
 Step 3: Set up # of conversions in ATDCTL3
 Step 4: Configure resolution, sampling time, and ATD clock speed in ATDCTL4
 Step 5: Configure starting channel, single/multiple channel, single or continuous sequence, and result data format in ATDCTL5

QUESTIONS?

Appendix

Table 8-2
BACK

Tables 8-4 & 8-5
BACK

Table 8-8

Table 8-10

Table 8-11

Table 8-12

References
 http://en.wikipedia.org/wiki/Analog-to-digital_converter
 http://www.grin.com/object/external_document.259394/fb1fe2e3b955672eca34
58c9116d595b_LARGE.png
 http://en.wikipedia.org/wiki/Successive_approximation_ADC
 http://www.maximintegrated.com/app-notes/index.mvp/id/810
 http://en.wikipedia.org/wiki/Delta-sigma_modulation
 http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma.html
 http://www.allaboutcircuits.com/vol_4/chpt_13/9.html
 http://en.wikipedia.org/wiki/Integrating_ADC
 MC9S12C Family Reference Manual