Unit 1: Instructions: The Language of Computers
Introduction (Basic blocks of Processor, CISC Vs RISC) , Operations of Computer hardware,
Operands of Computer hardware. Signed and Unsigned numbers, Representing Instructions in
Computer, Logical operations, Instructions for making decisions, RISC-V Addressing for wide
immediate and addresses
Unit 2: Instructions and Data Flow Model - RISC-V
Supporting procedures in Computer hardware,A C Sort Example, Arrays versus Pointers,
Addition and Subtraction, RISC-V Instructions ,
The RISC-V Processor: Introduction, Logic Design Conventions, building a Datapath,
A Simple Implementation Scheme, an overview of pipelining, Pipelined Datapath and Control
Unit 3 :Intrrupts and Arithmetic for Computer
Data Hazards, Exceptions, Introduction, Multiplication, Division, Floating Point, Overview of
RISC-V Compressed extension. RISC-V Interrupts: Overview of RISC-V Interrupt - Interrupt
handling, Timer Interrupts, Exceptions in Pipelined Implementations, CSR Registers
Unit 4 :Computer Abstractions and Technology
Computer Abstractions: Introduction, Eight Great Ideas in Computer Architecture,
Technologies for Building Processors and Memory, Performance, The Power Wall, The
Switching from Uniprocessor to Multiprocessor, Benchmarking Intel i7, Fallacies and Pitfalls
and concluding remarks( Amdahl’s Law). Translating and Starting Programs, Compiling C
Textboo
k
Included
Excluded Exercises
Chapter Exercises 2.1
UNIT1 2
to 2.36
2.26,2.27.2.28,2.30,2.32
For 2.33 - Register Mapping for variables a,b,c,d,g should be
given as X10-X14, X9
Chapter Exercises 4.1 4.4,4.9,4.11,4.15,4.21,4.22,4.23,4.25,4.28,4.29,4.30,4.31,4.32,
UNIT2 4
to 4.27
4.33
3.14 to 3.19,
3.22 to 3.24
and
Chapter 3.41,3.42,3.4
UNIT3 3
3
3.20,3.21,3.25,3.26,3.27,3.28,3.29,3.30 to 3.40
UNIOT Chapter
4
1
1.6 to 1.14
1.1 to 1.5 and 1.16