Nuclear Inst. and Methods in Physics Research, A 980 (2020) 164403
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Nuclear Inst. and Methods in Physics Research, A
journal homepage: www.elsevier.com/locate/nima
Design of large scale sensors in 180 nm CMOS process modified for radiation
tolerance
L. Flores Sanz de Acedo a,b ,∗, I. Asensi Tortajada a,h , M. Barbero c , I. Berdalovic i , C. Bespin d ,
D. Bortoletto e , C. Buttar b , I. Caicedo d , R. Cardella a , F. Dachs a , V. Dao a , Y. Degerli f , M. Dyndal a ,
P. Freeman a,g , A. Habib c , T. Hemperek d , T. Hirono d , T. Kugathasan a , K. Moustakas d ,
M. Munker a , H. Pernegger a , F. Piro a , P. Riedler a , P. Rymaszewski d , E.J. Schioppa a ,
P. Schwemling f , A. Sharma a,e , L. Simon Argemi b , W. Snoeys a , C. Solans Sanchez a , T. Wang d ,
N. Wermes d
a CERN, Geneva, Switzerland
b University of Glasgow, Glasgow, UK
c
Aix Marseille University, CNRS/IN2P3, CPPM, Marseille, France
Rheinische Friedrich-Wilhelms Universität Bonn, Bonn, Germany
University of Oxford, Oxford, UK
f
CEA-IRFU, Paris, France
g
University of Birmingham, Birmingham, UK
h
University of Valencia and Consejo Superior de Investigaci Científicas (CSIC), Valencia, Spain
i University of Zagreb, Zagreb, Croatia
d
e
ARTICLE
INFO
Keywords:
CMOS sensors
Tracking detectors
Monolithic sensors
MAPS
On-chip clustering
ABSTRACT
The last couple of years have seen the development of Depleted Monolithic Active Pixel Sensors (DMAPS)
fabricated with a process modification to increase the radiation tolerance. Two large scale prototypes, Monopix
with a column drain synchronous readout, and MALTA with a novel asynchronous architecture, have been fully
tested and characterized both in the laboratory and in test beams. This showed that certain aspects have to be
improved such as charge collection after irradiation and the output data rate. Some improvements resulting
from extensive TCAD simulations were verified on a small test chip, Mini-MALTA. A detailed cluster analysis,
using data from laboratory and test beam studies, at different biases, for high and low thresholds and before
and after irradiation is presented, followed by detailed simulations showing that the digital architecture for
both chips is capable of dealing with data rates of around 80 MHz/cm2 similar to what it is expected in the
outer layer of the ATLAS inner tracker upgrade for the HL-LHC. The data rate capability and output bandwidth
are studied using realistic hits generated by the ATLAS detector simulation framework.
1. Evolution of DMAPS
CMOS Monolithic Active Pixel Sensors (MAPS) targeting High Energy Physics experiments have to meet requirements different from
typical commercial applications, and need to be tolerant to the hard
radiation environments in which they are placed. Particles traversing
the sensor have to be detected with a probability above 98%, which
requires sensitivity over the full pixel area. Spatial resolution is another
important aspect. Finally, these sensors have to cover large areas
making low power consumption a key factor.
In 2014, the ALICE experiment in the LHC adopted the ALPIDE
CMOS MAPS sensor implemented in the Tower Jazz 180 nm technology
CMOS imaging sensor process for a renewed Pixel Inner Tracking
System [1]. A schematic drawing of the cross section of this sensor is
shown in the first image of Fig. 1. Its promising measurement results
received interest from the ATLAS ITk community and a group inside
this experiment was created in order to develop sensors that could
meet specifications for the outer layer of the ATLAS pixel detector.
The specifications that were the hardest to achieve were the radiation
tolerance of 500 MRad for ionizing doses and 1015 MeV 𝑛𝑒𝑞 ∕cm2 fluence.
This effort resulted in the submission of an engineering run in July
2017 [2,3] with the MALTA and Monopix sensors, as shown in the
second box of the timeline. These two sensors, of 2 × 2 cm2 and 1 × 2
cm2 respectively, have very similar front-end electronics but different
∗ Corresponding author.
E-mail address: leyre.flores.sanz.de.acedo@cern.ch (L. Flores Sanz de Acedo).
https://doi.org/10.1016/j.nima.2020.164403
Received 15 March 2020; Received in revised form 21 June 2020; Accepted 8 July 2020
Available online 18 July 2020
0168-9002/© 2020 Published by Elsevier B.V.
L. Flores Sanz de Acedo, I. Asensi Tortajada, M. Barbero et al.
Nuclear Inst. and Methods in Physics Research, A 980 (2020) 164403
Table 1
Main characteristics of MALTA and MONOPIX sensors.
MONOPIX
MALTA
Sensor size
2 μm collection diode and
3 μm spacing
2 μm collection diode and
3 μm spacing
Pixel size
36 × 40 μm2
36.4 × 36.4 μm2
Readout type
Column drain architecture
Asynchronous readout
Fabrication process
Standard modified process
with continuous n-blanket
Standard modified process
with continuous n-blanket
Time resolution
6 bits TOA and TOT
Hits available in the
periphery according to
timewalk
the pixels [6], especially for the irradiated sensors. The CMOS circuitry
for all the sensors is located inside the deep-p-well and the charge
collection is done at a small n-type electrode. The sensor capacitance
of the order of a few fF allows for power optimization and large
signal to noise ratio. The MALTA and Monopix prototypes already
included a process modification with respect to the ALPIDE [7]. In
the ALPIDE it is difficult to extend laterally the depletion region far
into the epitaxial layer in between the low resistivity substrate and
the deep p-well, as this requires a potential gradient or an electric
field in between two equipotentials. Therefore, the charge collection
time is limited by diffusion and it takes several tens of nanoseconds
to reach the electrode. In MALTA and Monopix, a low dose n-implant
layer was added to move the junction of the sensor away from the
small collection electrode and create a fully planar junction. As the
depletion of the sensor starts at the junction the sensor is immediately
depleted over the full pixel area (see Fig. 3(a)). Increasing the reverse
bias causes the depletion to extend towards the collection electrode and
to the substrate. Therefore, the epitaxial layer can be fully depleted.
The process modification with this additional low dose n-implant is
known as the standard modified process. The implant is sufficiently
low dose to fully deplete from the collection electrode to the n-well
collection electrode implant for reverse bias voltages of a few Volts and
to maintain the collection electrode capacitance of only a few fF. This
n-type layer also separates the deep p-well of the pixel circuit from the
p-type substrate. The main objective of this process modification was
to achieve full depletion and therefore charge collection by drift rather
than by diffusion. Nevertheless, after testing sensors irradiated to levels
of 1015 MeV 𝑛𝑒𝑞 ∕cm2 , it was found that the charge was not collected
from the corner of the electrode, Fig. 2 shows the efficiency maps of a
2 × 2 pixel region of the MALTA chip. Before irradiation, the efficiency
is around 98% but after it drops due to the charge loss at the corner of
the pixels due to a too low lateral electric field near the pixel borders
(see Fig. 2).
In January 2019, a new prototype chip was designed with a number
of process variations to address issues identified in the MALTA chip, the
Mini-MALTA. The Mini-MALTA chip matrix contains 64 × 16 square
pixels with a pitch size of 36.4 μm, keeping it the same as in MALTA.
The full chip size is 1.7 × 5 mm2 including both the matrix and
all the periphery with the digital circuitry. Inside the Mini-MALTA
sensor there are 8 different pixel flavours, differing in analog front-end
designs, reset mechanism and electrode/well geometries as detailed in
Fig. 4(a). The matrix is divided in two halves where the right-hand
side of it the transistor size has been kept at the same dimensions
as was used in the MALTA and Monopix designs. For the left half of
the matrix critical transistors for the front-end performance have been
enlarged. This is to mitigate the significant Random Telegraph Noise
(RTS) measured on Malta, which prevented low threshold operation.
This noise is caused by a change in charge state of a trap or defect under
or near the transistor gate. This abruptly changes the threshold voltage
of the transistor and hence its current. By enlarging the transistor
size, the total influence of the trapped charge is smaller reducing
the fluctuations. The enlarged transistors are the current source that
absorbs the current going to the input transistor and the clipping one
even though this last one has no direct influence to the RTS noise. The
Mini-Malta FE is explained in detail in paper [5]. Another important
effect of this change in size of the critical transistors is that the gain
of the amplifier for this half of the matrix becomes higher due to a
lower output conductance of the enlarged transistor. The higher gain
and the lower noise allow operation at lower thresholds, facilitating the
detection of charge in the corners previously left undetected.
In Mini-MALTA, the above discussed process variations are emulated using mask variations for different sectors in the matrix. The
extra deep p-well modification is shown in Fig. 3(c) (top). In this, the
standard modified process from TowerJazz has been further modified
with an additional deep p-type implant under the deep p-well. Fig. 3(b)
(top) represents the cross-section of the n-well gap sector of MiniMALTA for which the low dose n-blanket mask has been modified
readout architectures. Monopix is based on a classical column drain
architecture, in which a token is continuously propagated from top to
bottom along each column of the pixel matrix. If the token gets to a
pixel that has seen a hit, it starts the readout mechanism that will take
information out to the end of column logic. The MALTA chip implements a novel asynchronous readout scheme to reduce digital power
consumption and increase the hit rate capability in the matrix. When
the hit signal is above the discrimination threshold, the in-pixel circuit
generates a digital pulse of 1 ns, used as asynchronous reference to
encode the pixel address on a 22 bits bus. There are some mechanisms
in place to avoid collisions in the bus. This fully asynchronous readout
does not require clock distribution over the matrix. Main characteristics
of both chips are described in Table 1.
Despite the hard work to increase the radiation tolerance levels of
these chips, going from the ALICE fluence of 1013 MeV 𝑛𝑒𝑞 ∕cm2 to the
ATLAS one, measurements showed a loss in efficiency at the corner of
pixels for these large-scale prototypes after a 1015 MeV 𝑛𝑒𝑞 ∕𝑐𝑚2 irradiation [4]. This is illustrated in the third image of Fig. 1 which shows the
efficiency map for a 2 × 2 pixel array of an irradiated MALTA sensor,
obtained from the SPS test beam using the Kartel telescope, which
provides a resolution of around 2 μm on the device under test. This can
also be observed in Fig. 2 which shows that the pixel is fully efficient in
the centre but not in the corners where the detection efficiency drops
to 20%–30%. To improve these results further modifications on the
processing of the Tower Jazz 180 nm technology were introduced and
tested in a prototype chip called Mini-MALTA [5]. The Mini-MALTA
was submitted in September of 2018 and proved to be radiation hard
up to 1015 MeV 𝑛𝑒𝑞 ∕cm2 as measured with an electron beam. It also
included some design changes in the analog front-end pixel, targeting
noise reduction and lower threshold operation. The fourth image in
Fig. 1 shows the floorplan of the chip and the efficiency map of an
irradiated sensor. Eventually, in order to increase the charge induced
to the pixel, some samples were produced on Czochralski silicon wafers,
illustrated in the 5th image in Fig. 1. The signal generated in the sensor
is proportional to the thickness of the sensitive layer. MALTA and
Monopix had always been fabricated using a p-type substrate with a
high resistivity epitaxial layer of 25–30 μm thickness, which constitutes
the sensitive layer and can be fully depleted at low voltages. By moving
to high resistivity Czochralski material for the fabrication of the MALTA
sensor the sensitive volume can be considerably increased for higher
reverse biases compensating at least in part the higher noise and higher
charge threshold. Measurements of Malta revealed Random Telegraphic
(RTS) Noise that prevented the operation of the chip at low thresholds.
The front-end was modified in Mini-Malta to correct for this as will be
further explained in the paper. As illustrated in the final block of the
timeline in Fig. 1, a new submission of the MALTA and the Monopix
is planned for the first semester of 2020 incorporating the good design
techniques learnt during these past developments.
2. Pixel and process modifications and front-end improvements
This challenge of efficiency loss in the corner of the pixel triggered
extensive TCAD simulations. The goal was to enlarge the lateral electrical field and hence to accelerate the charge collection at the edge of
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L. Flores Sanz de Acedo, I. Asensi Tortajada, M. Barbero et al.
Nuclear Inst. and Methods in Physics Research, A 980 (2020) 164403
Fig. 1. Time line of CMOS MAPS developments.
Fig. 2. Efficiency map of a 2 × 2 pixel region of the Malta chip, in the right before irradiation for 250 electrons threshold and in the left after 1015 MeV 𝑛𝑒𝑞 ∕cm2 fluence for a
350 electrons threshold.
operate at lower thresholds so smaller charges can be detected by the
electrodes.
Centring the attention on the un-irradiated cluster size map in
Fig. 4(b) it is clear that the standard modified process regardless of the
transistor size shows a larger cluster size in average than the sectors
with the further modifications. This is because in the standard modified
process the lateral electrical field at the corners is much less directive
towards the electrode. The further modifications make the field focus
more to the electrode and reducing the probability for charge sharing.
Finally Fig. 4(c) shows that after irradiation the average cluster size
decreases considerably. There is no real difference in the cluster size for
the half with the original transistor size because the sensor is operating
at high-threshold settings to not be dominated by the noise. For the half
with enlarged transistors, the n-well gap sector have larger cluster sizes
than the standard modified process sector because the charge is better
directed to the electrode and reaches it before being trapped, while
a significant fraction of the charge is lost for the standard modified
process.
A completely different idea from the process and masks modifications to improve the charge collection was tried. So far all the wafers
had been fabricated using a p-type substrate with a high resistivity epitaxial layer of 25–30 μm, which is the sensitive volume where the signal
is generated. However, for the last Monopix/MALTA run also some high
resistivity Czochralski starting material has been included to increase
the sensitive volume by further depletion of the substrate. Czochralski
is the standard method to grow single crystalline silicon and it is only
recently that it has become available with higher resistivity. Some of
the wafers fabricated with the new starting material also have the extra
deep p-well, others the gap in the n-blanket and others the continuous
n-blanket but for all of them the critical transistor size was kept the
same as in the original designs.
A similar analysis of the average cluster size seen per pixel in these
new wafers was performed and it is shown in Fig. 5. The data was taken
in DESY electron test beam with the following conditions: both of the
irradiated chips were biased with −50 V in the substrate and −6 V in
to include a gap. The purpose of both changes is to improve charge
collection for charge generated near the pixel edges by creating a
stronger lateral field which focuses the generated charge (electrons) to
the collection electrode. For the standard modified process the lateral
electrical field at the corner of the pixel is so low that some of the
charge deposited there does not reach the collection electrode after
irradiation, as shown in Fig. 3(a) (bottom). However, with the extra
deep p-well and the gap in the low dose n-implant, the electrical field
at the corners bends more towards the electrode allowing the collection
of the previously lost charge. This effect is illustrated in Fig. 3(c) and
(b) (bottom).
The sensor was extensively tested in both lab and test beam to
determine how all the changes implemented behave. Fig. 4 shows the
cluster analysis of the sensor before and after irradiation for each of the
different regions. No results are shown for the sector with PMOS reset
as the bias of the matrix is global and the operating point of this region
differs from the other ones. This sector received a continuous low dose
n-implant and the only difference in the circuits is that the reset of the
pixel is done with a p-mos transistor instead of a diode for the other
sectors.
The cluster analysis was performed with data taken in the electron
beam of ELSA (Bonn). The bias is common to the full chip and it is
set to −2 V in the p-well and −12 V in the substrate. Nonetheless, the
thresholds differ from the areas with the enlarged transistors to the
areas with the smaller ones. With the enlarged transistors, there is a
change in the gain of the front-end amplifier so the threshold varies.
In Fig. 4 the threshold of the right-hand side of the chip is measured
to around 200 𝑒− while for the left side this is approximately 350 𝑒− .
During operation the chip was kept in a cold box with dry ice. These
settings are similar before and after irradiation.
Analysing the results, it can be seen that before and after irradiation
the sectors with enlarged transistors always show a bigger cluster size
than the ones with the original transistor size. This can be explained by
the higher amplifier gain and lower RTS noise that allow the sensor to
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L. Flores Sanz de Acedo, I. Asensi Tortajada, M. Barbero et al.
Nuclear Inst. and Methods in Physics Research, A 980 (2020) 164403
Fig. 3. From left to right: standard modified process, process modification and new mask with gap in the n-well and extra deep p-well cross section in the upper images and
electrical field lines in the images below.
Fig. 4. On the left the Mini-MALTA sectors are described, in the middle the average cluster size for un-irradiated sensor and on the right the average cluster size for a
1015 MeV 𝑛𝑒𝑞 ∕cm2 irradiated sensor (data from ELSA test beam).
the p-well which gave an operating threshold of 296 electrons for the
standard modified process and 366 electrons for the one with the gap
in the n-layer. The un-irradiated chips were operated at −25 V in the
substrate and −6 V in the p-well for the standard modified process and
at −12 V in the substrate and −6 V in the p-well for the n-well gap
which corresponds to a 373 electrons threshold.
The average cluster size is considerably larger for Czochralski wafers
than for the epitaxial starting material ones, before and after irradiation. The cluster size in average is larger in the corner of the pixels
than in the centre of them, as expected, and similar to the Mini-MALTA
sensor, the cluster size significantly reduces after irradiation. Finally in
Fig. 5, comparing b with c and a with d illustrates that wafers with
the n-well gap show larger clusters than the ones with the continuous
n-blanket implant.
them off-chip without losing any information. This is essential from the
chip design point of view to estimate the area needed for this memory.
The simulation was carried out in a python framework using standard libraries and taking into account the following considerations.
The worst expected trigger rate is 4 MHz according to ATLAS pixel
detector specifications document. Hence, trigger events were generated
according to a Poisson distribution with average 10, as the collision
rate is 40 MHz so 10 times higher than the trigger rate. The detector
expected hits were generated and provided by the experiment, in
their own simulation framework called Athena, in which the geometry
and correct pixel dimensions for the Malta detector are taken into
consideration. The chip has 512 × 512 pixels. For the simulation, it
is assumed there will be a memory for every 32 columns, so a total
number of 16 memories to cover the 512 columns. This could be further
optimized, but Fig. 6 is calculated according to these numbers. Finally,
as the readout capability of the chip is the critical parameter, several
readout rates have been studied. If the readout rate is fast enough to
cope with the expected hit-rate, the number of addresses occupied per
memory should remain constant on average regardless of the number
of events that have been triggered. On the other hand, if the readout
rate of the chip is not high enough, the number of addresses required in
the memory will linearly increase with the number of triggered events,
as the readout is not capable to read and empty the memory.
Fig. 6 shows that the minimum readout rate of the chip should
be 1 hit/ BCID. It can also be observed that for this readout rate the
3. Data rate capabilities and memory simulations
The ATLAS experiment at CERN plans to upgrade its Inner Tracker
System in order to go from a luminosity of 1 × 1014 cm2 s−1 to
7.5 × 1034 cm2 s−1 . Monolithic pixel detectors were proposed for the
outermost layer of the ATLAS pixel detector. The average hit rate for
this layer according to simulations is 80 MHz/cm2 , equivalent to a
maximum of 8 hits per bunch crossing per chip. A simulation was
carried out in order to estimate the size of the memory that will be
needed in order to store all the meaningful events before transmitting
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L. Flores Sanz de Acedo, I. Asensi Tortajada, M. Barbero et al.
Nuclear Inst. and Methods in Physics Research, A 980 (2020) 164403
Fig. 5. From left to right in pixel cluster size for Cz n-well gap un-irradiated, Cz standard un-irradiated, Cz standard irradiated and Cz ngap irradiated both to 1015 MeV 𝑛𝑒𝑞 ∕cm2 .
Fig. 6. Memory positions variation according to the number of events that have been triggered.
total number of addresses for all the 16 memories should be around
200. Clusterizing the data inside the chip could significantly reduce
the number of required memory addresses because the pixels related to
one hit would be grouped and stored more efficiently. The small peaks
observed, for example after 570 triggered events or at the very end
after 1100 triggered events, correspond to a delta ray passing through
column and creating a hit in a large number of pixels. Some chips have
mechanisms in place to prevent these types of events creating issues in
the readout.
To convert this readout rate into a real data rate the number of
bits of the word containing all the pixel information is needed. For the
simulation presented, this word will be composed of 9 bits specifying
the bunch crossing identifier, 11 bits for the address of the pixel that
has been hit and 16 bits with the time over threshold information,
which makes a total of 32 bits. Therefore, as the serializer should be
running at 1.28 Gbps, this corresponds to a readout rate of 1 hit per
bunch crossing. The graph shows that indeed this readout rate is just
sufficient to deal with the hit rate, as the required memory size does not
increase with the number of triggered event but remains stable below
200 memory positions (see Fig. 6).
than the seed pixel can therefore more easily exceed the charge
threshold and in consequence Czochralski material yields larger
cluster sizes than epitaxial starting material. The cluster size for
different pixel flavours varies in a similar way as for the epitaxial
starting material.
Data rate simulations for the ATLAS outer pixel layer show very little
margin in bandwidth and the need for readout at minimum 1.28 Gbps.
A new engineering run foreseen for the first semester of 2020 will
integrate the improvements presented here. The reticle will include:
• 10 new Mini-MALTA prototypes to study further improvements in
the front end and in the radiation capabilities of the technology
• A Malta sensor, 1 × 2 cm2 , which will include the process, mask
and pixel modifications, as well as a new configuration protocol.
Its asynchronous readout architecture allows further study of
timing applications at the level of a few ns.
• A Monopix, 2 × 2 cm2 , with similar corrections to the ones
implemented on Malta, plus in-pixel tuning. Readout rate capabilities of 1.28 Gbps and classical synchronous column drain digital
architecture.
4. Conclusions and current developments
Declaration of competing interest
As presented in this paper, there is a clear path on how to proceed
to make a Depleted Monolithic Active Pixel Sensor more radiation
tolerant:
The authors declare that they have no known competing financial interests or personal relationships that could have appeared to
influence the work reported in this paper.
• Pixel and further process modifications (extra deep p-well and
n-well gap) in Mini-MALTA reduce charge loss at the corner of
pixels, because they have a more directive electrical field to the
collection electrode and therefore yield better efficiency. Cluster
sizes after irradiation are larger in comparison to the standard
modified process where more charge was lost near the pixel
corners.
• Czochralski material can be depleted over a larger depth and
generates more signal for all pixels in a cluster. Pixels other
Acknowledgments
I would like to acknowledge CERN for providing funding for my
scholarship and the University of Glasgow for waiving my tuition
fees. The work presented has as well been supported by the Marie
Sklodowska-Curie Innovative Training Network of the European Commission Horizon 2020 Programme under contract number 675587
(STREAM). The measurements leading to these results have been
5
L. Flores Sanz de Acedo, I. Asensi Tortajada, M. Barbero et al.
Nuclear Inst. and Methods in Physics Research, A 980 (2020) 164403
performed at the TestBeam Facility at DESY Hamburg (Germany),
a member of the Helmholtz Association (HGF). Measurements leading to these results have been performed at the E3 beam-line at
the electron accelerator ELSA operated by the university of Bonn in
Nordrhein-Westfalen, Germany. This project has received funding from
the European Union’s Horizon 2020 Research and Innovation programme under Grant Agreement no. 654168. (IJS, Ljubljana, Slovenia)
Dr. Ben Phoenix, Prof. David Parker and the operators at the MC40
cyclotron in Birmingham (UK).
[3] I. Caicedo, et al., The Monopix chips: Depleted monolithic active pixel sensors
with a column-drain read-out architecture for the ATLAS Inner Tracker upgrade,
http://cds.cern.ch/record/2665944/files/1902.03679.pdf.
[4] Enrico Junior Schioppa, et al., First tests of a novel radiation hard CMOS sensor
process for Depleted Monolithic Active Pixel Sensors, http://iopscience.iop.org/
1748-0221/12/06/P06008.
[5] M. Dyndal, et al., Mini-MALTA: Radiation hard pixel designs for small-electrode
monolithic CMOS sensors for the High Luminosity LHC, J. Instrum. 15 (2020)
P02005, [1909.11987].
[6] M. Munker, et al., Simulations of CMOS pixel sensors with a small collection electrode, improved for a faster charge collection and increased radiation tolerance,
J. Instrum. 14 (2019) C05013, [1903.10190].
[7] W. Snoeys, et al., A process modification for CMOS Monolithic Active Pixel
Sensors for enhanced depletion, timing performance and radiation tolerance, Nucl.
Instrum. Methods A 765 (2014) http://dx.doi.org/10.1016/j.nima.2017.07.046.
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