Republic of the Philippines
BATANGAS STATE UNIVERSITY
The National Engineering University
Alangilan Campus
Golden Country Homes, Alangilan Batangas City, Batangas, Philippines 4200
Tel Nos.: (+63 43) 425-0139 local 2121 / 2221
E-mail Address: coe.alangilan@g.batstate-u.edu.ph | Website Address: http://www.batstate-u.edu.ph
College of Engineering – Department of Electrical Engineering
CpE 425: COMPUTER ARCHITECTURE AND ORGANIZATION
Laboratory #2
Memory Integration with ALU
Objectives:
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Implement a basic memory module (register array or RAM block) from flip-flops or
gates.
Allow storing of ALU results into memory.
Enable memory read and use data as input to ALU.
Required Components:
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All from Lab 1
4x4-bit Memory Array (RAM) – Designed from flip-flops or latches
Address Select Switches (2-bit)
Memory Write and Read Control Lines
Additional Multiplexers (allowed prebuilt)
Procedure:
1. Expand the ALU circuit from Exercise 1.
2. Add a 4-location, 4-bit memory block. Use address switches to select memory slot.
3. Add control logic for:
o Write Enable: Store ALU result to selected memory slot
o Read Enable: Load stored memory value into Operand A or B
4. Add MUX before ALU inputs to choose between live input or memory value.
5. Demonstrate the following use case:
o Compute A + B = R1
o Store R1 to memory[00]
o Retrieve memory[00] as new A
o Perform A * B = R2
o Store and display result
Expected Output:
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Results can be stored, retrieved, and re-used by selecting from memory.
Deliverables:
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Updated ALU with memory block diagram
Demonstration video or images of memory operation
Reflection on how memory changes system capability
Leading Innovations, Transforming Lives, Building the Nation
Republic of the Philippines
BATANGAS STATE UNIVERSITY
The National Engineering University
Alangilan Campus
Golden Country Homes, Alangilan Batangas City, Batangas, Philippines 4200
Tel Nos.: (+63 43) 425-0139 local 2121 / 2221
E-mail Address: coe.alangilan@g.batstate-u.edu.ph | Website Address: http://www.batstate-u.edu.ph
College of Engineering – Department of Electrical Engineering
Reflection Questions:
1.
2.
3.
4.
What are the trade-offs of serial versus parallel operations in this ALU?
How does the addition of memory improve system reusability?
What would be required to scale this ALU to 8-bit operations?
How could control FSMs improve this design further?
Assessment:
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Completion of both circuits
Ability to demonstrate each operation and memory function
Clear and correct documentation
Leading Innovations, Transforming Lives, Building the Nation