RCS-985T
Transformer Protection
Instruction Manual
NR Electric Co., Ltd.
RCS-985T Transformer Protection
Preface
Introduction
This guide and the relevant operating or service manual documentation for the equipment provide
full information on safe handling, commissioning and testing of this equipment.
Documentation for equipment ordered from NR is dispatched separately from manufactured goods
and may not be received at the same time. Therefore this guide is provided to ensure that printed
information normally present on equipment is fully understood by the recipient.
Before carrying out any work on the equipment the user should be familiar with the contents of this
manual, and read relevant chapter carefully.
This chapter describes the safety precautions recommended when using the equipment. Before
installing and using the equipment, this chapter must be thoroughly read and understood.
Health and safety
The information in this chapter of the equipment documentation is intended to ensure that
equipment is properly installed and handled in order to maintain it in a safe condition.
When electrical equipment is in operation, dangerous voltages will be present in certain parts of
the equipment. Failure to observe warning notices, incorrect use, or improper use may endanger
personnel and equipment and cause personal injury or physical damage.
Before working in the terminal strip area, the equipment must be isolated.
Proper and safe operation of the equipment depends on appropriate shipping and handling,
proper storage, installation and commissioning, and on careful operation, maintenance and
servicing. For this reason only qualified personnel may work on or operate the equipment.
Qualified personnel are individuals who:
Are familiar with the installation, commissioning, and operation of the equipment and of the
system to which it is being connected;
Are able to safely perform switching operations in accordance with accepted safety
engineering practices and are authorized to energize and de-energize equipment and to
isolate, ground, and label it;
Are trained in the care and use of safety apparatus in accordance with safety engineering
practices;
Are trained in emergency procedures (first aid).
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RCS-985T Transformer Protection
Instructions and Warnings
The following indicators and standard definitions are used:
DANGER
means that death, severe personal injury, or considerable equipment damage will
occur if safety precautions are disregarded.
WARNING
means that death, severe personal, or considerable equipment damage could occur
if safety precautions are disregarded.
CAUTION
means that light personal injury or equipment damage may occur if safety
precautions are disregarded. This particularly applies to damage to the device and to
resulting damage of the protected equipment.
WARNING!
The firmware may be upgraded to add new features or enhance/modify existing features, please
make sure that the version of this manual is compatible with the product in your hand.
WARNING!
During operation of electrical equipment, certain parts of these devices are under high voltage.
Severe personal injury or significant equipment damage could result from improper behavior.
Only qualified personnel should work on this equipment or in the vicinity of this equipment. These
personnel must be familiar with all warnings and service procedures described in this manual, as
well as safety regulations.
In particular, the general facility and safety regulations for work with high -voltage equipment must
be observed. Noncompliance may result in death, injury, or significant equipment damage.
DANGER!
Never allow the current transformer (CT) secondary circuit connected to this equipment to be
opened while the primary system is live. Opening the CT circuit will produce a dangerously high
voltage.
WARNING!
Exposed terminals
Do not touch the exposed terminals of this equipment while the power is on, as the high voltage
generated is dangerous
Residual voltage
Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It
takes a few seconds for the voltage to discharge.
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CAUTION!
Earth
The earthing terminal of the equipment must be securely earthed
Operating environment
The equipment must only be used within the range of ambient environment detailed in the
specification and in an environment free of abnormal vibration.
Ratings
Before applying AC voltage and current or the DC power supply to the equipment, check that they
conform to the equipment ratings.
Printed circuit board
Do not attach and remove printed circuit boards when DC power to the equipment is on, as this
may cause the equipment to malfunction.
External circuit
When connecting the output contacts of the equipment to an external circuit, carefully check the
supply voltage used in order to prevent the connected circuit from overheating.
Connection cable
Carefully handle the connection cable without applying excessive force.
Copyright
Version: RCS-985T-T070047
P/N: EN_YJBH2003.0091.1201
Copyright © NR 20 10. All rights reserved
We reserve all rights to this document and to the information
contained herein. Improper use in particular reproduction and
dissemination to third parties is strictly forbidden except where
NR ELECTRIC CO., LTD.
69 Suyuan Avenue. Jiangning, Nanjing 211102,China
Tel:
86-25-87178185,
Fax: 86-25-87178208
Website: www.nari-relays.com
Email: nr_techsupport @nari-relays.com
expressly authorized.
The information in this manual is carefully checked periodically,
and necessary corrections will be included in future editions. If
nevertheless any errors are detected, suggestions for correction or
improvement are greatly appreciated.
We reserve the rights to make technical improvements without
notice.
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RCS-985T Transformer Protection
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Table of Contents
Preface.............................................................................................................................................. i
Introduction .............................................................................................................................. i
Health and safety ..................................................................................................................... i
Instructions and Warnings..................................................................................................... ii
Table of Contents ........................................................................................................................... v
Chapter 1 Introduction ................................................................................................................... 1
1.1 Application......................................................................................................................... 1
1.2 Protective Functions ........................................................................................................ 1
1.3 Typical protection schemes............................................................................................. 2
1.4 Features ............................................................................................................................. 5
1.4.1 Parallel calculation of double CPU system ......................................................... 5
1.4.2 Independent fault detector .................................................................................... 5
1.4.3 Integration of main and backup protection ......................................................... 5
1.4.4 Variable slope percentage differential protection............................................... 5
1.4.5 Ratio corrected by software for differential protection ...................................... 5
1.4.6 Provide two methods to distinguish inrush current........................................... 5
1.4.7 CT saturation detection ......................................................................................... 5
1.4.8 Perfect fault recording function............................................................................ 6
1.4.9 Friendly HMI interface ............................................................................................ 6
1.4.10 Communication ports........................................................................................... 6
1.4.11 Various clock synchronizations.......................................................................... 6
Chapter 2 Technical Data............................................................................................................... 7
2.1 Electrical Specifications................................................................................................... 7
2.1.1 Power supply .......................................................................................................... 7
2.1.2 Analog current input ra tings ................................................................................. 7
2.1.3 Analog voltage input ratings ................................................................................. 7
2.1.4 Binary input............................................................................................................. 8
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2.1.5 Binary output .......................................................................................................... 8
2.1.6 Power supply output for Optical isolators........................................................... 8
2.2 Mechanical Specifications ............................................................................................... 9
2.3 Ambient temperature and humidity range ..................................................................... 9
2.4 Communication Interface................................................................................................. 9
2.5 Type test........................................................................................................................... 10
2.5.1 Environmental tests.............................................................................................. 10
2.5.2 Mechanical tests ................................................................................................... 10
2.5.3 Electrical tests....................................................................................................... 10
2.5.4 Electromagnetic compatibility (EMC)..................................................................11
2.6 Certifications ................................................................................................................... 12
2.7 Protection-related specification.................................................................................... 12
2.7.1 Accurate operating scope.................................................................................... 12
2.7.2 General error of analog input metering.............................................................. 12
2.7.3 Transformer differential protection .................................................................... 12
2.7.4 Transformer restricted earth fault protection .................................................... 13
2.7.5 HV (LV) side voltage controlled overcurrent protection................................... 14
2.7.6 HV side zero-sequence directional overcurrent protection ............................. 14
2.7.7 LV side zero-sequence overcurrent protection ................................................. 15
2.7.8 “Gap”earth fault protection ................................................................................ 15
2.7.9 Pole disagreement protection ............................................................................. 15
2.7.10 Transformer overexcitation protection ............................................................ 15
Chapter 3 Description of Operation Theory .............................................................................. 17
3.1 Software Structure .......................................................................................................... 17
3.2 Fault Detector .................................................................................................................. 17
3.2.1 Main protection of transformer........................................................................... 17
3.2.2 Backup protection of transformer ...................................................................... 18
3.2.3 Fault detector of pole disagreement protection................................................ 19
3.2.4 Fault detector of overexcitation protection ....................................................... 19
3.3 Transformer Current Differential Protection ................................................................ 19
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3.3.1 Preparation knowledge ........................................................................................ 19
3.3.2 Sensitive percentage differential element ......................................................... 21
3.3.3 Unsensitive percentage differential protection element .................................. 23
3.3.4 Unrestrained instantaneous differential protection element ........................... 24
3.3.5 Operation characteristic of current differential protection.............................. 25
3.3.6 Inrush current detection element ....................................................................... 26
3.3.7 CT saturation detection element......................................................................... 27
3.3.8 Differential current abnormality alarm and CT circuit failure blocking,function
......................................................................................................................................... 27
3.3.9 Over-excitation detection element...................................................................... 28
3.3.10 Logic scheme...................................................................................................... 29
3.4 Restricted Earth Fault Protection (REF) ....................................................................... 30
3.4.1 Amplitude ratio compensation ............................................................................ 30
3.4.2 Principle of zero-sequence percentage differential protection ....................... 31
3.4.3 Unrestrained instantaneous zero-sequence differential protection ............... 32
3.4.4 Prevention of unwanted operation due to difference of CT transient
characteristics................................................................................................................ 32
3.4.5 Logic scheme........................................................................................................ 33
3.5 HV Side Voltage Controlled Overcurrent Protection................................................... 34
3.5.1 Application ............................................................................................................ 34
3.5.2 Definite time overcurrent protection element ................................................... 34
3.5.3 Inverse time overcurrent protection................................................................... 34
3.5.4 Voltage control element ....................................................................................... 35
3.5.5 Influence of VT circuit failure on voltage control element............................... 36
3.5.6 Logic scheme........................................................................................................ 36
3.6 HV side Voltage Controlled Directional Zero-Sequence Overcurrent Protection .... 38
3.6.1 Application ............................................................................................................ 38
3.6.2 Definite time zero-sequence overcurrent protection........................................ 39
3.6.3 Inverse-time zero sequence overcurrent element ............................................ 39
3.6.4 Direction element.................................................................................................. 40
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RCS-985T Transformer Protection
3.6.5 Zero sequence current used by zero-sequence overcurrent relay................. 41
3.6.6 Zero sequence voltage control element............................................................. 41
3.6.7 Influence of VT failure on zero-sequence voltage element and zero-sequence
directional relay ............................................................................................................. 41
3.6.8 Logic scheme........................................................................................................ 41
3.7 HV Side “Gap”Protection .............................................................................................. 44
3.8 LV Side Voltage Controlled Overcurrent Protection ................................................... 44
3.8.1 Application ............................................................................................................ 44
3.8.2 Definite time overcurrent protection element ................................................... 44
3.8.3 Inverse time overcurrent protection................................................................... 44
3.8.4 Voltage control element ....................................................................................... 44
3.8.5 Influence of VT circuit failure on voltage control element............................... 45
3.8.6 Switch onto fault protection ................................................................................ 45
3.8.7 Logic scheme........................................................................................................ 46
3.9 LV Side Earth Fault Protection ...................................................................................... 49
3.9.1 Application ............................................................................................................ 49
3.9.2 Logic scheme........................................................................................................ 49
3.10 Pole Disagreement Protection..................................................................................... 50
3.10.1 Application .......................................................................................................... 50
3.10.2 Logic scheme...................................................................................................... 51
3.11 Overexcitation Protection ............................................................................................ 52
3.11.1 Application........................................................................................................... 52
3.11.2 Definite time overexcitation protection............................................................ 53
3.11.3 Inverse time overexcitation protection............................................................. 53
3.11.4 Logic scheme ...................................................................................................... 54
3.12 Other Abnormality Protection Functions ................................................................... 54
3.13 CT Circuit Failure Supervision (CTS) ......................................................................... 55
3.13.1 CT circuit abnormality alarm ............................................................................. 55
3.13.2 Differential current abnormality alarm in differential protection .................. 55
3.13.3 Instant CT circuit failure discrimination in differential protection................ 56
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3.14 VT Circuit Failure Supervision (VTS).......................................................................... 56
Chapter 4 Supervision, Metering and Recording ..................................................................... 57
4.1 General Description ........................................................................................................ 57
4.2 Relay self-supervision.................................................................................................... 57
4.2.1 Relay hardware monitoring ................................................................................. 57
4.2.2 DC supply monitoring .......................................................................................... 57
4.2.3 Opto-coupler power monitoring.......................................................................... 57
4.2.4 Sampled data monitoring..................................................................................... 58
4.2.5 Fault detector element monitoring ..................................................................... 58
4.2.6 Check binary input of CPU and MON ................................................................. 58
4.2.7 Check setting ........................................................................................................ 58
4.2.8 Communication monitoring................................................................................. 58
4.2.9 CT /VT circuit failure monitoring......................................................................... 58
4.2.10 Tripping output circuit monitoring ................................................................... 58
4.2.11 LCD displayed abnormality or failure information.......................................... 58
4.3 Metering Function........................................................................................................... 70
4.3.1 Measurement of differential protection.............................................................. 71
4.3.2 Measurement of restricted earth fault protection ............................................. 72
4.3.3 Current and voltage of each side........................................................................ 74
4.3.4 Phase angle........................................................................................................... 78
4.4 Recording Function ........................................................................................................ 80
4.4.1 General description .............................................................................................. 80
4.4.2 Event recording .................................................................................................... 80
4.4.3 Fault recording...................................................................................................... 81
4.4.4 Present recording ................................................................................................. 82
Chapter 5 Hardware Description ................................................................................................ 85
5.1 Hardware Function Introduction ................................................................................... 85
5.1.1 Hardware function block diagram ...................................................................... 85
5.1.2 Brief description of operation ............................................................................. 85
5.2 Hardware Overview......................................................................................................... 86
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5.2.1 Front panel interface layout ................................................................................ 86
5.2.2 Rear panel interface layout.................................................................................. 87
5.3 Connectors and Terminals............................................................................................. 87
5.3.1 General description .............................................................................................. 87
5.3.2 Pins definition of ‘1A’connectors....................................................................... 88
5.3.3 Pins definition of ‘1B’connectors ...................................................................... 89
5.3.4 Ping definition of ‘2A’connectors ...................................................................... 89
5.3.5 Pins definition of ‘2B’connectors ...................................................................... 91
5.3.6 Pins definition of ‘3A’connectors....................................................................... 92
5.3.7 Pins definition of ‘3B’connectors ...................................................................... 94
5.3.8 Pins definition of ‘4B’connectors ...................................................................... 95
5.3.9 Pins definition of ‘5B/6B’connectors................................................................. 96
5.3.10 Pins definition of ‘7B’connectors .................................................................... 97
5.3.11 Pins definition of ‘7C’connectors..................................................................... 98
5.3.12 Pins definition of ‘8B’connectors .................................................................... 99
5.3.13 Pins definition of ‘8C’connectors .................................................................... 99
5.4 Tripping Matrix .............................................................................................................. 100
5.5 Application of Current and Voltage Channels ........................................................... 101
5.5.1 Channel list.......................................................................................................... 101
5.5.2 Alternative definition of some channels .......................................................... 102
5.5.3 Alternative selection between two kinds of channel ...................................... 103
5.6 Input and Output Signals ............................................................................................. 103
5.6.1 Binary input signals ........................................................................................... 103
5.6.2 Binary Output Signals........................................................................................ 105
5.6.3 Communication input......................................................................................... 109
Chapter 6 Settings .......................................................................................................................111
6.1 Equipment Settings .......................................................................................................111
6.1.1 Settings list...........................................................................................................111
6.1.2 Explanation of the parameters and notice for setting.....................................112
6.1.3 Setting path ..........................................................................................................113
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6.2 System Settings .............................................................................................................113
6.2.1 Logic settings of configuring functions............................................................113
6.2.2 Transformer system parameters........................................................................116
6.2.3 Implicit configuration settings.......................................................................... 121
6.3 Protection Settings ....................................................................................................... 127
6.3.1 Differential protection settings ......................................................................... 127
6.3.2 HV side voltage controlled overcurrent protection settings ......................... 132
6.3.3 HV side earth protection settings ..................................................................... 137
6.3.4 HV side backup “gap”protection settings ...................................................... 141
6.3.5 HV side overexcitation protection settings ..................................................... 142
6.3.6 Restricted earth fault protection settings (HV side, A side and B side)....... 145
6.3.7 HV side pole disagreement protection settings.............................................. 148
6.3.8 Voltage controlled overcurrent protection settings of branch A1 or B1 ...... 149
6.3.9 Voltage controlled overcurrent protection settings of branch A2, A3, B2 and
B3................................................................................................................................... 153
6.3.10 LV side earth fault protection settings ........................................................... 155
6.4 Calculated System Parameters ................................................................................... 157
6.4.1 Parameters list .................................................................................................... 157
6.4.2 Parameter path.................................................................................................... 158
Chapter 7 Human Machine Interface........................................................................................ 161
7.1 Human Machine Interface Overview ........................................................................... 161
7.1.1 Design.................................................................................................................. 161
7.1.2 Keypad operation ............................................................................................... 162
7.1.3 LED indications................................................................................................... 163
7.1.4 Communication port........................................................................................... 164
7.2 Understand the HMI Menu Tree ................................................................................... 164
7.2.1 Overview .............................................................................................................. 164
7.2.2 Values................................................................................................................... 167
7.2.3 Report .................................................................................................................. 169
7.2.4 PRINT ................................................................................................................... 169
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7.2.5 SETTING .............................................................................................................. 171
7.2.6 Clock .................................................................................................................... 172
7.2.7 VERSION.............................................................................................................. 172
7.2.8 Debug................................................................................................................... 173
7.3 Understand the LCD Display ....................................................................................... 174
7.3.1 Display during normal operation ...................................................................... 174
7.3.2 Display when tripping ........................................................................................ 174
7.3.3 Display under abnormal condition ................................................................... 176
7.3.4 Display when tripping with abnormality .......................................................... 177
7.3.5 Display when binary input changes status...................................................... 177
7.3.6 View the setting................................................................................................... 178
7.3.7 View Status Information ..................................................................................... 180
7.3.8 View software version ........................................................................................ 183
7.4 View Records................................................................................................................. 184
7.4.1 General description ............................................................................................ 184
7.4.2 View reports through LCD ................................................................................. 184
7.4.3 View reports and waveform by printing ........................................................... 185
7.4.4 View present recording waveform .................................................................... 185
7.5 Input Operation through Keypad................................................................................. 185
7.5.1 Change the settings ........................................................................................... 185
7.5.2 Copy setting group............................................................................................. 187
7.5.3 Switch active setting group............................................................................... 189
7.5.4 Delete fault records and event records............................................................ 190
7.5.5 Clock set .............................................................................................................. 191
7.6 Understand the Alarms................................................................................................. 192
Chapter 8 Communication......................................................................................................... 193
8.1 Introduction ................................................................................................................... 193
8.2 Rear communication port of EIA(RS)485 ................................................................... 193
8.2.1 Rear communication port EIA(RS)485 interface ............................................. 193
8.2.2 EIA(RS)485 bus................................................................................................... 194
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8.2.3 Bus termination .................................................................................................. 194
8.2.4 Bus connections & topologies.......................................................................... 194
8.3 IEC60870-5-103 Protocol.............................................................................................. 195
8.3.1 Overview of IEC60870-5-103.............................................................................. 195
8.3.2 Messages description in IEC60870-5-103 protocol type................................ 195
8.4 MODBUS protocol......................................................................................................... 200
8.4.1 Overview .............................................................................................................. 200
8.4.2 Fetch real time status (Binary).......................................................................... 200
8.4.3 Fetch metering values of equipment................................................................ 206
8.4.4 Fetch settings value of equipment ....................................................................211
8.4.5 Diagnostics.......................................................................................................... 220
8.4.6 Exception Responses ........................................................................................ 220
8.5 Communication with Printer........................................................................................ 221
8.6 Front EIA(RS)232 Interface Communication.............................................................. 221
8.7 Communication with External Time Synchronization Source ................................. 222
Chapter 9 Installation ................................................................................................................. 223
9.1 Receipt of Relays .......................................................................................................... 223
9.2 Handling of Electronic Equipment .............................................................................. 223
9.3 Storage........................................................................................................................... 224
9.4 Unpacking ...................................................................................................................... 224
9.5 Relay Mounting ............................................................................................................. 224
9.5.1 Rack Mounting .................................................................................................... 224
9.5.2 Panel Mounting................................................................................................... 226
9.6 RELAY WIRING .............................................................................................................. 226
9.6.1 Medium and Heavy Duty Terminal Block Connections .................................. 226
9.6.2 EIA (RS) 485 Port ................................................................................................ 227
9.6.3 IRIG-B Connections (if applicable) ................................................................... 227
9.6.4 EIA(RS)232 Front Port of Downloading/Monitoring/T est .............................. 227
9.6.5 Earth Connection................................................................................................ 227
Chapter 10 Commissioning....................................................................................................... 229
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10.1 General......................................................................................................................... 229
10.2 Safety Instructions...................................................................................................... 229
10.3 Commission Tools ...................................................................................................... 230
10.4 Setting Familiarization................................................................................................ 230
10.5 Product Checks........................................................................................................... 231
10.5.1 With the Relay De-energized ........................................................................... 231
10.5.2 With the Relay Energized................................................................................. 233
10.5.3 Protective Function Testing ............................................................................ 239
10.5.4 Print Fault Report ............................................................................................. 242
10.5.5 On-load Checks ................................................................................................ 242
10.5.6 Final Checks...................................................................................................... 242
Chapter 11 Maintenance ............................................................................................................ 243
11.1 Maintenance Schedule ............................................................................................... 243
11.2 Regular Test ................................................................................................................. 243
11.2.1 Alarms ................................................................................................................ 243
11.2.2 Binary Inputs ..................................................................................................... 243
11.2.3 Binary output..................................................................................................... 243
11.2.4 Analog inputs .................................................................................................... 243
11.3 Failure Tracing and Repair ......................................................................................... 244
11.4 Replace Failed Modules ............................................................................................. 244
11.5 Replace Relay Battery ................................................................................................ 245
11.6 Cleaning ....................................................................................................................... 246
11.7 Storage ......................................................................................................................... 246
Chapter 12 Decommissioning and Disposal ........................................................................... 247
12.1 Decommissioning ....................................................................................................... 247
12.1.1 Switching off ..................................................................................................... 247
12.1.2 Disconnecting Cables ...................................................................................... 247
12.1.3 Dismantling ....................................................................................................... 247
12.2 Disposal ....................................................................................................................... 247
Chapter 13 Manual Version History.......................................................................................... 249
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RCS-985T Transformer Protection
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Chapter 1 Introduction
Chapter 1 Introduction
1.1 Application
RCS-985T is a kind of high performance numerical transformer protection, which integrates main
and backup protection into one device. It provides complete electrical protection for a
transformer, and is typically applied for startup/standby transformer or auxiliary transformer of
power plant with multiple branches, and main transformer, etc.
1.2 Protective Functions
All functions of RCS-985T are listed in the following two tables.
NOTE: The protective functions listed in following table are equipped for RCS-985T, but
for a specific project, some of following functions are configured due of the scheme user
required, so please refer to specified complementary documentation of each project for
this instruction manual for protective function configuration on your equipment.
Table 1.2-1
Protective functions of RCS-985T
Protective function overview
Function No.
Variable slope percentage differential protection (7 sides maximum)
87T
Unrestrained differential protection
50/87UT
Voltage controlled overcurrent protection at HV side
50P/ 51P
Voltage controlled (directional) zero-sequence overcurrent protection at HV side
50N/ 51N/67N
Zero-sequence overvoltage protection at HV side (Gap overvoltage)
59N
Zero-sequence overcurrent protection at HV side (Gap overcurrent)
50N/51N
Voltage controlled overcurrent protection of branches at LV side
50P/51P
Pole disagreement protection
62PD
Restricted earth fault protection(zero-sequence differential current protection) at
HV side, LV sde A, and LV side B
64REF/87G
Overexcitation protection
24
pole disagreement alarm function
62PD
Thermal overload protection
49
Cooling initiation function
49
On-load tap change (OLTC) blocking function during overload
49
Zero-sequence voltage alarm of branches at LV side
59G
VT circuit failure supervision
CT circuit failure supervision
CT saturation detection
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1
Chapter 1 Introduction
NOTE:
“Gap”means that the neutral point of the transformer is grounded via air gap
Table 1.2-2 Miscellaneous functions of RCS-985T
Miscellaneous functions overview
Automatic self-supervision
Metering
relay hardware supervision and secondary circuit
supervision
24 samples per cycle
CPU module
Fault recording
MON module
32 latest fault reports, 8 latest fault waveforms
4 or 8 seconds continuous oscillogram function for
latest fault
Event
self-supervision report
32 latest abnormality reports
recording
binary input change report
32 latest binary input change reports
Present recording
One normal operating waveform triggered manually
Local HMI
LCD and keypad
RCSPC software or substation automation system
Remote HMI
software
Front communication port (RS232)
Rear
communication
ports to host
Ports type
Protocol type
for software RCSPC with local protocol
four RS-485 ports
(two can be configured as fiber port)
IEC 60870-5-103/MODBUS/LFP
Rear communication port to printer
one RS-485 or RS-232
Time synchronization port
IRIG-B (optional)
Voltage and current drift
auto-adjustment.
1.3 Typical protection schemes
Figure 1.3-1 - Figure 1.3-4 show typical protection schemes of RCS-985T.
NOTE: Current transformers (CT) used for main protection (i.e. differential protection)
may different from those for backup protection.
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Chapter 1 Introduction
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Figure 1.3-1
Typical protection scheme 1 of RCS-985T
Figure 1.3-2
Typical protection scheme 2 of RCS-985T
3
Chapter 1 Introduction
220 kV bus 1
busbar VT
220 kV bus 2
VT
l n ab c n
*
RCS-985T
*
* *
*
*
*
*
4
VT
VT
VT
*
*
*
VT
*
*
branch B3
*
branch B1
branch A2
branch A1
VT
*
*
br anch A3
*
*
*
6 kV B side
branch B2
6 kV A side
*
VT
Figure 1.3-3
Typical protection scheme 3 of RCS-985T
Figure 1.3-4
Typical protection scheme 4 of RCS-985T
transformer differential
protection
HV side backup
overcurrent protection
HV side backup earth
fault protection
HV side backup
“gap”protection
HV side pole
disagreement protection
HV side overexcitation
protection
restricted earth fault
protection of HV side, A
or B side
backup overcurrent
protection of branch A1 ,
A2, A3, B1, B2 or B3
backup earth fault
protection of A or B side
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Chapter 1 Introduction
1.4 Features
1.4.1 Parallel calculation of double CPU system
The hardware of any one CPU system comprises a 32 bit microprocessor and two digital signal
processors (DSP). Three CPUs can operate in parallel. The 32-bit microprocessor performs logic
calculation and two DSPs perform the protection calculation. High performance hardware ensures
real time calculation of all protection relays within a sampling interval.
On the premise of 24 samples per cycle, all data measurement, calculation and logic
discrimination could be done within one sampling period. The event recording and protection logic
calculation are completed simultaneously.
1.4.2 Independent fault detector
There is a set of independent fault detectors in the MON module in the RCS-985 relay. Its
operation supervises the tripping outputs. They will connect power supply to output relays when
operate. There are different fault detectors in the CPU module used for various protective
functions. The relay could drive a tripping output only when the fault detectors in the CPU module
and the fault detectors in the MON module operate simultaneously. This kind of independent
supervision of tripping outputs using fault detectors can avoid any maloperation possibly caused
by any hardware component failures. This highly increases the security.
1.4.3 Integration of main and backup protection
Main and backup protection are integrated in one set of protection equipment. Protection
information is shared by all parts. The equipment can record all relevant wave forms of any fault.
1.4.4 Variable slope percentage differential protection
The percentage differential protection adopts variable slope restraint characteristics and actual
unbalanced differential current effect can be detected and avoided. In order to prevent unwanted
operation of differential protection due to CT saturation, measures to discriminate CT saturation
are provided for phase current on every side.
1.4.5 Ratio corrected by software for differential protection
Current from CTs of each side with different ratios are adjusted to a single ratio before calculation.
1.4.6 Provide two methods to distinguish inrush current
Two discrimination principles for inrush current are provided: harmonics restraint and waveform
distortion restraint.
1.4.7 CT saturation detection
Based on the operation sequence of DPFC restraint current element and DPFC differential current
element of differential protection, external with CT saturation or internal fault can be distinguished
correctly. In case of internal fault, the relay will operate immediately. While in case of external fault
with CT saturation, the criterion of current waveform is adopted then. The relay will not operate in
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5
Chapter 1 Introduction
case of persisting external fault with CT saturation and operate quickly when evolving external to
internal fault.
NOTE: DPFC: Deviation of Power Frequency Component
1.4.8 Perfect fault recording function
CPU module: latest 32 groups of fault data and event sequence, 8 groups of fault oscillograms, 32
changes of binary input status and 32 self-supervision reports can be recorded.
MON module: when the equipment picks up, oscillograms of all analog sampling quantity,
differential current and operation-related symbols of the protection equipment can be recorded
with duration up to 4 seconds.
1.4.9 Friendly HMI interface
Friendly HMI interface are designed for users with a LCD and a 9-button keypad on the front
panel.
1.4.10 Communication ports
One front RS232 port (for RCSPC auxiliary software)
Four rear RS-485 ports with IEC 60870-5-103 protocol or MODBUS protocol
Two RS-485 twisted wire port
Two RS-485 twisted wire port or fiber port (optional)
One rear RS-485 with clock synchronization,
One rear RS-232 or RS-485 with printer.
1.4.11 Various clock synchronizations
Various GPS clock synchronizations: pulse per second (PPS) or pulse per minute (PMS) via
binary input or RS-485, message via communication ports and IRIG-B synchronization.
6
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Chapter 2 Technical Data
Chapter 2 Technical Data
2.1 Electrical Specifications
2.1.1 Power supply
Rated Voltage (Un)
24Vdc,110Vdc,125Vdc,220Vdc,250Vdc
Variation
(80% ~ 120%)Un
Ripple in the DC
auxiliary voltage
Voltage dips and voltage
short interruptions
Quiescent
condition
Burden
Operating
condition
Backup battery type
Max 15% of the DC value. Per IEC 60255-11
Per IEC 61000-4-11,IEC 60255-11:1979
20ms for interruption without de-energizing,dips 60% of Un
without reset up to 100ms
<40W
<70W
ML2032, 3V, 65mAh
2.1.2 Analog current input ratings
Rated frequency
50Hz, 60Hz, ±10%
Phase rotation
ABC
Rated Current (In)
1A
5A
20×In
20×In
continuously
3×In
3×In
for 10s
30×In
30×In
for 1s
100×In
100×In
for half a cycle
250×In
250×In
< 0.2 VA/phase @ In
< 0.5 VA/phase @ In
Linear to
(non-offset AC current)
Thermal
withstand
capability
Burden
2.1.3 Analog voltage input ratings
Standard
Per IEC 60255-6, IEC 60288
Rated Voltage (Un)
100V/√3, 110V/√3
100V, 110V
200V
linear to
100V
173 V
230V
Thermal
continuously
120V
120 V
200V
withstand
capability
for 10s
200V
200 V
350V
for 1s
250V
250 V
400V
<0.2
<0.5
VA/phase@Un
VA/phase@Un
Burden
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<2.5VA/phase@Un
7
Chapter 2 Technical Data
2.1.4 Binary input
Rated Voltage
110VDC
125VDC
220VDC
250VDC
Pickup voltage
77VDC
87.5VDC
154VDC
175VDC
Dropout voltage
60.5VDC
68.8VDC
121VDC
137.5VDC
150V
150V
300V
300V
Maximum permitted
voltage
Withstand
2000Vac
Resolving time for
logic input
<1ms
2.1.5 Binary output
Item
Used for tripping contact
Output model
potential free contact
Max system voltage
250VAC/DC
Test voltage across
open contact
Used for signal contacts
1000VAC RMS for 1min
Making Capacity
30A
Breaking capacity
0.4A resistance
0.2A resistance
(250Vdc)
0.2A inductive(L/R=40ms)
0.05A inductive (L/R=40ms)
Continuous carry
5A, 8A, 10A (select one)
5A
Short duration current
50A for 200ms
50A for 200ms
Pickup time(Typ/Max)
5ms/10ms
10ms/15ms
Dropout time(Typ/Max)
8ms/10ms
4ms/10ms
Bounce time
1ms
1ms
10,000 operations minimum
10,000 operations minimum
100,000 operations minimum
100,000
minimum
Loaded
Durability
contact
Unloaded
contact
operations
2.1.6 Power supply output for Optical isolators
8
Rated Voltage
24V
Rated current
200mA
Max current
500mA
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Chapter 2 Technical Data
2.2 Mechanical Specifications
Enclosure dimensions
(W×H×D)
482.6mm×353.6mm×285mm
Trepanning dimensions
(W×H)
450mm×355mm,M6 screw
Mounting Way
Flush mounted
Weight per device
Approx. 30kg
Small control module: 3 LED indicators, a 9-key
Local control panel
Keypad and a 240×128 dot matrix blacklight LCD
Display language
English
Housing material
Aluminum
Housing color
Silver grey
Location of terminals
Rear panel of the device
Front side: IP51
Protection class
Rear side, connection terminals: IP20
(per IEC60529:1989)
Other Sides: IP30
2.3 Ambient temperature and humidity range
Standard
IEC60255-6:1988
Operating temperature
-25℃ ~ +55℃
Transport and storage temperature range
-40℃ ~ +70℃
Permissible humidity
5% ~ 95%, condensation not permissible
2.4 Communication Interface
Communication medium
Parameters
Interfaces for communicating with RTU/SCADA
Electrical
RS(EIA)-48
5
Optical
(Optional)
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Port number
2
Baud rate
4800 ~38400bps
Transmission distance
< 1000m@4800bps
Maximal capacity
32
Twisted Pair
Screened twisted pair cable
Protocol
IEC60870-5-103:1997
Safety level
Isolation to ELV level
Port number
2
Connector type
ST
Baud rate
4800 ~ 38400bps
Transmission standard
100Base-FX,
Transmission distance
<1500m
9
Chapter 2 Technical Data
Optical Fiber Type
Multi-mode Fiber
Wavelength
850/820nm
Fiber size
62.5/125μm
DIA/cladding DIA)
Protocol
IEC60870-5-103:1997
Safety level
Isolation to ELV level
(core
Front interface for local HMI with personal computer via RCSPC software
Port number
Application
RS-232 (EIA)
1
(1) Local human-machine
communication
(2) Download program of
protection relay
Baud rate
4800 ~ 9600bps
Connector type
9 pin D-type female connector
Safety level
Isolation to ELV level
Interfaces for communicating with a printer
RS-232 (EIA)
Port number
1
Baud rate
4800 ~ 38400bps
Printer type
EPSON® LQ-300K
Safety level
Isolation to ELV level
Interfaces for clock synchronization
RS-485 (EIA)
Port number
1
Transmission distance
< 500m
Maximal capacity
32
Timing standard
PPS, IRIG-B
Safety level
Isolation to ELV level
2.5 Type test
2.5.1 Environmental tests
Dry heat test
IEC60068-2-2:1974, Test Ad for 16 h at +55°C
Dry cold test
IEC60068-2-1:1990, Test Bd for 16 h at -25°C
Damp heat test, cyclic
IEC60068-2-30:1980, Test Db for two (12+12 hours) cycles,
95%RH, low temperature +25°C, high temperature +55°C
2.5.2 Mechanical tests
Vibration
IEC60255-21-1:1988, Class I
Shock and bump
IEC60255-21-2:1988, Class I
2.5.3 Electrical tests
Dielectric tests
10
IEC60255-5:2000, test voltage: 2kV, 50Hz, 1min
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Chapter 2 Technical Data
IEC60255-5:2000, test voltage: 5kV, unipolar
Impulse voltage tests
impulses, waveform 1.2/50μs, source energy 0.5J
Insulation measurement
IEC60255-5:2000, insulation resistance >100MΩ, 500Vdc
2.5.4 Electromagnetic compatibility (EMC)
1MHz burst disturbance tests
IEC60255-22-1:1988
(idt IEC61000-4-2:1995), Class III
- Common mode
- Differential mode
2.5kV
1.0kV
IEC60255-22-2 :1996 (idt IEC 61000-4-2) Class
Electrostatic discharge tests
IV
-For contact discharge
-For air discharge
8.0kV
15.0kV
IEC60255-22-3:2000 (idt IEC 61000-4-3:1995 )
Radio frequency interference tests
class III
Frequency sweep
10V/m(rms), f=80… 1000MHz
-Radiated amplitude-modulated
Spot frequency
10Vm(rms),
-Radiated amplitude-modulated
-Radiated pulse-modulated
f=80MHz/160MHz/450MHz/900MHz
10Vm(rms), f=900MHz
Fast transient disturbance tests
IEC60255-22-4:2002 (idt IEC 61000-4-4)
- Power supply, I/O & Earth terminals
Class IV, 4kV, 2.5kHz, 5/50ns
- Communication terminals
Class IV, 2kV, 5.0kHz, 5/50ns
Surge immunity tests
IEC60255-22-5:2002
61000-4-5:1995) , Class III
- Power supply, AC inputs, I/O terminals
1.2/50us,
(idt
IEC
2kV, line to earth;
1kV, line to line
Conducted
RF
electromagnetic
disturbance
- Power supply, AC, I/O, Comm. terminal
Power frequency magnetic field immunity
IEC60255-22-6, Class III
10V(rms), 150kHz~80MHz
IEC61000-4-8:1993, Class V
100A/m for 1min
1000A/m for 3s
IEC61000-4-9:1993, Class V
Pulse magnetic field immunity
Damped
oscillatory
immunity
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magnetic
6.4/16 us
1000A/m for 3s
field
IEC61000-4-10:1993, Class V
100kHz & 1MHz – 100A/m
11
Chapter 2 Technical Data
2.6 Certifications
ISO9001: 2000
ISO14001:2004
OHSAS18001: 1999
CMMI L2
EMC: 89/336/EEC, EN50263: 2000
Products safety (PS): 73/23/EEC, EN61010-1: 2001, EN60950: 2002
2.7 Protection-related specification
2.7.1 Accurate operating scope
Current:
0.05In~20In
Voltage:
0.4V~100V
frequency:
45Hz~55Hz
time delay:
0~100s
2.7.2 General error of analog input metering
Current:
≤2.5% of reading or 0.02In whichever is greater
Voltage:
≤ 5% of reading
Power frequency metering:
≤0.01Hz
Accuracy of GPS synchronization:
≤1ms
Resolution of SOE:
≤1ms
2.7.3 Transformer differential protection
Pickup setting of percentage differential current fault detector [I_Pkp_PcntDiff]
Scope:
0.1 Ie~1.5 Ie
Setting accuracy:
≤2.5%×Setting or 0.02Ie, whichever is greater
Setting of unrestrained instantaneous differential protection [I_InstDiff]
Scope:
4 Ie~14 Ie
Setting accuracy:
≤2.5%×Setting or 0.02Ie, whichever is greater
Setting of the first slope of percentage differential protection [Slope1_PcntDiff]
Scope:
12
0.05~0.15
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Chapter 2 Technical Data
Setting of the maximum slope of percentage differential protection [Slope2_PcntDiff]
Scope:
0.50~0.80
Second harmonic restraint coefficient [k_Harm_PcntDiff]
Scope:
0.10~0.35
Operation time of percentage differential protection
≤30 ms (Id≥2×[I_Pkp_PcntDiff]) without harmonic blocking)
Operation time of unrestrained instantaneous differential protection
≤20 ms (Id≥1.5×[I_InstDiff])
NOTE: In: secondary rated secondary current of CT,
Ie : secondary rated secondary current of transformer,
Id: differential current
2.7.4 Transformer restricted earth fault protection
Pickup setting of percentage zero-sequence differential current fault detector
[I_Pkp_PcntREF_HVS (Br1,Br2)]
Scope:
0.1In ~1.5In
Setting accuracy:
≤2.5%×Setting or 0.02In, whichever is greater
Setting of unrestrained instantaneous zero-sequence differential current protection
[I_InstREF_HVS (Br1,Br2)]
Scope:
2In~14In
Setting accuracy:
≤2.5%×Setting or 0.02In, whichever is greater
Slope of zero-sequence differential current protection [Slope_PcntREF_HVS (Br1,Br2)]
Scope:
0.30~0.80
Operating time of percentage differential current protection
≤30 ms (Iod≥2×[I_Pkp_PcntREF_HVS(Br1,Br2)] ), without harmonic blocking
Operating time of unrestrained instantaneous zero-sequence differential current protection
≤25 ms (Iod≥[I_InstREF_HVS(Br1,Br2)] )
NOTE: Here and following In and Ie appeared are as mentioned above.
Iod : zero-sequence differential current
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13
Chapter 2 Technical Data
[I_Pkp_PcntREF_HVS(Br1,Br2)]: setting of percentage zero-sequence differential current
protection of HV side ( A side or B side of LV).
[I_InstREF_HVS(Br1,Br2)]: setting of unrestrained instantaneous zero-sequence differential
current protection of HV side ( A side or B side of LV).
2.7.5 HV (LV) side voltage controlled overcurrent protection
Definite time overcurrent element:
Negative sequence voltage setting
1 V~20 V
Under voltage setting
10 V~100 V
Current setting
0.1 A~100 A
Time delay setting
0 s~10 s
Accuracy of voltage setting
≤2.5% or 0.05 V, whichever is greater
Accuracy of current setting
≤2.5%×Setting or 0.02In, whichever is greater
Accuracy of time delay
≤1%×Setting +40 ms
Inverse time overcurrent element (IDMT):
Pickup threshold setting (Ip) scope
0.05A~100A
Time multiplier setting scope
0.5s~10s
Tolerance of pickup threshold setting
≤ 2.5%×Setting or 0.02×In, which ever is greater
Tolerance of trip time for 1.2<I/Ip<20
≤ 5% of reference (calculated) value +2% current tolerance, respectively 35ms
2.7.6 HV side zero-sequence directional overcurrent protection
Definite time overcurrent element:
Zero-sequence current setting
0.1 A~100 A
Zero-sequence voltage setting
1 V~100 V
Delay setting
0 s~10 s
Accuracy of voltage setting
≤2.5% or 0.05 V, whichever is greater
Accuracy of current setting
≤2.5%×Setting or 0.02In, whichever is greater
Accuracy of time delay
≤1%×Setting +40 ms
Inverse time overcurrent element (IDMT):
Pickup threshold setting (Ip) scope
0.05A~100A
Time multiplier setting scope
0.5s~10s
Tolerance of pickup threshold setting
≤ 2.5%×Setting or 0.02×In, which ever is greater
14
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Chapter 2 Technical Data
Tolerance of trip time for 1.2<I/Ip<20
≤ 5% of reference (calculated) value +2% current tolerance, respectively 35ms
2.7.7 LV side zero-sequence overcurrent protection
Zero-sequence current setting
0.1 A~100 A
Delay setting
0.1 s~10 s
Zero-sequence current setting accuracy
Delay setting accuracy
≤2.5%×Setting or 0.02In, whichever is greater
≤1%×Setting +40 ms
2.7.8 “Gap”earth fault protection
“Gap”zero-sequence current setting
0.1 A~100 A
Zero-sequence voltage setting
10 V~220 V
Delay setting
0 s~10 s
Zero-sequence current setting accuracy
≤2.5%×Setting or 0.02In, whichever is greater
Zero-sequence voltage setting accuracy
≤2.5% or 0.05 V, whichever is greater
Delay setting accuracy
≤1%×Setting +40 ms
2.7.9 Pole disagreement protection
Current setting
0.1 A~20 A
Time delay setting
0.1 s~10 s
current setting Accuracy
≤2.5%×Setting or 0.02In, whichever is greater
delay setting Accuracy
≤1%×Setting +40 ms
2.7.10 Transformer overexcitation protection
Definite time U/F setting
1.0~2.0 pu
Definite time delay setting
0.1 s~3000 s
Inverse time U/F setting
1.0~2.0 pu
Inverse time delay setting
0.1 s~3000 s
U/F measuring Accuracy
≤2.5%×Setting or 0.01 whichever is greater
delay setting Accuracy
≤1%×Setting +40 ms
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15
Chapter 2 Technical Data
16
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Chapter 3 Description of Operation Theory
Chapter 3 Description of Operation Theory
3.1 Software Structure
The equipment protection is composed of current differential protection and overcurrent protection.
Moreover, CT failure supervision function and inrush current detection function are also included.
Protection theory is introduced from following three parts in the chapter: general fault detector,
protective fault detector and protection element. The equipment has independent general fault
detector in MON module, which picks up to connect positive pole of power supply of output relays.
Every protection has its own fault detector in CPU module picking up to make program jump to
fault calculation from normal calculation. The equipment output relays will operate to trip only if
general fault detector and protective fault detector pick up and corresponding protective element
operates simultaneously.
3.2 Fault Detector
The function of fault detectors in the MON module is to provide supervision elements to the
tripping outputs. In the protection device, the general fault detectors include several independent
fault detectors and each detector supervises corresponding operational elements and doesn’
t
affect other operational elements. That means the current differential protection can trip only when
its corresponding sensitive differential current element as a fault detector picks up.
When the setting is met, the fault detector will pick up and power supply of output relay will be
connected for 500 ms to make it ready to send tripping signal.
Tripping signal of a protective relay can be output only if its corresponding fault detector picks up,
otherwise discrepancy alarm will be issued
3.2.1 Main protection of transformer
3.2.1.1 Fault detector of transformer differential protection
This fault detector will pick up when the differential current reaches pickup value of transformer
differential protection.
Criteria of this fault detector:
I dmax [I_Pkp_PcntDiff]
(Equation 3.2-1)
Where:
I dmax
is the maximum value of three-phase differential current.
[I_Pkp_PcntDiff] is setting of percentage differential protection.
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17
Chapter 3 Description of Operation Theory
Please refer to the settings in Chapter 6 for details.
3.2.1.2 Fault detector of restricted earth fault protection.
Restricted earth fault protection is also called zero-sequence differential protection. There are
restricted earth fault protections of HV side, LV side A and side B.
This fault detector of each side will pick up if the zero -sequence differential current is greater than
the setting [I_Pkp_PcntREF_HVS(Br1,Br2)].
Criteria of zero sequence differential current fault detector:
I d 0 [I_Pkp_PcntREF_HVS(Br1, Br2)]
(Equation 3.2-2)
Where:
I d0
is the zero-sequence differential current.
[I_Pkp_PcntREF_HVS(Br1, Br2)] is the pickup setting of percentage zero-sequence differential
protection of HV REF (LV A side or B side).
3.2.2 Backup protection of transformer
3.2.2.1 Fault detector of HV or LV side overcurrent protection
Fault detector of definite-time overcurrent element of HV or LV side will pick up when the
maximum three-phase current reaches its setting of overcurrent protection of corresponding side.
Fault detector of inverse-time overcurrent element of HV side, brach A1 or branch B1 will pick up
when maximum value of three-phase current reaches current threshold of corresponding
inverse-time protection.
NOTE: LV side includes six branches: A1, A2, A3, B1, B2 and B3.
3.2.2.2 Fault detector of HV side or LV side voltage controlled overcurrent protection
The fault detector of HV side or LV side will pick up when following two criteria on corresponding
side are satisfied.
(1) Maximum three-phase current at HV or LV side branches reaches setting of this protection.
(2) Corresponding voltage control element picks up.
3.2.2.3 Fault detector of HV or LV side zero-sequence overcurrent protection
This fault detector of definite-time zero sequence overcurrent elementof HV side, LV side A, or LV
side B will pick up when zero sequence current reaches setting of zero-sequence overcurrent
protection of corresponding side.
Fault detector of inverse-time zero sequence overcurrent element of HV side will pick up when
maximum value of three-phase current reaches current threshold of inverse-time protection of HV
18
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Chapter 3 Description of Operation Theory
side..
3.2.2.4 Fault detector of HV side “gap”protection
3.2.2.4.1 Fault detector of HV “gap”zero-sequence overcurrent protection
This fault detector will pick up if the zero sequence current from CT of air gap is greater than its
setting.
3.2.2.4.2 Fault detector of HV “gap”zero-sequence overvoltage protection
This fault detector will pick up if the zero sequence voltage from broken-delta connection is greater
than its setting.
3.2.3 Fault detector of pole disagreement protection
Beside binary input of pole disagreement position being,energized,,if any one criterion of following
three is met with corresponding logic setting is set as “1”, then fault detector will pick up
(1) Maximum value current of three-phase current is greater than the setting of
pole-disagreement phase current element.
(2) Negative sequence current is greater than the setting of pole-disagreement negativesequence current element.
(3) Zero sequence current is greater than the setting of pole-disagreement zero-sequence
current element.
3.2.4 Fault detector of overexcitation protection
3.2.4.1 Definite time overexcitation Fault detector
The fault detector picks up when measured U/F is greater than definite protection setting.
3.2.4.2 Inverse time overexcitation Fault detector
The fault detector picks up when overexcitation time accumulated value is greater than inverse
time protection setting.
3.3 Transformer Current Differential Protection
3.3.1 Preparation knowledge
By applying the Ampere-turn balance on different transformer connections, the RCS-985T relay
forms the current differential equations.
During the normal operation, the magnitude and angle of secondary currents at each side of
transformer are different due to different CT ratios, different voltage levels and different
transformer connection groups. This kind of current difference shall be eliminated under normal
operation and compensated in fact by a built-in compensation method.
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19
Chapter 3 Description of Operation Theory
3.3.1.1 Calculate rated primary current at each side of transformer
I b1n
Sn
(Equation 3.3-1)
3U b1 n
Where:
Sn is the maximum rated capacity of all windings [Sn].
U b1 n is the rated phase-to-phase voltage at the calculated side of the transformer (i.e. [U1n_HVS] ,
[U1n_Br1] or [U1n_Br2].)
Ib 1n is the rated primary current at the calculated side of transformer.
3.3.1.2 Calculate rated secondary current at each side of transformer
I
I b 2 n b 1n
nbLH
(Equation 3.3-2)
Where:
Ib 1n is the rated primary current at the calculated side of transformer.
nbLH is the ratio of CT at the calculated side of transformer.
3.3.1.3 Calculate the correction coefficient of each side of transformer
I
K ph b 2 n b
I b2n ,
(Equation 3.3-3)
Where:
I b 2 n is the rated secondary current at the calculated side.
I b 2 n b is the rated secondary current of base side (LV side is selected as base side for
RCS-985T).
The currents used in the following analysis have been corrected, that means the currents are the
products of the original secondary current of each side multiplying its own correction coefficient
( K ph ).
20
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Chapter 3 Description of Operation Theory
3.3.1.4 Phase shift compensation
By defining which particular connection group the protected transformer belongs to, the proper
calculation routine will be applied.
The following transforming method is based on the assumptions listed here:
•CTs at each side of transformer is connected in star type.
•Secondary currents of each CT are connected to the equipment directly.
•The positive polarity of CT at HV side is at busbar side and that at LV side is at branch side.
•Polarity of each secondary winding of CT is as same as shown in protection schemes figures in
chapter 1.
The secondary current phase shift compensation for all CTs are achieved by software, and Y→ Δ
transform method is used for this purpose. For connection Y/Δ-11, the correction equations are as
follows:
At side Y0:
'
I A (I A I B ) / 3
'
I
(
I
I
B
B
C)/ 3
'
I C ( I C I A ) 3
(Equation 3.3-4)
Where:
I A , I B , I C are the secondary currents of CT at side Y.
I ' A , I ' B , I ' C are the corrected current of each phase at side Y.
I a , I b , I c are the secondary currents of CT at side Δ.
For other connection type,the current can be calculated according to the equations listed above.
The connection type can be selected by following logic settings (refer to Chapter 6): [Yyy12_Conn],
[DDD12_Conn], [DYY11_Conn], [YDD11_Conn], [DYY1_Conn] and [YDD1_Conn].
NOTE: The device doesn’
t support individual winding inputs but there are six logic
settings mentioned above for user to select different connection group of transformer,
which almost covers common connection groups. If user has especially requirement,
please inform us before place an order.
3.3.2 Sensitive percentage differential element
Following analysis is based on the assumption that amplitude and phase shift compensation have
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21
Chapter 3 Description of Operation Theory
been done.
The sensitive percentage differential protection (or called low setting percentage differential
protection) is used to distinguish that the differential current is caused by unbalanced output or
fault (internal fault and special external fault).
Figure 3.3-1 shows general operation characteristic of this steady state percentage differential
protection. However for the more detailed operation characteristic please see Figure 3.3-3.
Figure 3.3-1 Operation characteristic of sensitive percentage differential protection
Operation criteria of this percentage differential protection are:
I d K bl I r I cdqd
K bl K bl1 Kblr ( I r / I e )
I d K bl 2 (I r nI e ) b I cdqd
K blr ( Kbl 2 K bl1 ) /(2 n)
b (K bl1 Kblr n) nI e
(I r nI e )
( I r nI e )
m
I i
i
1
I r
2
m
I d I i
i
1
(Equation 3.3-5)
Where:
I e is the rated current of transformer.
I cdqd is the pickup setting of sensitive percentage differential protection, which is also setting of
fault detector of sensitive percentage differential protection. [I_Pkp_PcntDiff]
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Chapter 3 Description of Operation Theory
Id
is the differential current, I r is the restraint current.
k bl
is sensitive percentage differential restraint coefficient and Kblr is its increment.
k bl 1 is the first slope of sensitive percentage differential protection with setting range 0.05~0.15,
[Slope1_PcntDiff] , for which 0.10 is recommended usually.
k bl 2 is the second slope of sensitive percentage differential protection [Slope2_PcntDiff] with
setting range 0.50~0.80. 0.70 is recommended usually.
n is the multiple of restraint current at second slope and is fixed as 6.
Ii (i = 1 … m) is current at each side of transformer and detailed definition is as follows.
In Figure 3.3-1, I cdsd is the operating setting of unrestrained instantaneous differential protection
[I_InsDiff].
For startup/standby transformer, six branches at most can be connected on LV side, so maximum
value of m in the equation is 7.
For station transformer and main transformer, there are three side voltage levels possibly.
3.3.3 Unsensitive percentage differential protection element
A percentage differential protection with high restraint coefficient and high pickup setting is
equipped with the equipment to prevent possibly delayed operation of percentage differential
protection caused by CT saturation and other factors during serious internal fault. This protection
is blocked only by inrush current criterion i.e. second harmonic of differential current or waveform
discrimination. It can prevent influence of steady state and transient CT saturation during external
fault and can operate correctly and quickly during internal fault even if CT is saturated. Operation
criterion of unsensitive percentage differential protection (or called high setting percentage
differential protection) is as below:
I d 1.2 I e
I d 1.0 I r
(Equation 3.3-6)
Where:
I d is differential current as mentioned above.
I r is restraint current as mentioned above.
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Chapter 3 Description of Operation Theory
Figure 3.3-2 Operation characteristic of unsensitive percentage differential protection
When fault occurs, the operation criterion will be discriminated phase by phase and unsensitive
percentage differential protection will operate if the criterion is met. For more detailed operation
characteristic please see Figure 3.3-3
NOTE: Parameters of this protection have been fixed in program and does not need to
be configured by user.
3.3.4 Unrestrained instantaneous differential protection element
The aim of unrestrained instantaneous differential protection for transformer is to accelerate the
trip speed for transformer’
s internal fault. So the element does not need any blocking element, but
the setting should be greater than maximum inrush current.
The operation of unrestrained differential element in the protection shall trip all breakers at all
sides of transformer when any phase differential current is greater than its setting. Its operation
criterion is:
I d max [I_InstDiff]
(Equation 3.3-7)
Where:
I d max is the maximum value of three-phase differential currents.
[I_Inst Diff] is the setting of the unrestrained instantaneous differential protection.
Figure 3.3-3 shows operation characteristic of unrestrained instantaneous differential protection.
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Chapter 3 Description of Operation Theory
o
pe
K
ra
=1
d st ti o
.0
i ff a n
e r te a
r
p
en e ea
ti rc o
al e f
p r n t st
ot a g e a
ec e dy
ti
on
3.3.5 Operation characteristic of current differential protection
Figure 3.3-3 Operation characteristic of current differential protection
The meaning of I d , I r , I e , K bl 1 ,and K bl 2 is described in section 3.3.2.
I cdqd is the pickup setting of sensitive percentage differential element [I_Pkp_PcntDiff].
I cdqsd is the setting of unrestrained instantaneous differential protection [I_InstDiff].
(1) Sensitive percentage differential protection element (described in section 3.3.2) will send
tripping signal after CT saturation, CT circuit failure (optional) ,inrush current and overexcitation
have been excluded. It can ensure sensitivity of protection and avoid unwanted operation when
CT is saturated during external fault. Its operation area is bright shadow area.
(2) Unsensitive percentage differential protection element (described in section 3.3.3) will send
tripping signal only after CT circuit failure (optional) and inrush current have been excluded. It
eliminates influence of transient and steady saturation of CT during external fault and ensures
reliable operation even if CT is saturated during internal fault by means of its percentage restraint
characteristic. Its operation area is dark shadow area.
(3) Unrestrained instantaneous differential protection element (described in section 3.3.4) will send
tripping signal without any blocking if differential current of any phase reaches its setting. Its
operation area is over the above two areas with no shadow.
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Chapter 3 Description of Operation Theory
3.3.6 Inrush current detection element
3.3.6.1 Second harmonic restraint principle
In the equipment, the second harmonic of differential current can be used to distinguish inrush
current. Its operation criterion is:
I 2 nd K 2 xb I 1st
(Equation 3.3-8)
Where:
I 2 nd is the second harmonic of each phase differential current.
I1 st is the differential fundamental current of corresponding phase.
k 2 xb is the setting of restraint coefficient of second harmonic [k_Harm_PcntDiff]. k 2 xb = 0.15 is
recommended.
3.3.6.2 Waveform distortion discrimination principle
During internal fault, differential currents of various sides transferred by CT are basically
fundamental sinusoidal wave. But when the transformer is energized, lots of harmonics appear,
the waveform is intermittent and unsymmetrical. A special algorithm can be used for discrimination
of the inrush current.
During internal fault, following relation exists:
S k b * S
S S t
(Equation 3.3-9)
Where:
S is the full cycle integral of differential current;
S is full cycle integral of the sum of instantaneous value of differential current and that of half
cycle before.
k b is a fixed constant.
S t is a threshold value which can be represented as follows:
S t * I d 0.1* I e
(Equation 3.3-10)
Where:
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Chapter 3 Description of Operation Theory
I d is the full cycle integral of differential current.
is a proportional constant.
I e is the secondary rated current of transformer.
If any one of three phases can not meet above equation, the differential current can be considered
as inrush current and percentage differential relay will be blocked.
In this protection equipment, logic setting [Opt_Inrush_Ident] is provided for user to select the
restraint blocking principle. If the logic setting is set as “0”, discrimination by harmonics is enabled.
Otherwise, discrimination by waveform distortion is enabled.
3.3.7 CT saturation detection element
In order to prevent unwanted operation of steady state percentage differential protection caused
by transient or steady state saturation of CT during external fault, composite harmonics of
secondary current of CT is used for the protection equipment to discriminate saturation of CT. The
expression is as following:
I nxb K nxb I 1
(Equation 3.3-11)
Where:
I nxb is the composite harmonics of phase differential current.
I 1 is the fundamental component of corresponding phase differential current.
k xxb is proportional coefficient.
When fault occurs, if DPFC of restraint current and DPFC of differential current appear
simultaneously, this is an internal fault. If DPFC of restraint current appears before DPFC of
differential current, this is an external fault. Criterion of CT saturation shall be adopted in external
fault case, and unwanted operation of percentage differential protection due to CT saturation can
be prevented then.
3.3.8 Differential current abnormality alarm and CT circuit failure blocking,
function
Differential current abnormality alarm with percentage restraint (see section 3.13.2) and instant CT
circuit failure blocking functions are equipped with the equipment (see section 3.13.3).
CT circuit failure blocking function can be configured by logic setting [Opt_CTS_ Blk_PcntDiff].
Please see details in section 3.13.3.
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Chapter 3 Description of Operation Theory
3.3.9 Over-excitation detection element
When a transformer is overexcited, the exciting current will increase sharply which may result in
unwanted operation of differential protection. Therefore the overexcitation shall be discriminated to
block the current differential protection. The fifth harmonic of differential current is used as criterion
of overexcitation discrimination.
I 5th k 5 xb * I 1 st
(Equation 3.3-12)
Where:
I1st is fundamental component of differential current.
I5 th is fifth harmonic of differential current.
k 5 xb is the fifth harmonic restraint coefficient, it is fixed at 0.25.
NOTE: Unsensitive percentage differential protection is not blocked by fifth harmonic of
differential current.
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Chapter 3 Description of Operation Theory
3.3.10 Logic scheme
Idmax>[I_InstDiff]
[Flg_Op_UIDP]
[EBI_Diff]
&
[En_Diff]
[OP_InstDiff]
&
[En_InstDiff]
FD_InstDiff
Flg_Inrush
Flg_Op_UnSensPcntDiff
[EBI_Diff]
&
[En_Diff]
&
&
[En_InstDiff]
Flg_CTS
FD_UnsenPcntDiff
≥1
Flg_CT_Sat
[Op_PcntDiff]
Flg_Inrush
Flg_Op_SensPcntDiff
[EBI_Diff]
&
[En_Diff]
&
&
[En_PcntDiff]
Flg_CTS
Flg_OverExc
FD_SenPcntDiff
Figure 3.3-4 Logic diagram of percentage differential protection(
Where:
Idmax: maximum value of three-phase differential current;
[I_InstDiff]: setting value of unrestrained instantaneous differential protection;
Flg_Op_UnSensPcntDiff: an internal flag indicating that unsensitive percent differential protection
element operates, which means Equation 3.3-6 is satisfied;
Flg_Op_SensPcntDiff: an internal flag indicating that sensitive percent differential protection
element operates, which means Equation 3.3-5 is satisfied;
[EBI_Diff]: binary input of enabling current differential protection;
[En_Diff]: logic setting of enabling current differential protection;
[En_InstDiff]: logic setting of enabling unrestrained instantaneous differential protection;
[En_PcntDiff]: logic setting of enabling percent differential protection;
FD_InstDiff: pickup of fault detector of unrestrained instantaneous differential protection;
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Chapter 3 Description of Operation Theory
FD_UnsensPcntDiff: pickup of fault detector of unsensitive percent differential protection;
FD_SensPcntDiff: pickup of fault detector of sensitive percent differential protection;
Flg_Inrush: an internal flag indicating that inrush current is detected;
Flg_CTS: an internal flag indicating that CT circuit failure is detected;
Flg_CT_Sat: an internal flag indicating that CT saturation is detected;
Flg_OverExc: an internal flag indicating that overexcitation of transformer is detected;
[Op_InstDiff]: unrestrained instantaneous differential protection operates;
[Op_PcntDiff]: percentage differential protection consisting of sensitive and unsensitive
percentage differential elements operates;
3.4 Restricted Earth Fault Protection (REF)
Restricted earth fault protection is also called zero-sequence differential protection, which include
zero-sequence percentage differential protection element and unrestrained instantaneous
zero-sequence differential protection element.
3.4.1 Amplitude ratio compensation
If CTs used for REF have different ratios, then the ratio compensation is needed. Her is the
method.
K
K
K ph TA Kb , Note: Kb min( TA max , 4)
KTAB
KTA _ max
(Equation 3.4-1)
Where:
KTA is the CT ratio at calculated side.
KTA _ B is the ration of zero-sequenc CT at neutral point side.
KTA _ max is the maximum CT ratio among all side.
In principle, this method take the ration of zero-sequenc CT at neutral point side as the base of
calculation and all other sides will be considered as its multiples. If ratio of the maximum CT ratio
to the base CT ratio is larger than 4, the multiple of the maximum to minimum will be taken as 4
and other side will be calculated proportionally. If ratio of the maximum to the base CT ratio is less
than 4, the multiple of the base CT rated current will be taken as 1, and other side will be
calculated proportionally. Thus the maximum setting range of current ration correction coefficient
K ph of each side can be up to 4.
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Chapter 3 Description of Operation Theory
The currents used in the following analyze are based on the assumption that they have been
adjusted, that means the currents are the products of original current of each side and its own
adjustment coefficient ( K ph ).
3.4.2 Principle of zero-sequence percentage differential protection
Zero-sequence percentage differential protection is used for earth fault at HV side, LV side A or LV
side B. Its operation criteria are as follows:
I 0 d I 0 cdqd
I K I
0d
0 bl
0r
I 0 r max{ I 01 , I 02 , I 03 , I 0 n }
I 0 d I 01 I 02 I 03 I 0 n
(Equation 3.4-2)
Where:
I 01 , I 02 , I03 are zero sequence currents of branches A1,A 2, A3 (or B1,B2,B3).
NOTE: To HV side, only one branch defined as
I 01 and other branches have no definition.
I 0 n is zero sequence current on neutral point side.
I 0 cdqd is
the
pick
up
setting
of
zero-sequence
percentage
differential
protection
[I_Pkp_PcntREF_HVS].
I 0 d is zero-sequence differential current.
I 0 r is zero-sequence restraint current.
k 0 bl is the setting of percentage restraint coefficient of zero -sequence percentage differential
protection [Slope_PcntREF_HVS]. 0.5 is recommended;
When the above equation is satisfied the zero-sequence percentage differential protection will
operate. Zero-sequence differential currents on various sides except neutral point are got from
internal calculation, and the polarity check of zero-sequence current transformers (CT) on various
sides is not needed.
Figure 3.4-1 shows operation characteristic of this zero-sequence percentage differential
protection.
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Chapter 3 Description of Operation Theory
3.4.3 Unrestrained instantaneous zero-sequence differential protection
The aim of unrestrained instantaneous zero-sequence differential protection for transformer is to
accelerate the trip speed for transformer’
s inner earth fault. So the element does not need any
block element, but the setting should be greater than maximum inrush current.
The operation of this protection shall trip all breakers at all sides of a transformer when any
unrestrained zero-sequence differential current is greater than its setting. Its operation criterion is:
I 0 d [I_InstREF_HVS]
(Equation 3.4-3)
Where:
I 0 d is the zero-sequence differential currents.
[I_InstREF_HVS] is the setting of the unrestrained instantaneous zero-sequence differential
protection. Figure 3.4-1 shows operation characteristic of this unrestrained instantaneous
differential protection.
I0d
operation area of unrestrained instantaneous
zero-sequence differential protection
operation area of zerosequence percentage
differential protection
K0bl
I0cdqd
0.5In
I0r
Figure 3.4-1 Operating characteristic of restricted earth fault protection
The meaning of I od , I or , K obl , and I 0 cdqd has been described in section 3.4.2. I n is secondary
rated current of CT.
3.4.4 Prevention of unwanted operation due to difference of CT transient
characteristics
Difference of transient characteristic and saturation of various CT will result in erroneous zero
sequence current in differential scheme during external three-phase short circuit fault. In order to
eliminate effect of it, positive sequence current restraint blocking criterion and CT saturation
criterion are used. Positive sequence current restraint principle can be expressed as following:
I 0 0 *I 1
(Equation 3.4-4)
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Chapter 3 Description of Operation Theory
Where:
I 0 0 *I 1
I0 is the zero sequence current at a side.
I1 is its corresponding positive sequence current.
0 is a proportional coefficient.
3.4.5 Logic scheme
HV side, LV A side and LV B side have restricted earth fault protection and their logic are same.
Here take HV side as an example.
Figure 3.4-2 Logic diagram of restricted earth fault protection of HV side
Go on here
I0d: zero-sequence differential current of HV side;
[I_InstREF]: current setting of unrestrained instantaneous zero-sequence differential protection of
HV side;
[EBI_REF_HVS]: binary input of enabling zero-sequence differential protection of HV side;
[En_REF_HVS]: logic setting of enabling zero-sequence differential protection of HV side;
[En_InstREF]: logic setting of enabling unrestrained instantaneous zero-sequence differential
protection of HV side;
[En_PcntREF]: logic setting of enabling percentage differential protection of HV side;
FD_InstREF_HVS: fault detector of unrestrained instantaneous zero-sequence differential
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Chapter 3 Description of Operation Theory
protection of HV side;
FD_PcntREF_HVS: fault detector of percentage zero-sequence differential protection of HV side
picks up;
Flg_Op_PcntDiff: an internal flag indicating that percentage differential protection of HV side
operates picks up; which is Equation 3.4-3 is satisfied;
Flg_CT_Abnor&Sta: an internal flag indicating that CT abnormality or saturation is detected;
[Op_InstREF]: operation flag of unrestrained instantaneous zero-sequence differential protection
of HV side;
[Op_PcntREF]: operation flag of percentage zero-sequence differential protection of HV side.
3.5 HV Side Voltage Controlled Overcurrent Protection
3.5.1 Application
This protection is applied as backup protection of transformer, HV busbar and neighboring line,
which comprises two-stage definite time overcurrent protection element with own settings and time
delays and one inverse time overcurrent protection element. Settings are provided for voltage
control element for the user to choose certain sensitivity.
3.5.2 Definite time overcurrent protection element
Following functions of two-stage definite time overcurrent relay can be selected by configuring
corresponding logic settings:
•Choose which stage is controlled by voltage control element.
•Choose being controlled by which side voltage control element (HV side or LV side).
•Breaker(s) on which side or sides will be tripped.
3.5.3 Inverse time overcurrent protection
Inverse time overcurrent relay (IDMT) haves following functions by configuringe the corresponding
logic setting.
•Breaker(s) at what side or sides will be tripped.
•Whether or not adding fixed time delay.
In order to coordinate with line overcurrent protection, the same inverse-time overcurrent
protection is equipped in this relay. IEC curve A of normal IDMT (inverse definite minimum time)
characteristic defined in IEC 60255-3 is adopted in this protection. Following figure shows the
inverse time curve. I
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Chapter 3 Description of Operation Theory
Figure 3.5-13.5-2 Operation characteristic of IDMT overcurrent
Operation criterion:
0.14
t( I )
TP
I 0.02
( ) 1
Ip
(Equation 3.5-1)
Where:
I p is current threshold of inverse time overcurrent protection at HV side,[I_InvOC_HVS].
Tp is time multiple setting of inverse time overcurrent protection at HV side, [t_InvOC_HVS].
Iis phase current of A , B or C.
Inverse time overcurrent protection consists of three parts: low setting initiator (that is current
threshold), inverse time part and upper limit definite time part. Inverse time part can simulate
transformer-heating process including heat accumulation and dissipation. When phase current
reaches its current threshold [I_InvOC_HVS], inverse time part picks up and the heat is
accumulated. When the current is lower than [I_InvOC_HVS], the heat dissipation will be
simulated accordingly.
There is a logic setting [En_FixDly_OC_HVS] use to select wehter add a fixed delay (100ms) to
operating time of the relay.
3.5.4 Voltage control element
The voltage control element is an element which will operate if phase -to-phase voltage is less than
its setting or negative sequence voltage is greater than its setting.
Criteria:
Upp< [Vpp_VCE_HVS]
Or
U 2 [V_NegOV_VCE_HVS]
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(Equation 3.5-2)
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Chapter 3 Description of Operation Theory
Where:
U pp is any one of phase-to-phase voltage of HV side.
U 2 is negative sequence voltage of HV side.
[Vpp_VCE_HVS] is setting of undervoltage control element of HV side.
[V_NegOV_VCE_HVS] is setting of negative-sequence overvoltage control element of HV side.
Stage 1 and stage 2 of definite time overcurrent protection can be controlled by voltage element by
configuring related logic settings [En_VCE_Ctrl_OC1_HVS] and [En_VCE_Ctrl_OC2_HVS]. It can
be blocked by both HV side voltage control element and LV side voltage control element by
configuring logic settings [En_HVS.VCE_Ctrl_OC_HVS] and [En_LVS.VCE_Ctrl_OC_HVS].
When logic setting [En_LVS.VCE_Ctrl_OC_HVS] is set as “1”, voltage element of LV side will pick
up following two cases:
--- If voltage element of a branch reaches its setting and current in this corresponding branch is
greater than 0.2 A.
--- If currents in all branches are less than 0.2A and voltage control element of any one branch
reaches its setting.
However voltage element of LV side will not pick up in the following case.
--- No currents in all branches are less than 0.2A.
3.5.5 Influence of VT circuit failure on voltage control element
Logic setting [Opt_VTS_Ctrl_OC_HVS] is used to configure action of voltage control element
during VT circuit failure. When this logic setting is set as “1”, if VT circuit failure is detected, the
voltage control element cannot pick up and the protection will not operate. When this logic
setting is set as “0”, if this side VT circuit failure is detected and voltage control element reaches its
setting, voltage control element will release and the voltage controlled overcurrent protection will
becomes a pure overcurrent protection.
3.5.6 Logic scheme
3.5.6.1 Voltage control element
HV and LV side have its own control element respectively but the logic is same.
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Chapter 3 Description of Operation Theory
Figure 3.5-3 Logic diagram of voltage control element
Where:
Upp_max: maximum value of phase-to-phase voltages of HV side;
U2: negative sequence voltage of HV side;
Flg_VTS_HVS: an internal flag indicating that failure voltage transformer circuit of HV side is
detected;
[Vpp_VCE_HVS]: setting of undervoltage control element of HV side.
[V_NegOV_VCE_HVS]: setting of negative-sequence overvoltage control element of HV side;
[Opt_VTS_Ctrl_OC_HVS]: logic setting of HV side backup protection to decide how to response
when VT circuit fails;
Flg_VCE_HVS: an internal flag indicating that voltage control element (VCE) of HV side picks up;
3.5.6.2 Definite time overcurrent protection
Figure 3.5-4 shows logic diagram of voltage controlled overcurrent protection HV side. Stage 1
and stage 2 have the same logic diagram as following.
Figure 3.5-4 Logic diagram of voltage controlled definite time overcurrent protection
Where:
Imax: maximum value of three-phase current of HV side;
[I_OCx_HVS]: current setting of stage 1 or stage 2 of definite time overcurent protection;
[Flg_VCE_HVS]: an internal flag indicating that voltage control element picks up as above
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Chapter 3 Description of Operation Theory
mentioned;
[MISC_OCx]: the calculation result of these logic settings [Opt_VTS_Ctrl_OC_HVS] ,
[En_VCE_Ctrl_OCx_HVS ],[En_VCE_Ctrl_OC2_HVS], [En_HVS.VCE_Ctrl_OC_HVS] and
[En_LVS.VCE_Ctrl_OC_HVS] to decide if a certain stage needs to be blocked and which side
voltage control element is used to block;
[EBI_PPF_Bak_HVS]: binary input of enabling the phase-to-phase fault backup protection of HV
side;
[En_PPF_HVS]: logic setting of enabling the phase-to-phase fault backup protection of HV side;
[t_OCx_HVS]: delay setting of stage 1 or stage 2 of definite time overcurrent protection;
[Op_OCx_HVS]: operation flag of stage 1 or stage 2 of definite time overcurrent protection .
3.5.6.3 Inverse time overcurrent protection
Figure 3.5-5 Logic diagram of IDMT overcurrent protection
Imax, [EBI_PPF_Bak_HVS] and [En_PPF_HVS] have same meaning as mentioned above;
[I_InvOC_HVS]: current setting of IDMT overcurrent protection;
[En_FixDly_InvOC_HVS]: logic setting of adding fixed delay of IDMT overcurrent protection;
IDMT: calculated delay of IDMT overcurrent protection (see equation 3.5-1);
[Op_InvOC_HVS]: operation flag of IDMT overcurrent protection.
3.6 HV side Voltage Controlled Directional Zero-Sequence
Overcurrent Protection
3.6.1 Application
This protection is applied as backup protection of earth fault for transformer with neutral point
earthed, which comprises three-stage definite time overcurrent protection element with own
settings and definite time delays and one inverse-time overcurrent protection element. Setting is
provided for voltage control element for the user to choose certain sensitivity.
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Chapter 3 Description of Operation Theory
3.6.2 Definite time zero-sequence overcurrent protection
Following functions of three-stage definite time zero-sequence overcurrent relay can be selected
by configuring corresponding logic settings:
•Whether or not be controlled by directional element.
•Whether or not be controlled by zero sequence voltage.
•Whether or not use calculated zero sequence current.
•Breaker(s) at what side or sides will be tripped.
3.6.3 Inverse-time zero sequence overcurrent element
Inverse time overcurrent (IDMT) relay can have following functions by configuring the
corresponding logic setting.
•Whether or not be controlled by directional element.
•Whether or not use calculated zero sequence current.
•Breaker(s) at what side or sides will be tripped.
•Whether or not adding fixed time delay.
In order to coordinate with line zero sequence overcurrent protection, the same inverse-time zero
sequence overcurrent protection is equipped in this relay. IEC curve A of normal IDMT (inverse
definite minimum time) characteristic defined in IEC 60255-3 is adopted in this protection.
Following figure shows the inverse time curve. I
Figure 3.6-13.6-2 Operation characteristic of IDMT overcurrent
Operation criterion:
0.14
t( I )
TP
I 0 0.02
( ) 1
Ip
(Equation 3.6-1)
Where:
I p is current threshold of inverse time overcurrent protection at HV side,[I_InvROC_HVS];
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Chapter 3 Description of Operation Theory
Tp is time multiple setting of inverse time overcurrent protection at HV side, [t_InvROC_HVS].
I 0 is zero sequence current.
Inverse time overcurrent protection consists of three parts: low setting initiator (that is current
threshold), inverse time part and upper limit definite time part. Inverse time part can simulate
transformer-heating process including heat accumulation and dissipation. When phase current
reaches its current threshold [I_InvROC_HVS], inverse time part picks up and the heat is
accumulated. When the current is lower than [I_InvROC_HVS], the heat dissipation will be
simulated accordingly.
There is a logic setting [En_FixDly_ROC_HVS] use to select whether add a fixed delay (100ms) to
operating time of the relay.
3.6.4 Direction element
Logic setting [Cfg_Dir_I0_HVS] is used to select the direction of every stage of zero sequence
overcurrent protection. If this logic setting is set as “1”, the direction is transformer and reach angle
is 225º. If this logic setting is set as “0”, the direction is power system and reach angle is 75º.
Figure 3.6-3 shows operating characteristic of directional protection where the hatched area is
operation zone.
In addition, logic setting [En_Dir_Ctrl_ROCx_HVS] (x represents one stage from1 to 2) is used to
select whether x stage zero sequence overcurrent relay is controlled by directional element. If this
logic setting is set as “1”, zero sequence overcurrent protection will be controlled by directional
element.
Io
3U0
φlm = 75°
φlm = 255° 3U 0
Io
a)
Direct to power system
b) Direct to transformer
Figure 3.6-3 Operating characteristic of zero-sequence directional element
NOTE: The zero sequence voltage and current used by directional relay is definitely the
calculated voltage and current. The direction mentioned above is based on the
assumption that positive polarity of CT being at the side of busbar.
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Chapter 3 Description of Operation Theory
3.6.5 Zero sequence current used by zero-sequence overcurrent relay
Logic setting [Opt_I_ROCx] (x represents one stage from1 to 3) is used to select whether zero
sequence current is used by stage 1, 2 or 3 of zero-sequence overcurrent relay. If the logic setting
is set as “1”, internally calculated zero sequence current is used for the stage. Otherwise, directly
measured zero sequence current is used.
3.6.6 Zero sequence voltage control element
Logic setting [En_VCE.ROV_Ctrl_ROCx_HVS] (x represents one stage from1 to 2) is used to
select whether zero-sequence overcurrent relay will be controlled by zero-sequence voltage
element. If the logic setting is set as “1”, it will be controlled by zero-sequence voltage element.
NOTE: Zero-sequence voltage element uses definitely the broken-delta voltage of VT.
3.6.7 Influence of VT failure on zero-sequence voltage element and
zero-sequence directional relay
Logic setting [Opt_VTS_Ctrl_ROC_HVS] is used to control performance of zero-sequence
directional relay and zero-sequence voltage element during VT circuit failure. If this logic setting
is set as “1”, when VT circuit failure at local side is detected, zero-sequence overcurrent relay will
be blocked. Otherwise, when VT circuit failure at one side is detected, zero-sequence overcurrent
relay become an pure overcurrent relay without directional element and voltage element control.
3.6.8 Logic scheme
3.6.8.1 Definite time zero-sequence overcurrent protection
Stage 1 and stage 2 have the same logic diagram and here take stage 1 as an example.
Stage 3 protection will operate without zero-sequence voltage element and direction element
control.
Figure 3.6-4 shows logic diagram of voltage-supervised directional zero-sequence overcurrent
protection stage 1.
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Figure 3.6-4
Logic diagram of stage 1 of zero-sequence overcurrent protection
Where:
3U0: three times zero-sequence voltage of HV side;
[V_ROV_VCE_HVS]: voltage setting of zero -sequence overvoltage of voltage control element of
HV side;
Flg_VTS_HVS: an internal flag indicating that voltage transformer circuit failure of HV side is
detected;
[Opt_VTS_Ctrl_OC_HVS]: logic setting of HV side backup protection to decide how to response
when VT circuit fails;
[En_VCE.ROV_Ctrl_ROC1_HVS]: logic setting of enabling zero-sequence overvoltage of voltage
control element to control stage 1 of zero sequence overcurrent protection of HV side;
[En_Dir_Ctrl_ROC1_HVS]: logic setting of enabling directional element to control stage 1 of zero
sequence overcurrent protection of HV side;
Flag_RVCE: flag indicating the zero-sequence voltage control element picks up;
Flag_Dir_ROC: an internal flag indicating the zero-sequence directional element operates;
[En_EF_HVS]: logic setting of enabling earth fault protection of HV side;
[EBI_EF_Bak_HVS]: binary input of enabling earth fault protection of HV side.
FD_ROC1_HVS: pickup of fault detector of stage 1 of zero sequence overcurrent protection;
[t_ROC11_HVS], [t_ROC12_HVS]: delay setting 1 and 2 of stage 1 of zero sequence overcurrent
protection;
[Op_ROC11_HVS], [Op_ROC12_HVS]: operation flags of delay 1 and delay 2 of stage 1 of
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zero-sequence overcurrent protection .
Figure 3.6-5 shows logic scheme of stage 3 of definite time zero-sequence overcurrent protection.
Figure 3.6-5 Logic diagram stage 3 of definite time zero-sequence overcurrent protection
Where:
3I0: three times zero-sequence current;
[I_ROC3_HVS]: current setting of stage 3 of zero sequence overcurrent protection;
[I_ROC3_HVS]: current setting of stage 3 of zero-sequence overcurrent protection;
[t_ROC3_HVS]: time delay of stage 3 of zero-sequence overcurrent protection;
FD_ROC3_HVS: pickup of fault detector of stage 3 of zero sequence overcurrent protection;
[Op_ROC3_HVS]: operation flag of stage 3 of zero-sequence overcurrent protection.
3.6.8.2 Inverse time zero-sequence overcurrent protection
Figure 3.6-6 Logic diagram of IDMT zero sequence overcurrent protection
3I0, [EBI_EF_Bak_HVS] and [En_EF_HVS] have same meaning as mentioned above;
[I_InvOC_HVS]: current setting of IDMT zero sequence overcurrent protection;
[En_FixDly_InvROC_HVS]: logic setting of adding fixed delay of IDMT zero sequence overcurrent;
IDMT: calculated delay of IDMT zero-sequence overcurrent protection (see equation 3.6-1);
[Op_InvROC_HVS]: operation flag of IDMTzero sequence overcurrent protection.
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3.7 HV Side “Gap”Protection
Grounding overcurrent protection via air gap is used as backup protection of transformer with HV
side neutral point grounded through small reactor or air gap.
Zero-sequence overvoltage protection is used as backup protection of transformer with HV side
neutral point ungrounded, or grounded through small reactor or gap.
Considering that ground overcurrent via air gap and zero -sequence overvoltage may appear
alternatively during air gap broken down process, once grounding overcurrent or zero-sequence
overvoltage protection operates, the operation of these two elements are ORed. Therefore
operation of the “gap”protection is reliable.
One stage “gap”zero-sequence overcurrent protection and one stage zero-sequence overvoltage
protection are provided.
3.8 LV Side Voltage Controlled Overcurrent Protection
3.8.1 Application
This protection is applied as backup protection of transformer, LV busbar and neighboring lines.
RCS-985T has maximum six branches at LV side (branch A1, branch A2, branch A3, branch B1,
branch B2 and branch B3). Branch voltage controlled overcurrent protection comprises two-stage
definite time overcurrent protection element. Settings are provided for voltage control element for
the user to choose certain sensitivity.
3.8.2 Definite time overcurrent protection element
Every branch at LV side is equipped with definite overcurrent protection. Following functions of
two-stage definite overcurrent relay can be selected by configuring corresponding logic settings:
•Choose which stage is controlled by voltage element.
•Breaker(s) on which side or sides will be tripped.
•Enabling accelerating tripping function of stage 2.
3.8.3 Inverse time overcurrent protection
Protection theory of inverse time (IDMT) overcurrent protection of LV side is same to that of HV
side but with independent settings, so please refer to section 3.5.3 for detailed description. Only
branch A1 at LV side A and branch B1 at LV side B are equipped with this protective function.
3.8.4 Voltage control element
The voltage control element is an element which will operate if phase-to-phase voltage is lower
than its setting or negative sequence voltage is greater than its setting.
Criteria:
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Upp< [Vpp_VCE_Brmn]
Or
U 2 [V_NegOV_VCE_Brmn]
(Equation 3.8-1)
Where:
m represents branch group, take 1 or 2; and n represents number of branch in its group, takes 1, 2
or 3;
Br11, Br12, Br and 13 are corresponding to branch A1, branch A1 and branch A3 at LV side
respectively.
Br21, Br22, Br and 23 are corresponding to branch B1, branch B1 and branch B3 at LV side
respectively.
Upp is any one of is phase-to-phase voltage of the branch at LV side.
U 2 is negative sequence voltage of the branch at LV side.
[Vpp_VCE_Brmn] is setting of undervoltage control element of branch at LV side.
[V_NegOV_VCE_Brmn] is setting of negative sequence control element of branch at LV side.
Stage 1 and stage 2 of definite time overcurrent protection can be controlled by voltage control
element or not by configuring corresponding logic settings [En_VCE_Ctrl_OC1_Brmn].
3.8.5 Influence of VT circuit failure on voltage control element
Logic setting [VT Supervision Criterion] is used to configure action of voltage control element
during VT circuit failure. When this logic setting is set as “1”, if VT circuit failure is detected, the
voltage control element cannot pick up and the protection will not operate. When this logic
setting is set as “0”, if this side VT circuit failure is detected and voltage control element reaches its
setting, voltage control element will release and the voltage controlled overcurrent protection
becomes a pure overcurrent protection.
3.8.6 Switch onto fault protection
During switching on process of power supply of the power plant, in order to prevent expansion of
fault which just occurs or is present when the standby power supply is switched on, tripping of
stage 2 of this protection shall be accelerated. This acceleration function shall be enabled by a
binary input during a short period of the transformer being switched on and disabled when the
transformer operates normally. When this function is disabled, stage 2 will operate with its own
time delay setting.
Logic setting [En_OC2_SOTF_Brmn] is used to configure this function. If this logic setting is set as
“1”, stage 2 of overcurrent protection will operate with short time delay, when the current reaches
its setting during a short period of the standby transformer being witched on. When current in
branch presents longer than 5 s, accelerating tripping function will be disabled. If bin ary input of
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Chapter 3 Description of Operation Theory
enabling accelerating tripping is energized continuously more than 10 s, an alarm will be issued
and the accelerating function will be disabled.
3.8.7 Logic scheme
3.8.7.1 Voltage control element
Figure 3.8-1 Logic diagram of voltage control element
Where:
Brmn: Br11, Br12, Br13, Br21, Br22, or Br23;
Upp_max: maximum value of phase-to-phase voltages of branch mn;
U2: negative sequence voltage of branch mn;
Flg_VTS_Brmn: an internal flag indicating that failure voltage transformer circuit of branch mn is
detected;
[Vpp_VCE_Brmn]: setting of undervoltage control element of branch mn;
[V_NegOV_VCE_ Brmn]: setting of negative-sequence overvoltage control element of branch mn;
[Opt_VTS_Ctrl_OC_Brmn]: logic setting of branch mn backup protection to decide how to
response when VT circuit fails;
Flg_VCE_Brmn: an internal flag indicating that voltage control element (VCE) of branch mn picks
up.
3.8.7.2 Accelerating tripping element of stage 2
Every branch has accelerating tripping function controlled by configuring corresponding binary
input and their logic schemes are same.
Figure 3.8-2 Logic diagram of accelerating tripping element of stage 2
Where:
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Brmn: Br11, Br12, Br13, Br21, Br22, or Br23;
Flag_Cur_T5_Brmn: an internal flag indicating that the duration of no current of branch mn less
than 5 seconds. Here, m represents branch group, n represents branch number in its group.
[BI_SOTF_Brmn]: binary input of accelerating tripping contact of branch mn.
Flg_SOTF_T10_Brmn: an internal flag indicating that the persisting time of the binary input
[BI_SOTF_Brmn] is less than 10s.
[En_OC2_SOTF_Brmn]: logic setting of enabling stage 2 accelerated function of each branch.
Flg_Op_SOTF_Brmn]: an internal flag indicating that SOTF element operates.
3.8.7.3 Definite time overcurrent protection stage 1
Every branch has definite time overcurrent protection stage 1 and their logic schemes are same.
Figure 3.8-3 Logic diagram of stage 1 of overcurrent protection
Where:
Brmn: Br11, Br12, Br13, Br21, Br22, or Br23;
Imax: maximum value of three-phase current of branch mn;
[I_OC1_Brmm]: current setting of stage 1 of overcurrent protection of branch mn;
[En_VCE_Ctrl_OC1_Brmn]: logic setting of enabling voltage control for protection of branch mn.
[EBI_Bak_Brmn]: binary input of enabling the backup overcurrent protection of branch mn.
[En_Bak_Brmn]: logic setting of enabling backup overcurrent protection of branch mn.
FD_OC1_Brmn: pickup of fault detector of overcurrent protection stage 1 of branch mn;
[t_OC1_Brmn]Delay: time delay setting of of overcurrent protectjion of branch mn operates;
[Op_OC1_mn]: operation flag of stage 1 of overcurrent protectjion of branch mn.
3.8.7.4 Definite time overcurrent protection stage 2
Every branch has definite time overcurrent protection stage 2 and the logic schemes are same.
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Figure 3.8-4 Logic diagram of stage 2 of definite time overcurrent protection
Where:
Brmn: Br11, Br12, Br13, Br21, Br22, or Br23;
Flg_Op_SOTF_Brmn, [EBI_Bak_Brmn] and [En_Bak_Brmn] refer to above two sections;
Imax: maximum value of three-phase current of branch mn;
[I_OC2_Brmm]: current setting of stage 2 of overcurrent protection of branch mn;
[t_OC2_Brmn]: delay setting of stage 2 of overcurrent protection of branch mn;
[Op_OC2_Brmn]: operation flag of stage 2 of overcurrent element.
3.8.7.5 Inverse time overcurrent protection
Branch A1 and branch B1 are equipped with inverse time overcurrent protection and their logic
schemes are same.
Figure 3.8-5 Logic diagram of IDMT overcurrent protection
Where:
Brmn: Br11 or Br12;
Imax, [EBI_Bak_Brmn] and [En_ Bak_Brmn] have same meaning as mentioned above;
[I_InvOC_ Brmn]: current setting of IDMT overcurrent protection of branch mn;
[En_FixDly_InvOC_ Brmn]: logic setting of adding fixed delay of IDMT overcurrent protection
branch mn;
IDMT: calculated delay of IDMT overcurrent protection of branch mn;
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[Op_InvOC_ Brmn]: operation flag of IDMT overcurrent protection
3.9 LV Side Earth Fault Protection
3.9.1 Application
This protection is mainly used as backup protection of transformer with LV side neutral point
grounded solidly, which consists of two-stages zero sequence overcurrent protection with time
delays. Zero sequence current used is usually taken from zero sequence CT at LV side neutral
point.
For LV side system with neutral point ungrounded , zero-sequence overvoltage alarm function is
provided.
Sides A and B are equipped with this protection.
3.9.2 Logic scheme
LV side A and B side have earth fault protection, and their logic schemes are same. Moreover,
stage 1 and stage 2 have same logic scheme. Here take stage 1 of side A as an example.
Figure 3.9-1
Logic diagram of side A zero-sequence overcurrent protection
Where:
Brm: Br1 (LV side A) or Br2 (LV side B);
3I0: three times zero-sequence overcurrent of branch 1;
[I_ROC1_Br1]: current setting of stage 1 of zero-sequence overcurrent protection of LV side A.
[EBI_EF_Br1]: enabling binary input of backup earth fault protection of LV side A
[En_EF_Br1]: logic setting of enabling backup earth fault protection of LV side A
[t_ROC1_Br1]: delay setting of stage 1 of zero-sequence overcurrent protection of LV side A.
FD_ROC1_Br1: pickup of fault detector of stage 1 of zero-sequence overcurrent protection of LV
side A;
[Op_ROC1_Br]: operation flag of stage 1 of zero-sequence overcurrent protection of LV side A.
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Chapter 3 Description of Operation Theory
3.10 Pole Disagreement Protection
3.10.1 Application
One-stage pole disagreement protection with two delays is used for protection of HV side circuit
breaker. The fault can be detected by auxiliary position contact of breaker, zero sequence current
or negative sequence current. Whether zero or negative sequence current is used for detection
can be configured by corresponding logic setting. Two time delay settings are provided for pole
disagreement protection and time delay 2 can be configured to be supervised by binary input of
protection tripping contact.
There are three current criteria:
Ipmax ≥[I_OC_PD]
or
I 2 [I_NegOC_PD]
or
3I 0 [I_ROC_PD]
(Equation 3.10-1)
Where:
Ipmax is the maximum value of three-phase current at HV side.
I2 is negative sequence current of HV side.
3I0 is zero sequence current of HV side.
[I_OC_PD] is setting of pole-disagreement phase current element.
[I_NegOC_PD] is setting of pole-disagreement negative-sequence current element.
[I_ROC_PD] is setting of pole-disagreement zero-sequence current element.
Current element will pick up if any one criterion is met with corresponding logic setting set as “1”.
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3.10.2 Logic scheme
3.10.2.1 Delay 1 of pole disagreement protection
Figure 3.10-1 Logic diagram of delay 1 of pole disagreement protection
Where:
3I0: three times zero-sequence current of HV side;
I2: negative sequence current of HV side;
[I_ROC_PD]: current setting of pole-disagreement zero-sequence current element;
[En_ROC_PD]: logic setting of pole disagreement protection operating controlled by
zero-sequence current element;
[I_NegOC_PD]: current setting of pole-disagreement negative sequence current element
[En_NegOC_PD]: logic setting of pole disagreement protection operating controlled by negative
sequence current element;
[BI_PoleDisagr_CB]: binary input indicating that the HV side breaker is in pole disagreement
status;
[EBI_PoleDisagr_HVS]: binary input of enabling pole disagreement protection;
[En_PoleDisagr_HVS]: logic setting of enabling pole disagreement protection;
[t_PD1]: time delay 1 of pole disagreement protection;
FD_PD_HVS: pickup of fault detector of pole disagreement protection;
[Op_PD1]: operation flag of delay 1 of pole disagreement protection;
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3.10.2.2 Delay 2 of Pole disagreement protection
FD_PD_HVS
[BI_PoleDisagr_CB]
[EBI_PoleDisagr_HVS]
&
[En_PoleDisagr_HVS]
[En_ExtTrp _Ctrl_PD2]
&
≥1
[t_PD2]
[Op_PD2]
[ BI_ExTrp_Ctrl_PD2]
Ipmax>[I_OC_PD]
&
[En_OC_PD2]
≥1
3I0>[I _ROC_PD]
&
≥1
[En_ROC_PD]
I2>[I_NegOC_PD]
&
[En_NegOC_PD]
≥1
Figure 3.10-2 Logic diagram of delay 2 of pole disagreement protection
Where:
Ipmax: maximum value of three-phase current of HV side;
[I_OC_PD1_HVS]: current setting of pole-disagreement phase current element;
[En_OC_PD2]: logic setting of delay 2 of pole disagreement protection operating controlled by
zero-sequence current element;
[BI_ExTrp_Ctrl_PD2]: binary input of external protection trip contact to control pole disagreement
protection;
[En_ExTrp_Ctrl_PD2]: logic setting of enabling the external protection tripping contact to control
delay 2 of pole disagreement protection;
[t_PD2]: time delay 2 of pole disagreement protection;
[Op_PD2]: operation flag of delay 2 of pole disagreement protection;
Other items : the definitions are same to section 3.10.2.1.
3.11 Overexcitation Protection
3.11.1 Application
Overexcitation protection is used to prevent damage due to overexcitation of the transformer. It
represents multiple of overexcitation of the transformer. Phase voltage on HV side of transformer
is used for calculation of overexcitation.
VT circuit failure will not affect the correct operation of overexcitation protection.
NOTE: When the overexcitation protection is enabled, logic setting [Opt_V_Input_HVS]
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must be set as “1”.
3.11.2 Definite time overexcitation protection
The definite time overexcitation protection is equipped with one stage for tripping and one stage
for alarm. Both of time delays of two stages can be configured.
Multiple of overexcitation n can be expressed as follows:
n U / F
(Equation 3.11-1)
Where: U and F are per unit value of voltage and frequency respectively.
Base value of per unit value of voltage and frequency are 50Hz and 57.74V respectively.
3.11.3 Inverse time overexcitation protection
Inverse time overexcitation protection realizes inverse time characteristic by linearing processing
on given inverse time operation characteristic, obtaining multiple of overexcitation by calculation,
and getting corresponding operation time delay by sectional linear insertion. It reflects heat
accumulation and dissipation.
Overexcitation protection can be specified by 4 input settings n1 ~n4.
The overexcitation
multiple settings n (= U/ F) are within range of 1.0~1.5 in general. Maximum time delay t is
considered as long as 3000 s.
Figure 3.11-1 shows inverse time operation characteristics of overexcitation protection.
Figure 3.11-1 Inverse time operation characteristics of overexcitation protection
Relation between various settings of n and t are:
n0 ≥ n1 ≥ n2 ≥ n3 ≥ n4 ≥ n5
t0 ≤ t1 ≤ t2 ≤ t3 ≤ t4 ≤ t5
Where:
n0 is the upper limit setting of multiple of overexcitation [k0_InvOvExc].
t0 is the time delay for upper limit setting n0 [t0_InvOvExc].
n5 is the lower limit setting of multiple of overexcitation [k5_InvOvExc].
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t5 is the time delay for lower limit setting n0 [t5_InvOvExc].
3.11.4 Logic scheme
[En_OvExc]
&
[t_Alm_OvExc]
&
[t_OvExc]
U/ F> [k_Alm_OvExc]
U / F> [k_OvExc]
[En_OvExc]
[Alm_OvExc]
[Op_OvExc]
&
[EBI_OvExc]
FD_OvExc
Figure 3.11-2 Logic diagram of definite time overexcitation protection
Where:
[En_OvExc]: logic setting of enabling HV side overexcitation protection;
[EBI_OvExc]: binary input of enabling HV side overexcitation protection;
[k_Alm_OvExc]: setting of definite time overexcitation protection alarming;
[k_OvExc]: setting of definite time overexcitation protection tripping;
[t_ Alm_OvExc]: alarm time delay of definite time overexcitation protection;
[t_OvExc]: tripping time delay of definite time overexcitation protection;
FD_OvExc: pickup of fault detector of overexcitation protection;
[Alm_OvExc]: alarm signal of overexcitation protection;
[Op_OvExc]: operation flag of overexcitation protection.
3.12 Other Abnormality Protection Functions
The HV side backup protection is equipped with thermal overload alarm, cooling initiation and
on-load tap change blocking during overload, which can be enabled or disabled by configuring
corresponding logic setting.
One pair output contacts (i.e. one NO and one NC contacts) are provided for cooling initiation and
another pair for on-load tap change blocking during overload.
However, another pair output contacts (i.e. two NO contacts) can also be provided for cooling
initiation according to need of site..
The LV side is equipped with one stage of zero-sequence overvoltage protection at side A and side
B used as earth fault alarm.
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3.13 CT Circuit Failure Supervision (CTS)
3.13.1 CT circuit abnormality alarm
Operation criterion of the alarm is:
I 0 0.04I n 0.25I max
(Equation 3.13-1)
Where:
I 0 is zero sequence current.
I n is rated secondary current of CT.
I max is maximum phase current among three phases.
If any side or branch meets the criterion, CT circuit abnormality alarm of this side or branch will be
issued after 10 s .The abnormality alarm will be reset after 10 s if equipment returns to normal
condition.
3.13.2 Differential current abnormality alarm in differential protection
In order to raise sensitivity of this differential current abnormality alarm, percentage restraint
differential current alarm criterion is adopted.
I d [I_Alm_Diff] and I d K bj I res
(Equation 3.13-2)
Where
I d is differential current.
[I_Alm_Diff] is setting of differential current abnormality alarm
I res is the restraint current
K bj is percentage restraint coefficient.
This function is enabled only when differential protection is enabled by setting logic setting
[En_Diff] as “1”. If the criterion is met, differential circuit abnormality alarm will be issued after 10 s
but related differential protection will not be blocked. When the differential current eliminates and
the equipment return to normal condition, the alarm will be reset after 10 s.
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3.13.3 Instant CT circuit failure discrimination in differential protection
Instant CT circuit failure discrimination performs its function after pickup of fault detector of
differential protection, if both logic setting and binary input of enabling differential protection are set
as “1”.
If internal fault occurs, at least one of following conditions will occur after fault detector of
differential protection picks up.
(1) Any phase current of any side increases;
(2) Maximum phase current is greater than 1.2 Ie (Ie is secondary calculated rated current of
transformer);
(3) Three groups of current inputs decrease simultaneously.
If none of those conditions occurs, it will be judged as CT circuit failure. If the logic setting
[Opt_CTS_Blk_PcntDiff] is set as “1”, the differential protection will be blocked and alarm will be
issued. If this logic setting is set as “0”, alarm will be issued but differential protection will not be
blocked.
If the alarm is issued, the alarm signal can be reset only when the failure is removed and the
equipment is reset by pressing “RESET”button on panel.
3.14 VT Circuit Failure Supervision (VTS)
Criteria of VT circuit failure of HV side and each branch are:
(1) Positive sequence voltage is greater than 18 V and any phase current is greater than 0.04 In.
(In is rated secondary current of current transformer.)
(2) Three times negative sequence voltage 3U 2 is greater than 8 V.
For HV side VT, if any one of above two criteria is met, VT circuit failure alarm will be issued
after 10 s. The alarm signal will be reset automatically after 10 s if equipment returns to
normal condition.
HV side VT circuit failure detection is disabled if HV side voltage control element is not chosen
to control overcurrent or directional element is not chosen to control zero sequence
overcurrent.
For VTs of LV side, if any one of above two criteria is met, VT circuit failure alarm will be
issued after 10 s. The alarm signal can be reset only when the failure is removed and the
equipment is reset by pressing “RESET”button on panel.
LV side branch A1, A2, A3, B1, B2 or B3 circuit failure detection is disabled if only
corresponding branch voltage channel is shielded through configuring the implicit
configuration settings.
VT circuit failure will not affect correct operation of overexcitation protection.
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Chapter 4 Supervision, Metering and Recording
4.1 General Description
Though the protection system is in non-operating state under normal conditions, it is waiting for a
power system fault to occur at any time and must operate for the fault without fail. When the
equipment is in energizing process before the LED “HEALTHY”is on, the equipment needs to be
checked to ensure there are no errors. Therefore, the automatic supervision function, which
checks the health of the protection system when startup and during normal operation, plays an
important role.
The numerical relay based on the microprocessor operations is suitable for implementing this
automatic supervision function of the protection system.
In case a fatal fault is detected during automatic supervision, the equipment will be blocked out. It
means that relay is out of service. Therefore you must re-energize the relay or even replace a
module to make relay back into service.
The relay also provides some auxiliary functions, such as disturbance data record, on-line data
metering, real-time power calculation etc. All these make the relay meet the demands of the
modern power grid requirements.
4.2 Relay self-supervision
4.2.1 Relay hardware monitoring
RCS-985T has CPU module and MON module needed to supervise and the two modules have
the same hardware configuration.
The DSP1, DSP2, RAM, EPROM, FPGA and CPLD chips both on CPU and MON modules are
monitored to ensure whether they are damaged or have errors. If any one of them is detected
damaged or having error, equipment is blocked.
4.2.2 DC supply monitoring
The secondary voltage level of the built-in DC/DC converter is monitored and checked whether
the DC voltage is within a prescribed range. If a failure is detected in the DC power supply circuit,
the alarm signal will be issued and the relay will be blocked with LED “HEALTHY”distinguished.
When the failure is eliminated, the relay goes to normal state with LED “HEALTHY” lit
automatically.
4.2.3 Opto-coupler power monitoring
Positive power supply of opto-coupler is continually monitored. If an error or damage has occurred,
an alarm will be issued and the relay will not be blocked. In the mean time, LED “ALARM”is lit on.
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4.2.4 Sampled data monitoring
To confirm that the sampled data used for protection calculation are correct, in normal program
RCS-985T compare data of CPU module with that of MON module per cycle. Equipment is
blocked, when errors are found.
4.2.5 Fault detector element monitoring
When fault detector in MON module picks up, while the fault detector in CPU module doesn’
t pick
up, or fault detector in CPU and MON module picks up continuously, equipment will issue
abnormality alarm but not be blocked.
4.2.6 Check binary input of CPU and MON
Binary inputs of detected by CPU and MON modules should be the same. Otherwise, equipment
is blocked.
4.2.7 Check setting
This device has two setting groups, while only one is active simultaneously. The settings of active
setting group are checked to ensure that they are reasonable. If the settings are checked to be
invalid, equipment is blocked. At the same time if there is any summation error of all setting
groups, Equipment is also blocked.
4.2.8 Communication monitoring
The software of the device can be divided into software modules, which are on CPU module,
MON module and HMI module respectively. There are two communication channels among them,
communication between CPU module and MON module and communication between CPU
module and HMI module, which are monitored to ensure reliable data exchange. If communication
fails, equipment will send alarm signal without being blocked.
4.2.9 CT /VT circuit failure monitoring
CT circuit and VT circuit are both monitored. If CT or VT circuit is abnormal or fails, corresponding
alarm will be issued. Please refer to section 3.13 and section 3.14 for details.
4.2.10 Tripping output circuit monitoring
Tripping output relay driving transistor is always monitored in normal program, and blocking
message will be issued when the equipment finds abnormality of the tripping output circuit.
4.2.11 LCD displayed abnormality or failure information
Following listed information displayed on LCD is also called trouble shooting information. It
includes communication abnormality alarm, equipment failure alarms, equipment abnormality
alarms, abnormality alarms of CT or VT circuit, protection alarms and operating information.
4.2.11.1 Abnormality alarms of HMI module
When abnormal situation is detected by self-supervision it is followed with an LCD message and
“ALARM”LED will be turned on. Because the abnormality is not so important to affect equipment
58
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Chapter 4 Supervision,Metering and Recording
correct operation, the abnormality will not be recorded as self-supervision report and the
equipment will not be blocked. Table 4.2-1 shows the abnormality alarm
Table 4.2-1 abnormality alarms of self-supervision
No.
Information
(LCD message)
1
ERR: Invalid wiring data
2
ERR:CRC error of wiring data
3
ERR:Can’
t get valid data of wiring
4
ERR:Invalid data of operation report
5
ERR:CRC error of operation report
6
ERR:Can’
t get valid operation report
7
ERR:Invalid data of autosuperv report
8
ERR:CRC error of autosuperv report
9
ERR:Can’
t get valid autosuperv report
Suggestion
10 ERR:Invalid data of binchange report
11 ERR:CRC error of binchange report
12 ERR:Can’
t get valid binchange report
13 ERR:Can’
t get time data of CPU Board
14 ERR:Can’
t change time of CPU Board
15 ERR:Can’
t change time of MON Board
16 ERR:Can’
t delete reports of CPU Board
17 ERR:Can’
t delete reports of MON Board
18 ERR:Invalid CPU Identity No.
19 ERR:CRC error of CPU Identity No.
20 ERR:Can’
t get valid CPU Identity No.
Check
if
communication
cable
between front panel and CPU module
is normal. If equipment cannot return
to normal condition, please inform the
factory.
21 ERR:Invalid MON Identity No.
22 ERR:CRC error of MON Identity No.2
23 ERR:Can’
t get valid MON Identity No.
24 ERR:Can’
t get valid CPU debug-info
25 ERR:Can’
t get valid MON debug-info
26 ERR:Invalid setting data
27 ERR:CRC error of setting data
28 ERR:Can’
t get EB90-info of settings
29 ERR:Can’
t get EB90-info of setalarm
30 ERR:CRC error of setalarm data
31 ERR:Can’
t send print-flag to CPU board
32 ERR:Can’
t get valid CPU print-flag
33 ERR:Can’
t get valid CPU comm-flag
34 ERR:Can’
t reset CPU comm-flag
35 ERR:Can’
t send oscill-cmd to CPU board
36 ERR:Invalid test data
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59
Chapter 4 Supervision,Metering and Recording
No.
Information
(LCD message)
Suggestion
37 ERR:CRC error of test data
38 ERR:CPU&MON Identity No. unmatched
39 ERR:Can’
t get any data
60
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Chapter 4 Supervision,Metering and Recording
4.2.11.2 Self-check failure alarms that block equipment
When hardware failure is detected, all protection functions will be blocked and block signal will be sent. The equipment cannot work in this case.
Hardware failure includes failure of RAM, error of EEPROM, settings invalid, loss of power source of opto-coupler, error of DSP, tripping output
circuit failure, etc. All the failure alarms can be viewed in event recording report.
When some light failures are detected, part of protection functions probably be disabled and others can still work. Equipment abnormality alarms
can be viewed in event recording report.
NOTE: There are three alarm LEDs on HMI module: “ALARM”LED, “CT ALARM”LED and “
VT ALARM ”LED. In following tables
“ALARM”, “CT ALARM”or “CT ALARM”means the corresponding LED is turned on.
Abnormality information printed or displayed on LCD and trouble shooting are described in following table.
Table 4.2-2 Self-check alarm reprots
Information
No.
(LCD message)
1
Alm_RAM_CPUBrd
2
Alm_ROM_CPUBrd
Description
Alm_EEPROM_CPUBrd
Alm_DSP_CPUBrd
5
Alm_RAM_MONBrd
6
Alm_ROM_MONBrd
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“HEALTHY”
Alarm
Off
“ALARM”
Suggestion
Blocking
damaged.
CPU module flash
memory damaged.
module
EEPROM
damaged.
4
LED
CPU module RAM
CPU
3
LED
Inform factory for
maintenance.
Yes
CPU module DSP
damaged.
MON module RAM
damaged.
MON module flash
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Chapter 4 Supervision,Metering and Recording
No.
Information
(LCD message)
Description
LED
LED
“HEALTHY”
Alarm
Suggestion
Blocking
memory damaged.
MON
7
Alm_EEPROM_MONBrd
module
EEPROM
damaged.
8
Alm_DSP_MONBrd
MON module DSP
damaged.
Sampled values are
9
Alm_Sample_CPUBrd
different
between
DSP1 and DSP2 in
CPU module.
Sampled values are
10
Alm_Sample_MonBrd
different
between
DSP1 and DSP2 in
MON module.
Alarm is issued on
11
Alm_MONBrd
MON module but
not issued on CPU
module.
12
Alm_PM_DSP1_CPUBrd
13
Alm_PM_DSP2_CPUBrd
Setting
of
DSP1
of
DSP2
error.
Setting
error.
Binary inputs are
14
Alm_BI_CPUBrd
different
CPU
between
and
MON
module.
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Chapter 4 Supervision,Metering and Recording
Information
No.
Description
(LCD message)
Protection
has
15
Alm_InvalidSetting
LED
Alarm
Suggestion
Blocking
setting
not
been
modified
after
modification
rated
LED
“HEALTHY”
of
Modify and check
Off
“ALARM”
protection
setting
Yes
again.
secondary
current of CT.
16
17
Alm_PwrLoss_Opto
Alm_TripOutput
Power
supply
of
opto-coupler lost.
Check if its power
Off
“ALARM”
circuit is connected
Yes
correctly.
Binary
output
driving
transistor
Inform factory for
Off
“ALARM”
On
“ALARM”
Note 1
no
Off
“ALARM”
nothing
Yes
damaged.
maintenance.
Yes
CPU module can
18
Alm_InnerComm
not
communicate
with MON module.
19
Alm_ModifiedSetting
Setting
is
being
modified.
Disagreement
between pickup of
20
Alm_InconsistFD
corresponding fault
detectors
in
Check
On
“ALARM”
NO
modules CPU and
sampled
value on CPU
and MON.
MON.
21
Alm_PersistFD_CPUBrd
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Pickup
of
fault
detectors in CPU
On
“ALARM”
NO
Check
secondary
63
Chapter 4 Supervision,Metering and Recording
No.
Information
(LCD message)
Description
module
lasts
LED
LED
“HEALTHY”
Alarm
Suggestion
for
circuit
more than 10 s.
Pickup
22
Alm_PersistFD_MONBrd
of
Blocking
and
settings.
fault
detectors in MNG
module
lasts
for
more than 10 s.
Where:
Note1: Check connection between modules CPU and MON. Check software version of MON. Inform factory for maintenance if needed.
4.2.11.3 CT/VT circuit failure alarms
When CT or VT circuit failure is detected, part protection functions probably be disabled and others can still work, which alarms can be viewed in
event recording report.
Table 4.2-3 CT or VT alarms
No.
64
Information
(LCD message)
1
Alm_CTS_Bak_HVS
2
Alm_CTS_HVS
3
Alm_CTS_Br11
4
Alm_CTS_Br21
Description
LED
“HEALTHY”
Alarm LED
Blocking
Suggestion
CT circuit or current sampling circuit of
HV side for backup protection fails.
CT circuit or current sampling circuit of
HV side for main protection fails.
CT circuit or current sampling circuit of
branch A1 fails.
On
“CT ALARM”
“ALARM”
No
Check
sampled
value
and
CT
secondary circuit.
CT circuit or current sampling circuit of
branch A2 fails.
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Chapter 4 Supervision,Metering and Recording
No.
Information
(LCD message)
5
Alm_CTS_Br12
6
Alm_CTS_Br22
7
Alm_CTS_Br13
8
Alm_CTS_Br23
9
Alm_VTS_HVS
10
Alm_VTS_Br11
11
Alm_VTS_Br12
12
Alm_VTS_Br13
13
Alm_VTS_Br21
14
Alm_VTS_Br22
15
Alm_VTS_Br23
16
Alm_Diff
17
Alm_REF_HVS
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Description
LED
“HEALTHY”
Alarm LED
Blocking
Suggestion
CT circuit or current sampling circuit of
branch A3 fails.
CT circuit or current sampling circuit of
branch B1 fails.
CT circuit or current sampling circuit of
branch B2 fails.
CT circuit or current sampling circuit of
branch B3 fails.
VT circuit or voltage sampling circuit of
HV side protection fails.
VT circuit or voltage sampling circuit of
branch A1 fails.
VT circuit or voltage sampling circuit of
branch A2 fails.
VT circuit or voltage sampling circuit of
branch A3 fails.
On
“VT ALARM”
“ALARM“
No
Check
sampled
value
and
VT
secondary circuit.
VT circuit or voltage sampling circuit of
branch B1 fails.
VT circuit or voltage sampling circuit of
branch B2 fails.
VT circuit or voltage sampling circuit of
branch B3 fails.
CT circuit or current sampling circuit of
differential protection is abnormal.
CT circuit or current sampling circuit of
“CT ALARM”
On
“ALARM
No
Check secondary
current circuit
REF protection at HV side is abnormal.
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Chapter 4 Supervision,Metering and Recording
No.
Information
(LCD message)
18
Alm_REF_Br1
19
Alm_REF_Br2
20
Alm_CTS_Diff
21
Alm_CTS_REF_HVS
22
Alm_CTS_REF_Br1
23
Alm_CTS_REF_Br1
Description
LED
Alarm LED
“HEALTHY”
Blocking
Suggestion
CT circuit or current sampling circuit of
REF protection at LV side A is abnormal.
CT circuit or current sampling circuit of
REF protection at LV side B is abnormal.
CT circuit or current sampling circuit of
differential protection fails.
CT circuit or current sampling circuit of
REF protection at HV side fails.
CT circuit or current sampling circuit of
“CT ALARM”
On
“ALARM
Note 2
Note I
REF protection at LV side A fails l.
CT circuit or current sampling circuit of
REF protection at LV side B fails.
Where:
Note 2: Differential protection will be blocked if logic setting [Opt_CTS_Blk_PcntDiff] is set as “1”.
Note I : De-energize binary input of enabling differential protection or REF protection and check secondary circuit. After return to normal condition,
please reboot the equipment.
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Chapter 4 Supervision,Metering and Recording
4.2.11.4 Protection abnormality alarms
When protection abnormalities are detected, abnormality alarms will be issued and signal contact
will operate. The alarms can be viewed in event recording report. In the case, LED “HEALTH”will
still be steady green and equipment is not blocked. Please treat it according to operation code.
Table 4.2-4 Protection abnormality alarms
No.
1
Information
Alarm
Description
(LCD message)
LED
Alm_InitCool1_OvLd_HVS
Stage 1 of overload for cooling initiating picks up.
Off
Alm_InitCoo2_OvLd_HVS
Stage 2 of overload for cooling initiating picks up.
Off
2
Alm_BlkOLTC_OvLd_HVS
Overload blocking on-load tap change picks up.
Off
3
Alm_OvLd_HVS
Overload alarm is issued.
4
Alm_PoleDisagr_CB
Pole disagreement alarm is issued.
5
Alm_OvExc
Overexcitation alarm is issued.
6
Alm_ROV_Br1
Zero-sequence overvoltage of A side alarm is
7
Alm_ROV_Br2
Zero-sequence overvoltage of B side alarm is
8
Alm_BI_SOTF_Br11
Binary input of enabling accelerating tripping of
9
Alm_BI_SOTF_Br12
Binary input of enabling accelerating tripping of
10
Alm_BI_SOTF_Br13
Binary input of enabling accelerating tripping of
11
Alm_BI_SOTF_Br21
Binary input of enabling accelerating tripping of
12
Alm_BI_SOTF_Br22
Binary input of enabling accelerating tripping of
13
Alm_BI_SOTF_Br23
Binary input of enabling accelerating tripping of
“ALARM”
4.2.11.5 Trip element information
When protection operates, the operation information will be displayed on LCD and logged as
operation record at same time, which can be viewed in operation recording report. In this case,
LED “HEALTHY”will still be steady green and no alarm LED will be turned on without equipment
being blocked. Please treat them according to operation code.
Table 4.2-5 Trip element information
No.
Information
Description
(LCD message)
1
Op_InstDiff
Unrestrained instantaneous differential protection operates.
2
Op_SensPcntDiff
Percentage differential protection operates.
3
Op_UnsensPcntDiff
High setting percentage differential protection operates.
4
Op_InstREF_HVS
5
Op_SensPcntREF_HVS
HV side zero-sequence percentage differential protection operates.
6
Op_UnsensPcntREF_HVS
HV side high setting zero-sequence differential protection operates.
7
Op_InstREF_Br1
A side unrestrained instantaneous zero-sequence differential
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HV
side
unrestrained
instantaneous
zero-sequence
differential protection operates.
67
Chapter 4 Supervision,Metering and Recording
No.
Information
Description
(LCD message)
protection operates.
68
8
Op_SensPcntREF_Br1
A side zero-sequence percentage differential protection operates.
9
Op_UnsensPcntREF_Br1
A side high setting zero-sequence differential protection operates.
10
Op_InstREF_Br2
11
Op_SensPcntREF_Br2
B side zero-sequence percentage differential protection operates.
12
Op_UnsensPcntREF_Br2
B side high setting zero-sequence differential protection operates.
13
Op_OC1_HVS
HV side overcurrent protection stage 1 operates.
14
Op_OC2_HVS
HV side overcurrent protection stage 2 operates.
15
Op_PD1
HV side pole disagreement protection delay 1 operates.
16
Op_PD2
HV side pole disagreement protection delay 2 operates.
17
Op_OvExc
HV side definite time overexcitation protection operates.
18
Op_InvOvExc
HV side inverse time overexcitation protection operates.
19
Op_ROC11_HVS
20
Op_ROC12_HVS
21
Op_ROC21_HVS
22
Op_ROC22_HVS
23
Op_ROV_HVS
HV side zero-sequence overvoltage protection operates.
24
Op_ROC_Gap_HVS
HV side “gap”zero-sequence overcurrent protection operates.
25
Op_InvOC_HVS
HV side inverse time overcurrent protection operates.
26
Op_InvROC_HVS
27
Op_OC1_Br11
Overcurrent protection stage 1 of branch A1 operates.
28
Op_OC2_Br11
Overcurrent protection stage 2 of branch A1 operates.
29
Op_OC1_Br12
Overcurrent protection stage 1 of branch A2 operates.
30
Op_OC2_Br12
Overcurrent protection stage 2 of branch A2 operates.
31
Op_OC1_Br13
Overcurrent protection stage 1 of branch A3 operates.
32
Op_OC2_Br13
Overcurrent protection stage 2 of branch A3 operates.
33
Op_OC1_Br21
Overcurrent protection stage 1 of branch B1 operates.
34
Op_OC2_Br21
Overcurrent protection stage 2 of branch B1 operates.
35
Op_OC1_Br22
Overcurrent protection t stage 1 of branch B2 operates.
36
Op_OC2_Br22
Overcurrent protection stage 2 of branch B2 operates.
37
Op_OC1_Br23
Overcurrent protection stage 1 of branch B3 operates.
38
Op_OC2_Br23
Overcurrent protection stage 2 of branch B3 operates.
39
Op_InvOC_Br11
Inverse time overcurrent protection of branch A1 operates.
B
side
unrestrained
instantaneous
zero-sequence
differential protection operates.
Stage 1 with time delay 1 of HV side zero-sequence
overcurrent protection operates.
Stage 1 with time delay 2 of HV side zero-sequence
overcurrent protection operates.
Stage 2 with time delay 1 of HV side zero-sequence
overcurrent protection operates.
Stage 2 with time delay 2 of HV side zero-sequence
overcurrent protection operates.
Inverse time zero-sequence overcurrent protection at HV
side operates.
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Chapter 4 Supervision,Metering and Recording
No.
Information
Description
(LCD message)
40
Op_InvOC_Br21
Inverse time overcurrent protection of branchB1 operates.
41
Op_ROC1_Br1
A side zero-sequence overcurrent protection stage 1 operates.
42
Op_ROC2_Br1
A side zero-sequence overcurrent protection stage 2 operates.
43
Op_ROC1_Br2
B side zero-sequence overcurrent protection stage 1 operates.
44
Op_ROC2_Br2
B side zero-sequence overcurrent protection stage 2 operates.
45
TrpOutp1
Tripping out channel 1 is tripped.
46
TrpOutp2
Tripping out channel 2 is tripped.
47
TrpOutp3
Tripping out channel 3 is tripped.
48
TrpOutp4
Tripping out channel 4 is tripped.
49
TrpOutp5
Tripping out channel 5 is tripped.
50
TrpOutp6
Tripping out channel 6 is tripped.
51
TrpOutp7
Tripping out channel 7 is tripped.
52
TrpOutp8
Tripping out channel 8 is tripped.
53
TrpOutp9
Tripping out channel 9 is tripped.
54
TrpOutp10
Tripping out channel 10 is tripped.
55
TrpOutp11
Tripping out channel 11 is tripped.
56
TrpOutp12
Tripping out channel 12 is tripped.
4.2.11.6 Binary input change report
When binary input status changes, the change information will be displayed on LCD and logged
as binary input change report at the same time. For detailed shown information please refer to
section 7.3.5. In this case LED “HEALTHY”will still be steady green and no alarm LED will be
turned on without equipment being blocked. Please check the binary input to ensure its status
change.
Table 4.2-6
No
Information
(LCD message)
binary input change report
Description
1
EBI_Diff
Binary input of enabling transformer differential protection
2
EBI_PPF_Bak_HVS
Binary input of enabling HV side backup overcurrent protection
3
EBI_EF_Bak_HVS
Binary input of enabling HV side backup earth fault protection
4
EBI_EF_Gap_HVS
Binary input of enabling HV side backup “Gap”protection
5
EBI_REF_OvExc
Binary input of enabling restricted earth fault protection of HV side
6
EBI_PoleDisagr_HVS
Binary input of enabling HV side pole disagreement protection
7
EBI_Bak_Br11
Binary input of enabling backup overcurrent protection of branch A1
8
EBI_Bak_Br12
Binary input of enabling backup overcurrent protection of branch A2
9
EBI_Bak_Br13
Binary input of enabling backup overcurrent protection of branch A3
10
EBI_Bak_Br21
Binary input of enabling backup overcurrent protection of branch B1
11
EBI_Bak_Br22
Binary input of enabling backup overcurrent protection of branch B2
12
EBI_Bak_Br23
Binary input of enabling backup overcurrent protection of branch B3
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Chapter 4 Supervision,Metering and Recording
No
Information
Description
(LCD message)
13
EBI_EF_Br1
Binary input of enabling backup earth fault protection of A side
14
EBI_EF_Br2
Binary input of enabling backup earth fault protection of B side
15
EBI_REF_Br1
Binary input of enabling restricted earth fault protection of A side
16
EBI_REF_Br2
Binary input of enabling restricted earth fault protection of B side
17
EBI_OvExc
Binary input of enabling overexcitation protection
18
BI_PoleDisagr_CB
Binary input of HV side circuit breaker in pole disagreement
19
BI_ExTrp_Ctrl_PD2
20
BI_52b_CB_HVS
Binary input indicating HV side circuit breaker in open position
21
BI_SOTF_Br11
Binary input of enabling accelerating tripping of branch A1
22
BI_SOTF_Br12
Binary input of enabling accelerating tripping of branch A2
23
BI_SOTF_Br13
Binary input of enabling accelerating tripping of branch A3
24
BI_SOTF_Br21
Binary input of enabling accelerating tripping of branch B1
25
BI_SOTF_Br22
Binary input of enabling accelerating tripping of branch B2
26
BI_SOTF_Br23
Binary input of enabling accelerating tripping of branch B3
27
BI_Print
Binary input of initiating printing
28
BI_Pulse_GPS
Binary input of time synchronizing pulse input
29
BI_ResetTarget
Binary input of resetting latched tripping or alarm signal
30
BI_Reserve1
Binary input of spare binary input 1
31
BI_Reserve2
Binary input of spare binary input 2
32
MON.FD_Diff
33
MON.FD_Bak_HVS
34
MON.FD_OvExc
35
MON.FD_Bak_Br1
36
MON.FD_Bak_Br2
37
MON.FD_EF_Br1
38
MON.FD_EF_Br2
40
MON.FD_REF_Br1
41
MON.FD_REF_Br2
42
BI_PS_Opto_PwrBrd
43
BI_PS_Opto_BIOBrd
Binary input of protection trip contact input to initiate pole
disagreement protection
Virtual binary input/output, please refer to Table 5.6-2
4.3 Metering Function
RCS-985T performs continuous measurement of the analogue input quantities. The
measurement data shown below is displayed on the LCD of the relay front panel or on the local or
remote PC.
Equipment samples 24 points per cycle. Calculate the RMS value in each interval and LCD will be
updated every 0.5 second. The following system quantities are displayed in RMS values of the
70
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Chapter 4 Supervision,Metering and Recording
secondary side of CT and VT. This device has double CPU system (i.e. CPU and MON module),
so the sampled values of both modules will be displayed on LCD through different access menu.
NOTE: Ie and In mentioned in following sections are units. Ie is secondary rated current
of transformer and In is secondary rated current of CT.
NOTE: The quantities listed in following tables are to be displayed on LCD for RCS-985T,
but for a certain application, some of these quantities may be eliminated due of the scheme user
required, so please look up the devices on site for actual quantities displayed.
4.3.1 Measurement of differential protection
4.3.1.1 Measured values of differential current
Table 4.3-1 Measured current values of differential current
No.
Value
Meaning
Unit
1
Id
differential current of differential protection
Ie
2
Ir
restraint current of differential protection
Ie
3
Id_2ndH
second harmonic of differential current
Ie
Path
VALUES CPU METERING DIFF METERING-> DIFF CURR
4.3.1.2 Ratio-corrected current of each side
Table 4.3-2 Corrected current values of each side
No.
Value
Meaning
1
Icorr_HVS1
2
Icorr_Br11
3
Icorr_Br21
three-phase current after being corrected of branch B1
Ie
of LV side
4
Icorr_Br12
three-phase current after being corrected of branch A2
of LV side
5
[Icorr_Br22
6
Icorr_Br13
7
Icorr_Br23
Path
VALUES CPU METERING DIFF METERING-> CORR CURR
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three-phase current after being corrected of HV side
Unit
three-phase current after being corrected of branch A1
of LV side
three-phase current after being corrected of branch B2
of LV side
three-phase current after being corrected of branch A3
of LV side
Ie
Ie
Ie
Ie
Ie
three-phase current after being corrected of branch B3
Ie
of LV side
71
Chapter 4 Supervision,Metering and Recording
4.3.1.3 Measured values of each side current
Table 4.3-3 Current values of each side
No.
Value
Meaning
Unit
1
I_HVS
three-phase current of HV side
A
2
I_Br11
three-phase current of branch A1of LV side
A
3
I_Br21
three-phase current of branch B1of LV side
A
4
I_Br12
three-phase current of branch A2of LV side
A
5
I_Br22
three-phase current of branch B2 of LV side
A
6
I_Br13
three-phase current of branch A3 of LV side
A
7
I_Br23
three-phase current of branch B3 of LV side
A
Path
VALUES CPU METERING DIFF METERING-> ALL SIDES CURR
4.3.2 Measurement of restricted earth fault protection
4.3.2.1 Measured values of restricted earth fault protection of HV side
Table 4.3-4 Values of REF of HV side
No.
Value
Meaning
Unit
1
Id_1stH_REF_HVS
fundamental component of zero-sequence differential
current of HV side
In
2
Ith_REF_HVS
zero-sequence threshold current of HV side
In
3
Ith_UnsensREF_HVS
4
Ir_REF_HVS
5
Id_2ndH_REF_HVS
6
Id_3rdH_REF_HVS
7
I0_HVS
8
I0_NP_HVS
Path
VALUES CPU METERING REF METERING->HVS
zero-sequence threshold current of high setting HV
side
restraint zero-sequence current HV side
second
harmonic
of
zero-sequence
In
In
differential
current HV side
third harmonic of zero-sequence differential current of
HV side
zero-sequence current derived from three-phase
current of HV side
zero-sequence current from neutral point CT of HV
side
In
In
In
In
4.3.2.2 Measured values of restricted earth fault protection of LV side A
Table 4.3-5 Values of REF of LV side A
No.
72
Value
Meaning
Unit
1
Id_1stH_REF_Br1
fundamental component of zero-sequence differential
current of LV side A
In
2
Ith_REF_ Br1
zero-sequence threshold current of LV side A
In
3
Ith_UnsensREF_ Br1
zero-sequence threshold current of high setting of LV
In
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Chapter 4 Supervision,Metering and Recording
side A
4
Ir_REF_ Br1
restraint zero-sequence current of LV side A
In
5
Id_2ndH_REF_ Br1
second harmonic of
current of LV side A
In
6
Id_3rdH_REF_ Br1
7
I0_ Br11
8
I0_ Br12
zero-sequence current derived from three-phase
current of branch A2
In
9
I0_ Br13
zero-sequence current derived from three-phase
current of branch A3
In
10
I0_NP_ Br1
Path
VALUES CPU METERING REF METERING->BR1
zero-sequence
differential
third harmonic of zero-sequence differential current of
LV side A
zero-sequence current derived from three-phase
current of branch A1
zero-sequence current from neutral point CT of LV
side A
In
In
In
4.3.2.3 Measured values of restricted earth fault protection of LV side B
Table 4.3-6 Values of REF of LV side B
No.
Value
Meaning
Unit
fundamental component of zero-sequence differential
1
Id_1stH_REF_Br2
2
Ith_REF_ Br2
3
Ith_UnsensREF_ Br2
4
Ir_REF_ Br2
5
Id_2ndH_REF_ Br2
6
Id_3rdH_REF_ Br2
third harmonic of zero-sequence differential current of
LV side B
In
7
I0_ Br21
zero-sequence current derived from three-phase
current of branch B1
In
8
I0_ Br22
9
I0_ Br23
10
I0_NP_ Br2
Path
VALUES CPU METERING REF METERING->BR2
NR ELECTRIC CO., LTD.
current of LV side B
zero-sequence threshold current of LV side B
zero-sequence threshold current of high setting of LV
side B
restraint zero-sequence current of LV side B
second
harmonic
of
zero-sequence
differential
current of LV side B
zero-sequence current derived from three-phase
current of branch B2
zero-sequence current derived from three-phase
current of branch B3
zero-sequence current from neutral point CT of LV
side B
In
In
In
In
In
In
In
In
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Chapter 4 Supervision,Metering and Recording
4.3.3 Current and voltage of each side
4.3.3.1 The measured current values of HV side
Table 4.3-7 Values of HV side
No.
74
Value
Meaning
Unit
three-phase current of HV side which is the sum of
1
I_HVS
2
I1_HVS
positive sequence current of HV side
A
3
I2_HVS
negative sequence current of HV side
A
4
I0_HVS
5
I0_NP_HVS
zero-sequence current from neutral point CT of HV
side
A
6
I0_Gap_HVS
zero-sequence current from air gap CT of HV side
A
7
U_HVS
three-phase voltage of HV side
V
8
Upp_HVS
three phase-to-phase voltages of HV side
V
9
Uab_HVS
Phase A-to-phase B voltages of HV side
V
10
Ubc_HVS
phase B-to-phase C voltage of HV side
V
11
Uca_HVS
phase C-to-phase A voltage of HV side
V
12
U1_HVS
positive sequence voltage of HV side
V
13
U2_HVS
negative sequence voltage of HV side
V
14
U0_HVS
15
U0_DeltVT_HVS
broken-delta voltage of HV side
V
16
I_Bak_HVS
three-phase current for backup protection of HV side
A
17
I1_Bak_HVS
18
I2_Bak_HVS
19
I0_Bak_HVS
zero sequence current for backup protection of HV
side
20
Flag_VCE_HVS
symbol of voltage control element pickup of HV side
21
Flag_Dir_ROC_HVS
22
Accu_InvOC_HVS
23
Accu_InvROC_HVS
accumulation of inverse time
overcurrent protection of HV side
24
U/F_OvExc
overexcitation ratio U/F
%
25
Accu_InvOvExc
accumulation of inverse time overexitation
%
26
f
frequency of HV side voltage
branch 1 and 2
zero-sequence current derived from three-phase
current of HV side
zero-sequence voltage derived from three-phase
voltage of HV side
positive sequence current for backup protection of
HV side
negative sequence current for backup protection of
HV side
A
A
V
A
A
A
symbol of pickup of zero sequence direction element
of HV side
accumulation of inverse time overcurrent protection
of HV side
zero-sequence
%
%
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Chapter 4 Supervision,Metering and Recording
Path
VALUES CPU METERING HVS METERING
4.3.3.2 The measured values of each branch at LV side
The below tables gives all the information of branches of A side and B side at LV side.
Table 4.3-8 Values of branch A1 of LV side
No.
Value
Meaning
Unit
1
I_Br11
three-phase current of branch A1
A
2
I1_Br11
positive sequence current of branch A1
A
3
I2_Br11
negative sequence current of branch A1
A
4
I0_Br11
5
Upp_Br11
three phase-to-phase voltages of branch A1
V
6
Uab_Br11
phase A-to-phase B voltage of branch A1
V
7
Ubc_Br11
phase B-to-phase C voltage of branch A1
V
8
Uca_Br11
phase C-to-phase A voltage of branch A1
V
9
U1_Br11
positive sequence voltage of branch A1
V
10
U2_Br11
negative sequence voltage of branch A1
V
11
Flag_VCE_Br11
symbol of pickup of voltage control element of branch A1
12
Accu_InvOC_Br11
Path
VALUES CPU VALUESBR METERINGBR11
zero sequence current derived from three-phase current
of branch A1
accumulation of inverse time overcurrent protection of
branch A1
A
%
Table 4.3-9 Values of branch A2 of LV side
No.
Value
Meaning
Unit
1
I_Br12
three-phase current of branch A2
A
2
I1_Br12
positive sequence current of branch A2
A
3
I2_Br12
negative sequence current of branch A2
A
4
I0_Br12
5
Upp_Br12
three phase-to-phase voltages of branch A2
V
6
Uab_Br12
phase A-to-phase B voltage of branch A2
V
7
Ubc_Br12
phase B-to-phase C voltage of branch A2
V
8
Uca_Br12
phase C-to-phase A voltage of branch A2
V
9
U1_Br12
positive sequence voltage of branch A2
V
10
U2_Br12
negative sequence voltage of branch A2
V
11
Flag_VCE_Br12
symbol of pickup of voltage control element of branch A2.
Path
VALUES CPU VALUESBR METERINGBR12
NR ELECTRIC CO., LTD.
zero sequence current derived from three-phase current
of branch A2.
A
75
Chapter 4 Supervision,Metering and Recording
Table 4.3-10 Values of branch A3 of LV side
No.
Value
Meaning
Unit
1
I_Br13
three-phase current of branch A3
A
2
I1_Br13
positive sequence current of branch A3
A
3
I2_Br13
negative sequence current of branch A3
A
4
I0_Br13
5
Upp_Br13
three phase-to-phase voltages of branch A3
V
6
Uab_Br13
phase A-to-phase B voltage of branch A3
V
7
Ubc_Br13
phase B-to-phase C voltage of branch A3
V
8
Uca_Br13
phase C-to-phase A voltage of branch A3
V
9
U1_Br13
positive sequence voltage of branch A3
V
10
U2_Br13
negative sequence voltage of branch A3
V
11
Flag_VCE_Br13
symbol of pickup of voltage control element of branch A3
Path
VALUES CPU VALUESBR METERINGBR12
zero sequence current derived from three-phase current
of branch A3
A
Table 4.3-11 Values of A side
No.
Value
Meaning
Unit
1
I0_NP_Br1
zero-sequence current from neutral point CT of A side
A
2
U0_DeltVT_Br1
broken-delta voltage of A side
V
Path
VALUES CPU VALUESBR METERING BR1 ZERO SEQ
Table 4.3-12 Values of branch B1 of LV side
No.
76
Value
Meaning
Unit
1
I_Br21
three-phase current of branch B2
A
2
I1_Br21
positive sequence current of branch B2
A
3
I2_Br21
negative sequence current of branch B2
A
4
I0_Br21
5
Upp_Br21
three phase-to-phase voltages of branchB1
V
6
Uab_Br21
phase A-to-phase B voltage of branch B2
V
7
Ubc_Br21
phase B-to-phase C voltage of branch B2
V
8
Uca_Br21
phase C-to-phase A voltage of branch B2
V
9
U1_Br21
positive sequence voltage of branch B2
V
10
U2_Br21
negative sequence voltage of branch B2
V
11
Flag_VCE_Br21
symbol of pickup of voltage control element of branch B2
12
Accu_InvOC_Br21
accumulation of inverse time overcurrent protection of
branch A1
zero sequence current derived from three-phase current
of branch B2
A
%
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Chapter 4 Supervision,Metering and Recording
Path
VALUES CPU VALUESBR METERINGBR21
Table 4.3-13 Values of branch B2 of LV side
No.
Value
Meaning
Unit
1
I_Br22
three-phase current of branch B2
A
2
I1_Br22
positive sequence current of branch B2
A
3
I2_Br22
negative sequence current of branch B2
A
4
I0_Br22
5
Upp_Br22
three phase-to-phase voltages of branchB2
V
6
Uab_Br22
phase A-to-phase B voltage of branch B2
V
7
Ubc_Br22
phase B-to-phase C voltage of branch B2
V
8
Uca_Br22
phase C-to-phase A voltage of branch B2
V
9
U1_Br22
positive sequence voltage of branch B2
V
10
U2_Br22
negative sequence voltage of branch B2
V
11
Flag_VCE_Br22
symbol of pickup of voltage control element of branch B2.
Path
VALUES CPU VALUESBR METERINGBR22
zero sequence current derived from three-phase current
A
of branch B2
Table 4.3-14 Values of branch B3 of LV side
No.
Value
Meaning
Unit
1
I_Br23
three-phase current of branch B3
A
2
I1_Br23
positive sequence current of branch B3
A
3
I2_Br23
negative sequence current of branch B3
A
4
I0_Br23
5
Upp_Br23
three phase-to-phase voltages of branchB3
V
6
Uab_Br23
phase A-to-phase B voltage of branch B3
V
7
Ubc_Br23
phase B-to-phase C voltage of branch B3
V
8
Uca_Br23
phase C-to-phase A voltage of branch B3
V
9
U1_Br23
positive sequence voltage of branch B3
V
10
U2_Br23
negative sequence voltage of branch B3
V
11
Flag_VCE_Br23
symbol of pickup of voltage control element of branch B3
Path
VALUES CPU VALUESBR METERINGBR23
zero sequence current derived from three-phase current
A
of branch B3
Table 4.3-15 Values of B side
No.
1
Value
I0_NP_Br2
NR ELECTRIC CO., LTD.
Meaning
zero-sequence current from neutral point CT of B side
Unit
A
77
Chapter 4 Supervision,Metering and Recording
2
Path
U0_DeltVT_Br2
broken-delta voltage of B side
V
VALUES CPU VALUESBR METERING BR2 ZERO SEQ
4.3.4 Phase angle
There is no common reference vector for all phase angle calculation, for all angles are calculated
between two vectors respectively.
When sampled voltage is greater than 0.1Un and sampled current is greater than 0.2In, displayed
angles on LCD are accurate; otherwise its error may be too great to be reference for user because
of the tiny input current and voltage. Here, In and Un are rated secondary current of CT and
voltage of VT respectively.
4.3.4.1 Phase angle of current between HV and LV side
Table 4.3-16 Angle of current between HV and LV side
No.
Value
Meaning
Unit
1
φ_HVS_&_Br11
phase angle between HVS and branch A1 of LV side
°
2
φ_HVS_&_Br12
phase angle between HVS and branch A2 of LV side
°
3
φ_HVS_&_Br13
phase angle between HVS and branch A3 of LV side
°
4
φ_HVS_&_Br21
phase angle between HVS and branch B1 of LV side
°
5
φ_HVS_&_Br22
phase angle between HVS and branch B2 of LV side
°
6
φ_HVS_&_Br32
phase angle between HVS and branch B3 of LV side
°
Path
VALUES PHASE ANGLEBETWEEN SIDES
4.3.4.2 Phase angle of HV side
Table 4.3-17 Angle of between voltage and current of HV side
No.
Value
Meaning
Unit
1
φipp_Bak_HVS
phase angle between currents of HV backup CT
°
2
φipp_HVS
phase angle between currents of HV side
°
4
φvpp_HVS
phase angle between voltages of HV side
°
5
φvi_HVS
6
φvi0_HVS
Path
phase angle between the same-phase HVS voltages and
HVS currents got from backup bushing CT.
phase angle between the zero-sequence voltage and the
zero-sequence current of HV side.
°
°
VALUES PHASE ANGLEHVS
4.3.4.3 Phase angle of current of LV side A
Table 4.3-18 Angle of current of side A
No.
78
Value
Meaning
Unit
1
φipp_Br11
phase-to-phase angle of current of branch A1
°
2
φipp_Br12
phase-to-phase angle of current of branch A2
°
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Chapter 4 Supervision,Metering and Recording
3
Path
φipp_Br13
phase-to-phase angle of current of branch A3
°
VALUES PHASE ANGLEBR1
4.3.4.4 Phase angle of current of LV side B
Table 4.3-19 Angle of current of side B
No.
Value
Meaning
Unit
1
φipp_Br21
phase-to-phase angle of current of branch B1
°
2
φipp_Br22
phase-to-phase angle of current of branch B2
°
3
φipp_Br23
phase-to-phase angle of current of branch B3
°
Path
VALUES PHASE ANGLEBR2
4.3.4.5 Phase angle of restricted earth fault protection
Table 4.3-20 Angle of REF
No.
Value
Meaning
Unit
angle between zero-sequence current from neutral point
1
φi0_NP_HVS_&_HVS
CT of HV side and that derived from terminal
°
three-phase current of HV side
angle between zero-sequence current of A side from
2
φi0_NP_Br1_&_Br11
neutral point CT and that derived from terminal
°
three-phase current of branch A1
angle between zero-sequence current of A side from
3
φi0_NP_Br1_&_Br12
neutral point CT and that derived from terminal
°
three-phase current of branch A2
angle between zero-sequence current of A side from
4
φi0_NP_Br1_&_Br13
neutral point CT and that derived from terminal
°
three-phase current of branch A3
angle between zero-sequence current of B side from
5
φi0_NP_Br2_&_Br21
neutral point CT and that derived from terminal
°
three-phase current of branch B1
angle between zero-sequence current of B side from
6
φi0_NP_Br2_&_Br22
neutral point CT and that derived from terminal
°
three-phase current of branch B2
angle between zero-sequence current of B side from
7
φi0_NP_Br2_&_Br23
neutral point CT and that derived from terminal
three-phase current of branch B3
Path
VALUES PHASE ANGLE REF PHASE ANGLE
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79
Chapter 4 Supervision,Metering and Recording
4.4 Recording Function
4.4.1 General description
The RCS-985T provides the following recording functions:
Event recording
Fault and disturbance recording
Present recording
MON module recording
Event recording, fault recording and present recording functions are in CPU module. All the
recording can be viewed on local LCD (except waveform), by printing or through RCSPC software.
Please see the detailed steps in section 7.4.
However, MON module recording can be viewed only via RCSPC and wave analysis softwares.
4.4.2 Event recording
4.4.2.1 General description
Event recording includes abnormal report or change of binary input reports. The equipment can
store 32 pieces of each kind of report in no-volatile memory. The counters of both kinds of reports
are the same from 0 to 255.
4.4.2.2 Alarm report information
Failure alarms of automatic supervision
All failure alarms of self-supervision will be logged in event recording. For detailed alarm report,
please refer to section 4.2.11.2.
Equipment operating alarm
Abnormality, such as cooling initiation or secondary circuit failure, occurs during equipment
normal operation, which is logged as an event. Please refer to section 4.2.11.3 and section
4.2.11.4 for details.
Setting changes
Changing any setting of the relay is logged as an event.
4.4.2.3 Binary input change report information
If one or more of the binary inputs change, it is logged as an event. Please refer to section
4.2.11.6 for binary input reports.
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Chapter 4 Supervision,Metering and Recording
4.4.3 Fault recording
There are two kinds fault recording, one on CPU module and one on MON module respectively.
4.4.3.1 Fault recording on CPU module
The equipment can store 32 pieces of trip report and the latest 8 waveform in non-volatile memory.
If a new fault occurs when 32 faults have been stored or 8 fault waveform records, the oldest will
be overwritten by the latest one. The equipment stores actual samples that are taken at a rate of
24 samples per cycle.
The recording time before fault detector initiation is fixed at 2 cycles. The recording time after fault
detector initiation is fixed at 6 cycles without protection operation. If there is anyone protection
element operates, then the recording time will be prolonged to show 2 cycles waveform before
and 6 cycles waveform after the protection element trips.
Fault report information
(1) Date and time of fault occurrence
The time resolution is 1 ms using the relay internal clock. Initiating date and time is when a fault
detector picks up. Relative time is the time when protection element operates to trip after fault
detector picks up.
(2) Tripping mode
This shows the trip element, which is also called protection element. If no protection element
operates to trip but only equipment fault detector picks up, fault reports will record the title of fault
detector. Pease refer to section 4.2.11.5 for details trip elements.
(3) Tripping channel
The tripped output channels (i.e. tripped breaker) are also shown.
(4) Binary input
All binary inputs status before and after fault detector pickup are shown.
Fault waveform information
Each fault record consists of oscillograms of following items.
(1) differential current waveforms and waveforms of ratio-corrected current of each side
for current differential protection
The currents are corrected currents, which include differential current, HV side current and branch
A1, A2, A3, B1, B2 and B3 current.
(2) Waveforms of original current of each side
The currents are before being corrected, which include HV side current and branch A1, A2, A3, B1,
B2 and B3 current.
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Chapter 4 Supervision,Metering and Recording
(3) Waveforms of sampled current and voltage of HV side
(4) Waveforms of sampled current and voltage of each LV side branch
(5) Waveforms of sampled zero-sequence current of side A and B
(6) Waveforms of zero-sequence differential current and zero sequence current of each
side
time sequential diagram of tripping outputs
4.4.3.2 Fault recording on MON module
Fault recording function on MON module is different, which is more flexible and is specially used
to analyze the fault. Equipment can store 1 piece recoding waveform of the latest tripping in MON
module. If a new fault occurs, the last one will be overwritten by the latest one.
The recording persisting time can be 4 s (24 sample points per cycle) or 8 s (12 sample point per
cycle) by configuring the logic setting [Opt_Dur_WaveRec_MON]. There are two modes of
triggering recording, fault detector pickup or protection element tripping, which can be configured
through logic setting [Opt_WaveRec_MON].
Fault waveform information.
(1) Waveforms o f all analog sampled quantities
(2) Waveform of differential current
(3) Time sequential diagram of operation of various protection elements
(4) Time sequential diagram of tripping output channels
(5) All fault detectors picking up
(6) All alarms issued
4.4.4 Present recording
Equipment can only store 1 piece recoding waveform. If you want to record a new operation
waveform, the old one will be overwritten. The equipment stores actual samples that are taken at
a rate of 24 samples per cycle. The recording time is fixed at 4 cycles after manual triggering.
Present waveform information
(1) All binary i nputs status
(2) All phase angles
(3) differential current waveforms
(4) Waveforms of differential current of each side for current differential protection.
(5) Waveforms of current of each side
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Chapter 4 Supervision,Metering and Recording
(6) Waveforms of sampled current and voltage of HV side
(7) Waveforms of sampled current and voltage of each branch
(8) Waveforms of sampled zero-sequence current of side A and B
(9) Waveforms of zero-sequence differential current and zero sequence current of each
side
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Chapter 4 Supervision,Metering and Recording
84
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Chapter 5 Hardware Description
Chapter 5 Hardware Description
5.1 Hardware Function Introduction
5.1.1 Hardware function block diagram
AC current
and voltage
A/D
optocoupler
D SP1
D SP2
binary
status
input
CPLD
LPF
MMI
LC D
output
relay
C PU 1
C PU m odule
M M I-C PU
QDJ
com m ports and
port to printer
E+
MMI
± 24 V to
optic-coupler
A/D
D SP3
D SP4
MMI
C PU 2
+5 V
optocoupler
binary
status
input
CPLD
D C/DC
or 110 V
DC 220 V
LPF
± 12 V
+24 V
m anagem ent m odule
com m ports and
port to printer
Figure 5.1-1 Functional block diagram of RCS-985T
5.1.2 Brief description of operation
The equipment RCS-985T uses Motorola 32 bits monolithic microprocessor MC68332 as control
kernel for output logic and management functions, and high-speed digital signal processor DSP for
protection calculation. Sampling rate of the equipment is 24 points per cycle. Real time data are
processed parallely for all algorithms during whole process of fault. So the equipment can ensure
very high inherent reliability and security.
AC currents and voltages of CT and VT are transferred to low voltage signals by isolating
transformers and are inputted to CPU module and MON module. Data and logic are processed
respectively in these two modules with same hardware. The CPU module carries out functions of
protection algorithms, tripping logic, event record and printing. The MON module comprises
general fault detector and fault recorder. The fault detector will connect positive pole of power
supply of output relays after pickup. Format of the record is compatible with COMTRADE, and the
data recorded can be uploaded via separate serial port for communication or printing.
Power supply part is located in DC module. It converts DC 250/220/125/110 V into different DC
voltage levels needed by various modules of the equipment. DC module also comprises 24V and
250/220/125/110V opto-couplers for binary inputs.
AC current and voltage are converted to low voltage signals in modules AC1 and AC2. Two ratings
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Chapter 5 Hardware Description
of AC current are option, 1A or 5A. It shall be stated definitely during ordering and checked
during commissioning.
Binary outputs of tripping commands, tripping signal outputs and status binary input parts are
comprised in three modules: RLY, SIG1 and SIG2. 24V and 250/220/125/110V opto-couplers are
used here for binary input.
Briefly, the equipment is composed of eight modules to achieve the work of plant transformer
protection. The modules are AC voltage and current input module1 (AC1),AC current input
modules(AC2)
,management/record module(MON)、protection CPU module(CPU),power
supply module(DC)
,signal modules( SIG1 and SIG2),tripping contacts output(RLY), and human
machine interface(HMI).
5.2 Hardware Overview
5.2.1 Front panel interface layout
The RCS-985T is made of a single layer 10U height 19”chassis with 13 connectors on its rear.
Figure 5.2-1 shows their front view. The LCD, LED indicators, keypads and communication serial
ESC
GR P
port will be introduced in Chapter 7 in details
Figure 5.2-1 Front view of RCS-985T
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Chapter 5 Hardware Description
5.2.2 Rear panel interface layout
Figure 5.2-2 shows the rear view including connectors on it.
Figure 5.2-2 Rear view of RCS-985T
5.3 Connectors and Terminals
5.3.1 General description
There are 13 connectors for external connections mounted on rear panel of the equipment as
shown in Figure, of which, 10 connectors are 30 pins while 3 connectors are 18 pins.
Connectors with 30 pins are used for DC power supply, binary input, communication and printer,
tripping, alarm and other signal output and AC voltage input. Numbers of these connectors are 1A,
1B, 2A, 2B, 3A, 3B, 4B, 5B, 6B and 7B.
connectors.
Figure 5.3-1 a) shows layout of 30 pins of these
Connectors with 18 pins are used for AC voltage input and current input. Numbers of these
connectors are 7C, 8B and 8C. Figure 5.3-1 b) shows layout of pins of these connectors.
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Chapter 5 Hardware Description
1
3
2
5
4
7
6
9
8
11
10
13
12
15
14
16
17
19
18
21
20
23
22
25
24
27
26
29
28
30
1
3
5
7
9
11
13
15
17
2
4
6
8
10
12
14
16
18
a) connector with 30 pins
b) connector with 18 pins
Figure 5.3-1 layout of pins of two kinds of connectors
Each connector will be introduced in detail in the following sections.
5.3.2 Pins definition of ‘1A’connectors.
Connector 1A:
30 pins male connector for tripping output
Attention:
For showing the relation of each terminal clearly, the terminal’
s location shown in the Figure may
be different from the real physical location, and we needn’
t figure out the blank terminals are not
figured out.
1
3
2
5
4
7
6
9
8
11
10
13
12
15
14
17
16
19
18
21
20
23
22
25
24
27
26
29
28
30
Figure 5.3-2 Connector 1A of RCS-985T
Pin No.
Sign
Description
Binary output of tripping:
1A1,1A30
blank
1A3-1A5
BO_TrpOutp1-1
tripping output channel 1-1
1A7-1A9
BO_TrpOutp1-2
tripping output channel 1-2
1A11-1A13
BO_TrpOutp1-3
tripping output channel 1-3
1A15-1A17
BO_TrpOutp1-4
tripping output channel 1-4
1A19-1A 21
BO_TrpOutp2-1
tripping output channel 2-1
1A23-1A25
BO_TrpOutp2-2
tripping output channel 2-2
1A27-1A29
BO_TrpOutp2-3
tripping output channel 2-3
1A2-1A4
BO_TrpOutp3-1
tripping output channel 3-1
1A6-1A8
BO_TrpOutp3-2
tripping output channel 3-2
1A10-1A12
BO_TrpOutp3-3
tripping output channel 3-3
1A14-1A16
BO_TrpOutp3-4
tripping output channel 3-4
1A18-1A20
BO_TrpOutp4-1
tripping output channel 4-1
1A22-1A24
BO_TrpOutp4-2
tripping output channel 4-2
1A26-1A28
BO_TrpOutp5-1
tripping output channel 5-1
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Chapter 5 Hardware Description
5.3.3 Pins definition of ‘1B’connectors
Connector 1B:
1
30 pins male connector for tripping output
3
2
5
4
7
6
9
8
11
10
13
12
Figure 5.3-3
Pin No.
15
14
17
16
19
18
21
20
23
22
25
24
27
26
29
28
30
Connector 1B of RCS-985T
Sign
Description
Binary output of tripping:
1B1-1B3
BO_TrpOutp2-4
tripping output channel 2-4
1B5-1B7
BO_TrpOutp6-1
tripping output channel 6-1
1B9-1B11
BO_TrpOutp6-2
tripping output channel 6-2
1B13-1B15
BO_TrpOutp6-3
tripping output channel 6-3
1B17-1B19
BO_TrpOutp7-1
tripping output channel 7-1
1B21 -1B23
BO_TrpOutp8-1
tripping output channel 8-1
1B25-1B27
BO_TrpOutp9-1
tripping output channel 9-1
1B2-1B4
BO_TrpOutp5-2
tripping output channel 5-2
1B6-1B8
BO_TrpOutp5-3
tripping output channel 5-3
1B10-1B12
BO_TrpOutp5-4
tripping output channel 5-4
1B14-1B16
BO_TrpOutp11-1
tripping output channel 11-1
1B18-1B20
BO_TrpOutp11-2
tripping output channel 11-2
1B22-1B24
BO_TrpOutp12-1
tripping output channel 12-1
1B26-1B28
BO_TrpOutp12-2
tripping output channel 12-2
1B29-1B30
BO_TrpOutp10-1
tripping output channel 10-1
5.3.4 Ping definition of ‘2A’connectors
Connector 2A:
30 pins male connector for signal output
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Chapter 5 Hardware Description
Figure 5.3-4 Connector 2A of RCS-985T
Pin No.
Sign
Description
Binary output of annunciation signal:
2A1
common terminal 1
common terminal 1
2A1-2A3
BO_Diff
transformer differential protection tripping
HV
2A1-2A5
BO_BakProt_HVS
side
backup
protection
tripping,
including
phase-to-phase fault protection, earth fault protection,
gap earth fault protection and pole disagreement
protection
2A1-2A7
BO_REF_Br1
REF protection of A side tripping
2A1-2A9
BO_REF_HVS
REF protection of HV side tripping
2A1-2A11
BO_OvExc
transformer overexcitation protection tripping
2A1-2A13
BO_REF_Br2
REF protection of B side tripping
2A15
common terminal 2
common terminal 2
2A15-2A17
BO_BakProt_Br11
backup overcurrent protection of branch A1 tripping
2A15-2A19
BO_BakProt_Br21
backup overcurrent protection of branch B1 tripping
2A15-2A21
BO_EF_Br1
backup earth fault protection of A side tripping
2A15-2A23
BO_EF_Br2
backup earth fault protection of B side tripping
Binary output of remote signal:
2A2
common terminal 1
common terminal 1
2A2-2A 6
BO_Diff
transformer differential protection tripping
HV
2A2-2A10
BO_BakProt_HVS
side
backup
protection
tripping,
including
phase-to-phase fault protection, earth fault protection,
gap earth fault protection and pole disagreement
protection
2A2-2A14
BO_REF_Br1
REF protection of A side tripping
2A2-2A18
BO_REF_HVS
REF protection of HV side tripping
2A2-2A22
BO_OvExc
transformer overexcitation protection tripping
2A2-2A26
BO_REF_Br2
REF protection of B side tripping
2A30
common terminal 2
common terminal 2
2A30-2A25
BO_BakProt_Br11
backup overcurrent protection of branch A1 tripping
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Chapter 5 Hardware Description
Pin No.
Sign
Description
2A30-2A27
BO_BakProt_Br21
backup overcurrent protection of branch B1 tripping
2A30-2A29
BO_EF_Br1
backup earth fault protection of A side tripping
Binary output of FDR signal (fault and disturbance recording signal):
2A4
common terminal 1
common terminal 1
2A4-2A 8
BO_Diff
transformer differential protection tripping
HV
2A4-2A12
BO_BakProt_HVS
side
backup
protection
tripping,
including
phase-to-phase fault protection, earth fault protection,
gap earth fault protection and pole disagreement
protection
2A4-2A16
BO_REF_Br1
REF protection of A side tripping
2A4-2A20
BO_REF_HVS
REF protection of HV side tripping
2A4-2A24
BO_OvExc
transformer overexcitation protection tripping
2A4-2A28
BO_REF_Br2
REF protection of B side tripping
5.3.5 Pins definition of ‘2B’connectors
Connector 2B:
30 pins male connector for status input (via 24 V opto-coupler)
Figure 5.3-5
Pin No.
Connector 2B of RCS-985T
Sign
Description
Binary output of remote signal:
2A30
common terminal 2
common terminal 2
2A30-2B1
BO_EF_Br2
backup earth fault protection of B side tripping
Binary output of FDR signal:
2B3
common terminal 2
common terminal 2
2B3-2B5
BO_BakProt_Br11
backup overcurrent protection of branch A1 tripping
2B3-2B2
BO_BakProt_Br21
backup overcurrent protection of branch B1 tripping
2B3-2B4
BO_EF_Br1
backup earth fault protection of A side tripping
2B3-2B6
BO_EF_Br2
backup earth fault protection of B side tripping
Binary input (via 24 V opto-coupler) :
2B29
Opto_L+
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positive pole of DC power supply for 24 V opto-coupler
91
Chapter 5 Hardware Description
Pin No.
Sign
Description
2B30
Opto_L-
negative pole of DC power supply for 24V opto-coupler
2B7
EBI_Diff
2B8
EBI_OvExc
enabling binary input of
2B9
blank
blank
2B10
EBI_PoleDisagr_HVS
2B11
EBI_PPF_Bak_HVS
2B12
EBI_Bak_Br11
2B13
EBI_EF_Bak_HVS
2B14
EBI_Bak_Br12
2B15
EBI_EF_Gap_HVS
2B16
EBI_Bak_Br13
2B17
EBI_Bak_Br22
2B18
EBI_Bak_Br21
2B19
EBI_REF_HVS
2B20
BI_ResetTarget
2B21
EBI_REF_BR2
2B22
EBI_Bak_Br23
2B23
EBI_REF_BR1
2B24
EBI_EF_Br1
2B25
blank
2B26
EBI_EF_Br2
2B27
blank
blank
2B28
blank
blank
Enabling
binary
input
of
transformer
differential
protection
overexcitation protection
enabling binary input of
HV side pole disagreement
protection
enabling binary input of
HV side backup overcurrent
protection
enabling binary input of
backup overcurrent protection of
branch A1
enabling binary input of
HV side backup earth fault
protection
enabling binary input of
backup overcurrent protection of
branch A2
enabling binary input of
HV side backup “gap”protection
enabling binary input of
backup overcurrent protection of
branch A3
enabling binary input of
backup overcurrent protection of
branch B2
enabling binary input of
backup overcurrent protection of
branch B1
enabling binary input of
restricted earth fault protection of
HV side
resetting latched tripping or alarm signal
enabling binary input of
restricted earth fault protection of
B side
enabling binary input of
backup overcurrent protection of
branch B3
enabling binary input of
restricted earth fault protection of
A side
enabling binary input of
backup earth fault protection of A
side
blank
enabling binary input of
backup earth fault protection of B
side
5.3.6 Pins definition of ‘3A’connectors
Connector 3A:
92
30 pins male connector for signal and alarm output
NR ELECTRIC CO., LTD.
Chapter 5 Hardware Description
Figure 5.3-6 Connector 3A of RCS-985T
Pin No.
Sign
Description
Binary output of annunciation signal:
3A1
common terminal
common terminal
3A1-3A3
BO_Fail
equipment being blocked
3A1-3A5
BO_Alm_Abnor
equipment alarm
3A1-3A7
BO_Alm_CTS
CT circuit failure alarm
3A1-3A9
BO_Alm_VTS
VT circuit failure alarm
3A1-3A11
BO_Alm_OvLd
overload alarm
3A1-3A13
BO_Alm_ROV_Br1
zero-sequence overvoltage alarm of A side
3A1-3A15
BO_Alm_ROV_Br2
zero-sequence overvoltage alarm of B side
3A1-3A17
BO_Alm_PD_HVS
pole disagreement alarm
3A1-3A19
BO_Alm_BI_SOTF
alarm of enabling accelerating tripping binary input
3A1-3A21
BO_Alm_Resv3
spare alarm contact 3 for future application
3A1-3A23
BO_Alm_Resv2
spare alarm contact 2 for future application
3A1-3A25
BO_Alm_OvExc
Overexcitation protection alarm
Binary output of remote signal:
3A2
common terminal
common terminal
3A2-3A4
BO_Fail
equipment being blocked
3A2-3A6
BO_Alm_Abnor
equipment alarm
3A2-3A8
BO_Alm_CTS
CT circuit failure alarm
3A2-3A10
BO_Alm_VTS
VT circuit failure alarm
3A2-3A12
BO_Alm_OvLd
overload alarm
3A2-3A14
BO_Alm_ROV_Br1
zero sequence overvoltage alarm of A side
3A2-3A16
BO_Alm_ROV_Br2
zero sequence overvoltage alarm of B side
3A2-3A18
BO_Alm_PD_HVS
pole disagreement alarm
3A2-3A20
BO_Alm_BI_SOTF
alarm of enabling accelerating tripping binary input
3A2-3A22
BO_Alm_Resv3
spare alarm contact 3 for future application
3A2-3A24
BO_Alm_Resv2
spare alarm contact 2 for future application
3A2-3A26
BO_Alm_OvExc
overexcitation protection alarm
Binary output of abnormality contact:
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Pin No.
Sign
Description
3A27-3A29
BO_Alm_Resv1-1
spare abnormality contact 1-1 for future application
3A28-3A30
BO_Alm_Resv1-2
spare abnormality contact 1-2 for future application
5.3.7 Pins definition of ‘3B’connectors
Connector 3B:
30 pins male connector for alarm and other output
Figure 5.3-7
Pin No.
Connector 3B of RCS-985T
Sign
Description
Binary output of abnormality contact:
3B2
blank
blank
3B1-3B3
BO_Alm_InitCool1_OvLd_1
cooling initiating contact 1-1
3B5-3B7
BO_Alm_InitCool1_OvLd_2
cooling initiating contact 1-2
3B9-3B11
BO_Alm_BlkOLTC_OvLd_1
3B13-B15
BO_Alm_BlkOLTC_OvLd_2
3B17-3B19
BO_Alm_InitCool2_OvLd_1
cooling initiating contact 2-1
3B21-3B23
BO_Alm_InitCool2_OvLd_2
cooling initiating contact 2-2
3B25-3B27
BO_Alm_Resv2-1
spare abnormality contact 2-1 for future application
3B29-3B30
BO_Alm_Resv2-2
spare abnormality contact 2-2 for future application
binary output contact 1 for blocking onload tap
changing during overload
binary output contact 2 for blocking onload tap
changing during overload
Binary output of FDR signal:
3B4
common terminal
common terminal
3B4-3B6
BO_Alm_CTS
CT circuit failure alarm
3B4-3B8
BO_Alm_VTS
VT circuit failure alarm
3B4-3B10
BO_Alm_OvLd
overload alarm
3B4-3B12
BO_Alm_ROV_Br1
zero sequence overvoltage alarm of A side
3B4-3B14
BO_Alm_ROV_Br2
zero sequence overvoltage alarm of B side
3B4-3B16
BO_Alm_PD_HVS
pole disagreement alarm
3B4-3B18
BO_Alm_BI_SOTF
alarm of enabling accelerating tripping binary input
3B4-3B20
BO_Alm_Resv3
spare alarm contact 3 for future application
3B4-3B22
BO_Alm_Resv2
spare alarm contact 2 for future application
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Chapter 5 Hardware Description
Pin No.
Sign
Description
3B4-3B24
BO_Alm_OvExc
Overexcitation protection alarm
3B4-3B26
BO_Fail
equipment being blocked
3B4-3B28
BO_Alm_Abnor
equipment alarm
5.3.8 Pins definition of ‘4B’connectors
Connector 4B:30 pins male connector for status input
Figure 5.3-8 Connector 4B of RCS-985T
Pin No.
Sign
Description
Binary output of abnormality contact
4B16
Opto_L-
negative pole of DC 24V for 24 V opto-coupler
4B17
Opto_L+
positive pole of DC 24V for 24 V opto-couple
4B25
Pwr+
positive pole of DC power supply of equipment
4B27
Pwr-
negative pole of DC power supply of equipment
4B29, 4B30
GND
ground of chassis
Binary input (via 24 V opto-coupler):
4B1
BI_PoleDisagr_CB
4B2
BI_ExTrp_Ctrl_PD2
4B5
BI_52b_CB_HVS
4B11
BI_SOTF_Br13
enabling accelerating tripping of branch A3
4B12
BI_SOTF_Br23
enabling accelerating tripping of branch B3
4B13
BI_Print
initiating printing
4B14
BI_Pulse_GPS
time synchronizing pulse input
4B3
BI_Reserved1
Spare binary input 1 for future application
4B4
BI_Reserved2
Spare binary input 2 for future application
4B6,
BI_Reserved3
Spare binary input 3 for future application
4B7
BI_Reserved4
Spare binary input 4 for future application
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HV side circuit breaker in pole disagreement
protection
trip
contact
input
to
initiate
pole
disagreement protection
binary input indicating HV side circuit breaker in open
position
95
Chapter 5 Hardware Description
Pin No.
Sign
Description
4B8
BI_Reserved5
Spare binary input 5 for future application
4B9
BI_Reserved6
Spare binary input 6 for future application
4B10
BI_Reserved7
Spare binary input 7 for future application
Binary input (via 250/220/125/110V opto-coupler):
4B19
BI_SOTF_Br11
enabling accelerating tripping of branch A1
4B20
BI_SOTF_Br12
enabling accelerating tripping of branch A2
4B21
BI_SOTF_Br22
enabling accelerating tripping of branch B2
4B22
BI_SOTF_Br21
enabling accelerating tripping of branch B1
4B15,4B18
blank
4B24, 4B26,
blank
4B28
5.3.9 Pins definition of ‘5B/6B’connectors
Connector 5B, 6B: 30 pins male connector for communication
NOTE: The definition of connector 5B is same as that of 6B.
Figure 5.3-9
Pin No.
Sign
Connect or 5B, 6B of RCS-985T
Description
5B1/6B1
A
clock synchronizing pulse input, RS-485 A
5B3/6B3
B
clock synchronizing pulse input, RS-485 B
5B5/6B5
A
communication RS-485 port1 A
5B7/6B7
B
communication RS-485 port1 B
5B9/6B9
A
communication RS-485 port2 A
5B11/6B11
B
communication RS-485 port2 B
5B21/6B21
TXD
printer RS232 port, Tx
5B23/6B23
RXD
printer RS232 port, Rx
5B27/6B27
SGND
ground of communication port
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Chapter 5 Hardware Description
5.3.10 Pins definition of ‘7B’connectors
Connector 7B:
30 pins for voltage input
Figure 5.3-10 Connector 7B of RCS-985T
Pin No.
Description
7B1
UA, phase A of three-phase voltage channel 1 (polarity mark)
7B2
UA’
, phase A of three-phase voltage channel 1
7B3
UB, phase B of three-phase voltage channel 1 (polarity mark)
7B4
UB’
, phase C of three-phase voltage channel 1
7B5
UC, phase C of three-phase voltage channel 1 (polarity mark)
7B6
UC’
, phase C of three-phase voltage channel 1
7B7
U0, zero-sequence voltage channel 1 (polarity mark)
7B 8
Un, zero-sequence voltage channel 1
7B9/7B10
UAB, phase A-to-phase B voltage of branch channel 4
7B11/7B12
UBC, phase B-to-phase C voltage of branch channel 4
7B13/7B14
UAB, phase A-to-phase B voltage of branch channel 3
7B15/7B16
UBC, phase B-to-phase C voltage of branch channel 3
7B17/7B18
UAB, phase A-to-phase B voltage of branch channel 2
7B19/7B20
UBC, phase B-to-phase C voltage of branch channel 2
7B21/7B22
UAB, phase A-to-phase B voltage of branch channel 1
7B23/7B24
UBC, phase B-to-phase C voltage of branch channel 1
7B25
U0, zero-sequence voltage channel 2 (polarity mark)
7B26
Un, zero-sequence voltage channel 2
7B27
U0, zero-sequence voltage channel 3 (polarity mark)
7B28
Un, zero-sequence voltage channel 3
7B29
U0, zero-sequence voltage channel 4 (polarity mark)
7B30
Un, zero-sequence voltage channel 4
7B1-8 have alternative definitions as shown in following table and please see details in section
5.5.2.
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Chapter 5 Hardware Description
Pin No.
Description
7B1/7B2
UAB, phase A-to-phase B voltage of branch channel 6
7B3/7B4
UBC, phase B-to-phase C voltage of branch channel 6
7B5/7B6
UAB, phase A-to-phase B voltage of branch channel 5
7B7/7B8
UBC, phase B-to-phase C voltage of branch channel5
5.3.11 Pins definition of ‘7C’connectors
Connector 7C:
18 pins for current input
Figure 5.3-11
Pin No.
Connector 7C of RCS-985T
Description
7C1
IA’
, phase A of three-phase current channel 7
7C2
IA, phase A of three-phase current channel 7 (polarity mark)
7C3
IB’
, phase B of three-phase current channel 7
7C4
IB, phase B of three-phase current channel 7 (polarity mark)
7C5
IC’
, phase C of three-phase current channel 7
7C6
IC, phase C of three-phase current channel 7 (polarity mark)
7C7
IAN, phase A of three-phase current channel 8
7C8
IA, phase A of three-phase current channel 8 (polarity mark)
7C9
IB’
, phase B of three-phase current channel 8
7C10
IB, phase B of three-phase current channel 8 (polarity mark)
7C11
IC’
, phase C of three-phase current channel 8
7C12
IC, phase C of three-phase current channel 8 (polarity mark)
7C13
I0’
, zero-sequence current channel 3
7C14
I0, zero-sequence current channel 3 (polarity mark)
7C15
I0’of zero-sequence current channel 2
7C16
I0 of zero-sequence current channel 2 (polarity mark)
7C17
I0’
, zero-sequence current channel 1
7C18
I0, zero-sequence current channel 1 (polarity mark)
7C7-12 have alternative definitions as shown in following table and please see details in section
5.5.2.
Pin No.
98
Description
7C7
I0’
, zero-sequence current channel 6
7C8
I0, zero-sequence current channel 6 (polarity mark)
7C9
I0’
, zero-sequence current channel 5
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Chapter 5 Hardware Description
Pin No.
Description
7C10
I0, zero-sequence current channel 5 (polarity mark)
7C11
I0’
, zero-sequence current channel 4
7C12
I0, zero-sequence current channel 4 (polarity mark)
5.3.12 Pins definition of ‘8B’connectors
Connector 8B:
18 pins for current input
Figure 5.3-12 Connector 8B of RCS-985T
Pin No.
Description
8B1
IA’
, phase A of three-phase current channel 1
8B2
IA, phase A of three-phase current channel 1 (polarity mark)
8B3
IB’
, phase B of three-phase current channel 1
8B4
IB, phase B of three-phase current channel 1 (polarity mark)
8B5
IC’
, phase C of three-phase current channel 1
8B6
IC, phase C of three-phase current channel 1 (polarity mark)
8B7
IA’
, phase A of three-phase current channel 2
8B8
IA, phase A of three-phase current channel 2 (polarity mark)
8B9
IB’
, phase B of three-phase current channel 2
8B10
IB, phase B of three-phase current channel 2 (polarity mark)
8B11
IC’
, phase C of three-phase current channel 2
8B12
IC, phase C of three-phase current channel 2 (polarity mark)
8B13
IA’
, phase A of three-phase current channel 3
8B14
IA, phase A of three-phase current channel 3 (polarity mark)
8B15
IB’
, phase B of three-phase current channel 3
8B16
IB, phase B of three-phase current channel 3 (polarity mark)
8B17
IC’
, phase C of three-phase current channel 3
8B18
IC, phase C of three-phase current channel 3 (polarity mark)
5.3.13 Pins definition of ‘8C’connectors
Connector 8C:
18 pins for current input
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Chapter 5 Hardware Description
Figure 5.3-13 Connector 8C of RCS-985T
Pin No.
Description
8C1
IA’
, phase A of three-phase current channel 4
8C2
IA, phase A of three-phase current channel 4 (polarity mark)
8C3
IB’
, phase B of three-phase current channel 4
8C4
IB, phase B of three-phase current channel 4 (polarity mark)
8C5
IC’
, phase C of three-phase current channel 4
8C6
IC, phase C of three-phase current channel 4 (polarity mark)
8C7
IA’
, phase A of three-phase current channel 5
8C8
IA, phase A of three-phase current channel 5 (polarity mark)
8C9
IB’
, phase B of three-phase current channel 5
8C10
IB, phase B of three-phase current channel 5 (polarity mark)
8C11
IC’
, phase C of three-phase current channel 5
8C12
IC, phase C of three-phase current channel 5 (polarity mark)
8C13
IA’
, phase A of three-phase current channel 6
8C14
IA, phase A of three-phase current channel 6 (polarity mark)
8C15
IB’
, phase B of three-phase current channel 6
8C16
IB, phase B of three-phase current channel 6 (polarity mark)
8C17
IC’
, phase C of three-phase current channel 6
8C18
IC, phase C of three-phase current channel 6 (polarity mark)
5.4 Tripping Matrix
There are 12 groups of tripping relays and 29 tripping output contacts totally in RCS-985T. Those
contacts are all instantaneous contacts. Making current of contact is 5 A. These tripping relays are
controlled by tripping matrix, and every protection element has its independent tripping matrix
which can be configured though corresponding logic setting to provide flexible tripping mode for
the protection.
Logic setting of tripping matrix consists of sixteen binary digits but four hexadecimal digits can be
viewed through device LCD screen. Every bit represents a group of tripping relays. When a
protection element operates, the relay group will output if the corresponding bit is set as “1”and
will not output if the bit is set as “0”. Corresponding bit, relay group name and number of contacts
of s of tripping matrix are as follows.
Table 5.4-1 Table of output contacts number of tripping channel
100
NR ELECTRIC CO., LTD.
Chapter 5 Hardware Description
bit
output relay group name
Explanation
number of contacts
1
this function enabled
2
TrpOutp1
tripping output channel 1
4
3
TrpOutp 2
tripping output channel 2
4
4
TrpOutp 3
tripping output channel 3
4
5
TrpOutp 4
tripping output channel 4
2
6
TrpOutp 5
tripping output channel 5
4
7
TrpOutp 6
tripping output channel 6
3
8
TrpOutp 7
tripping output channel 7
1
9
TrpOutp 8
tripping output channel 8
1
10
TrpOutp 9
tripping output channel 9
1
11
TrpOutp 10
tripping output channel 10
1
12
TrpOutp 11
tripping output channel 11
2
13
TrpOutp 12
tripping output channel 12
2
14
No definition
15
No definition
16
No definition
5.5 Application of Current and Voltage Channels
Before commission, all protection CT or VT must have their own channel definition. That mean we
must select current channel for CT and voltage channel for VT by configuring the corresponding
logic settings via RCSPC software. Without correct channel selection, the sampled value
displayed on LCD will be wrong.
5.5.1 Channel list
All AC voltage and current input channels can be configured flexibly, which are on connector 7B,
7C, 8B and 8C. The detailed channel type and number are in following table. The maximum
number of the channel means the maximum available inputs of this type.
Table 5.5-1 Table of all channels list
No
Channel name
Maximum number
1
three-phase current channel
8
2
three-phase voltage channel
1
3
branch voltage channel
6
4
zero-sequence voltage channel
4
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101
Chapter 5 Hardware Description
5
zero-sequence current channel
6
There are implicit configuring settings for selecting channel for voltage and current input and
please see section 6.2.3 for details.
NOTE: Channel selection usually has been fixed on design drawing for each project.
5.5.2 Alternative definition of some channels
Generally, each channel has only one definition, but some channels have alternative definition, so
the following must be read carefully before configuring the logic setting of channel selection. Only
one definition can be selected simultaneously.
(1) Terminal pins 7B1-7B8 on 7B connector
a) First kind of definition as section 5.3.11 shows
7B1
UA, phase A of three-phase voltage channel 1 (polarity mark)
7B2
UA’
, phase A of three-phase voltage channel 1
7B3
UB, phase B of three-phase voltage channel 1 (polarity mark)
7B4
UB’
, phase C of three-phase voltage channel 1
7B5
UC, phase C of three-phase voltage channel 1 (polarity mark)
7B6
UC’
, phase C of three-phase voltage channel 1
7B7
U0, zero-sequence voltage channel 1 (polarity mark)
7B8
Un, zero-sequence voltage channel 1
b) Second kind of definition
7B1/7B2
UAB, phase A-to-phase B voltage of branch channel 6
7B3/7B4
UBC, phase B-to-phase C voltage of branch channel 6
7B5/7B6
UAB, phase A-to-phase B voltage of branch channel 5
7B7/7B8
UBC, phase B-to-phase C voltage of branch channel 5
(2) Terminal pins 7C7-7C12 on connector 7C
a) First definition as section 5.3.12 shows
7C7
IA’
, phase A of three-phase current channel 8
7C8
IA, phase A of three-phase current channel 8 (polarity mark)
7C9
IB’
, phase B of three-phase current channel 8
7C10
IB, phase B of three-phase current channel 8 (polarity mark)
7C11
IC’
, phase C of three-phase current channel 8
102
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Chapter 5 Hardware Description
7C12
IC, phase C of three-phase current channel 8 (polarity mark)
b) Secondary definition
7C7
I0’
, zero-sequence current channel 6
7C8
I0, zero-sequence current channel 6 (polarity mark)
7C9
I0’, zero-sequence current channel 5
7C10
I0, zero-sequence current channel 5 (polarity mark)
7C11
I0’
, zero-sequence current channel 4
7C12
I0, zero-sequence current channel 4 (polarity mark)
5.5.3 Alternative selection between two kinds of channel
Some voltage and current input channels share the same position of isolating transformer on AC
module. Therefore, only one group channel can be used in this case.
(1) 7B9/10/11/12/13/14 phase-to-phase voltage channels & 7C1/2/3/4/5/6 three-phase current
channel 7. Only one kind channel can be used simultaneously.
(2) 7B25/26/27/28/29/30 phase-to-phase voltage channels & 7C7/8/9/10/11/12 three-phase
current channel 8. Only one kind channel can be used simultaneously.
NOTE: The selection of above channels must be confirmed before placing an order.
5.6 Input and Output Signals
5.6.1 Binary input signals
All binary inputs of equipment are listed in the following tables.
5.6.1.1 Binary input signals from relay external
Table 5.6-1 Binary input of equipment from external
No.
Signal name
Pin No.
Module
1
EBI_Diff
2B7
SIG1
2
EBI_PPF_Bak_HVS
2B11
SIG1
3
EBI_EF_Bak_HVS
2B13
SIG1
4
EBI_EF_Gap_HVS
2B15
SIG1
5
EBI_REF_HVS
2B19
SIG1
NR ELECTRIC CO., LTD.
Function when energized
enabling
binary
input
of
transformer
differential protection
enabling binary input of HV side backup
overcurrent protection
enabling binary input of HV side backup
earth fault protection
enabling binary input of HV side backup
“gap”protection
enabling binary input of restricted earth
fault protection of HV side
103
Chapter 5 Hardware Description
104
6
EBI_PoleDisagr_HVS
2B10
SIG1
7
EBI_Bak_Br11
2B12
SIG1
8
EBI_Bak_Br12
2B14
SIG1
9
EBI_Bak_Br13
2B16
SIG1
10
EBI_Bak_Br21
2B18
SIG1
11
EBI_Bak_Br22
2B17
SIG1
12
EBI_Bak_Br23
2B22
SIG1
13
EBI_EF_Br1
2B24
SIG1
14
EBI_EF_Br2
2B26
SIG1
15
EBI_REF_Br1
2B23
SIG1
16
EBI_REF_Br2
2B21
SIG1
17
EBI_OvExc
2B8
SIG1
18
BI_PoleDisagr_CB
4B1
DC
19
BI_ExTrp_Ctrl_PD2
4B2
DC
20
BI_52b_CB_HVS
4B5
DC
21
BI_SOTF_Br11
4B19
DC
22
BI_SOTF_Br12
4B20
DC
23
BI_SOTF_Br13
4B11
DC
24
BI_SOTF_Br21
4B22
DC
25
BI_SOTF_Br22
4B21
DC
26
BI_SOTF_Br23
4B12
DC
27
BI_Print
4B13
DC
enabling binary input of HV side pole
disagreement protection
enabling binary input of backup overcurrent
protection of branch A1
enabling binary input of backup overcurrent
protection of branch A2
enabling binary input of backup overcurrent
protection of branch A3
enabling binary input of backup overcurrent
protection of branch B1
enabling binary input of backup overcurrent
protection of branch B2
enabling binary input of backup overcurrent
protection of branch B3
enabling binary input of backup earth fault
protection of A side
enabling binary input of backup earth fault
protection of B side
enabling binary input of restricted earth
fault protection of A side
enabling binary input of restricted earth
fault protection of B side
enabling binary input of overexcitation
protection
Binary input indicating HV side circuit
breaker in pole disagreement state
protection trip contact input to initiate pole
disagreement protection
Binary input indicating HV side circuit
breaker in open position state
Binary input indicating SOFT protection of
branch A1 operation
Binary input indicating SOFT protection of
branch A2 operation
Binary input indicating SOFT protection of
branch A3 operation
Binary input indicating SOFT protection of
branch B1 operation
Binary input indicating SOFT protection of
branch B2 operation
Binary input indicating SOFT protection of
branch B3 operation
Push botton binary input used for initiating
printing
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Chapter 5 Hardware Description
28
BI_Pulse_GPS
4B14
DC
time synchronizing pulse input
29
BI_ResetTarget
2B20
SIG1
30
BI_Reserve1
4B3
DC
spare binary input 1
31
BI_Reserve2
4B4
DC
spare binary input 2
Binary input used for resetting latched
tripping or alarm signal
5.6.1.2 Virtual binary input/output signals from relay inner
Following virtual binary inputs/outputs are from relay inner, which are supervised by relay
automatically.
Table 5.6-2 Virtual binary input/output from inside relay
No.
Signal name
Meaning
Status is”1” when fault detector of transformer differential
1
MON.FD_Diff
protection picks up, including current differential protection and
REF protection of HV side.
2
Status is”1”when fault detector of overexcitation protection picks
MON.FD_OvExc
up.
Status is”1”when fault detector of HV side backup protection picks
3
up, including phase-tophase fault protection, earth fault protection,
MON.FD_Bak_HVS
gap earth fault protection, overexcitation and pole disagreement
protections.
Status is “1”when fault detector of backup earth fault protection of
4
MON.FD_EF_Br1
5
MON.FD_EF_Br2
6
MON.FD_Bak_Br1
7
MON.FD_Bak_Br2
8
MON.FD_REF_Br1
9
MON.FD_REF_Br2
10
BI_PS_Opto_BIOBrd
11
BI_PS_Opto_PwrBrd
LV side A picks up.
Status is “1”when fault detector of backup earth fault protection of
LV side B picks up.
Status is”1”when fault detector of backup overcurrent protection
of LV side A picks up
Status is”1”when fault detector of backup overcurrent protection
of LV side B picks up
Status is “1”when fault detector of restricted earth fault protection
of LV side A picks up.
Status is “1”when fault detector of restricted earth fault protection
of LV side B picks up.
Status is “1”when opto-coupler circuits on SIG2module are in
normal condition after relay is energized.
Status is “1”when opto-coupler circuits on DC module are in
normal condition after relay is energized.
5.6.2 Binary Output Signals
All binary outputs of equipment are listed in the following table.
Table 5.6-3 Binary outputs of equipment
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105
Chapter 5 Hardware Description
No.
Signal name
Pin No.
Module
Contents
Binary outputs of local signal contact:
1
BO_Diff
2A1-2A3
SIG1
transformer differential protection tripping
HV side backup protection tripping, including
2
BO_BakProt_HVS
2A1-2A5
SIG1
phase-to-phase fault protection, earth fault
protection, gap earth fault protection and
pole disagreement protection
3
BO_REF_Br1
2A1-2A7
SIG1
REF protection of A side tripping
4
BO_REF_HVS
2A1-2A9
SIG1
REF protection of HV side tripping
5
BO_OvExc
2A1-2A11
SIG1
transformer overexcitation protection tripping
6
BO_REF_Br2
2A1-2A13
SIG1
REF protection of B side tripping
7
BO_BakProt_Br11
2A15-2A17
SIG1
8
BO_BakProt_Br21
2A15-2A19
SIG1
9
BO_EF_Br1
2A15-2A21
SIG1
10
BO_EF_Br2
2A15-2A23
SIG1
11
BO_Fail
3A1-3A3
SIG
equipment being blocked
12
BO_Alm_Abnor
3A1-3A5
SIG
equipment alarm
13
BO_Alm_CTS
3A1-3A7
SIG
CT circuit failure alarm
14
BO_Alm_VTS
3A1-3A9
SIG
VT circuit failure alarm
15
BO_Alm_OvLd
3A1-3A11
SIG
overload alarm
16
BO_Alm_ROV_Br1
3A1-3A13
SIG
zero-sequence overvoltage alarm of A side
17
BO_Alm_ROV_Br2
3A1-3A15
SIG
zero-sequence overvoltage alarm of B side
18
BO_Alm_PD_HVS
3A1-3A17
SIG
pole disagreement alarm
19
BO_Alm_BI_SOTF
3A1-3A19
SIG
20
BO_Alm_Resv3
3A1-3A21
SIG
spare alarm contact 3 for future application
21
BO_Alm_Resv2
3A1-3A23
SIG
spare alarm contact 2 for future application
22
BO_Alm_OvExc
3A1-3A25
SIG
Overexcitation protection alarm
SIG1
transformer differential protection tripping
backup overcurrent protection of branch A1
tripping
backup overcurrent protection of branch B1
tripping
backup earth fault protection of A side
tripping
backup earth fault protection of B side
tripping
alarm of enabling accelerating tripping binary
input
Binary outputs of remote signal
23
BO_Diff
2A2-2A6
HV side backup protection tripping, including
24
BO_BakProt_HVS
2A2-2A10
SIG1
phase-to-phase fault protection, earth fault
protection, gap earth fault protection and
pole disagreement protection
25
BO_REF_Br1
2A2-2A14
SIG1
REF protection of A side tripping
26
BO_REF_HVS
2A2-2A18
SIG1
REF protection of HV side tripping
27
BO_OvExc
2A2-2A22
SIG1
transformer overexcitation protection tripping
106
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Chapter 5 Hardware Description
No.
Signal name
Pin No.
Module
Contents
28
BO_REF_Br2
2A2-2A26
SIG1
REF protection of B side tripping
29
BO_BakProt_Br11
2A30-2A25
SIG1
30
BO_BakProt_Br21
2A30-2A27
SIG1
31
BO_EF_Br1
2A30-2A29
SIG1
32
BO_EF_Br2
2A30-2B1
SIG1
33
BO_Fail
3A2-3A4
SIG2
equipment being blocked
34
BO_Alm_Abnor
3A2-3A6
SIG2
equipment alarm
35
BO_Alm_CTS
3A2-3A8
SIG2
CT circuit failure alarm
36
BO_Alm_VTS
3A2-3A10
SIG2
VT circuit failure alarm
37
BO_Alm_OvLd
3A2-3A12
SIG2
overload alarm
38
BO_Alm_ROV_Br1
3A2-3A14
SIG2
zero sequence overvoltage alarm of A side
39
BO_Alm_ROV_Br2
3A2-3A16
SIG2
zero sequence overvoltage alarm of B side
40
BO_Alm_PD_HVS
3A2-3A18
SIG2
pole disagreement alarm
41
BO_Alm_BI_SOTF
3A2-3A20
SIG2
42
BO_Alm_Resv3
3A2-3A22
SIG2
spare alarm contact 3 for future application
43
BO_Alm_Resv2
3A2-3A24
SIG2
spare alarm contact 2 for future application
44
BO_Alm_OvExc
3A2-3A26
SIG2
overexcitation protection alarm
SIG1
transformer differential protection tripping
backup overcurrent protection of branch A1
tripping
backup overcurrent protection of branch B1
tripping
backup earth fault protection of A side
tripping
backup earth fault protection of B side
tripping
alarm of enabling accelerating tripping binary
input
Binary output of event record:
45
BO_Diff
2A4-2A8
HV side backup protection tripping, including
46
BO_BakProt_HVS
2A4-2A12
SIG1
phase-to-phase fault protection, earth fault
protection, gap earth fault protection and
pole disagreement protection
47
BO_REF_Br1
2A4-2A16
SIG1
REF protection of A side tripping
48
BO_REF_HVS
2A4-2A20
SIG1
REF protection of HV side tripping
49
BO_OvExc
2A4-2A24
SIG1
transformer overexcitation protection tripping
50
BO_REF_Br2
2A4-2A28
SIG1
REF protection of B side tripping
51
BO_BakProt_Br11
2B3-2B5
SIG1
52
BO_BakProt_Br21
2B3-2B2
SIG1
53
BO_EF_Br1
2B3-2B4
SIG1
54
BO_EF_Br2
2B3-2B6
SIG1
55
BO_Alm_CTS
3B4-3B6
SIG2
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backup overcurrent protection of branch A1
tripping
backup overcurrent protection of branch B1
tripping
backup earth fault protection of A side
tripping
backup earth fault protection of B side
tripping
CT circuit failure alarm
107
Chapter 5 Hardware Description
No.
Signal name
Pin No.
Module
Contents
56
BO_Alm_VTS
3B4-3B8
SIG2
VT circuit failure alarm
57
BO_Alm_OvLd
3B4-3B10
SIG2
overload alarm
58
BO_Alm_ROV_Br1
3B4-3B12
SIG2
zero sequence overvoltage alarm of A side
59
BO_Alm_ROV_Br2
3B4-3B14
SIG2
zero sequence overvoltage alarm of B side
60
BO_Alm_PD_HVS
3B4-3B16
SIG2
pole disagreement alarm
61
BO_Alm_BI_SOTF
3B4-3B18
SIG2
62
BO_Alm_Resv3
3B4-3B20
SIG2
spare alarm contact 3 for future application
63
BO_Alm_Resv2
3B4-3B22
SIG2
spare alarm contact 2 for future application
64
BO_Alm_OvExc
3B4-3B24
SIG2
overexcitation protection alarm
65
BO_Fail
3B4-3B26
SIG2
equipment being blocked
66
BO_Alm_Abnor
3B4-3B28
SIG2
equipment alarm
3B1-3B3
SIG2
cooling initiating contact 1-1
3B5-3B7
SIG2
cooling initiating contact 1-2
3B9-3B11
SIG2
3B3-B15
SIG2
3B17-3B19
SIG2
cooling initiating contact 2-1
3B21-3B23
SIG2
cooling initiating contact 2-2
alarm of enabling accelerating tripping binary
input
Binary output of abnormality contact
67
68
69
70
71
72
BO_Alm_InitCool1_
OvLd_1
BO_Alm_InitCool1_
OvLd_2
BO_Alm_BlkOLTC_
OvLd_1
BO_Alm_BlkOLTC_
OvLd_2
BO_Alm_InitCool2_
OvLd_1
BO_Alm_InitCool2_
OvLd_2
73
BO_Alm_Resv2-1
3B25-3B27
SIG2
74
BO_Alm_Resv2-2
3B29-3B30
SIG2
75
BO_Alm_Resv1-1
3A27-3A39
SIG2
76
BO_Alm_Resv1-2
3A28-3A30
SIG2
binary output contact 1 for blocking onload
tap changing during overload
binary output contact 2 for blocking onload
tap changing during overload
spare abnormality contact 2-1 for future
application
spare abnormality contact 2-2 for future
application
spare abnormality contact 1-1 for future
application
spare abnormality contact 1-2 for future
application
Binary outputs of tripping contact:
77
BO_TrpOutp1-1
1A3-1A5
RLY
tripping output channel 1-1
78
BO_TrpOutp1-2
1A7-1A9
RLY
tripping output channel 1-2
79
BO_TrpOutp1-3
1A11-1A13
RLY
tripping output channel 1-3
80
BO_TrpOutp1-4
1A15-1A17
RLY
tripping output channel 1-4
81
BO_TrpOutp2-1
1A19-1A 21
RLY
tripping output channel 2-1
82
BO_TrpOutp2-2
1A23-1A25
RLY
tripping output channel 2-2
108
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Chapter 5 Hardware Description
No.
Signal name
Pin No.
Module
Contents
83
BO_TrpOutp2-3
1A27-1A29
RLY
tripping output channel 2-3
84
BO_TrpOutp2-4
1B1-1B3
RLY
tripping output channel 2-4
85
BO_TrpOutp3-1
1A2-1A4
RLY
tripping output channel 3-1
86
BO_TrpOutp3-2
1A6-1A8
RLY
tripping output channel 3-2
87
BO_TrpOutp3-3
1A10-1A12
RLY
tripping output channel 3-3
88
BO_TrpOutp3-4
1A14-1A16
RLY
tripping output channel 3-4
89
BO_TrpOutp4-1
1A18-1A20
RLY
tripping output channel 4-1
90
BO_TrpOutp4-2
1A22-1A24
RLY
tripping output channel 4-2
91
BO_TrpOutp5-1
1A26-1A28
RLY
tripping output channel 5-1
92
BO_TrpOutp 5-2
1B2-1B4
RLY
tripping output channel 5-2
93
BO_TrpOutp 5-3
1B6-1B8
RLY
tripping output channel 5-3
94
BO_TrpOutp 5-4
1B10-1B12
RLY
tripping output channel 5-4
95
BO_TrpOutp 6-1
1B5-1B7
RLY
tripping output channel 6-1
96
BO_TrpOutp 6-2
1B9-1B11
RLY
tripping output channel 6-2
97
BO_TrpOutp 6-3
1B13-1B15
RLY
tripping output channel 6-3
98
BO_TrpOutp 7-1
1B17-1B19
RLY
tripping output channel 7-1
99
BO_TrpOutp 8-1
1B21-1B23
RLY
tripping output channel 8-1
100
BO_TrpOutp 9-1
1B25-1B27
RLY
tripping output channel 9-1
101
BO_TrpOutp 10-1
1B29-1B30
RLY
tripping output channel 10-1
102
BO_TrpOutp 11-1
1B14-1B16
RLY
tripping output channel 11-1
103
BO_TrpOutp 11-2
1B18-1B20
RLY
tripping output channel 11-2
104
BO_TrpOutp 12-1
1B22-1B24
RLY
tripping output channel 12-1
105
BO_TrpOutp 12-2
1B26-1B28
RLY
tripping output channel 12-2
5.6.3 Communication input
Communication inputs of equipment are listed in following table.
Table 5.6-4 Communication ports of equipment
Pin No.
Sign
5B1(6B1)
A
5B3(6B3)
B
5B5(6B5)
A
5B7(6B7)
B
5B9(6B9)
A
5B11(6B11)
B
5B21(6B21)
TX
5B23(6B23)
RX
5B27(6B27)
SGND
NR ELECTRIC CO., LTD.
Description
clock synchronizing pulse input, RS-485
RS485 communication port1 with substation automation system
RS485 communication port2 with substation automation system
RS232 Communication port with printer
ground of communication port
109
Chapter 5 Hardware Description
110
NR ELECTRIC CO., LTD.
Chapter 4 Supervision,Metering and Recording
Chapter 6 Settings
The RCS-985T has two setting groups for protection to coordinate with the mode of power system
operation, one of which is assigned to be active. However, equipment parameters and system
parameters are common for all protection setting groups.
NOTE: The setting items listed in following tables are settings for RCS-985T, but for a
certain application, some of following setting items may be eliminated due of the scheme
user required, so please refer to specified complementary documentation of each project
for this instruction manual for each project for setting items displayed on your equipment.
NOTE: All current settings in this chapter are secondary current converted from primary
current by reference CT ratio. Zero sequence current or voltage setting is configured
according to 3I0 or 3U0 and negative sequence current setting according to I2 or U2.
6.1 Equipment Settings
6.1.1 Settings list
Table 6.1-1 List of equipment settings
No.
Symbol
Range
1
Setting_Group
0~1
2
Equip_ID
6 characters maximum
3
Comm_Addr
0~255
4
COM1_Baud
5
COM2_Baud
6
Printer_Baud
7
Protocol
Step
1
Default
0
BYQ001
1
1.2/2.4/4.8/9.6/14.4/19.2/38.4
kbit/s
1.2/2.4/4.8/9.6/14.4/19.2/38.4
kbit/s
1.2/2.4/4.8/9.6/14.4/19.2/38.4
kbit/s
0000-FFFF
1
19.2 kbit/s
19.2 kbit/s
9.6k bit/s
0041
logic setting “1”- enable, “0”–disable
8
En_Auto_Print
0/1
0
9
En_Net_Print
0/1
0
10
En_Remote_Cfg
0/1
0
11
GPS_Pulse
0/1
0
NOTE: Symbols of the parameter listed in above table are used for communication,
printing and displaying on LCD.
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6.1.2 Explanation of the parameters and notice for setting
1.
No.1-- [Setting_Group]
Two setting groups can be configured for the equipment, and only one is active at a time. However,
equipment parameters and system parameters are common for all protection setting groups.
2.
No.2-- [Equip_ID]
The setting consists of ASCII codes, which is as identification for report printing only. It can be
configured according to the name or number of transformer.
3.
No.3-- [Comm_Addr]
The address used for the host computer to identify the equipment, usually provided by substation
system. If the equipment is not connected to monitor system, equipment address may be random.
4.
No.4-- [COM1_Baud]
The baud rate of serial port 1 shall be selected from specified rang.
5.
No.5-- [COM2_Baud]
The baud rate of serial port 2 shall be selected from specified rang.
6.
No.6--[ Printer_Baud]
The baud rate used for printer port shall be selected from specified rang.
7.
No.7-- [Protocol]
The logic setting consists of sixteen binary digits but four hexadecimal digits can be viewed
through device LCD screen. Every digit has a dedicated meaning and some digits have no
definition.
11
10
9
8
7
6
5
4
3
2
1
0
A: 103
12
A: LFP
13
A: MODBUS
14
B: 103
15
B: LFP
Bit
B: MODBUS
Following definition will be seen on PC through RCSPC software.
The definitions of digits are:
Table 6.1-2 Definition of logic setting of communication protocol
Bit
248
Definition
0
communication port A using protocol IEC 60870-5-103
1
communication port A using proprietary protocol LFP
2
communication port A using MODBUS protocol
3
No definition
4
communication port B using protocol IEC 60870-5-103
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Bit
Definition
5
communication port B using proprietary protocol LFP
6
communication port B using MODBUS protocol
7~15
No definition
For example, if logic setting [Protocol] is set as “0011”, it means communication both port A and B
both use IEC 60870-5-103 protocol.
8.
No.8-- [En_Auto_Print]
This setting shall be set as “1”if automatic report printing is expected after the relay operates
when a fault occurs. Otherwise it shall be set as “0”. It is suggested that the user may set this
parameter of the equipment as “1”(i.e. automatic printing), if the equipment is always connected
directly with a printer, or set as “0”(i.e. not automatic printing) if the equipment is connected with a
printer by a switch on panel.
9.
No.9-- [En_Net_Print]
Set it as “1”if shared network printer is used for printing. Set it as “0”if dedicated printer is used.
Network printer means several protection equipments share one printer through a printer
management unit and RS-485 port. Dedicated printer means the protection equipment connected
with a printer through RS232 port directly.
10. No.10--[ En_Remote_Cfg]
Set it as “0”if only local configuration is permitted. Set it as “1”if local and remote configurations
are both permitted.
11. No.11-- [GPS_Pulse]
Set it as “1”for minute pulse and “0”for second pulse.
6.1.3 Setting path
Access path in menu is:
Main Menu -> SETTING -> EQUIP SETTINGS -> [setting symbol]
6.2 System Settings
6.2.1 Logic settings of configuring functions
6.2.1.1 Settings list
No.
Symbol
Range
Default
1
En_Diff
0/1
0
2
En_PPF_HVS
0/1
0
3
En_EF_HVS
0/1
0
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No.
Symbol
Range
Default
4
En_EF_Gap_HVS
0/1
0
5
En_OvExc
0/1
0
6
En_PoleDisagr_HVS
0/1
0
7
En_REF_HVS
0/1
0
8
En_Bak_Br11
0/1
0
9
En_Bak_Br12
0/1
0
10
En_Bak_Br13
0/1
0
11
En_Bak_Br21
0/1
0
12
En_Bak_Br22
0/1
0
13
En_Bak_Br23
0/1
0
14
En_EF_Br1
0/1
0
15
En_EF_Br2
0/1
0
16
En_REF_Br1
0/1
0
17
En_REF_Br2
0/1
0
18
Reserved (#)
0/1
0
19
En_TestMode (#)
0/1
0
NOTE: Symbols of the parameter listed in above table are used for communication,
printing and displaying on LCD. Setting marked with “#”means that it is can not be seen
on LCD or by printing and only can be seen through RCSPC software.
6.2.1.2 Explanation of the parameters and notice for setting
1.
No.1-- [En_Diff]
This logic setting is used for configuration of protection functions. Setting it as “1”means the
transformer differential protection is enabled and setting as “0”means the protection is disabled.
2.
No.2-- [En_PPF_HVS]
This logic setting is used to enable HV side backup overcurrent protection.
3.
N0.3-- [En_EF_HVS]
This logic setting is used to enable HV side backup earth fault protection.
4.
No.4-- [En_EF_Gap_HVS]
This logic setting is used to enable HV side backup gap protection.
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5.
No.5-- [En_OvExc]
This logic setting is used to enable HV side overexcitation protection.
6.
No.6-- [En_PoleDisagr_HVS]
This logic setting is used to enable HV side pole disagreement protection.
7.
No.7-- [En_REF_HVS]
This logic setting is used to enable HV side restricted earth fault protection. .
8.
No.8-- [En_Bak_Br11]
This logic setting is used to enable backup overcurrent protection of branch A1.
9.
No.9-- [En_Bak_Br12]
This logic setting is used to enable backup overcurrent protection of branch A2.
10. No.10-- [En_Bak_Br13]
This logic setting is used to enable backup overcurrent protection of branch A3.
11. No.11-- [En_Bak_Br21]
This logic setting is used to enable backup overcurrent p rotection of branch B1.
12. No.12-- [En_Bak_Br22]
This logic setting is used to enable backup overcurrent protection of branch B2.
13. No.13-- [En_Bak_Br23]
This logic setting is used to enable backup overcurrent protection of branch B3.
14. No.14-- [En_EF_Br1]
This logic setting is used to enable zero-sequence overcurrent protection of LV side A.
15. No.15-- [En_EF_Br2]
This logic setting is used to enable zero-sequence overcurrent protection of LV side B.
16. No.16-- [En_EF_Br1]
This logic setting is used to enable restricted earth fault protection of LV side A.
17. No.17-- [En_EF_Br2]
This logic setting is used to enable restricted earth fault protection of LV side B.
18. No.18--[Reserved] (#)
Spare logic setting of future protection function and no used at present.
19. No.19-- [En_TestMode] (#)
This logic setting is configured especially for equipment debugging status, which can not be seen
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on LCD of the equipment but only be configured through RCSPC software.
“1”: enable sending all tripping contacts signals, protection tripping signals, alarm signals and
monitoring signals through DBU2000 software.
“0”: disable the function mentioned above.
Note:
No.19 setting must be set as “0”before equipment is put into operation.
6.2.1.3 Setting path
All logic settings of configuring functions are accessible in the following path:
MAIN MENU -> SETTINGS -> SYSTEM SETTINGS ->PROT CONFIG-> [setting symbol]
6.2.2 Transformer system parameters
After one selects current and voltage channel according to design diagram and projection actual
situation, next step is to configure transformer system parameters. Please note voltage or current
setting of channel selecting in implicit configuration settings is almost corresponding to the setting
of ratio of VT or CT except few ones which will be mentioned in detailed setting in section 6.2.2.3.
One can locate the corresponding setting and configure it.
6.2.2.1 Setting list
No.
248
Symbol
Range
Step
Default
1
Sn
0–6000.0 MVA
0.1 MVA
370
2
U1n_HVS
0 –600.00 kV
0.01 kV
220
3
U1n_Br1
0 –600.00 kV
0.01 kV
20
4
U1n_Br2
0 –600.00 kV
0.01 kV
20
5
U1n_VT_HVS
0 –600.00 kV
0.01 kV
127.02
6
U2n_VT_HVS
57.74 – 110.00 V
0.01 V
110
7
U2n_DeltVT_HVS
33.33 –330 V
0.01 V
110
8
U1n_VT_Br1
0 –600.00 kV
0.01 kV
3.46
9
U2n_VT_Br1
57.74 – 110.00 V
0.01 V
110
10
U1n_VT_Br2
0 –600.00 kV
0.01 kV
3.46
11
U2n_VT_Br2
57.74 – 110.00 V
0.01 V
110
12
I1n_CT_HVS
0 –60000 A
1A
1200
13
I2n_CT_HVS
1 A, 5 A
1A
5
14
I1n_SpareCT_HVS
0 –60000 A
1A
1200
15
I2n_SpareCT_HVS
1 A, 5 A
1A
5
16
I1n_CT_Br11
0 –60000 A
1A
6000
17
I2n_CT_Br11
1 A, 5 A
1A
5
18
I1n_CT_Br12
0 –60000 A
1A
6000
19
I2n_CT_Br12
1 A, 5 A
1A
5
20
I1n_CT_Br13
0 –60000 A
1A
6000
21
I2n_CT_Br13
1 A, 5 A
1A
5
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No.
Symbol
Range
Step
Default
22
I1n_CT_Br21
0 –60000 A
1A
6000
23
I2n_CT_Br21
1 A, 5 A
1A
5
24
I1n_CT_Br22
0 –60000 A
1A
6000
25
I2n_CT_Br22
1 A, 5 A
1A
5
26
I1n_CT_Br23
0 –60000 A
1A
6000
27
I2n_CT_Br23
1 A, 5 A
1A
5
28
I1n_CT_NP_HVS
0 –60000 A
1A
200
29
I2n_CT_NP_HVS
1 A, 5 A
1A
5
30
I1n_CT_Gap_HVS
0 –60000 A
1A
200
31
I2n_CT_Gap_HVS
1 A, 5 A
1A
5
32
I1n_CT_NP_Br1
0 –60000 A
1A
600
33
I2n_CT_NP_Br1
1 A, 5 A
1A
5
34
I1n_CT_NP_Br2
0 –60000 A
1A
600
35
I2n_CT_NP_Br2
1 A, 5 A
1A
5
logic setting “1”- enable, “0”–disable
36
Yyy12_Conn
0/1
1
37
Ddd12_Conn
0/1
0
38
Dyy11_Conn
0/1
0
39
Ydd11_Conn
0/1
0
40
Dyy1_Conn
0/1
0
41
Ydd1_Conn
0/1
0
NOTE: Symbol of the parameters listed in above table is used for communication,
printing and displaying on LCD.
6.2.2.2 Explanation of the parameters and notice for setting
1.
No.1-- [Sn]
Capacity of the transformer shall be configured as its name plate stated. Capacity of transformer,
primary voltage of each side, CT ratio and logic setting of connection group are used to calculate
rated secondary current and correction coefficient of each side of transformer
2.
No.2-- [U1n_HVS]
The setting is rated primary voltage of HV side of transformer, which shall be configured as its
actual value (i.e. its tap in normal position).
3.
No.3-- [U1n_Br1]
Rated primary voltage of LV A side of transformer.
4.
No.4-- [U1n_Br2]
Rated primary voltage of LV B side of transformer.
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5.
No.5-- [U1n_VT_HVS]
Rated primary voltage of VT of HV side.
6.
No.6-- [U2n_VT_HVS]
Rated secondary voltage of HV side VT.
For example, if ratio of a VT on HV side is
220 kV
100V
3
3
100V
, it can be configured as rated
3
primary voltage of HV side VT 127.02 kV, secondary voltage of HV side VT 57.74 V, rated
secondary voltage of HV side zero-sequence VT 33.3 V. It can also be configured as rated
primary voltage 220 kV, rated secondary voltage of 100 V, rated secondary voltage of
zero-sequence VT 57.74 V.
The voltage ratio of this VT can be got from this setting and No.5. Voltage ratio and current ratio
mentioned in following setting are all used for substation automation system. Secondary voltage
and current recorded will be transferred to primary value before fault oscillogram is sent to the
host.
7.
No.7-- [U2n_DeltVT_HVS.]
Secondary rated voltage of zero-sequence HV side VT, which is secondary broken-delta rated
voltage of VT of HV side. The value of it has been mentioned in No.6 setting.
8.
No.8-- [U1n_VT_Br1]
Rated primary voltage of VT of LV A side.
For example, if ratio of VT on LV A side is
220kV
3
100V
, it can be configured as rated primary
3
voltage of 127.02 kV and secondary voltage 57.74 V. It also can be also configured as rated
primary voltage of VT 220 kV and rated secondary voltage 100 V.
NOTE: VT ratio of branch A1, A2 or A3 must be the same, which is decided by setting
No.8 and No.9.
9.
No.9-- [U2n_VT_Br1]
Secondary rated voltage of VT of LV A side. Voltage ratio of VT of LV A side can be got from this
one and No.8 setting. The value of it has been mentioned in No.8 setting.
NOTE: No.10 and No.11 are similar to No.8 and No.9.
10. No.10-- [U1n_VT_Br2]
Rated primary voltage of VT of LV B side.
NOTE: VT ratio of branch B1, B2 or B3 must be the same, which is decided by setting
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No.8 and No.9.
11. No.11-- [U2n_VT_Br2]
Secondary rated voltage of VT of LV B side. Voltage ratio of the VT can be got from this one and
No.10 setting.
12. No.12-- [I1n_CT_HVS]
Rated primary current of CT of HV side. For example, if current ratio of CT is 12 00/1, it shall be
configured as rated primary current 1200 A, rated secondary current 1 A.
13. No.13-- [I2n_CT_HVS]
Rated secondary current of CT of HV side. The value of it has been mentioned in No.12 setting.
From this value and No.12 setting, current ratio of the CT can be got.
NOTE: No.14 –No.33 are similar to No.12 and No.13.
14. No.14-- [I1n_SpareCT_HVS]
Rated primary current of CT of HV side used for backup protection of HV side.
15. No.15-- [I2n_SpareCT_HVS]
Rated secondary current of CT of HV side for backup protection. From this value and No.13
setting, current ratio of the CT can be got.
16. No.16-- [I1n_CT_Br11]
Rated primary current of CT of branch A1.
17. No.17-- [I2n_CT_Br11]
Rated secondary current of CT of branch A1. From this value and No.16 setting, current ratio of
the CT can be got.
18. No.18-- [I1n_CT_Br12]
Rated primary current of CT of branch A2.
19. No.19-- [I2n_CT_Br12]
Rated secondary current of CT of branch A2. From this value and No.18 setting, current ratio of
the CT can be got.
20. No.20-- [I1n_CT_Br13]
Rated primary current of CT of branch A3.
21. No.21-- [I2n_CT_Br13]
Rated secondary current of CT of branch A3. From this value and No.20 setting, current ratio of
the CT can be got.
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22. No.22-- [I1n_CT_Br21]
Rated primary current of CT of branch B1.
23. No.23-- [I2n_CT_Br21]
Rated secondary current of CT of branch B1. From this value and No.22 setting, current ratio of
the CT can be got.
24. No.24-- [I1n_CT_Br22]
Rated primary current of CT of branch B2.
25. No.25-- [I2n_CT_Br22]
Rated secondary current of CT of branch B2. From this value and No.24 setting, current ratio of
the CT can be got.
26. No.26-- [I1n_CT_Br23]
Rated primary current of CT of branch B3.
27. No.27-- [I2n_CT_Br23]
Rated secondary current of CT of branch B3. From this value and No.26 setting, current ratio of
the CT of can be got.
28. No.28-- [I1n_CT_NP_HVS]
Rated primary current of zero-sequence CT on neutral point of HV side.
29. No.29-- [I2n_CT_NP_HVS]
Rated secondary current of zero-sequence CT on neutral point of HV side. From this value and
No.28 setting, current ratio of the CT can be got.
30. No.30-- [I1n_CT_Gap_HVS]
Rated primary current of zero-sequence gap CT of HV side.
31. No.31-- [I2n_CT_Gap_HVS]
Rated secondary current of gap zero-sequence CT of HV side. From this value and No.30 setting,
current ratio of the gap zero-sequence CT of HV side can be got.
32. No.32-- [I1n_CT_NP_Br1]
Rated primary current of zero-sequence CT on neutral point of LV A side.
33. No.33-- [I2n_CT_NP_Br1]
Secondary rated current of zero-sequence CT on neutral point of LV A side. From this value and
No.32 setting, current ratio of the CT can be got.
34. No.34-- [I1n_CT_NP_Br2]
Rated primary current of zero-sequence CT on neutral point of LV B side.
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35. No.35-- [I2n_CT_NP_Br2]
Secondary rated current of zero-sequence CT on neutral point of LV B side. From this value and
No.34 setting, current ratio of the CT can be got.
36. No.36-- [Yyy12_Conn]
If this logic setting is set as”1”, it means the connection group of transformer is Y/Y/Y-12, and if set
as “0”,it means the connection group is not Y/Y/Y-12. Connection group shows in turn the connection
on HV side/ LV A side/ LV B side. Connection group of transformer is determined by actual
connections on its three sides.
NOTE: No.37-No.41 is similar to this one. Only one and at least one setting of the six
logic settings from No.36-No.41 should be set as “1”.
37. No.37-- [Ddd12_Conn]
Connection group of transformer isΔ/Δ/Δ-12.
38. No.38-- [Dyy11_Conn]
Connection group of transformer isΔ/Y/Y-11.
39. No.39-- [TYdd11_Conn]
Connection group of transformer is Y/Δ/Δ-11.
40. No.40-- [Dyy1_Conn]
Connection group of transformer isΔ/Y/Y-1.
41. No.41-- [Ydd1_Conn]
Connection group of transformer is Y/Δ/Δ-1.
6.2.2.3 Setting path
All settings of transformer system parameters are accessible in the following path:
Main Menu -> SETTING -> SYSTEM SETTINGS -> SYSTEM SETTINGS -> [setting symbol]
6.2.3 Implicit configuration settings
The settings in the following list are associated with application-specific primary layout of
transformer being protected, scheme of current transformers and voltage transformers. These
settings can not be seen on LCD of equipment and only be viewed and configured on PC through
RCSPC software in the submenu “INSIDE CONFIG SETTINGS”. These settings are usually
configured in factory or configured by f ield commission engineer according to the design drawing
and project requirement.
6.2.3.1 Setting list
No.
1
Symbol
2W&2*Br(#)
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0/1
Default
1
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No.
Symbol
Range
Default
2
2W&4*Br(#)
0/1
0
3
2W&6*Br(#)
0/1
0
4
3W&2*Br(#)
0/1
0
5
3W&4*Br(#)
0/1
0
6
3W&6*Br(#)
0/1
0
7
2W&1*Br(#)
0/1
0
8
Cfg_CT_HVS(#)
A
1:Curr_Chan
9
Cfg_SpareCT_HVS(#)
A
1:Curr_Chan
10
Cfg_CT_Br11(#)
A
2:Curr_Chan
11
Cfg_CT_Br12(#)
A
0:NONE
12
Cfg_CT_Br13(#)
A
0:NONE
13
Cfg_CT_Br21(#)
A
5:Curr_Chan
14
Cfg_CT_Br22(#)
A
0:NONE
15
Cfg_CT_Br23(#)
A
0:NONE
16
Cfg_CT_NP_HVS(#)
B
1:I0_Chan
17
Cfg_CT_Gap_HVS(#)
B
4:I0_Chan
18
Cfg_CT_NP_Br1(#)
B
2:I0_Chan
19
Cfg_CT_NP_Br2(#)
B
3:I0_Chan
20
Opt_Polar_CT(#)
0000-FFFF
21
Cfg_VT_Br11(#)
C
1:Volt_Chan
22
Cfg_VT_Br12(#)
C
1:Volt_Chan
23
Cfg_VT_Br13(#)
C
1:Volt_Chan
24
Cfg_VT_Br21(#)
C
25
Cfg_VT_Br22(#)
C
26
Cfg_VT_Br23(#)
C
27
Cfg_DeltVT_HVS(#)
D
28
Cfg_DeltVT_Br1(#)
D
29
Cfg_DeltVT_Br2(#)
D
30
Opt_V_Input_HVS(#)
0/1
31
Reserved(#)
0/1
32
Opt_WaveRec_MON(#)
Pickup/Trip
33
Opt_Debug_MON(#)
DSP1/DSP2
34
Opt_Dur_WaveRec_MON(#)
35
En_Displ_Pickup(#)
0000
4S/8S
Disable/Enable
NOTE1: For definitions of A, B, C and D in column range, please refer to section 6.2.3.2.
NOTE2: Setting marked with “# ”means that it is can not be seen on LCD or by printing
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and only can be seen through RCSPC software.
6.2.3.2 CT and VT channel selection
There are four kinds of channel selection: three-phase current channel selection, zero-sequence
current channel selection, branch voltage channel selection and zero-sequence voltage channel
selection.
A Three-phase current channel selection
There are 9 options in three-phase current channel selection.
0: NONE (No three-phase current channel is selected)
1: Curr_Chan (Three-phase current channel 1)
2: Curr_Chan (Three-phase current channel 2)
3: Curr_Chan (Three-phase current channel 3)
4: Curr_Chan (Three-phase current channel 4)
5: Curr_Chan (Three-phase current channel 5)
6: Curr_Chan (Three-phase current channel 6)
7: Curr_Chan (Three-phase current channel 7)
8: Curr_Chan (Three-phase current channel 8)
B Zero-sequence current channel selection
|There are 7 options in zero-sequence current channel selection.
0: NONE (No zero-sequence current channel is selected)
1: I0_Chan (Zero-sequence current channel 1)
2: I0_Chan (Zero-sequence current channel 2)
3: I0_Chan (Zero-sequence current channel 3)
4: I0_Chan (Zero-sequence current channel 4)
5: I0_Chan (Zero-sequence current channel 5)
6: I0_Chan (Zero-sequence current channel 6)
C Branch voltage channel selection
There are 7 options in branch voltage channel selection.
0: NONE (No branch voltage channel is selected)
1: Volt_Chan (Branch voltage channel 1)
2: Volt_Chan (Branch voltage channel 2)
3: Volt_Chan (Branch voltage channel 3)
4: Volt_Chan (Branch voltage channel 4)
5: Volt_Chan (Branch voltage channel 5)
6: Volt_Chan (Branch voltage channel 6)
D Zero-sequence voltage channel selection
There are 5 options in zero-sequence voltage channel selection.
0: NONE (No zero-sequence voltage channel is selected)
1: U0_Chan (Zero-sequence voltage channel 1)
2: U0_Chan (Zero-sequence voltage channel 2)
3: U0_Chan (Zero-sequence voltage channel 3)
4: U0_Chan (Zero-sequence voltage channel 4)
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NOTE: If channel 0 is selected, it means no channel for CT or VT. Therefore, the
sampled values of the CT or VT are zero, which means the CT or VT is disabled.
6.2.3.3 Explanation of the parameters and notice for setting
1.
No.1-- [2W&2*Br] (#)
Logic setting, transformer is two-winding transformer with two branches totally at LV side
confirmed, which is just used to LCD display on HMI module.
2.
No.2-- [2W&4*Br] (#)
Logic setting, transformer is two-winding transformer with four branches totally at LV side
confirmed, which is just used to LCD display on HMI module.
3.
No.3-- [2W&6*Br] (#)
Logic setting, transformer is two-winding transformer with six branches totally at LV side
confirmed, which is just used to LCD display on HMI module.
4.
No.4-- [3W&2*Br] (#)
Logic setting, transformer is three-winding transformer with two branches at LV side confirmed,
which is just used to LCD display on HMI module.
5.
No.5-- [3W&4*Br] (#)
Logic setting, transformer is three-winding transformer with four branches at LV side confirmed,
which is just used to LCD display on HMI module.
6.
No.6- [3W&6*Br] (#)
Logic setting, transformer is three-winding transformer with six branches at LV side confirmed,
which is just used to LCD display on HMI module.
7.
No.7-- [2W&1*Br] (#)
Logic setting, transformer is two-winding transformer with one branch at LV side confirmed, which
is just used to LCD display on HMI module.
8.
No.8-- [Cfg_CT_HVS] (#)
Logic setting of selecting three-phase current channel for HV side CT for main protection.
9.
No.9-- [Cfg_SpareCT_HVS] (#)
Logic setting of selecting three-phase current channel for HV side CT for backup protection.
10. No.10-- [Cfg_CT_Br11] (#)
Logic setting of selecting three-phase current channel for CT of branch A1.
11. No.11-- [Cfg_CT_Br12] (#)
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Logic setting of selecting three-phase current channel for CT of branch A2.
12. No.12-- [Cfg_CT_Br13] (#)
Logic setting of selecting three-phase current channel for CT of branch A3.
13. No.13-- [Cfg_CT_Br21] (#)
Logic setting of selecting three-phase current channel for CT of branch B1.
14. No.14-- [Cfg_CT_Br22] (#)
Logic setting of selecting three-phase current channel for CT of branch B2.
15. No.15-- [Cfg_CT_Br23] (#)
Logic setting of selecting three-phase current channel for CT of branch B3
16. No.16-- [Cfg_CT_NP_HVS] (#)
Logic setting of selecting zero-sequence current channel for zero-sequence CT of HV side .
17. No.17-- [Cfg_CT_Gap_HVS] (#)
Logic setting of selecting zero-sequence current channel for gap zero-sequence CT of HV side.
18. No.18-- [Cfg_CT_NP_Br1] (#)
Logic setting of selecting zero-sequence current channel for zero-sequence CT of LV A side.
19. No.19- [Cfg_CT_NP_Br2] (#)
Logic setting of selecting zero-sequence current channel for gap zero-sequence CT of LV B side.
20. No.20-- [Opt_Polar_CT] (#)
Logic setting of CT polarity definition, which consists of sixteen binary digits. Every digit has
dedicated meaning and some digits have no definition.
Generally, CT polarity definition is as Table 1.2-1 shows. However if some CT polarity direction is
reversed by incorrect wiring connecting, there is still chance to correct it by configuring this logic setting
easily. Please set the corresponding digit of the logic setting.
Following will be seen on PC through RCSPC software.
Bit
Sign
Description
0
none
No definition
1
Curr_Chan-1(8B-2,4,6)
CTs polarity of current channel 1 (8B-2,4,6) reversed
2
Curr_Chan-2(8B-8,10,12)
CTs polarity of current channel 2 (8B-8,10,12) reversed
3
Curr_Chan-3(8B-14,16,18)
4
Curr_Chan-4(8C-2,4,6)
CTs polarity of current channel 4 (8C-2,4,6) reversed
5
Curr_Chan-5(8C-8,10,12)
CTs polarity of current channel 5 (8C-8,10,12) reversed
6
Curr_Chan-6(8C-14,16,18)
NR ELECTRIC CO., LTD.
CTs polarity of current channel 3 (8B-14,16,18)
reversed
CTs polarity of current channel 6 (8C-14,16,18)
reversed
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Chapter 4 Supervision,Metering and Recording
7
Curr_Chan-7(7C-2,4,6)
CTs polarity of current channel 7 (7C-2,4,6) reversed
8
Curr_Chan-8(7C-8,10,12)
CTs polarity of current channel 8 (7C-8,10,12) inversed
reserved
No definition
9~15
NOTE: For the details of current channels please refer to Chapter 5.
21. No.21-- [Cfg_VT_Br11] (#)
Logic setting of selecting three-phase voltage channel for VT of branch A1.
22. No.22-- [Cfg_VT_Br12] (#)
Logic setting of selecting three-phase voltage channel for VT of branch A2.
23. No.23-- [Cfg_VT_Br13] (#)
Logic setting of selecting three-phase voltage channel for VT of branch A3.
24. No.24-- [Cfg_VT_Br21] (#)
Logic setting of selecting three-phase voltage channel for VT of branch B1.
25. No.25-- [Cfg_VT_Br22] (#)
Logic setting of selecting three-phase voltage channel for VT of branch B2.
26. No.26-- [Cfg_VT_Br23] (#)
Logic setting of selecting three-phase voltage channel for VT of branch B3.
27. No.27-- [Cfg_DeltVT_HVS] (#)
Logic setting of selecting zero-sequence voltage channel for HV side VT.
28. No.28-- [Cfg_DeltVT_Br1] (#)
Logic setting of selecting zero-sequence voltage channel for VT of LV A side.
29. No.29--[Cfg_DeltVT_Br2] (#)
Logic setting of selecting zero-sequence voltage channel for VT of LV B side.
30. No.30--[Opt_V_Input_HVS] (#)
Logic setting of availability of HV side phase voltage, which must be set as “1”when HV side
overexcitation protection is enabled.
31. No.31--[Reserved] (#)
Spare logic setting for future function.
32. No.32--[Opt_WaveRec_MON] (#)
Logic setting of selecting recording triggering mode of MON module.
“0”: recording is triggered when any fault detector picks up.
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“1”: recording is triggered when any protection element trips.
33. No.33--[Opt_Debug_MON] (#)
This logic setting is provided especially for software developing, not for ordinary users.
34. No.34--[Opt_Dur_WaveRec_MON] (#)
Logic setting of selecting recording time of MON module.
“0”: recording persisting time is 4 s with 24 samples per cycle.
“1”: recording persisting time is 8 s with 12 samples per cycle.
35. No.35--[En_Displ_Pickup] (#)
This logic setting is provided especially for software developing, not for ordinary users.
NOTE: It is suggested to configure settings No.32-No.36 as default settings.
6.3 Protection Settings
6.3.1 Differential protection settings
6.3.1.1 Settings list
No.
Symbol
Range
Step
Default
0.10-1.50(Ie)
0.01(Ie)
0.3
1
I_Pkp_PcntDiff
2
I_InstDiff
2-14(Ie)
0.01(Ie)
6
3
Slope1_PcntDiff
0.05-0.10
0.01
0.1
4
Slope2_PcntDiff
0.50-0.80
0.01
0.7
5
k_Harm_PcntDiff
0.10-0.35
0.01
0.15
6
I_Alm_Diff
0.10-1.00(Ie)
0.01(Ie)
0.1
7
TrpLog_Diff
0000-FFFF
1
1FFF
8
En_InstDiff
0/1
1
9
En_PcntDiff
0/1
1
10
Opt_Inrush_Ident
0/1
1
11
Opt_CTS_Blk_PcntDiff
0/1
1
NOTE: Symbol of the parameters listed in above table are used for communication,
printing and displaying on LCD.
6.3.1.2 Explanation of the parameters and notice for setting
1.
No.1-- [I_Pkp_PcntDiff]
This is pickup setting of percentage current differential protection, which is also the setting of
fault detector of percentage differential protection. It shall be greater than maximum unbalanced
current of the transformer during normal rated load, i.e.
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I cdqd K rel ( Ker U m) I e
(Equation 6.3-1)
Where:
I cdqd represents the setting [I_Pkp_PcntDiff].
I e is secondary calculated rated current of transformer (please see details in section 3.3.1);
Krel is reliability coefficient (generally Krel = 1.3 - 1.5);
Ker is the ratio error of CT (=0.03X2, for class 10P; =0.01X2, for class 5P and class TP);
U is the maximum deviation (in percentage of rated voltage) due to tap changing;
m is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.
For practical engineering application, Icdqd =(0.3 - 0.5)I e is reasonable and unbalanced current
in differential scheme during maximum load of transformer shall be measured.
2.
No.2-- [I_InstDiff]
Setting of unrestrained instantaneous differential protection, which is used to clear serious internal
fault quickly and prevent operation delay caused by CT saturation. The setting [I_InstDiff ] shall be
greater than inrush current and maximum unbalanced current due to external fault or
asynchronous closing, generally
Icdsd K
Ie
(Equation 6.3-2)
Where:
K is a multiple depending on capacity of transformer and the system reactance, 6 – 8 is
recommended.
Ie is secondary calculated rated current of transformer.
Sensitivity coefficient of unrestrained instantaneous differential protection K sen shall be calculated
according to the phase-to-phase solid short circuit fault in normal operation condition at installed
point of the relay.
3.
K sen ≥ 1.2 is required.
No.3-- [Slope1_PcntDiff]
Setting of the first slope of percentage differential protection, it shall be:
Kbl 1 K er
(Equation 6.3-3)
Where:
Ker is the error of current ratio of CT, no more than 0.1. K bl 1 is 0.10-0.20 generally.
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Calculation of secondary unbalanced current:
--- For two winding transformer
Iunb .max ( K ap K cc K er U m) I k .max
(Equation 6.3-4)
Where:
Definition of K er , U and m have been mentioned above;
Kcc is the “same type coefficient”of CT, 0.1 is considered.
I k.max is the maximum value of fundamental component of external short circuit fault current
(secondary).
Kap is the coefficient of DC component. K ap = 1.0 if CT at both sides are class TP, or K ap = 1.5 2.0 if CT at both sides are class P.
--- For three winding transformer
Take external short circuit fault at LV side as example:
Iunb . max K ap K cc K er Ik . max Uh I k.h . max mI I k .I . max mII Ik .II . max
(Equation 6.3-5)
Where:
Definition of Ker , K cc and K ap have been mentioned above;
Uh is maximum deviations (in percentage of rated voltage) on HV side due to tap changing.
I k. max is the maximum value of fundamental component of short circuit secondary current flowing
through CT at the fault side during external fault at LV side.
I k .h. max is the maximum value of fundamental component of short circuit secondary current flowing
through CT on tap changing sides during external fault at LV side.
I k. I .max and I k.II .max are the fundamental components of secondary currents flowing through CT at
other sides during external fault at LV side;
mI and mII are errors caused by difference between ratios of CT (auxiliary CT included if any)
at relevant sides.
Sensitivity check for percentage differential protection
The sensitivity coefficient K sen shall be calculated according to phase-to-phase short circuit on
outlet of transformer protected by the differential relay in minimum operation mode. From the
calculated minimum short circuit current I k .min and relevant restraint current I res , corresponding
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pickup current I op will be found in the operation characteristic curve of percentage differential
relay, and then the sensitivity coefficient is:
K sen I k .min / I op
(Equation 6.3-6)
K sen ≥ 1.2 is required.
4.
No.4-- [Slope2_PcntDiff]
Second slope of percentage differential protection is:
I unb .max* I cdqd * 3kbl 1
k bl 2
I k .max* 3
(Equation 6.3-7)
Where:
I unb .max* ,
Definition of
I cdqd * and
I k . max* are almost same to
I unb .max ,
Icdqd
and
I k. max mentioned above, and the only difference is they are per unit values. I e (secondary
calculated rated current of transformer) is the base value of per unit.
k bl 2 =0.70. is recommended.
5.
No.5-- [k_Harm_PcntDiff]
Restraint coefficient of second harmonic. This parameter is the blocking threshold of second
harmonics involving in differential current to against inrush current when the transformer is
energized. The differential protection will be blocked when the percentage of second harmonics
reaches the threshold because the percentage of second harmonics is high in inrush current but
low in fault current. It is recommended that the parameter is set to be 15% -20%.
6.
No.6-- [I_Alm_Diff]
Setting of differential current abnormality alarm shall be greater than maximum differential current
due to tap of the transformer being not in the middle position or other possible conditions during
operation.
7.
No.7-- [TrpLog_Diff]
Tripping output logic setting of differential protection is used to specify which breaker or breakers
will be tripped by this protection. This word comprises 16 binary bits as follows and is displayed as
a hexadecimal number of 4 digits from 0000H to FFFFH on LCD of equipment. The tripping output
logic settings of RCS-985T is specified as follows:
248
Bits
Function
0
Protection enabled
1
TrpOutp1
2
TrpOutp2
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3
TrpOutp3
4
TrpOutp4
5
TrpOutp5
6
TrpOutp6
7
TrpOutp7
8
TrpOutp8
9
TrpOutp9
10
TrpOutp10
11
TrpOutp11
12
TrpOutp12
13-15
No definition
NOTE:
“TrpOutp1”just means to drive tripping output channel 1 and please refer to
section 5.4
Set bit “0”as 1 means this protection element will trip breaker or breakers. The bit corresponding
to the breaker to be tripped shall be set as“1”and other bits shall be “0”. For example, if
differential protection is defined as TrpOutp5 (tripping output channel 5), the bit “0”and “5”bit shall
be set as “1”and other bits “0”. Then a hexadecimal number 0021H is formed as the tripping
output logic setting.
Please note that tripping output logic settings of the equipment have to be set on basis of
application-specific drawings.
8.
No.8-- [En_InstDiff]
Unrestrained instantaneous differential protection enabled. If this setting is set as “1”, it means this
protection is enabled. Otherwise it means the protection is disabled.
9.
No.9-- [En_PcntDiff]
Percentage differential protection enabled.
10.
No.10-- [Opt_Inrush_Ident]
Inrush current blocking principle selection:
“0”, discrimination by harmonics;
“1”, waveform distortion criteria is used.
11. No.11-- [Opt_CTS_Blk_PcntDiff]
Percentage differential protection blocked by CT circuit failure. If this setting is set as “1”, it means
percentage differential protection will be blocked when CT circuit failure happens. Otherwise it
means the function is disabled.
6.3.1.3 Setting path
All settings of differential protection settings are accessible in the following path:
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Main Menu -> SETTING -> PROT SETTINGS -> DIFF PROT-> [setting symbol]
6.3.2 HV side voltage controlled overcurrent protection settings
6.3.2.1 Setting list
No.
Symbol
Range
Step
Default
1
V_NegOV_VCE_HVS
1.00 V–20.00 V
0.01 V
4
2
Vpp_VCE_HVS
10.00V-100.00V
0.01 V
60
3
I_OC1_HVS
0.05A –100.00A
0.01 A
15
4
t_OC1_HVS
0.00 s – 10.00 s
0.01 s
1
5
TrpLog_OC1_HVS
0000 –FFFF
1
000F
6
I_OC2_HVS
0.05 A – 100.00 A
0.01 A
10
7
t_OC2_HVS
0.00 s – 10.00 s
0.01 s
2
8
TrpLog_OC2_HVS
0000 –FFFF
1
0F01
9
I_InvOC_HVS
0.05~100 A
0.01 A
1
10
t_InvOC_HVS
0.5~10S
0.01 s
1
11
TrpLog_InvOC_HVS
0000 –FFFF
1
0F01
12
I_Alm_OvLd_HVS
0.05 –20.00 A
0.01 A
6
13
t_Alm_OvLd_HVS
0.00 – 10.00 s
0.01 s
8
14
I_InitCool1_OvLd_HVS
0.05 –20.00 A
0.01 A
5.5
15
t_InitCool1_OvLd_HVS
0.00 – 10.00 s
0.01 s
9
16
I_InitCool2_OvLd_HVS
0.05 –20.00 A
0.01 A
5.5
17
t_InitCool2_OvLd_HVS
0.00 – 10.00 s
0.01 s
9
18
I_Blk_OLTC_HVS
0.05 –20.00 A
0.01 A
5.5
19
t_Blk_OLTC_HVS
0.00 – 10.00 s
0.01 s
9
20
En_VCE_Ctrl_OC1_HVS
0/1
1
21
En_VCE_Ctrl_OC2_HVS
0/1
1
22
En_HVS.VCE_Ctrl_OC_HVS
0/1
1
23
En_LVS.VCE_Ctrl_OC_HVS
0/1
1
24
Opt_VTS_Ctrl_OC_HVS
0/1
1
25
En_OvLd_HVS
0/1
1
26
En_InitCool1_OvLd_HVS
0/1
1
27
En_InitCool2_OvLd_HVS
0/1
1
28
En_Blk_OLTC_HVS
0/1
1
29
En_FixDly_InvOC_HVS
0/1
0
NOTE: Symbol of the parameters listed in above table are used for communication,
printing and displaying on LCD.
6.3.2.2 Explanation of the parameters and notice in parameter setting
1.
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No.1-- [V_NegOV_VCE_HVS]
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Chapter 4 Supervision,Metering and Recording
This is setting of negative sequence voltage control element of HV side. Setting and displayed
value of negative sequence voltage are U2.
Voltage for voltage control element of HV side is taken from LV side usually (logic setting
[En_LVS.VCE_Ctrl_OC_HVS] is set as 1). The setting shall be greater than maximum unbalanced
voltage. It can be set as U op.2 7V . Here U op.2 is the setting [V_NegOV_VCE_HVS].
2.
No.2-- [Vpp_VCE_HVS]
This is setting of phase-to-phase undervoltage control element of HV side.
Voltage
of
voltage
control
element
is
taken
from
LV
side
usually
(logic
setting
[En_LVS.VCE_Ctrl_OC_HVS] is set as 1.). Undervoltage setting shall be greater than the lowest
voltage during starting process of the largest motor connected with the LV busbar.
It is set as U op 0.6U n generally.
Where:
U op is the setting [Vpp_VCE_HVS]
U n is the rated secondary phase-to-phase voltage.
However, if impedance of the startup/standby transformer being protected is relatively large, it can
be taken as U op (0.55 0.6)U n .
3.
No.3-- [I_OC1_HVS]
Setting of overcurrent protection stage 1.
Two stages of voltage controlled overcurrent protection are provided for startup/ standby
transformer or auxiliary transformer.
Setting of stage 1 shall be greater than the maximum current passing through the protection
equipment during three phase fault on LV side outlet of the startup/standby transformer:
K
)
I opI rel I k( 3.max
Kr
(Equation 6.3-8)
Where:
I opI is the setting [I_OC1_HVS];
Krel is the reliability coefficient, 1.2 generally;
Kr is the return coefficient, 0.85 – 0.95 generally;
)
I k(3.max
is the maximum secondary current passing through the equipment when three phase fault
occurs on LV side outlet of the startup/standby transformer. This setting is not affected by
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increase of load current of the startup/standby transformer when the HV side voltage drops down
due to system oscillation.
4.
No.4-- [t_OC1_HVS]
Delay of overcurrent protection stage 1. It shall coordinate with main protection only and
oscillation period is not needed to be considered. It is set as 0.5 s generally.
5.
No. 5-- [TrpLog_OC1_HVS]
Tripping output logic setting of overcurrent stage 1. Tripping output logic settings of all protective
functions in setting table mentioned above and below are used to specify which breaker or
breakers will be tripped by this function. This word comprises following 16 binary bits and is
expressed by a hexadecimal number of 4 digits from 0000H to FFFFH.
Definition of tripping output logic setting of RCS-985T is as same as that of differential protection.
Please note that tripping output logic settings of the equipment have to be set on basis of
application-specific drawings.
6.
No.6-- [I_OC2_HVS]
Setting of overcurrent protection stage 2.
The setting shall coordinate with that of stage 2 of overcurrent protection of LV side branches:
I opII K CO (I opII ( L ) nTAL I 10a )
U LN
1
U HN nTA
(Equation 6.3-9)
Where:
K CO is the coordination coefficient, 1.1 general.
I opII (L) is the setting of stage 2 of overcurrent protection of one LV side branch.
I10 a is the normal load of other LV side branches.
U LN / U HN is the real voltage ratio of LV side to HV side of transformer.
nTAL is the current ratio of CT used by overcurrent protection of the LV side branch;
nTA is the current ratio of HV side CT.
7.
No.7-- [t_OC2_HVS]
Delay of overcurrent protection stage 2.
This setting shall coordinate with stage 2 of overcurrent protection of LV side branch.
It can be set as t 2 t 2' t t .
Where:
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Chapter 4 Supervision,Metering and Recording
t 2 is the delay setting [t_OC2_HVS].
t 2' is delay setting of stage 2 of overcurrent protection of LV side branch.
t is the step difference.
Since this delay t 2 is longer than oscillation period, so even if stage 2 of overcurrent element
operates due to HV side voltage drop during system oscillation, stage 2 of overcurrent protection
will not operate incorrectly.
8.
No.8-- [TrpLog_OC2_HVS]
Tripping output logic setting of overcurrent protection stage 2.
9.
No.9-- [I_InvOC_HVS]
Current threshold of inverse time overcurrent protection.
The following criterion shall be satisfied.
[I_InvOC_HVS] ≤ [I_OC2_HVS]
10. No.10-- [t_InvOC_HVS]
Time multiple setting of inverse time overcurrent protection.
11. No.11-- [TrpLog_InvOC_HVS]
Tripping output logic setting of inverse time overcurrent protection
12. No.12-- [I_Alm_OvLd_HVS.]
Current setting of overload alarm.
13. No.13-- [t_Alm_OvLd_HVS]
Delay of overload alarm.
14. No.14-- [I_InitCool1_OvLd_HVS]
Current setting of stage 1 of air cooling initiation.
15. No.15-- [t_InitCool1_OvLd_HVS]
Time delay of stage 1 of cooling initiation.
16. No.16-- [I_InitCool1_OvLd_HVS]
Current setting of stage 2 of air cooling initiation.
17. No.17-- [t_InitCool1_OvLd_HVS]
Time delay of stage 2 of cooling initiation.
18. No.18-- [I_Blk_OLTC_HVS]
Current setting of overload to block on-load tap change (OLTC).
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19. No.19-- [t_Blk_OLTC_HVS]
Time delay of overload to block on-load tap change (OLTC).
20. No.20-- [En_VCE_Ctrl_OC1_HVS]
Logic setting of overcurrent protection stage 1 controlled by voltage element.
“1”: the overcurrent protection stage 1 is controlled by voltage element.
“0”: the protection is not controlled by voltage element.
21. No.21-- [En_VCE_Ctrl_OC2_HVSt]
Logic setting of overcurrent protection stage2 controlled by voltage element.
22. No.22-- [En_HVS.VCE_Ctrl_OC_HVS]
Logic setting of overcurrent protection controlled by HV side voltage control element.
23. No.23-- [En_LVS.VCE_Ctrl_OC_HVS]
Logic setting of overcurrent protection controlled by LV side voltage element.
NOTE: If you want enable overcurrent protection is controlled by voltage element, No. 18
and No.19 shall be set as “1”and setting No.20 and No21 shall be set as “1”, but not both.
If the four settings are set as “0”simultaneously, overcurrent protection will not be
controlled by voltage element.
24. No.24-- [Opt_VTS_Ctrl_OC_HVS]
Protection performance during VT circuit failure.
“1”: when VT circuit failure at one side is detected, voltage control element at the same side will be
disabled but overcurrent relay on the same side can still be controlled by voltage control elements
of other side if corresponding logic setting is set as “1”.
“0”: when VT circuit failure at one side is detected, the overcurrent relay will become an
overcurrent relay without voltage element control.
25. No.25-- [En_OvLd_HVS]
Logic setting of enabling overload alarm.
26. No.26-- [En_InitCool1_OvLd_HVS]
Logic setting of stage 1 of enabling cooling initiation.
27. No.26-- [En_InitCool2_OvLd_HVS]
Logic setting of stage 2 of enabling cooling initiation.
28. No.27-- [En_Blk_OLTC_HVS]
Logic setting of enabling overload for blocking on-load tag changing. .
29. No.28--[En_FixDly_InvOC_HVS]
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Logic setting of enabling additional 100ms delay for inverse time overcurrent protection.
6.3.2.3 Setting path
Settings of HV side voltage controlled overcurrent protection are accessible in the following path:
Main Menu -> SETTING -> PROT SETTINGS -> HVS PP BACKPROT -> [setting symbol]
6.3.3 HV side earth protection settings
6.3.3.1 Setting list
No.
Symbol
Range
Step
Default
1
V_ROV_VCE_HVS
1– 100 V
0.01 V
10
2
I_ROC1_HVS
0.10 –100.00 A
0.01 A
10
3
t_ROC11_HVS
0.00 – 10.00 s
0.01 s
1
4
TrpLog_ROC11_HVS
0000 –FFFF
1
0021
5
t_ROC12_HVS
0.00 – 10.00 s
0.01 s
1.5
6
TrpLog_ROC12_HVS
0000 –FFFF
1
0003
7
I_ROC2_HVS
0.10 –100.00 A
0.01 A
10
8
t_ROC21_HVS
0.00 – 10.00 s
0.01 s
2
9
TrpLog_ROC21_HVS
0000 –FFFF
1
0003
10
t_ROC22_HVS
0.00 – 10.00 s
0.01 s
2.5
11
TrpLog_ROC22_HVS
0000 –FFFF
1
001F
12
I_ROC3_HVS
0.10 –100.00 A
0.01 A
10
13
t_ROC3_HVS
0.00 –10.00 S
0.01 S
2
14
TrpLog_ROC3_HVS
0000 –FFFF
1
0003
15
I_InvROC_HVS
0.05-100A
0.01A
1
16
t_InvROC_HVS
0.5-10s
0.01s
1
17
TrpLog_InvROC_HVS
0000-FFFF
1
0F01
18
En_VCE.ROV_Ctrl_ROC1_HVS
0/1
0
19
En_VCE.ROV_Ctrl_ROC2_HVS
0/1
0
20
Opt_I_ROC1
0/1
0
21
Opt_I_ROC2
0/1
0
22
Opt_I_ROC3
0/1
0
23
En_Dir_Ctrl_ROC1_HVS
0/1
0
24
En_Dir_Ctrl_ROC2_HVS
0/1
0
25
Opt_VTS_Ctrl_ROC_HVS
0/1
0
26
Cfg_Dir_I0_HVS
0/1
0
27
Opt_I_InvROC
0/1
0
28
En_Dir_Ctrl_InvROC_HVS
0/1
0
29
En_FixDly_InvROC_HVS
0/1
0
NOTE: Symbol of the parameters listed in above table are used for communication,
printing and displaying on LCD.
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6.3.3.2 Explanation of the parameters and notice for setting
1.
No.1-- [V_ROV_VCE_HVS]
Setting (3U0) of zero-sequence voltage control element for zero-sequence overcurrent protection
at HV side.
2.
No.2-- [I_ROC1_HVS]
Setting of stage 1 of zero-sequence overcurrent protection.
This setting can be set as:
I op.o. I K rel
(3I 0 )min 1
C 0 nTA
(Equation 6.3-10)
Where:
I op.o. I represents setting [I_ROC1_HVS].
K rel is the reliability coefficient, (generally K rel = 0.7).
(3I o ) min is the primary minimal operating current of backup zone of zero-sequence overcurrent
protection on remote end of HV side feeders.
C0 is the distribution coefficient of zero sequence current which is equal to maximum ratio of
zero-sequence current of remote end and that of near end for earth fault on HV side outlet of the
startup/standby transformer;
nTA is current ratio of CT.
3.
No.3-- [t_ROC11_HVS]
Time delay 1 of stage 1 of zero-sequence overcurrent protection.
When earth fault occurs on near end of HV side outlet of startup/standby transformer, it is
protected by both this protection and zero-sequence overcurrent protection stage 2 on remote end,
so the time delay setting of this protection is
t t II t
(Equation 6.3-11)
Where:
t is time delay [t_ROC11_HVS].
t II is time delay of zero-sequence overcurrent protection stage2 on remote end.
t is the step difference of delay.
4.
No.4-- [TrpLog_ROC11_HVS]
Tripping output logic setting of zero-sequence overcurrent protection stage 1 with time delay 1.
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5.
No.5-- [t_ROC12_HVS]
Time delay 2 of stage 1 of zero-sequence overcurrent protection.
6.
No.6-- [TrpLog_ROC12_HVS]
Tripping output logic setting of zero-sequence overcurrent protection stage 1 with time delay 2.
7.
No.7-- [I_ROC2_HVS]
Setting of stage 2 of zero-sequence overcurrent protection.
The setting shall coordinate with operating current of zero-sequence overcurrent protection of HV
side feeders for remote end earth fault:
I op.o.II K c 0 C0'
(3I 0 ) op
nTA
(Equation 6.3-12)
Where:
K c0 is coordination coefficient, (generally Kco = 1.1);
(3I o ) op is the primary operating current of backup zone of zero-sequence overcurrent protection
of HV side feeders to be coordinated;
'
C0 is the distribution coefficient of zero sequence current which is equal to the ratio of zero
sequence current passing through this end protection and that passing through the power line,
take the maximum value in various operation modes; and nTA is current ratio of CT.
8.
No.8-- [t_ROC21_HVS]
Delay 1 of stage 2 of zero-sequence overcurrent protection.
9.
No.9-- [TrpLog_ROC21_HVS]
Tripping output logic setting of zero-sequence overcurrent protection stage 2 with time delay 1.
10. No.10-- [t_ROC22_HVS]
Time delay 2 of stage 2 of zero-sequence overcurrent protection.
11. No.11-- [TrpLog_ROC22_HVS]
Tripping output logic setting of zero-sequence overcurrent protection stage 2 with time delay 2.
12. No.12-- [I_ROC3_HVS]
Setting of stage 3 of zero-sequence overcurrent protection.
13. No.13-- [t_ROC3_HVS]
Time delay of stage 3 of zero-sequence overcurrent protection.
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14. No.14-- [TrpLog_ROC3_HVS]
Tripping output logic setting of zero-sequence overcurrent protection stage 3.
15. No.15-- [I_InvROC_HVS]
Current threshold of inverse time zero-sequence overcurrent protection.
The following criterion shall be satisfied.
[I_InvROC_HVS] ≤ [I_ROC2_HVS]
16. No.16-- [t_InvROC_HVS]
Time multiple setting of inverse time zero-sequence overcurrent protection.
17. No.17-- [TrpLog_InvROC_HVS]
Tripping output logic setting of inverse time zero-sequence overcurrent protection.
18. No.18-- [En_VCE.ROV_Ctrl_ROC1_HVS]
Stage 1 of zero-sequence overcurrent protection controlled by zero-sequence voltage element.
19. No.19-- [En_VCE.ROV_Ctrl_ROC2_HVS]
Stage 2 of zero-sequence overcurrent protection controlled by zero-sequence voltage element.
20. No.20-- [Opt_I_ROC1]
Option of current source used for stage 1 zero-sequence overcurrent protection.
“1”, using calculated zero-sequence current
“0”, using directly measured zero-sequence current
21. No.21-- [Opt_I_ROC2]
Option of current source used for stage 2 zero-sequence overcurrent protection.
22. No.22-- [Opt_I_ROC3]
Option of current source used for stage 3 zero-sequence overcurrent protection.
23. No.23-- [En_Dir_Ctrl_ROC1_HVS]
Stage 1 of zero-sequence overcurrent protection is controlled by direction element.
24. No.24-- [En_Dir_Ctrl_ROC2_HVS]
Stage 2 of zero-sequence overcurrent protection is controlled by direction element.
25. No.25-- [Opt_VTS_Ctrl_ROC_HVS]
Protection performance during VT circuit failure.
“1”: when VT circuit failure at one side is detected, directional relay and voltage control element at
the same side will be disabled but overcurrent relay on the same side can still be controlled by
voltage control elements of other side if corresponding logic setting is set as “1”.
“0”: when VT circuit failure at one side is detected, the overcurrent relay will become an
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overcurrent relay without directional element and voltage control element.
26. No.26-- [Cfg_Dir_I0_HVS]
The logic setting is used to select the direction of every stage of zero sequence overcurrent
protection.
“1”: the direction is transformer and reach angle is 225º.
“0”, the direction is power system and reach angle is 75º.
27. No.27-- [Opt_I_InvROC]
Option of current source used for inverse time zero-sequence overcurrent protection.
28. No.28-- [En_Dir_Ctrl_InvROC_HVS]
Inverse time zero-sequence overcurrent protection is controlled by direction element.
29. No.29-- [En_FixDly_InvROC_HVS]
Enable additional 100ms delay for inverse time zero-sequence overcurrent protection.
6.3.3.3 Settings path
Settings of HV side earth fault protection are accessible in the following path:
Main Menu -> SETTING -> PROT SETTINGS -> HVS EF PROT -> [setting symbol]
6.3.4 HV side backup “gap”protection settings
6.3.4.1 Setting list
No.
Symbol
Range
Step
Default
1
V_ROV_Gap_HVS
10 - 220.00 V
0.01 V
150
2
t_ROV_Gap_HVS
0.00–10.00 s
0.01 s
0.5
3
TrpLog_ROV_Gap_HVS
0000 –FFFF
1
0003
4
I_ROC_Gap_HVS
0.10–100.00 A
0.01 A
4
5
t_ROC_Gap_HVS
0.00 –10.00 s
0.01 s
0.5
6
TrpLog_ROC_Gap_HVS
0000 –FFFF
1
0003
7
Reserved
0/1
0
0
NOTE: Symbol of the parameters listed in above table are used for communication,
printing and displaying on LCD.
6.3.4.2 Explanation of the parameters and notice for setting
1.
No.1-- [V_ROV_Gap_HVS]
Setting of zero-sequence overvoltage protection.
U o.max U op.o U sat
(Equation 6.3-13)
Where:
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U op.o is setting of this protection (secondary voltage) [V_ROV_Gap_HVS]].
U o. max is the maximum possible zero sequence voltage at location of the protection during
single-phase earth fault in power system with part of neutral points grounded, or during two-phase
operation of transformer with ungrounded neutral point.
U sat is minimum possible broken-delta voltage of VT in solid grounded system during
single-phase earth fault with grounded neutral point lost. Rated voltage of broken delta VT is 100
V.
Considering that X 0 / X 1≤3 in a solid grounded system, U op.o is taken as 180 V generally.
2.
No.2-- [t_ROV_Gap_HVS]
Time delay of zero-sequence overvoltage protection.
3.
No.3-- [TrpLog_ROV_Gap_HVS]
Tripping output logic setting of zero-sequence overvoltage protection.
4.
No.4-- [I_ROC_Gap_HVS]
Setting of “gap”zero-sequence overcurrent protection. The operating current of the protection
depends on zero sequence impedance of transformer and arc resistance of discharge through the
gap, etc.
5.
No.5-- [t_ROC_Gap_HVS]
Time delay of “gap”zero-sequence overcurrent protection.
6.
No.6-- [TrpLog_ROC_Gap_HVS]
Tripping output logic setting of “gap”zero-sequence overcurrent protection.
7.
No.7-- [Reserved]
Spare logic setting for future function.
6.3.4.3 Setting path
Settings of HV side “gap”protection are accessible in the following path:
Main Menu -> SETTING -> PROT SETTINGS ->HVS GAP BAK PROT -> [setting symbol]
6.3.5 HV side overexcitation protection settings
To enable this protection function, logic settings [En_OvExc] and [Opt_V_Input_HVS] shall be set
as “1”, and binary input [EBI_OvExc] shall be energized.
6.3.5.1 Setting list
No.
248
Symbol
Range
Step
Default
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1
k_OvExc
1 –2
0.01
1.4
2
t_OvExc
0–3000 s
0.01 s
1
3
TrpLog_OvExc
0000 - FFFF
1
000F
4
k_Alm_OvExc
1 –2
0.01
1.1
5
t_Alm_OvExc
0 –10s
0.01 s
10
6
k0_InvOvExc
1 –2
0.01
1.5
7
t0_InvOvExc
1–3000 s
0.01 s
1
8
k1_InvOvExc
1 –2
0.01
1.45
9
t1_InvOvExc
1–3000 s
0.01 s
2
10
k2_InvOvExc
1 –2
0.01
1.1
11
t2_InvOvExc
1–3000 s
0.01 s
2
12
k3_InvOvExc
1 –2
0.01
1.3
13
t3_InvOvExc
1–3000 s
0.01 s
15
14
k4_InvOvExc
1 –2
0.01
1.25
15
t4_InvOvExc
1 –3000 s
0.01 s
30
16
k5_InvOvExc
1 –2
0.01
1.1
17
t5_InvOvExc
1 –3000 s
0.01 s
1000
18
TrpLog_InvOvExc
0000 - FFFF
1
1FFF
NOTE: Symbol of the parameters listed in above table are used for communication,
printing and displaying on LCD.
6.3.5.2 Explanation of the parameters and notice for setting
1.
No.1--[k_OvExc]
Setting of definite time overexcitation protection.
2.
No.2-- [t_OvExc]
Time delay of definite time overexcitation protection.
3.
No.3-- [TrpLog_OvExc]
Tripping output logic setting of definite time overexcitation protection.
4.
No.4-- [k_Alm_OvExco]
Setting of definite time overexcitation alarm. Setting of alarm shall be less than that of definite time
overexcitation protection.
5.
No.5-- [t_Alm_OvExc]
Time delay of definite time overexcitation alarm.
6.
No.6-- [k0_InvOvExc]
Upper limit setting of inverse time overexcitation protection: n0.
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7.
No.7--[t0_InvOvExc]
Time delay for upper limit setting of inverse time overexcitation protection: t0.
8.
No.8-- [k1_InvOvExc]
Setting 1 of inverse time overexcitation protection: n1. Setting range is 1.00 – 2.00.
Relation between various setting s of n is:
n0 ≥ n1 ≥ n2 ≥ n3 ≥ n4 ≥ n5
9.
No.9-- [t1_InvOvExc]
Time delay at the point n1 on inverse time overexcitation curve: t1.
The range of delay of various inverse time overexcitation protection stage is 0s to 3000 s, i.e.
0~50 min.
Relation between various settings of t is:
t0 ≤ t1 ≤ t2 ≤ t3 ≤ t4 ≤ t5
10. No.10-- [k2_InvOvExc]
Setting 2 of Inverse time overexcitation protection: n2.
11. No.11-- [t2_InvOvExc]
Time delay at the point n2 on inverse time overexcitation curve: t2.
12. No.12-- [k3_InvOvExc]
Setting 3 of Inverse time overexcitation protection: n3.
13. No.13-- [t3_InvOvExc3]
Time delay at the point n3 on inverse time overexcitation curve: t3.
14. No.14-- [k4_InvOvExc]
Setting 4 of Inverse time overexcitation protection: n4.
15. No.15-- [t4_InvOvExc]
Time delay at the point n4 on inverse time overexcitation curve: t4.
16. No.16-- [k5_InvOvExc]
Lower limit setting of inverse time overexcitation protection: n5.
17. No.17-- [t5_InvOvExc]
Time delay for lower limit of setting of inverse time overexcitation protection: t5.
18. No.18-- [TrpLog_InvOvExc]
Tripping output logic setting of definite time overexcitation protection.
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6.3.5.3 Setting path
Settings of HV side overexcitation protection are accessible in the following path:
Main Menu -> SETTING -> PROT SETTINGS -> OVEXC PROT -> [setting symbol]
6.3.6 Restricted earth fault protection settings (HV side, A side and B side)
Restricted earth fault protection is also called zero-sequence differential protection. There are
restricted earth fault protection of HV side, A side and B side and each side protection is
independent to another side but with the same protection theory and scheme logic. Here take the
protection of HV side as an example to give detailed settings explanation.
6.3.6.1 Setting list
Table 6.3-1 REFsetting of HVS side
No.
Symbol
Range
Step
Default
1
I_Pkp_PcntREF_HVS
0.10In-10.00In
0.01In
0.3
2
I_InstREF
2In-50In
0.01In
6
3
Slope_PcntREF
0.3-0.7
0.01
0.3
1
1FFFF
logic setting “1”- enable, “0”–disable
4
TrpLog_REF
0000 –FFFF
5
En_InstREF
0/1
1
6
En_PcntREF_HVS
0/1
1
Table 6.3-2 REF setting of LV side A
No.
Symbol
Range
Step
Default
1
I_Pkp_PcntREF_Br1
0.10In-10.00In
0.01In
0.3
2
I_InstREF_Br1
2In-50In
0.01In
6
3
Slope_PcntREF_Br1
0.3-0.7
0.01
0.3
1
1FFFF
logic setting “1”- enable, “0”–disable
4
TrpLog_REF_Br1
0000 –FFFF
5
En_InstREF_Br1
0/1
1
6
En_PcntREF_Br1
0/1
1
T
Table 6.3-3 REF setting of LV side B
No.
Symbol
Range
Step
Default
1
I_Pkp_PcntREF_Br2
0.10In-10.00In
0.01In
0.3
2
I_InstREF_Br2
2In-50In
0.01In
6
3
Slope_PcntREF_Br2
0.3-0.7
0.01
0.3
logic setting “1”- enable, “0”–disable
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4
TrpLog_REF_Br2
0000 –FFFF
1
1FFFF
5
En_InstREF_Br2
0/1
1
6
En_PcntREF_Br2
0/1
1
NOTE: Symbol of the parameters listed in above tables is used for communication,
printing and displaying on LCD.
6.3.6.2 Explanation of the parameters and notice for setting
NOTE: To configure setting of zero-sequence percentage differential protection, you can
follow the method provided in of section 6.3.1, calculation of percentage differential
protection, where U shall be taken as 0. Polarity of CT for zero-sequence differential
protection at various sides is as shown in Figure 1.3-1~Figure 1.3-4 . Positive polarity of
CT is at busbar side on HV and LV sides and at transformer side on neutral point.
1.
No.1--[I_Pkp_PcntREF_HVS]
This is pickup setting of zero-sequence percentage differential element of restricted earth fault
protection, which is also the setting of fault detector of that element.
Calculation of this setting is based on rated secondary current of the transformer. If a setting got
from calculation is together with its unit Ampere, this setting shall be divided by rated secondary
current of this side of the CT, to get per unit value. The setting of zero- sequence differential
protection shall be greater than the maximum imbalanced current while transformer operates on
normal rated load, i.e.
I0 cdqd K rel (K er m)I n
(Equation 6.3-14)
Where:
I0 cdqd represents setting [I_Pkp_PcntREF_HVS].
In is rated secondary current of CT.
Krel is reliability coefficient (generally Krel = 1.3 - 1.5).
Ker is the ratio errors of CT (for type 10P, K er = 0.03×2; for class 5P and class TP, K er =0.01X2);
m is the error caused by the difference between ratios of CT at all sides, 0.05 is recommended.
For practical engineering calculation, I ocdqd =(0.2 - 0.5)I e is reasonable and unbalanced current
in differential scheme during maximum load of transformer shall be measured.
Sensitivity check for zero sequence percentage differential protection
Sensitivity of restricted earth fault protection shall be checked with the solid earth fault in its
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protected zone.
K sen ≥ 2 is required. In solid earthed system, distribution of zero sequence
current for single-phase-to-earth fault depends on the configuration of zero sequence network of
power system. Magnitude of the single-phase-to-earth fault current depends on not only zero
sequence impedance of system but also positive and negative sequence impedance in various
power system operation modes. When power system is in maintenance status, in order to
remain the zero sequence network unchanged and increase sensitivity for earth fault protection,
the 220 kV power system is generally compensated by properly changing earth mode of the
transformer. Neutral point of transformer of 400 kV power system is now generally earthed with
small reactance. Therefore, sensitivity of zero sequence differential protection shall be checked
in minimum operation mode for 220 kV power system and minimum operation mode or small
maintenance mode for 400 kV power system.
2.
No.2--[I_InstREF]
Setting of unrestrained instantaneous zero-sequence differential protection element of restricted
earth fault protection, this protection is used to clear serious single-phase-to-earth fault quickly
and prevent operation delay caused by CT saturation.
3.
No.3--[Slope_PcntREF]
Restraint coefficient of zero-sequence percentage differential protection element of restricted
earth fault protection.
4.
No.4--[TrpLog_REF]
Tripping output logic setting of restricted earth fault protection which is used to specify which
breaker or breakers will be tripped by the protection.
5.
No.5--[En_InstREF]
Logic setting of enabling unrestrained instantaneous zero-sequence differential protection
element of restricted earth fault protection.
6.
No.6--[En_PcntREF_HVS]
Logic setting of enabling zero-sequence percentage differential protection element of restricted
earth fault protection.
6.3.6.3 Setting path
Settings of restricted earth fault protection (HV side/ A side / B side) are accessible in the following
path respectively:
Main Menu -> SETTING -> PROT SETTINGS -> HVS REF PROT -> [setting symbol]
Main Menu -> SETTING -> PROT SETTINGS -> Br1 REF PROT -> [setting symbol]
Main Menu -> SETTING -> PROT SETTINGS -> Br2 REF PROT -> [setting symbol]
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6.3.7 HV side pole disagreement protection settings
6.3.7.1 Setting list
No
Symbol
Range
Step
Default
1
I_OC_PD
0.10 –20.00 A
0.01 A
1
2
I_NegOC_PD
0.10 –20.00 A
0.01 A
1
3
I_ROC_PD
0.10 –20.00 A
0.01 A
3
4
t_PD1
0.00 –10.00 s
0.01 s
0.5
5
TrpLog_PD1
0000 –FFFF
1
000F
6
t_PD2
0.00 –10.00 s
0.01 s
1
7
TrpLog_PD2
0000 –FFFF
1
00FF
logic setting “1”- enable, “0”–disable
8
En_NegOC_PD
0/1
1
9
En_ROC_PD
0/1
1
10
En_ExtTrp_Ctrl_PD2
0/1
1
11
En_OC_PD2
0/1
0
NOTE: Symbol of the parameters listed in above table is used for communication,
printing and displaying on LCD.
6.3.7.2 Explanation of the parameters and notice for setting
1.
No.1--[I_OC_PD]
Setting of pole-disagreement phase current element.
2.
No.2--[I_NegOC_PD]
Setting of pole-disagreement negative-sequence current element.
3.
No.3--[I_ROC_PD]
Setting of pole-disagreement zero-sequence current element.
4.
No.4--[t_PD11]
Delay of stage 1 of pole disagreement protection.
5.
No.5--[TrpLog_PD1]
Tripping output logic setting of pole disagreement protection stage 1 which is used to specify
which breaker or breakers will be tripped by the protection.
6.
No.6--[t_PD2]
Delay of stage 2 of pole disagreement protection.
7.
No.7--[TrpLog_PD2]
Tripping output logic setting of pole disagreement protection stage 2 which is used to specify
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which breaker or breakers will be tripped by the protection.
8.
No.8--[En_NegOC_PD.]
Logic setting of enabling pole disagreement protection supervised by negative-sequence current
element.
9.
No.9--[En_ROC_PD]
Logic setting of enabling pole disagreement protection supervised by zero-sequence current
element.
10. No.10--[En_ExtTrp_Ctrl_PD2]
Logic setting of enabling pole disagreement protection stage 2 initiated by binary input of
protection tripping contact.
11. No.11--[En_OC_PD2]
Logic setting of enabling pole disagreement protection stage 2 supervised by phase current
element.
6.3.7.3 Setting path
Settings of HV side pole disagreement protection are accessible in the following path:
Main Menu -> SETTING -> PROT SETTINGS -> HVS PD Prot -> [setting symbol]
6.3.8 Voltage controlled overcurrent protection settings of branch A1 or B1
Voltage controlled overcurrent protections of branch A1 and branch A2 have same protection
theory and scheme logic but with independent settings. Here take the protection of branch A1 as
example to give detailed settings explanation.
6.3.8.1 Setting list
Table 6.3-4 backup protection settings of branch A1 of LV side
No.
Symbol
Range
Step
Default
1
V_NegOV_VCE_Br11
1.00 –-20.00 V
0.01V
4
2
Vpp_VCE_Br11
10.00–100.00V
0.01V
60
3
I_OC1_Br11
0.10 –100.00 A
0.01A
20
4
t_OC1_Br11
0.00 –10.00 s
0.01 S
1
5
TrpLog_OC1_Br11
0000-FFFF
1
0021
6
I_OC2_Br11
0.10 –100.00 A
0.01 A
17
7
t_OC2_Br11
0.00 –10.00 s
0.01 s
2
8
TrpLog_OC2_Br11
0000-FFFF
1
0003
9
I_InvOC_Br11
0..05 –100A
0.01A
1
10
t_InvOC_Br11
0.5 –10 s
0.01 s
1
11
TrpLog_InvOC_Br11
0000-FFFF
1
0F01
logic setting “1”- enable, “0”–disable
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No.
Symbol
Range
Step
Default
12
En_VCE_Ctrl_OC1_Br11
0/1
1
13
En_VCE_Ctrl_OC2_Br11
0/1
1
14
En_OC2_SOTF_Br11
0/1
1
15
Opt_VTS_Ctrl_OC_Br11
0/1
1
16
En_FixDly_InvOC_Br11
0/1
0
Table 6.3-5 backup protection settings of branch B1 of LV side
No.
Symbol
Range
Step
Default
1
V_NegOV_VCE_Br21
1.00 –-20.00 V
0.01V
4
2
Vpp_VCE_Br21
10.00–100.00V
0.01V
60
3
I_OC1_Br21
0.10 –100.00 A
0.01A
20
4
t_OC1_Br11
0.00 –10.00 s
0.01 S
1
5
TrpLog_OC1_B211
0000-FFFF
1
0021
6
I_OC2_Br21
0.10 –100.00 A
0.01 A
17
7
t_OC2_Br21
0.00 –10.00 s
0.01 s
2
8
TrpLog_OC2_Br21
0000-FFFF
1
0003
9
I_InvOC_Br21
0..05 –100A
0.01A
1
10
t_InvOC_Br21
0.5 –10 s
0.01 s
1
11
TrpLog_InvOC_Br21
0000-FFFF
1
0F01
logic setting “1”- enable, “0”–disable
12
En_VCE_Ctrl_OC1_Br21
0/1
1
13
En_VCE_Ctrl_OC2_Br21
0/1
1
14
En_OC2_SOTF_Br21
0/1
1
15
Opt_VTS_Ctrl_OC_Br21
0/1
1
16
En_FixDly_InvOC_Br21
0/1
0
NOTE: Symbol of the parameters listed in above tables is used for communication,
printing and displaying on LCD.
6.3.8.2 Explanation of the parameters and notice in parameter setting
1.
No.1--[V_NegOV_VCE_Br11]
Setting of negative sequence voltage control element of branch A1 or B1. Setting and displayed
value of negative sequence voltage are U2.
2.
No.2-- [Vpp_VCE_Br11]
Setting of phase-to-phase undervoltage control element of branch A1 or B1.
3.
No.3-- [I_OC1_Br11]
Setting of stage1 of overcurrent protection, which shall coordinate with high setting of
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instantaneous overcurrent protection of largest motor connected with LV busbar:
I opI K co K rel K st
PN
1
3U N cos n TA
(Equation 6.3-15)
Where:
K rel is reliability coefficient, (generally K rel = 1.5).
K co is the coordination coefficient, (generally K co = 1.1).
K st is the multiple of starting current of motor, (generally K st = 7).
PN is the power of the largest motor (eg. pump for water supply) connected with the LV busbar.
U N is the rated voltage of the motor.
cos is the power factor of the motor, (generally cos =0.75).
nTA is the current ratio of CT of the branch.
4.
No.4-- [t_OC1_Br11]
Time delay of stage 1 of overcurrent protection, which shall coordinate with time delay of
instantaneous overcurrent protection on feeder connected to LV busbar.
5.
No.5-- [TrpLog_OC1_Br11]
Tripping output logic setting of overcurrent stage 1 which is used to specify which breaker or
breakers will be tripped by the protection.
6.
No.6-- [I_OC2_Br11]
Setting of stage 2 of overcurrent protection, which shall be configured to ensure the protection can
keep quiescent reliably when rated current passes through the branch:
K
IopII rel I e
Kr
(Equation 6.3-16)
Where:
K rel is the reliability coefficient, (generally K rel = 1.2);
Kr is the return coefficient, (generally K r = 0.85-0.95);
I e is the rated secondary current of branch of the startup/standby transformer.
7.
No.7-- [t_OC2_Br11]
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Time delay of stage 2 of overcurrent protection, which shall coordinate with time delay of time
delayed overcurrent protection of feeders connected to LV busbar.
8.
No.8-- [TrpLog_OC2_Br11]
Tripping output logic setting of overcurrent protection stage 2, which is used to specify which
breaker or breakers will be tripped by the protection.
9.
No.9-- [I_InvOC_Br11]
Current threshold of inverse time overcurrent protection.
The following criterion is needed to be satisfied.
[I_InvOC_Br11] ≤ [I_OC2_Br11]
10. No.10-- [t_InvOC_Br11]
Time multiple setting of inverse time overcurrent protection.
11. No.11-- [TrpLog_InvOC_Br11]
Tripping output logic setting of inverse time overcurrent protection, which is used to specify which
breaker or breakers will be tripped by the protection.
12. No.12-- [En_VCE_Ctrl_OC1_Br11]
Logic setting of enabling overcurrent protection stage 1 controlled by voltage element of the
corresponding branch.
13. No.13-- [En_VCE_Ctrl_OC2_Br11]
Logic setting of enabling overcurrent protection stage 2 controlled by voltage element of the
corresponding branch.
14. No.14-- [En_OC2_SOTF_Br11]
Logic setting of enabling accelerating tripping of stage 2.
15. No.15-- [Opt_VTS_Ctrl_OC_Br11]
Protection performance option during VT circuit failure.
“1”: when VT circuit failure at one side is detected, voltage control element at the same side will be
disabled.
“0”: when VT circuit failure at one side is detected, the overcurrent relay will become an
overcurrent relay without voltage control.
16. No.16--[ En_FixDly_InvOC_Br11]
Logic setting of enabling additional 100ms delay for inverse time overcurrent protection.
6.3.8.3 Setting path
Settings of voltage controlled overcurrent protection of branch A1/B1 are in the following path
respectively:
Main Menu -> SETTING- -> PROT SETTINGS -> BR11 BAK PROT -> [setting symbol]
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Main Menu -> SETTING- -> PROT SETTINGS -> BR21 BAK PROT -> [setting symbol]
6.3.9 Voltage controlled overcurrent protection settings of branch A2, A3, B2
and B3.
Voltage controlled overcurrent protections of branch A2, A3, B2 and B3 same in protection theory
and scheme logic but with independent settings.
The only difference between settings of these branch and those of branch A1 and B2 is just that
this has no settings of inverse time overcurrent protection. Therefore, for the setting configurations
please refer to section 6.3.8.
6.3.9.1 Setting list
Table 6.3-6 backup protection settings of branch A2 of LV side
No.
Symbol
Range
Step
Default
1
V_NegOV_VCE_Br12
1.00 –20.00 V
0.01V
4
2
Vpp_VCE_Br12
10.0 – 100.00V
0.01V
60
3
I_OC1_Br12
0.10 A – 100.00 A
0.01A
20
4
t_OC1_Br12
0.00 –10.00 s
0.01 S
1
5
TrpLog_OC1_Br12
0000-FFFF
1
0021
6
I_OC2_Br12
0.10 –100.00 A
0.01 A
17
7
t_OC2_Br12
0.00 –10.00 s
0.01 s
2
8
TrpLog_OC2_Br12
0000-FFFF
1
0003
logic setting “1”- enable, “0”–disable
9
En_VCE_Ctrl_OC1_Br12
0/1
1
10
En_VCE_Ctrl_OC2_Br12
0/1
1
11
En_OC2_SOTF_Br12
0/1
1
12
Opt_VTS_Ctrl_OC_Br12
0/1
1
Table 6.3-7 backup protection settings of branch B2 of LV side
No.
Symbol
Range
Step
Default
1
V_NegOV_VCE_Br22
1.00 –20.00 V
0.01V
4
2
Vpp_VCE_Br22
10.0 –100.00V
0.01V
60
3
I_OC1_Br22
0.10 A –100.00 A
0.01A
20
4
t_OC1_Br22
0.00 –10.00 s
0.01 S
1
5
TrpLog_OC1_Br22
0000-FFFF
1
0021
6
I_OC2_Br22
0.10 –100.00 A
0.01 A
17
7
t_OC2_Br22
0.00 –10.00 s
0.01 s
2
8
TrpLog_OC2_Br22
0000-FFFF
1
0003
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logic setting “1”- enable, “0”–disable
9
En_VCE_Ctrl_OC1_Br22
0/1
1
10
En_VCE_Ctrl_OC2_Br22
0/1
1
11
En_OC2_SOTF_Br22
0/1
1
12
Opt_VTS_Ctrl_OC_Br22
0/1
1
Table 6.3-8 backup protection settings of branch A3 of LV side
No.
Symbol
Range
Step
Default
1
V_NegOV_VCE_Br13
1.00 –20.00 V
0.01V
4
2
Vpp_VCE_Br13
10.0 – 100.00V
0.01V
60
3
I_OC1_Br13
0.10 A – 100.00 A
0.01A
20
4
t_OC1_Br13
0.00 –10.00 s
0.01 S
1
5
TrpLog_OC1_Br13
0000-FFFF
1
0021
6
I_OC2_Br13
0.10 –100.00 A
0.01 A
17
7
t_OC2_Br13
0.00 –10.00 s
0.01 s
2
8
TrpLog_OC2_Br13
0000-FFFF
1
0003
logic setting “1”- enable, “0”–disable
9
En_VCE_Ctrl_OC1_Br13
0/1
1
10
En_VCE_Ctrl_OC2_Br13
0/1
1
11
En_OC2_SOTF_Br13
0/1
1
12
Opt_VTS_Ctrl_OC_Br13
0/1
1
Table 6.3-9 backup protection settings of branch B3 of LV side
No.
Symbol
Range
Step
Default
1
V_NegOV_VCE_Br23
1.00 –20.00 V
0.01V
4
2
Vpp_VCE_Br23
10.0 – 100.00V
0.01V
60
3
I_OC1_Br23
0.10 A – 100.00 A
0.01A
20
4
t_OC1_Br23
0.00 –10.00 s
0.01 S
1
5
TrpLog_OC1_Br23
0000-FFFF
1
0021
6
I_OC2_Br23
0.10 –100.00 A
0.01 A
17
7
t_OC2_Br23
0.00 –10.00 s
0.01 s
2
8
TrpLog_OC2_Br23
0000-FFFF
1
0003
logic setting “1”- enable, “0”–disable
9
En_VCE_Ctrl_OC1_Br23
0/1
1
10
En_VCE_Ctrl_OC2_Br23
0/1
1
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11
En_OC2_SOTF_Br23
0/1
1
12
Opt_VTS_Ctrl_OC_Br23
0/1
1
NOTE: Symbol of the parameters listed in above table is used for communication,
printing and displaying on LCD.
6.3.9.2 Explanation of the parameters and notice for setting
Please refer to the similar symbol in section 6.3.8.2.
6.3.9.3 Setting path
Settings of voltage controlled overcurrent protection of branch A2/A3/B2/B3 are in the following
path respectively:
Main Menu -> SETTING -> PROT SETTINGS-> BR12 BAK PROT -> [setting symbol]
Main Menu -> SETTING -> PROT SETTINGS -> BR22 BAK PROT -> [setting symbol]
Main Menu -> SETTING -> PROT SETTINGS -> BR13 BAK PROT -> [setting symbol]
Main Menu -> SETTING -> PROT SETTINGS -> BR23 BAK PROT -> [setting symbol]
6.3.10 LV side earth fault protection settings
Zero-sequence overcurrent protections of LV side A and B are same in protection theory and
scheme logic but with independent settings. Therefore, settings of LV side A are taken as example
to give detailed explanation.
6.3.10.1 Setting list
Table 6.3-10 Earth fault setting of LV side A
No.
Symbol
Range
Step
Default
1
I_ROC1_Br1
0.10 –100.00 A
0.01 A
20
2
t_ROC1_Br1
0.00 –10.00 s
0.01 s
1
3
TrpLog_ROC1_Br1
0000-FFFF
1
0021
4
I_ROC2_Br1
0.10 –100.00 A
0.01 A
17
5
t_ROC2_Br1
0.00 –10.00 s
0.01 s
2
6
TrpLog_ROC2_Br1
0000-FFFF
7
V_Alm_ROV_Br1
10.0–220.00V
0.01 V
150
8
t_Alm_ROV_Br1
0.00 –10.00 s
0.01 s
0.5
0003
Table 6.3-11 Earth fault setting of LV side B
No.
Symbol
Range
Step
Default
1
I_ROC1_Br2
0.10 –100.00 A
0.01 A
20
2
t_ROC1_Br2
0.00 –10.00 s
0.01 s
1
3
TrpLog_ROC1_Br2
0000-FFFF
1
0021
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4
I_ROC2_Br2
0.10 –100.00 A
0.01 A
17
5
t_ROC2_Br2
0.00 –10.00 s
0.01 s
2
6
TrpLog_ROC2_Br2
0000-FFFF
7
V_Alm_ROV_Br2
10.0–220.00V
0.01 V
150
8
t_Alm_ROV_Br2
0.00 –10.00 s
0.01 s
0.5
0003
NOTE: Symbol of the parameters listed in above table is used for communication,
printing and displaying on LCD.
6.3.10.2 Explanation of the parameters and notice in parameter setting
1.
No.1-- [I_ROC1_Br1]
Setting of stage 1 of zero-sequence overcurrent protection.
2.
No.2-- [t_ROC1_Br1]
Time delay of stage 1 of zero-sequence overcurrent protection.
3.
No.3-- [TrpLog_ROC1_Br1]
Tripping output logic setting of zero-sequence overcurrent protection stage 1.
4.
No.4-- [I_ROC2_Br1]
Setting of stage 2 of zero-sequence overcurrent protection.
5.
No.5-- [t_ROC2_Br1]
Time delay of stage 2 of zero-sequence overcurrent protection.
6.
No.6-- [TrpLog_ROC2_Br1]
Tripping output logic setting of zero-sequence overcurrent protection stage 2.
7.
No.7-- [V_Alm_ROV_Br1]
Setting of zero-sequence overvoltage alarm.
8.
No.8-- [t_Alm_ROV_Br1]
Time delay of zero-sequence overvoltage alarm.
6.3.10.3 Setting path
Settings of zero-sequence overcurrent protection of side A/B are accessible in the following path
respectively:
Main Menu -> SETTING -> PROT SETTINGS -> BR1 EF PROT -> [setting symbol]
Main Menu -> SETTING -> PROT SETTINGS -> BR2 EF PROT -> [setting symbol]
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6.4 Calculated System Parameters
Calculated parameters include rated primary current, rated secondary current, secondary rated
voltage and CT ratio correction coefficient of transformer differential protection. Those parameters
are all got from calculation based on transformer parameters listed in section 6.2.
NOTE: These parameters are used for reference of settings check and protection test,
and not used for configuration.
6.4.1 Parameters list
No.
Symbol
Range
Remarks
Rated primary current
1
I1b_CT_HVS
0 –60000 A
rated primary current of HV side
2
I1b_SpareCT_HVS
0 –60000 A
3
I1b_CT_Br11
0 –60000 A
rated primary current of CT of branch A1
4
I1b_CT_Br12
0 –60000 A
rated primary current of CT of branch A2
5
I1b_CT_Br13
0 –60000 A
rated primary current of CT of branch A3
6
I1b_CT_Br21
0 –60000 A
rated primary current of CT of branch B1
7
I1b_CT_Br22
0 –60000 A
rated primary current of CT of branch B2
8
I1b_CT_Br23
0 –60000 A
rated primary current of CT of branch B3
rated primary current of CT of HV side backup
protection
Rated secondary current
9
I2b_CT_HVS
0 –10.00 A
rated secondary current of HV side
10
I2b_SpareCT_HVS
0 –10.00 A
11
I2b_CT_Br11
0 –10.00 A
rated secondary current of CT of branch A1
12
I2b_CT_Br12
0 –10.00 A
rated secondary current of CT of branch A2
13
I2b_CT_Br13
0 –10.00 A
rated secondary current of CT of branch A3
14
I2b_CT_Br21
0 –10.00 A
rated secondary current of CT of branch B1
15
I2b_CT_Br22
0 –10.00 A
rated secondary current of CT of branch B2
16
I2b_CT_Br23
0 –10.00 A
rated secondary current of CT of branch B3
rated secondary current of CT of HV side backup
protection
CT ratio correction coefficient of differential protection
17
k_Diff_HVS
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CT ratio correction coefficient of HV side
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18
k_Diff_Br11
0 –16.00
CT ratio correction coefficient of branch A1
19
k_Diff_Br12
0 –16.00
CT ratio correction coefficient of branch A2
20
k_Diff_Br13
0 –16.00
CT ratio correction coefficient of branch A3
21
k_Diff_Br21
0 –16.00
CT ratio correction coefficient of branch B1
22
k_Diff_Br22
0 –16.00
CT ratio correction coefficient of branch B2
23
k_Diff_Br23
0 –16.00
CT ratio correction coefficient of branch B3
24
k_NP_REF_HVS
0 –16.00
25
k_Calc_REF_HVS
0 –16.00
26
k_NP_REF_Br1
0 –16.00
27
k_Calc_REF_Br11
0 –16.00
28
k_Calc_REF_Br12
0 –16.00
29
k_Calc_REF_Br13
0 –16.00
30
k_NP_REF_Br2
0 –16.00
31
k_Calc_REF_Br21
0 –16.00
32
k_Calc_REF_Br22
0 –16.00
33
k_Calc_REF_Br23
0 –16.00
CT ratio correction coefficient of zero sequence
current at neutral point of HV side
CT ratio correction coefficient of zero sequence
current of HV side
CT ratio correction coefficient zero sequence
current at neutral point of A side
CT ratio correction coefficient of zero sequence
current of branch A1
CT ratio correction coefficient of zero sequence
current of branch A2
CT ratio correction coefficient of zero sequence
current of branch A3
CT ratio correction coefficient zero sequence
current at neutral point of B side
CT ratio correction coefficient of zero sequence
current of branch B1
CT ratio correction coefficient of zero sequence
current of branch B2
CT ratio correction coefficient of zero sequence
current of branch B3
6.4.2 Parameter path
Parameters of rated primary current are accessible in the following path:
Main Menu -> SETTING -> CALC SETTINGS -> PRI RATED CURR-> [parameter symbol]
Parameters of rated secondary current are accessible in the following path:
Main Menu -> SETTING -> CALC SETTINGS -> SEC RATED CURR-> [parameter symbol]
Parameters of CT ratio correction coefficient of differential protection are accessible in the
following path:
Main Menu -> SETTING ->CALC SETTINGS -> DIFF CORR COEF-> [parameter symbol]
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Chapter 7 Human Machine Interface
The user can access the relay from the front panel of the device. Local communication with the
relay is possible using a computer (PC) with the RCSPC software via an RS232 port on the front
panel. Furthermore, remote communication is also possible using a PC with the special software
via a RS485 port.
This chapter describes human machine interface (HMI), menu tree and LCD display. At the same
time how to input settings using keypad is described in detail. Finally, this chapter introduces the
RCSPC software and wave analysis software.
7.1 Human Machine Interface Overview
7.1.1 Design
The human-machine interface consists of a human-machine interface (HMI) module which allows
a communication as simple as possible for the user. The HMI module helps to draw your attention
to something that has occurred which may activate a LED or a report displayed on the LCD.
Operator can locate the data of interest by navigate keypad.
The HMI module includes:
The human-machine interface (HMI) LCD display
A 240×128 dot matrix backlight LCD display visible in dim lighting conditions, which is used for
programming, monitoring, fault diagnostics and setting, etc. when there is a trip or alarm condition,
diagnostic messages are displayed.
The LED
Numeric keypad and command keys allow for full access to the relay
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ES C
GR P
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Figure 7.1-1 The figure shows the LCD (left), LED (middle) and Keypad (right)
No.
Item
1
LCD display
2
Status indication LEDs
3
ENT, ESC, GRP and Navigation buttons
4
DB9 port
5
Device type, name and Manufacturer
ESC
GR
P
7.1.2 Keypad operation
Figure 7.1-2 Keypad buttons
No.
248
Item
Function
1
“▲ ”and “▼ ”
move cursor left-fight among selectable target
2
“◄ ”and “► ”
move cursor up-down among selectable target
3
“+”and “-”
add or subtract in the digit
4
ENT
provide Enter/Execute function
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No.
Item
Function
5
GRP
setting Group selection
5
ESC
exit the present menu or return to the upper menu
NOTE: Any setting change operation should complete with simply pressing “+”, “◄ ”,
“▲ ”,and “- ”in sequence, as a password. Without the operation, modifying settings is
invalid.
Report delete operation should executed by pressing “+”, “-”, “+”, “- ”, “ENT ”in sequence
after exiting the main menu.
7.1.3 LED indications
HEALTHY
VT ALARM
CT ALARM
ALARM
TRIP
Figure 7.1-3 The figure shows the LED indications
LED
Color
Off
HEALTHY
Steady Green
VT ALM
CT ALM
ALARM
TRIP
Off
Steady Yellow
Off
Yellow
Off
Steady Yellow
Off
Steady Red
Remarks
When the equipment is out of DC power supply or any hardware
defect is detected during self-test.
Lit when the equipment is in service and ready for operation.
When equipment in normal operating condition.
Lit when VT circuit failure alarm is issued.
When equipment in normal operating condition.
Lit when CT circuit abnormality or failure alarm is issued.
When the equipment is in normal operating condition.
Lit when any abnormality alarm is issued.
when the equipment is in normal operating condition
Lit when any protection element trips.
NOTE: The “HEALTHY”LED can only be turned on by supplying DC to equipment again
to restart the relay.
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The “TRIP”LED is turned on once any protection element operates and remains lit even
after the trip command goes off. The “TRIP”LED can be turned off by pressing the signal
RESET button on the front panel.
“CT ALARM”LED and “VT ALAEM”LED are turned on as long as alarm is present. When
alarm signals disappear, it will be turned off. However if CT circuit failure in differential
protection is detected, “CT ALARM”LED can be turned off only by pressing the signal
RESET button on the front panel.
The “ALARM”LED is turned on and turned off the same as “CT ALARM”or “VT ALARM”
LED mentioned above. Besides, some other abnormalities of equipment will also turn on
the “ALARM”LED.
7.1.4 Communication port
1
Figure 7.1-4 Reare Communication ports
No.
1
Item
DB9 RS232 port for communication with a PC for local communication.
7.2 Understand the HMI Menu Tree
7.2.1 Overview
This part presents the main layout of the menu tree for the local human-machine interface (HMI).
The menu tree includes menus for:
VALUES
REPORT
PRINT
SETTING
CLOCK
VERSION
DEBUG
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Figure 7.2-1
View diagram of menu
In order to enter the main menu, please press key “▲ ” or “ESC” under the default display
condition. If the current display is the latest report display or self-supervision report, the operation
step is same.
In the main menu, the highlighted submenu is activated. If this is marked with “► ”, move cursor
on it and press key “► ”, lower level submenu will be popped. Press key “◄ ”to return to upper
level submenu. Key “▲ ” or “▼ ” is used to scroll submenu in the main menu upward or
downward cyclically. Please use the keys “▲ ”and”▼ ”to scroll between the submenus, to press
key “ENT”to display the chosen item. If you want to exit, please press key “ESC”to return to the
submenu. Press “ESC”to return to default display with the cursor staying in the submenu or press
key “◄ “to return to upper level submenu until back to main menu.
Please see the total command menu in following diagram which will be introduced in details.
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Figure 7.2-2 Tree diagram of total command menu
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7.2.2 Values
This menu is used to display real time AC voltage and current sampled value and binary inputs of
the equipment. These data reflect clearly operation condition of the equipment.
“VALUES”has following submenus.
No.
Item
description
1
CPU METERING
Sampled value on CPU module.
2
CPU BI STATE
Binary input on CPU module.
3
MON METERING
Sampled value on MON module.
4
MON BI STATE
Binary input on MON module.
5
PHASE ANGLE
Phase angle of sampled value on MON module.
The submenus of “CPU METERING”and “CPU BI STATE”are same as “MON METERING”and
“MON BI STATE” submenus except that they display data acquired by CPU module and MON
module respectively. Here only take “CPU VALUES”, “CPU BI STATE” and “PHASE ANGLE”
submenus to deploy.
7.2.2.1 CPU METERING
“CPU METERING”has following submenus.
No.
Item
description
To display magnitudes of differential current of differential
1
DIFF METERING
2
REF METERING
3
HVS METERING
To display magnitudes of AC voltage and current of HV side.
4
BR METERING
To display magnitudes of AC voltage and current of branches.
protection
To display magnitudes of differential current of restricted earth fault
protection
(1) “DIFF METERING”has following submenus.
No.
Item
1
DIFF CURR
2
CORR CURR
3
ALL SIDES CURR
description
To display magnitudes of differential current of differential
protection.
To display magnitudes of each side corrected current of differential
protection.
To display magnitudes of each side current of differential
protection.
(2) “REF METERING”has following submenus.
No.
Item
1
HVS
2
BR1
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description
To display magnitudes of zero sequence currents of restricted
earth fault protection of HV side.
To display magnitudes of zero sequence currents of restricted
earth fault protection of A side.
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3
To display magnitudes of zero sequence currents of restricted
BR2
earth fault protection of B side.
(3) “HVS METERING”has no submenus.
(4) “BR METERING”has following submenus.
No.
Item
description
1
BR11
To display magnitudes of current and voltage of branch A1.
2
BR12
To display magnitudes of current and voltage of branch A2.
3
BR13
To display magnitudes of current and voltage of branch A3.
4
BR1 ZERO SEQ
To display magnitudes of zero sequence current and voltage of A side.
5
BR21
To display magnitudes of current and voltage of branch B1.
6
BR22
To display magnitudes of current and voltage of branch B2.
7
BR23
To display magnitudes of current and voltage of branch B3.
8
BR2 ZERO SEQ
To display magnitudes of zero sequence current and voltage of B side.
7.2.2.2 CPU BI STATE
“CPU BI STATE”has following submenus
No.
Item
description
1
PROT EBI
To display status of binary input of contact.
2
MISC BI
To display status of binary input of others
3
MON FD
To display status of virtual binary input of fault detector pickup from CPU
module.
7.2.2.3 MON METERING
Same as “CPU METERING”submenu.
7.2.2.4 MON BI STATE
Same as “CPU BI STATE”submenu.
7.2.2.5 PHASE ANGLE
“PHASE ANGLE”has following submenus.
No.
Item
description
To display angles of between sampled currents of HV side and that
1
BETWEEN SIDES
2
HVS
To display angles of sampled AC voltage and current of HV side.
3
BR1
To display angles of sampled current of branches of A side.
4
BR2
To display angles of sampled current of branches of B side.
5
REF
of each branch.
To display angles of sampled current for restricted earth fault
protection.
NOTE: There is no reference vector for angle calculation, so angles of current or voltage
are phase-to-phase angle.
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7.2.3 Report
This menu displays trip report, abnormality report and change of binary input status report. The
equipment can store 32 pieces of each kind of these reports in non-volatile memory.
“REPORT”has following submenus.
No.
Item
description
1
TRIP REPORT
To display trip report.
2
ALARM REPORT
To display self-supervision report.
3
BI CHG REPORT
To display report of binary input change.
7.2.4 PRINT
This submenu is used to select settings, trip reports, abnormality reports, change of binary status
reports, normal wave oscillogram to print.
“PRINT”has following submenus.
No.
Item
description
1
SETTINGS
To print all settings of equipment.
2
TRIP REPORT
To print the trip report and waveform oscillograms.
3
ALARM REPORT
To print the self-supervision and abnormality report.
4
BI CHG REPORT
To print the report of binary input change.
5
PRESENT WAVE
To print present operation waveform oscillograms.
7.2.4.1 SETTINGS
Select “SETTINGS”item by pressing key “▲ ”or “▼ ”to scroll the cursor upward or downward.
Press key “ENT”to print the setting lists.
No.
Item
description
1
ACTIVE SETTINGS
To print all settings of present setting group.
2
EQUIP SETTINGS
To print equipment settings of present setting group.
3
SYSTEM SETTINGS
To print system settings of present setting group.
4
PROT SETTINGS
To print protection settings of present setting group.
5
CALC SETTINGS
To print calculated settings of present setting group.
6
TRIP LOGIC
To print trip matrix of each protection element of present setting group.
7
MODIFIED SETTINGS
To print the latest changed setting of present setting group.
8
OTHER GRP
SETTINGS
To print all settings of other setting group.
7.2.4.2 TRIP REPORT
The equipment can store 8 pieces of normal waveform oscillogram.
“TRIP REPORT”has following submenus.
No.
Item
1
TRIP REPORT
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description
To print trip report and binary status before and after pickup.
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No.
Item
description
To print differential current and each side current waveforms of
2
DIFF WAVE
differential protection and time sequence diagram of tripping output
channels.
3
CURR WAVE
4
HVS WAVE
5
BR11 WAVE
6
BR21 WAVE
7
BR12 WAVE
8
BR22 WAVE
9
BR13 WAVE
10
BR23 WAVE
To print each side current waveform and time sequence diagram
of tripping output channels.
To print all current and voltage waveforms of HV side and time
sequence diagram of tripping output channels.
To print all current and voltage waveforms of branch A1 and time
sequence diagram of tripping output channels.
To print all current and voltage waveforms of branch B1 and time
sequence diagram of tripping output channels.
To print all current and voltage waveforms of branch A2 and time
sequence diagram of tripping output channels.
To print all current and voltage waveforms of branch B2 and time
sequence diagram of tripping output channels.
To print all current and voltage waveforms of branch A3 and time
sequence diagram of tripping output channels.
To print all current and voltage waveforms of branch B3 and time
sequence diagram of tripping output channels.
To print zero-sequence differential current and zero sequence
11
REF WAVE
current of each side waveforms of restricted earth fault protection
and time sequence diagram of tripping output channels.
7.2.4.3 ALARM REPORT
Select “ALARM REPORT” item by Pressing key “▲ ” or “▼ ” to scroll the cursor upward or
downward. Please press “ENT”to execute printing.
7.2.4.4 BI CHG REPORT
Select “BI CHG REPORT”item by Pressing key “▲ ”or “▼ ” to scroll the cursor upward or
downward. Please press “ENT”to execute printing.
7.2.4.5 Present wave
“PRESENT WAVE” has following submenus
No.
Item
description
1
TRIGGER
To start present operation recording.
2
BI STATE
To print all binary inputs.
3
PHASE ANGLE
To print all phase angles.
4
DIFF WAVE
To print differential current waveforms of differential protection.
5
CURR WAVE
To print each side current waveform.
6
HVS WAVE
To print current and voltage waveforms of HV side.
7
BR11 WAVE
To print current and voltage waveforms of branch A1.
8
BR21 WAVE
To print current and voltage waveforms of branch B1.
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No.
Item
description
9
BR12 WAVE
To print current and voltage waveforms of branch A2.
10
BR22 WAVE
To print current and voltage waveforms of branch B2.
11
BR13 WAVE
To print current and voltage waveforms of branch A3.
12
BR23 WAVE
To print current and voltage waveforms of branch B3.
13
REF WAVE
To print zero-sequence differential current and zero sequence
current of each side waveforms of restricted earth fault protection.
For the detailed operating steps of printing “PRESENT WAVE”please see Section 7.4.4.
7.2.5 SETTING
“SETTING”has following submenus.
No.
Item
description
1
EQUIP SETTINGS
To view and modify equipment settings
2
SYSTEM SETTINGS
To view and modify system settings and protection logic settings.
3
PROT SETTINGS
4
SETTINGS COPY
To copy settings from one group to another group.
5
CALC SETTINGS
To view calculated settings.
To view and modify busbar differential protection and bus coupler
protection settings.
For the detailed operating steps of viewing, changing and copy settings please see Section 7.3.6,
section 7.5.1 and section 7.5.2.
“EQUIP SETTINGS” has no submenus, while “SYSTEM SETTINGS”, “PROT SETTINGS”and
“CALC SETTINGS”have their own submenus respectively.
7.2.5.1 SYSTEM SETTINGS
“SYSTEM SETTINGS”has following submenus.
No.
Item
1
PROT CONFIG
2
SYS SETTINGS
description
To view and modify logic setting of configuration protection
functions.
To view and modify transformer system parameters.
7.2.5.2 PROTION SETTINGS
“PROT SETTINGS”has following submenus.
No.
Item
Description
1
DIFF PROT
2
HVS PPF BAK PROT
3
HVS EF BAK PROT
To view and modify settings of HV side earth fault protection.
4
HVS GAP BAK PROT
To view and modify settings of HV side backup “gap”protection.
5
OVEXC PROT
To view and modify settings of HV side overexcitation protection.
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To view and modify settings of differential protection.
To view and modify settings of voltage controlled overcurrent
protection of HV side.
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No.
Item
6
HVS PD PROT
7
HVS REF PROT
8
BR11 BAK PROT
9
BR12 BAK PROT
10
BR13 BAK PROT
11
BR21 BAK PROT
12
BR22 BAK PROT
13
BR23 BAK PROT
14
BR1 EF PROT
15
BR2 EF PROT
16
BR1 REF PROT
17
BR2 REF PROT
Description
To view and modify settings of HV side pole disagreement
protection.
To view and modify settings of HV side restricted earth fault
protection.
To view and modify settings of voltage controlled overcurrent
protection of branch A1.
To view and modify settings of voltage controlled overcurrent
protection of branch A2.
To view and modify settings of voltage controlled overcurrent
protection of branch A3.
To view and modify settings of voltage controlled overcurrent
protection of branch B1.
To view and modify settings of voltage controlled overcurrent
protection of branch B2.
To view and modify settings of voltage controlled overcurrent
protection of branch B3.
To view and modify settings of zero-sequence overcurrent protection of
side A.
To view and modify settings of zero-sequence overcurrent protection of
side B.
To view and modify settings of restricted earth fault protection of side A.
To view and modify settings of restricted earth fault protection of
side B.
7.2.5.3 Calc settings
“CALC SETTINGS”has following submenus.
No.
Item
description
1
PRI RATED CURR
To view rated primary current.
2
SEC RATED CURR
To view rated secondary current.
3
DIFF CORR COEF
To view CT ratio correction coefficient of differential protection.
7.2.6 Clock
The current time of internal clock can be viewed here. The time is displayed in the form
YY-MM-DD and hh:mm:ss. All values are presented with digits and can be modified. The detailed
operating steps of adjusting time please see section 7.5.5.
7.2.7 VERSION
In this menu the LCD displays software information of CPU module, MON module and HMI
module, which consists of version, creating time of software, CRC codes and management
sequence number. For the detailed operating steps of view software information please see
section 7.3.8.
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7.2.8 Debug
“DEBUG”has following submenus.
No.
Item
description
1
COMM STATUS
2
MEMORY IMAGE
To monitor communication status of the equipment with external PC
or substation automation system.
To display real time value in memory of MC68332, DSP1 and DSP2.
The menu is often used in testing the equipment. For the detailed operating steps of view “COMM
STATUS”please refer to section 7.2.8.
7.2.8.1 COMM STATUS
This submenu is used to monitor communication status of the equipment with external PC or
substation automation system. Display of this submenu is as follows:
Figure 7.2-3 LCD display of communication status
Columns 485A and 485B display communication status of port1 RS-485A and port2 RS-485B
respectively. If communication condition is normal, “Y”will flash in the related position.
If there is flashing “N” in the position, it mean th ere is some problems. Please check the
communication condition from top to bottom in the following list.
item
status
problem
Communication circuit is open or no data is sent from external
Data_Received
N
Frame_Valid
N
Baud rate or protocol is wrong.
Address_Valid
N
Communication address is wrong.
Data_Sent
N
There is problem in the sent message.
system.
“Data_Received”means the equipment has received data from external system.
“Frame_Valid”means the equipment has received complete frame from external system.
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“Addrss_Valid”means the equipment has received related message from external system.
“Data_Sent”means the equipment has sent data to external system.
7.2.8.2 MEMORY IMAGE
The LCD displays real time value in memory of MC68332, DSP1 and DSP2. This submenu is
provided especially for software developer, but not for ordinary users.
7.3 Understand the LCD Display
7.3.1 Display during normal operation
When the equipment is powered on, based on actual connection of the transformer, the LCD will
display single line diagram its connection diagrams
If the transformer has two windings and one branche on LV side, the LCD will display as following.
Figure 7.3-1 LCD display of single bus configuration
Other displayed current and voltage data are average values of three-phase voltage or current,
which will be updated every 0.5s.
The display is similar in case of other connections of the transformer, the connection can be
changed by configuring settings in “INSIDE SETTINGS”submenu by software RCSPC. Please
refer to section 6.2.3.1 for details.
7.3.2 Display when tripping
When the protection equipment operates, the LCD will display the trip report immediately.
typical trip report is as follows:
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Figure 7.3-2
LCD display of trip report
No.002 TRIP REPORT : shows number and title of the report
2006-06-15 14:15:00:003: shows the time when fault detector picks up. ( year–month-date and
hour:minute:second:millisecond)
0021ms: shows the protection operation time.
TrpOutp1: shows tripping out channel。.
Op_PcntDiff: shows protection element that operates.
If more rows are needed to display the output channels being tripped, these rows will scroll
upward cyclically and a scroll bar will appear on the right side of them. A black mark on the scroll
bar shows relative position of the displayed row to total rows.
For all operation report information probably displayed on LCD please refer to Table 4.2-5.
If no protection element operates to trip but only fault detector picks up, LCD will display following
diagram.
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Figure 7.3-3 LCD display of fault detector pickup report without trip
7.3.3 Display under abnormal condition
When abnormality is detected during operation of the protection equipment, the LCD will display
the self-supervision report immediately. A typical self-supervision report is as follows.
Figure 7.3-4
No.006
LCD display of self-supervision report
ALARM REPORT : shows the number and title of the report
2006-06-15 15:16:00:031:
shows the real time of the report: year–month-date and
hour:minute:second:millisecond
Alm_CTS_Br12: Alarm shows the content of abnormality alarm
If more rows are needed to display the abnormality description, these rows will scroll upward
cyclically and a scroll bar will appear on the right side of them. A back mark on the scroll bar
shows relative position of the displayed row to total rows.
For all abnormality report information probably displayed on LCD please refer to
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Self-check failure alarms that block equipment
When hardware failure is detected, all protection functions will be blocked and block signal will be
sent. The equipment cannot work in this case. Hardware failure includes failure of RAM, error of
EEPROM, settings invalid, loss of power source of opto-coupler, error of DSP, tripping output
circuit failure, etc. All the failure alarms can be viewed in event recording report.
When some light failures are detected, part of protection functions probably be disabled and
others can still work. Equipment abnormality alarms can be viewed in event recording report.
NOTE: There are three alarm LEDs on HMI module: “ALARM”LED, “CT ALARM” LED
and “VT ALARM” LED. In following tables “ALARM”, “CT ALARM” or “CT ALARM”
means the corresponding LED is turned on.
Abnormality information printed or displayed on LCD and trouble shooting are described in following
table.
Table 4.2-2 - Table 4.2-4.
7.3.4 Display when tripping with abnormality
When the equipment operates and abnormality is detected by self-supervision simultaneously,
both trip report and abnormality report will be displayed together as follows:
Figure 7.3-5 LCD display of operation and auto-supervision report
NOTE: Press signal “RESET”button on the front panel for longer than 1 s, busbar single
line diagram of transformer, latest trip report and latest abnormality report will be
displayed in turn.
7.3.5 Display when binary input changes status
When binary input changes, the LCD will display binary input change of report as follows.
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Figure 7.3-6 LCD display of binary input change report
No.012 BI CHG REPORT : shows the number and title of the report
EBI_EF_Bak_HVS
0 -> 1 : shows the binary input name and the status change from 0 to 1
2006-06-15 15:16:00:031: shows the real time of the report: year–month-date and
hour:minute:second:millisecond
The change of binary input report will disappear automatically in 3 second and then LCD returns to
the last display.
For binary input change report information, you may refer to tables in section 5.6.2. The signal
name of binary input is what will be displayed on LCD.
7.3.6 View the setting
Here take equipment setting as an example to introduce the operating steps of viewing setting for
operators.
Operating steps:
Press key “▲ ”to enter the main menu at first.
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Figure 7.3-7 LCD display step 1 of viewing setting
N A RI - R E L A Y S
Press key “▲ ”or “▼ ”to select “SETTING”item by scrolling the cursor upward or downward.
Figure 7.3-8 LCD display step 2of viewing setting
Press key “ENT”to enter the submenu.
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Figure 7.3-9 LCD display step 3 of viewing setting
Press key”ENT”to display the setting symbols and parameters of the submenu.
EQUIP SETTINGS
Setting_Group:
0
Equip_ID:
BYQ001
Comm_Addr:
34
COM1_Baud:
19200 bps
COM2_Baud:
19200 bps
Printer_Baud:
9600 bps
Protocol:
0041
En_Auto_Print:
1
En_Net_Print:
0
Figure 7.3-10 LCD display step 4 of viewing setting
If you want to view setting parameters, please press key “▲ ”or “▼ ”to locate the setting you are
interested in by scrolling the cursor. Press key “▲ ”or “▼ ”to see different items.
Press key “ESC”to exit to the upper level submenu and press it again to go back to last interface
with the cursor staying on the submenu. Of course, after first press key “ESC”you can also press
key continuously “◄ ”to return the upper level submenu until to the main menu. Then press the
key “ESC”to go back to the last interface with the cursor staying on submenu.
7.3.7 View Status Information
Status comprises metering data, binary input and communication status. At the same time the
calculated differential current in “VALUES”data and calculated data in “DEBUG”can also be
viewed.
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Please check the data of both CPU module and MON module to ensure there are identical.
7.3.7.1 Display metering data
All the metering data of the equipment and its navigating path have been introduced detaily in
section 4.2. Here just give a simple introduction.
Metering data consists of AC sampled data and phase angle in the submenus “CPU METERING”
“MON METERING”and “PHASE ANGLE”. Take AC sampled data as an example.
Navigate the menu through the following path and you will see the interface of LCD.
Main menu -> VALUES -> CPU METERING ->HVS METERING
Figure 7.3-11
LCD display of metering data
HVS METERING: shows the title of metering data
I_HVS: 000.00
000.00 000.00 A: shows the RMS current value of HV side in sequence.
For other measured quantities, please refer to section 4.3.
A scroll bar appears on the right means there are more rows needed to be displayed. Please press
key “▼ ”to see the next page and press key “ESC”to exit to the upper level submenu.
7.3.7.2 Display the status of binary inputs
The status of binary input comprises contact inputs, other binary inputs and virtual binary
inputs/outputs of faulter detector pickup. Here take the contact binary inputs as an example.
Navigate the menu through the following path and you will see the interface of LCD.
Main menu -> VALUES-> CPU BI STATE ->PROT EBI
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Figure 7.3-12 LCD display of status of binary inputs
PROT EBI : shows the title of the binary input
EBI_Diff:
shows sign of binary input;.
Press key “ESC”to exit to the submenu.
Please refer to section 5.6.1 for all binary inputs and detailed descriptions.
7.3.7.3 Display communication status
Communication condition of the equipment with external PC or external computer system through
RCS 485 ports can be viewed on the LCD.
Navigate the menu through the following path and you will see the interface of LCD.
Main menu -> DEBUG -> COMM STATUS
Figure 7.3-13 LCD display of communication status
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485A, 485B: shows the communication ports name of the equipment
Other detailed description, please refer to section 7.2.8.1.
Press key “ESC”to exit to the submenu.
7.3.8 View software version
The equipment program has following parts. One is CPU module program, one is MON module
program, and another is HMI module program. They are totally independent.
Navigate the menu:
Main menu -> VERSION
After you press key “ENT”, the follow will be displayed on the LCD.
Figure 7.3-14 LCD display of software information
CPU/MON/FACE
shows CPU/MON/HMI module program information.
RCS-985T3YD
shows the program name of CPU/MON/HMI
3.11
shows the software version number of CPU/MON/HMI.
5DE146FC
shows the CRC (check code) of CPU module program.
48568b59
shows the CRC (check code) of MON module program.
7E05
shows the CRC (check code) of HMI module program.
2006-07-17 09:29 shows that CPU/MON software creating time is 09:29 July 17th 2006.
2006-07-20 11:24 shows that HMI software creating time is 11:24 July 20th 2006.
T-060411
shows the project number.
ManageNo: SUBQ_00022019
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shows management sequential number of the software is
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00022019.
NOTE: What above shows is just an example to introduce the format of version submenu,
the actual program information is application-specific, user should get the accurate
information of the relevant device on site if needed.
Press key “ESC”to return to upper level submenu.
7.4 View Records
7.4.1 General description
The RCS-985T provides the following recording functions:
---Event recording
Event are recorded in form of report and can be viewed through LCD or by printing .
Self supervision report and binary input change report belong to event record.
---Fault recording
Fault is recorded in form of both report and waveform, so report can be display on LCD or by
printing. However waveform must to be printed or displayed with special softwares.
Trip report and corresponding waveforms belong to fault record.
---Present recording
Present recording is recorded in form of waveform and can be viewed only by printing.
7.4.2 View reports through LCD
If you want to see event recording report and fault recording report through LCD, please follow the
operating steps.
Operating steps
First, please go in to the main menu by pressing key “▲ ”.
Press key “▲ ”or “▼ ”to select “Report”item by scrolling the cursor upward or downward. Press
key “ENT”to enter the next lower level submenu.
Then press key “▲ ”or “▼ ”to select “TRIP report”, “ALARM report”or “Bi CHG report”by
scrolling the cursor upward or downward. Press key “ENT”to display the report selected.
The latest report will be displayed first. Press key “+”or “-“to view the next or last report.
If the report cannot be completely displayed by one screen, key “▲ ”or “▼ ”can be used to scroll it.
If there is no report stored LCD will display “No Trip Report”or “No Alarm Report”or “No BI CHG
Report”.
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In order to return to the submenu, simply press key “ESC”.
7.4.3 View reports and waveform by printing
If you want to see event recording report or fault recording report and waveform by printing, please
follow the operating steps.
Operating steps
First, please go in to the main menu by pressing key “▲ ”.
Press key “▲ ”or “▼ ”to select “PRINT”item by scrolling the cursor upward or downward and then
press key “ENT”to enter the low level submenu.
Press key “▲ ”or “▼ ”to select “TRIP REPORT”, “ALARM REPORT”or “BI CHG REPORT”by
scrolling the cursor upward or downward. Press key “ENT”to display the report selected. The
latest report will be displayed first. Pressing key “+”or “-“to view the next or last report. Please
select the report to be printed.
Then press key “ENT”to print the report displayed on LCD.
In order to return to the upper level submenu, simply press key “ESC”.
7.4.4 View present recording waveform
If you want to see the normal recording waveform, please follow the operating steps.
Operating steps:
First, please go in to the main menu by pressing key “▲ ”.
Press key “▲ ”or “▼ ”to select “print”item by scrolling the cursor upward or downward and then
press the “ENT”to the lower level submenu.
Then press key “▲ ”or “▼ ”to select “PRESENT WAVE” by scrolling the cursor upward or
downward. Press key “ENT”to enter the lower level submenu.
Press “TRIGGER”submenu to start recording. The equipment will record 4-cycle waveform after
pressing the key.
Please select the other items in the submenu “PRESENT WAVE”by scrolling cursor to print binary
status, phase angle and waveforms.
In order to return to the submenu, simply press key “ESC”.
7.5 Input Operation through Keypad
7.5.1 Change the settings
Please locate the setting you want to change by operating the keypad as described in section
7.3.6. Then go on to operate as following steps.
Press key “◄ ”or “► ”to move the cursor to the digit to be modified. Pressing key “+”and “–“to
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change the digit. Press key “+”once to add 1 to the digit and press key “–“once to subtract 1 from
the digit.
Press key “ESC”to cancel the modification and return to upper level submenu.
Press key “ENT”to confirm the modification and the LCD will prompt you to input confirm code.
Figure 7.5-1 LCD display of inputting password
Press keys “+”,” “◄ ”, “▲ ”and “–“in sequence to complete the modification. If the password
inputted is wrong, prompt for password will appear again. If no operation in 3 seconds, LCD will
return to last display.
If the password inputted is right, then equipment will check setting and Figure 7.5-2 will be
displayed temporarily. If there is no error in checking setting, Equipment will modify setting with
Figure 7.5-3 displayed temporarily. Then LCD will return to upper level submenu automatically.
Figure 7.5-2 LCD display of equipment checking setting
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Figure 7.5-3
LCD display of equipment modifying setting
If errors in settings are detected, the LCD will display wrong setting warning for 3 s.
Figure 7.5-4 LCD display of wrong setting warning
Then LCD will display the setting list for the operator to modify the wrong setting. The cursor will
stay at the first wrong setting needed to be modified.
NOTE: If the group number or protection system parameter is changed, protection
settings will be invalid and have to be configured again.
7.5.2 Copy setting group
The relay stores two setting groups and with the number from 0 to 1. Only present setting group is
active, the others are provided for different operating conditions. The system settings and
equipment settings are common to two setting groups, but the protection settings are independent.
Generally the equipment is delivered with default settings stored in active setting Group 0. The
contents of other setting groups may be invalid. Therefore after application-specific settings for
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group No.0 have been ready, it is necessary to copy settings of group No.0 to all the other setting
groups, and make some modification afterwards when necessary, so as to avoid entering all
settings one by one. Please copy setting group as following steps.
N A R I - R E L A Y S
Press key “▲ ”to enter the main menu at first.
Figure 7.5-5 LCD display step 1 of copying setting
N A RI - R E L A Y S
Move cursor to “SETTING “item and press key “ENT”or key“► ”to enter submenu.
Figure 7.5-6 LCD display step 2 of copying setting
Move cursor to “SETTINGS COPY”item and press “ENT”to display following interface.
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Figure 7.5-7 LCD display step 3 of copying setting
Press key “+”and “–“to change digit where the cursor stays. Pressing key “+”once will add 1 to
the digit and pressing key “–“once will subtract 1 from the digit. (For example: input 01)
Press “ENT”the LCD will prompt to input confirm code. Please see the Figure 7.5-1
Please press keys “+”,”“◄ ”, “▲ ”and “–“in sequence, and then the equipment will copy setting
and display following interface.
Figure 7.5-8 LCD display of equipment copying setting
Then the contents of setting group 0 will be totally copied to setting group 1 and present active
setting group will be switched to Group1.
7.5.3 Switch active setting group
Key “GRP”on keypad of RCS-985T is for future use only, so can not use this key to switch active
setting group. However, you can use RCSPC software to switch active setting group.
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7.5.4 Delete fault records and event records
If you want to delete the content of fault records or event records, you can follow the operating
steps. Note you cannot select which kind of records or which one record to be deleted but delete
all records.
Operating steps:
N A R I - R E L A Y S
Press key “▲ ”to enter the main menu at first.
Figure 7.5-9 LCD display of deleting report step 1
Press keys “+”, “-“, “+”, “-“, “ENT”in sequence in the main menu to make LCD display Figure
7.5-10.
Figure 7.5-10 LCD display of deleting report step 2
Press key “ENT”to delete all records or press key “ESC”to exit to main menu. If key “ENT”is
pressed, LCD will displayFigure 7.5-11 when equipment is deleting all records. If key “ESC”is
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pressed, Figure 7.5-9 will be displayed. LCD will automatically return to Figure 7.5-9 in 3 seconds
without pressing any key.
Figure 7.5-11 LCD display of deleting report step 3
7.5.5 Clock set
Please set the equipment clock as following steps.
Navigate the menu:
Main menu -> CLOCK
After you press key “ENT”, the following will be displayed on the LCD.
Figure 7.5-12 LCD display of device clock
2005 – 06 – 25 shows the date June 25th 2005.
09 : 08 : 39
shows the time 09:08:39
Press keys “▲ ”, “▼ ”, “◄ ”and “► ”to select the digit to be modified. Press key “+”and “–“to modify
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data. Pressing key “+”once will add 1 to the digit and pressing key “–“once will subtract 1 from
the digit.
Press key “ESC”to return to main menu without modification.
Press key “ENT”to confirm the modification and return to the main menu.
7.6 Understand the Alarms
Hardware circuit and operation condition of the equipment are self-supervised continuously. If any
abnormal condition is detected, information or report will be displayed and a corresponding alarm
will be issued.
A common abnormality may block a certain number of protection functions while other functions
can still work.
However, if serious hardware failure or abnormality were detected, all protection functions will be
blocked and the LED “HEALTHY”will go out.
When hardware failure is detected, all protection functions wil l be blocked and corresponding
alarm signal will be issued. The equipment then cannot work normally in this case and manual
maintenance is required to fix the failure.
NOTE: If the equipment is blocked or alarm signal is issued during operation, do please
find out its reason by help of self-supervision record. If the reason can not be found on
site, please inform the factory NR. Please do not simply press key “RESET”on the
protection front panel or re-power on the equipment.
For The detailed alarms please see tables in section 4.2.11
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Chapter 8 Communication
8.1 Introduction
This section outlines the remote communications interfaces of the RCS-985T. The protection
supports a choice of one of three protocols via the rear communication interface, selected via the
model number by setting.
The rear EIA(RS)485 interface is isolated and is suitable for permanent connection whichever
protocol is selected. The advantage of this type of connection is that up to 32 relays can be ‘
daisy
chained’together using a simple twisted pair electrical connection.
It should be noted that the descriptions contained within this section do not aim to fully detail the
protocol itself. The relevant documentation for the protocol should be referred to for this
information. This section serves to describe the specific implementation of the protocol in the relay.
The following figure shows typical scheme of communication via RS-485 port of RCS-985T used
in substation automation system.
Figure 8.1-1 Typical scheme in substation automation system
8.2 Rear communication port of EIA(RS)485
8.2.1 Rear communication port EIA(RS)485 interface
The rear EIA(RS)485 communication port is provided by a 3-terminal screw connector located on
the back of the relay. See relevant sections for details of the connection terminals. The rear port
provides EIA(RS)485 serial data communication and is intended for use with a permanently wired
connection to a remote control center.
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Figure 8.2-1 RS485 port interface
The protocol provided by the relay is indicated in the relay menu in the ‘
SETTINGS’column. Using
the keypad and LCD, check the communication protocol being used by the rear port according to
the definition of relevant settings described in section 7.
8.2.2 EIA(RS)485 bus
The EIA(RS)485 two-wire connection provides a half-duplex fully isolated serial connection to the
product. The connection is polarized and whilst the product’
s connection diagrams indicate the
polarization of the connection terminals it should be borne in mind that there is no agreed
definition of which terminal is which. If the master is unable to communicate with the product, and
the communication parameters match, then it is possible that the two-wire connection is reversed.
8.2.3 Bus termination
The EIA(RS)485 bus must have 120Ω (Ohm) ½ Watt terminating resistors fitted at either end
across the signal wires – see Figure 8.2-1. Some devices may be able to provide the bus
terminating resistors by different connection or configuration arrangements, in which case
separate external components will not be required. However, this product does not provide such a
facility, so if it is located at the bus terminus then an external termination resistor will be required.
8.2.4 Bus connections & topologies
The EIA(RS)485 standard requires that each device be directly connec ted to the physical cable
that is the communications bus. Stubs and tees are expressly forbidden, as are star topologies.
Loop bus topologies are not part of the EIA(RS)485 standard and are forbidden by it.
Two-core screened cable is recommended. The specification of the cable will be dependent on the
application, although a multi-strand 0.5mm2 per core is normally adequate. Total cable length must
not exceed 1000m. The screen must be continuous and connected to ground at one end, normally
at the master connection point; it is important to avoid circulating currents, especially when the
cable runs between buildings, for both safety and noise reasons.
This product does not provide a signal ground connection. If a signal ground connection is present
in the bus cable then it must be ignored, although it must have continuity for the benefit of other
devices connected to the bus. At no stage must the signal ground be connected to the cables
screen or to the product’
s chassis. This is for both safety and noise reasons.
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NOTE: It is extremely important that the 120Ω termination resistors are fitted. Failure to do
so will result in an excessive bias voltage that may damage the devices connected to the
bus.
As the field voltage is much higher than that required, NR cannot assume responsibility for
any damage that may occur to a device connected to the network as a result of incorrect
application of this voltage.
8.3 IEC60870-5-103 Protocol
8.3.1 Overview of IEC60870-5-103
The IEC specification IEC60870-5-103: Telecontrol Equipment and Systems, Part 5: Transmission
Protocols Section 103 defines the use of standards IEC60870-5-1 to IEC60870-5-5 to perform
communication with protection equipment. The standard configuration for the IEC60870 -5-103
protocol is to use a twisted pair EIA(RS)485 connection over distances up to 1000m. The relay
operates as a slave in the system, responding to commands from a master station.
To use the rear port with IEC60870-5-103 communication, the relay’
s communication settings
must be configured. To do this use the keypad and LCD user interface.
Three settings applied to communicate through the rear port using IEC60870-5-103 are described
below.
[Protocol] indicates the communication protocol.
[Equip_ID] controls the IEC60870-5-103 address of the relay. Up to 32 relays can be connected to
one IEC60870-5-103 spur, and therefore it is necessary for each relay to have a unique address
so that messages from the master control station are accepted by one relay only. IEC60870 -5-103
uses an integer number between 0 and 254 for the relay address. It is important that no two relays
have the same IEC60870-5-103 address. The IEC60870-5-103 address is then used by the
master station to communicate with the relay.
[Com1_Baud (COM2_Baud)]: controls the baud rate to be used. IEC60870-5-103 communication
is asynchronous. It is important that whatever baud rate is selected on the relay is the same as
that set on the IEC60870-5-103 master station.
8.3.2 Messages description in IEC60870-5-103 protocol type
Messages sent to substation automation system are grouped according to IEC60870-5-103
protocol. Operation elements are sent by ASDU2 (time -tagged message with relative time), and
status of Binary Input and Self-Supervision are sent by ASDU1 (time-tagged message).
8.3.2.1 Settings
Settings are transferred via Generic Service.
Note:
If the item “[En_Remote_Cfg]”in Equipment Settings is set as 0, to modify settings remotely will
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not be allowed. Moreover, Equipment Settings & System Settings are not allowed to be modified
remotely whether the item “[En_Remote_Cfg]”is true (=1) or not.
8.3.2.2 Trip Report
Sent by ASDU2 (time-tagged message with relative time).
FUN
INF
233
2
233
Item Name
FUN
INF
Item Name
Op_InstDiff
233
17
Op_OC2_Br11
3
Op_SensPcntDiff
233
18
Op_OC1_Br12
233
4
Op_UnsensPcntDiff
233
19
Op_OC2_Br12
233
152
Op_InstREF_HVS
233
20
Op_OC1_Br13
233
153
Op_SensPcntREF_HVS
233
21
Op_OC2_Br13
233
154
Op_UnsensPcntREF_HVS
233
22
Op_OC1_Br21
233
155
Op_InstREF_Br1
233
23
Op_OC2_Br21
233
156
Op_SensPcntREF_Br1
233
24
Op_OC1_Br22
233
157
Op_UnsensPcntREF_Br1
233
25
Op_OC2_Br22
233
158
Op_InstREF_Br2
233
26
Op_OC1_Br23
233
159
Op_SensPcntREF_Br2
233
27
Op_OC2_Br23
233
160
Op_UnsensPcntREF_Br2
233
243
Op_InvOC_Br11
233
5
Op_OC1_HVS
233
244
Op_InvOC_Br21
233
6
Op_OC2_HVS
233
28
Op_ROC1_Br1
233
7
Op_Z1_HVS
233
29
Op_ROC2_Br1
233
8
Op_Z2_HVS
233
30
Op_ROC1_Br2
231
207
Op_PD1
233
31
Op_ROC2_Br2
231
208
Op_PD2
231
84
TrpOutp1
231
196
Op_OvExc
231
85
TrpOutp2
227
199
Op_InvOvExc
231
86
TrpOutp3
233
9
Op_ROC11_HVS
231
87
TrpOutp4
233
10
Op_ROC12_HVS
231
88
TrpOutp5
233
11
Op_ROC21_HVS
231
89
TrpOutp6
233
12
Op_ROC22_HVS
231
90
TrpOutp7
233
13
Op_ROC3_HVS
231
91
TrpOutp8
233
14
Op_ROV_HVS
231
92
TrpOutp9
233
15
Op_ROC_Gap_HVS
231
93
TrpOutp10
233
241
Op_InvOC_HVS
231
94
TrpOutp11
233
242
Op_InvROC_HVS
231
95
TrpOutp12
233
16
Op_OC1_Br11
FUN
INF
8.3.2.3 1.3 Alarm Report
Sent by ASDU1 (time-tagged message);
FUN
INF
231
233
Alm_CTS_Bak_HVS
227
161
Alm_ROV_Br1
231
234
Alm_CTS_HVS
227
162
Alm_ROV_Br2
248
Item Name
Item Name
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FUN
INF
231
235
231
Item Name
FUN
INF
Item Name
Alm_CTS_Br11
227
137
Alm_PM_DSP2_CPUBrd
238
Alm_CTS_Br21
233
36
Alm_BI_SOTF_Br11
231
236
Alm_CTS_Br12
233
37
Alm_BI_SOTF_Br12
231
239
Alm_CTS_Br22
233
38
Alm_BI_SOTF_Br13
231
237
Alm_CTS_Br13
233
39
Alm_BI_SOTF_Br21
231
240
Alm_CTS_Br23
233
40
Alm_BI_SOTF_Br22
231
241
Alm_CTS_Diff
233
41
Alm_BI_SOTF_Br23
231
242
Alm_Diff
227
194
Alm_RAM_CPUBrd
227
79
Alm_PM_DSP1_CPUBrd
227
195
Alm_ROM_CPUBrd
233
161
Alm_CTS_REF_HVS
227
196
Alm_EEPROM_CPUBrd
233
162
Alm_REF_HVS
227
223
Alm_InvalidSetting
233
163
Alm_CTS_REF_Br1
227
81
Alm_ModifiedSetting
233
164
Alm_REF_Br1
227
202
Alm_PwrLoss_Opto
233
165
Alm_CTS_REF_Br2
227
200
Alm_TripOutput
233
166
Alm_REF_Br2
227
211
Alm_InnerComm
231
243
Alm_VTS_HVS
227
82
Alm_DSP_CPUBrd
231
245
Alm_VTS_Br11
227
214
Alm_PersistFD_CPUBrd
231
246
Alm_VTS_Br12
229
250
Alm_InconsistFD
231
247
Alm_VTS_Br13
227
217
Alm_Sample_CPUBrd
231
248
Alm_VTS_Br21
229
246
Alm_BI_CPUBrd
231
249
Alm_VTS_Br22
229
205
Alm_RAM_MONBrd
231
250
Alm_VTS_Br23
229
206
Alm_ROM_MONBrd
235
57
Alm_InitCool2_OvLd_HVS
229
207
Alm_EEPROM_MONBrd
235
56
Alm_InitCool1_OvLd_HVS
229
202
Alm_DSP_MONBrd
231
252
Alm_BlkOLTC_OvLd_HVS
229
203
Alm_PersistFD_MONBrd
229
117
Alm_OvExc
227
216
Alm_MONBrd
231
253
Alm_OvLD_HVS
229
204
Alm_Sample_MONBrd
231
213
Alm_PoleDisagr_CB
FUN
INF
8.3.2.4 1.4 Binary Input
Sent by ASDU1. (time-tagged message);.
FUN
INF
Item Name
231
214
EBI_Diff
233
168
EBI_REF_Br1
231
222
EBI_EF_Br2
233
169
EBI_REF_Br2
231
220
EBI_Bak_Br22
231
190
BI_PoleDisagr_CB
231
221
EBI_Bak_Br23
231
226
BI_ExTrp_Ctrl_PD2
231
223
EBI_EF_Bak_HVS
229
236
BI_Reserved1
229
241
EBI_Reserved1
229
239
BI_Reserved2
229
93
EBI_PoleDisagr_HVS
231
126
BI_52b_CB_HVS
231
216
EBI_Bak_Br12
229
249
BI_Reserved3
227
28
EBI_OvExc
233
32
BI_Reserved4
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FUN
INF
231
215
231
Item Name
FUN
INF
Item Name
EBI_Bak_Br11
231
229
BI_SOTF_Br13
224
EBI_PPF_Bak_HVS
231
232
BI_SOTF_Br23
231
225
EBI_EF_Gap_HVS
231
227
BI_PostAccel_Br11
233
167
EBI_REF_HVS
231
228
BI_PostAccel_Br12
231
219
EBI_Bak_Br21
231
231
BI_PostAccel_Br22
231
217
EBI_Bak_Br13
231
230
BI_PostAccel_Br21
231
218
EBI_EF_Br1
8.3.2.5 Disturbance ACC (Actual Channel)
ACC No.
248
Name
ACC No.
Name
64
Ida
108
Ic_Br13
65
Idb
109
Ia_Br23
66
Idc
110
Ib_Br23
67
Icorra_HVS
111
Ic_Br23
68
Icorrb_HVS
112
Ua_HVS
69
Icorrc_HVS
113
Ub_HVS
70
Icorra_Br11
114
Uc_HVS
71
Icorrb_Br11
115
Uab_Br11
72
Icorrc_Br11
116
Ubc_Br11
73
Icorra_Br21
117
Uca_Br11
74
Icorrb_Br21
118
Uab_Br21
75
Icorrc_Br21
119
Ubc_Br21
76
Icorra_Br12
120
Uca_Br21
77
Icorrb_Br12
121
Uab_Br12
78
Icorrc_Br12
122
Ubc_Br12
79
Icorra_Br22
123
Uca_Br12
80
Icorrb_Br22
124
Uab_Br22
81
Icorrc_Br22
125
Ubc_Br22
82
Icorra_Br13
126
Uca_Br22
83
Icorrb_Br13
127
Uab_Br13
84
Icorrc_Br13
128
Ubc_Br13
85
Icorra_Br23
129
Uca_Br13
86
Icorrb_Br23
130
Uab_Br23
87
Icorrc_Br23
131
Ubc_Br23
88
Ia_Bak_HVS
132
Uca_Br23
89
Ib_Bak_HVS
133
I0_NP_HVS
90
Ic_Bak_HVS
134
I0_Gap_HVS
91
Ia_HVS
135
I0_NP_Br1
92
Ib_HVS
136
I0_NP_Br2
93
Ic_HVS
137
U0_DeltVT_HVS
94
Ia_Br11
138
U0_DeltVT_Br1
95
Ib_Br11
139
U0_DeltVT_Br2
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ACC No.
Name
ACC No.
Name
96
Ic_Br11
140
I0_HVS
97
Ia_Br21
141
Id_REF_HVS
98
Ib_Br21
142
I0_Br11
99
Ic_Br21
143
I0_Br12
100
Ia_Br12
144
I0_Br13
101
Ib_Br12
145
Id_REF_Br1
102
Ic_Br12
146
I0_Br21
103
Ia_Br22
147
I0_Br22
104
Ib_Br22
148
I0_Br23
105
Ic_Br22
149
Id_REF_Br2
106
Ia_Br13
150
U/F_OvExc
107
Ib_Br13
8.3.2.6 Metering
Sent via Generic Service.
8.3.2.7 Generic service
Group No.
Group Name
1
Setting_Group.
2
Equipment Settings
3
Protection Config
4
System Settings
5
Diff Prot Settings
6
HVS PPF Bak Prot Settings
7
HVS EF Bak Prot Settings
8
HVS Gap EF Bak Prot Settings
9
OvExc Prot Settings
10
PoleDisagr Prot Settings
11
HVS REF Prot Settings
12
Br11 Bak Prot Settings
13
Br12 Bak Prot Settings
14
Br13 Bak Prot Settings
15
Br21 Bak Prot Settings
16
Br22 Bak Prot Settings
17
Br23 Bak Prot Settings
18
Br1 EF Prot Settings
19
Br2 EF Prot Settings
20
Br1 REF Prot Settings
21
B2 REF Prot Settings
65
Protection Metering
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8.4 MODBUS protocol
8.4.1 Overview
The RCS-985T relay support several communications protocols to allow connection to equipment
such as personal computers, RTUs, SCADA masters, and programmable logic controllers. The
Modicon Modbus RTU protocol is the most basic protocol supported by the RCS-985T. Modbus is
available via RS485 serial links or via Ethernet (using the Modbus/TCP specification). The
following information is provided intended primarily for users who wish to develop their own master
communication drivers and applies to the serial Modbus RTU protocol. The characteristic is listed
below:
Standard: Modicon Modbus Protocol Reference Guide, PI-MBUS-300 Rev.E
Physical Layer Setup:RS485, 1 start bit,8 data bits, no bit for parity,1 stop bit
Link Layer Setup:Only RTU Mode Supported
Frame Length Up limit:256 Bytes
Baud Rate: Configurable
Device Address: Configurable
Parity: no
The following modbus function codes are supported but re-defined by the relay:
02 Read Input Status-Get real-time status (binary)
03 Read Holding Registers- Get Settings
04 Read Input Registers- Get metering values of equipment
8.4.2 Fetch real time status (Binary)
Function Code: 02H
Reads the ON/OFF status of discrete inputs in the slave. The status in the response message is
packed as one input per bit of the data field. Status is indicated as: 1 = ON; 0 = OFF. The LSB of
the first data byte contains the input addressed in the query. The other inputs follow toward the
high order end of this byte, and from ‘
low order to high order’in subsequent bytes.
Example 1: If the master want to fetch Trip Information (0000H~0003H), the query frame would be
as follows(Suppose the slave address was 1):
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01
02
00
00
00
04
79
C9
CRC Hi
CRC Lo
Num of Status Lo
Num of Status Hi
Start Register Addr Lo
Start Register Addr Hi
Function Code
Slave Addr
The response fame would be as follows (Suppose the value of 0000H~0003H equal to 1,1,0,1
respectively):
01
02
01
0B
E0
4F
CRC Hi
CRC Lo
Status
Length
Function Code
Slave Addr
Example 2: If the master want to fetch Trip Information(0002H~000DH),the query frame would be
as follows(Suppose the slave address was 1):
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01
02
0C
00
02
00
D9
CF
CRC Hi
CRC Lo
Num of Status Lo
Num of Status Hi
Start Register Addr Lo
Start Register Addr Hi
Function Code
Slave Addr
The response fame would be as follows (Suppose the va lue of 0002H~000DH equal to
1,1,0,1,0,0,1,0,1,1,1,0 respectively):
01
02
02
07
4B
FB
BF
CRC Hi
CRC Lo
Status Lo
Status Hi
Length
Function Code
Slave Addr
8.4.2.1 Trip information
“1”means trip,”0”for no trip or draw off.
Address
248
Item Name
0000H
Op_InstDiff
0001H
Op_SensPcntDiff
0002H
Op_UnsensPcntDiff
0003H
Op_InstREF_HVS
0004H
Op_SensPcntREF_HVS
0005H
Op_UnsensPcntREF_HVS
0006H
Op_InstREF_Br1
0007H
Op_SensPcntREF_Br1
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Chapter 8 Communication
Address
Item Name
0008H
Op_UnsensPcntREF_Br1
0009H
Op_InstREF_Br2
000AH
Op_SensPcntREF_Br2
000BH
Op_UnsensPcntREF_Br2
000CH
Op_OC1_HVS
000DH
Op_OC2_HVS
000EH
Op_Z1_HVS
000FH
Op_Z2_HVS
0010H
Op_PD1
0011H
Op_PD2
0012H
Op_OvExc
0013H
Op_InvOvExc
0014H
Op_ROC11_HVS
0015H
Op_ROC12_HVS
0016H
Op_ROC21_HVS
0017H
Op_ROC22_HVS
0018H
Op_ROC3_HVS
0019H
Op_ROV_HVS
001AH
Op_ROC_Gap_HVS
001BH
Op_InvOC_HVS
001CH
Op_InvROC_HVS
001DH
Op_OC1_Br11
001EH
Op_OC2_Br11
001FH
Op_OC1_Br12
0020H
Op_OC2_Br12
0021H
Op_OC1_Br13
0022H
Op_OC2_Br13
0023H
Op_OC1_Br21
0024H
Op_OC2_Br21
0025H
Op_OC1_Br22
0026H
Op_OC2_Br22
0027H
Op_OC1_Br23
0028H
Op_OC2_Br23
0029H
Op_InvOC_Br11
002AH
Op_InvOC_Br21
002BH
Op_ROC1_Br1
002CH
Op_ROC2_Br1
002DH
Op_ROC1_Br2
002EH
Op_ROC2_Br2
002FH
TripOutp1
0030H
TripOutp2
0031H
TripOutp7
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Address
Item Name
0032H
TripOutp8
0033H
TripOutp6
0034H
TripOutp10
0035H
TripOutp9
0036H
TripOutp11
0037H
TripOutp12
0038H
TripOutp3
0039H
TripOutp4
003AH
TripOutp5
8.4.2.2 Alarm information
“1”means alarm,”0”for no alarm or draw off.
Address
248
Item Name
1000H
Alm_CTS_Bak_HVS
1001H
Alm_CTS_HVS
1002H
Alm_CTS_Br11
1003H
Alm_CTS_Br21
1004H
Alm_CTS_Br12
1005H
Alm_CTS_Br22
1006H
Alm_CTS_Br13
1007H
Alm_CTS_Br23
1008H
Alm_CTS_Diff
1009H
Alm_Diff
100AH
Alm_PM_DSP1_CPUBrd
100BH
Alm_CTS_REF_HVS
100CH
Alm_REF_HVS
100DH
Alm_CTS_REF_Br1
100EH
Alm_REF_Br1
100FH
Alm_CTS_REF_Br2
1010H
Alm_REF_Br2
1011H
Alm_VTS_HVS
1012H
Alm_VTS_Br11
1013H
Alm_VTS_Br12
1014H
Alm_VTS_Br13
1015H
Alm_VTS_Br21
1016H
Alm_VTS_Br22
1017H
Alm_VTS_Br23
1018H
Alm_InitCool2_OvLd_HVS
1019H
Alm_InitCool1_OvLd_HVS
101AH
Alm_BlkOLTC_OvLd_HVS
101BH
Alm_OvExc
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Address
Item Name
101CH
Alm_OvLD_HVS
101DH
Alm_PoleDisagr_CB
101EH
Alm_ROV_Br1
101FH
Alm_ROV_Br2
1020H
Alm_PM_DSP2_CPUBrd
1021H
Alm_BI_SOTF_Br11
1022H
Alm_BI_SOTF_Br12
1023H
Alm_BI_SOTF_Br13
1024H
Alm_BI_SOTF_Br21
1025H
Alm_BI_SOTF_Br22
1026H
Alm_BI_SOTF_Br23
1027H
Alm_RAM_CPUBrd
1028H
Alm_ROM_CPUBrd
1029H
Alm_EEPROM_CPUBrd
102AH
Alm_InvalidSetting
102BH
Alm_ModifiedSetting
102CH
Alm_PwrLoss_Opto
102DH
Alm_TripOutput
102EH
Alm_InnerComm
102FH
Alm_DSP_CPUBrd
1030H
Alm_PersistFD_CPUBrd
1031H
Alm_InconsistFD
1032H
Alm_Sample_CPUBrd
1033H
Alm_BI_CPUBrd
1034H
Alm_RAM_MONBrd
1035H
Alm_ROM_MONBrd
1036H
Alm_EEPROM_MONBrd
1037H
Alm_DSP_MONBrd
1038H
Alm_PersistFD_MONBrd
1039H
Alm_MONBrd
103AH
Alm_Sample_MONBrd
8.4.2.3 Binary Input Change Information:
“1”means binary change,”0”for no change or draw off.
Address
Item Name
2000H
EBI_Diff
2001H
EBI_EF_Br2
2002H
EBI_Bak_Br22
2003H
EBI_Bak_Br23
2004H
EBI_EF_Bak_HVS
2005H
EBI_Reserved1
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Address
Item Name
2006H
EBI_PoleDisagr_HVS
2007H
EBI_Bak_Br12
2008H
EBI_OvExc
2009H
EBI_Bak_Br11
200AH
EBI_PPF_Bak_HVS
200BH
EBI_EF_Gap_HVS
200CH
EBI_REF_HVS
200DH
EBI_Bak_Br21
200EH
EBI_Bak_Br13
200FH
EBI_EF_Br1
2010H
EBI_REF_Br1
2011H
EBI_REF_Br2
2012H
BI_PoleDisagr_CB
2013H
BI_ExTrp_Ctrl_PD2
2014H
BI_Reserved1
2015H
BI_Reserved2
2016H
BI_52b_CB_HVS
2017H
BI_Reserved3
2018H
BI_Reserved4
2019H
BI_SOTF_Br13
201AH
BI_SOTF_Br23
201BH
BI_PostAccel_Br11
201CH
BI_PostAccel_Br12
201DH
BI_PostAccel_Br22
201EH
BI_PostAccel_Br21
8.4.3 Fetch metering values of equipment
Function Code: 04H
The metering values in the response message are packed as two bytes per register. For each
register, the first byte contains the high order bits and the second contains the low order bits.
8.4.3.1 Differential Current
Address
Analog Name
Unit
0000H
Ida(decimal digits=2)
Ie
0001H
Idb(decimal digits=2)
Ie
0002H
Idc(decimal digits=2)
Ie
0003H
Ira(decimal digits=2)
Ie
0004H
Irb(decimal digits=2)
Ie
0005H
Irc(decimal digits=2)
Ie
0006H
Ida_2ndH(decimal digits=2)
Ie
0007H
Idb_2ndH(decimal digits=2)
Ie
248
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Chapter 8 Communication
Address
Analog Name
Unit
0008H
Idc_2ndH(decimal digits=2)
Ie
0009H
Icorra_HVS(decimal digits=2)
Ie
000AH
Icorrb_HVS(decimal digits=2)
Ie
000BH
Icorrc_HVS(decimal digits=2)
Ie
000CH
Icorra_Br11(decimal digits=2)
Ie
000DH
Icorrb_Br11(decimal digits=2)
Ie
000EH
Icorrc_Br11(decimal digits=2)
Ie
000FH
Icorra_Br21(decimal digits=2)
Ie
0010H
Icorrb_Br21(decimal digits=2)
Ie
0011H
Icorrc_Br21(decimal digits=2)
Ie
0012H
Icorra_Br12(decimal digits=2)
Ie
0013H
Icorrb_Br12(decimal digits=2)
Ie
0014H
Icorrc_Br12(decimal digits=2)
Ie
0015H
Icorra_Br22(decimal digits=2)
Ie
0016H
Icorrb_Br22(decimal digits=2)
Ie
0017H
Icorrc_Br22(decimal digits=2)
Ie
0018H
Icorra_Br13(decimal digits=2)
Ie
0019H
Icorrb_Br13(decimal digits=2)
Ie
001AH
Icorrc_Br13(decimal digits=2)
Ie
001BH
Icorra_Br23(decimal digits=2)
Ie
001CH
Icorrb_Br23(decimal digits=2)
Ie
001DH
Icorrc_Br23(decimal digits=2)
Ie
001EH
Ia_HVS(decimal digits=2)
A
001FH
Ib_HVS(decimal digits=2)
A
0020H
Ic_HVS(decimal digits=2)
A
0021H
Ia_Br11(decimal digits=2)
A
0022H
Ib_Br11(decimal digits=2)
A
0023H
Ic_Br11(decimal digits=2)
A
0024H
Ia_Br21(decimal digits=2)
A
0025H
Ib_Br21(decimal digits=2)
A
0026H
Ic_Br21(decimal digits=2)
A
0027H
Ia_Br12(decimal digits=2)
A
0028H
Ib_Br12(decimal digits=2)
A
0029H
Ic_Br12(decimal digits=2)
A
002AH
Ia_Br22(decimal digits=2)
A
002BH
Ib_Br22(decimal digits=2)
A
002CH
Ic_Br22(decimal digits=2)
A
002DH
Ia_Br13(decimal digits=2)
A
002EH
Ib_Br13(decimal digits=2)
A
002FH
Ic_Br13(decimal digits=2)
A
0030H
Ia_Br23(decimal digits=2)
A
0031H
Ib_Br23(decimal digits=2)
A
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Address
Analog Name
Unit
0032H
Ic_Br23(decimal digits=2)
A
0033H
Id_1stH_REF_HVS(decimal digits=2)
In
0034H
Ith_REF_HVS(decimal digits=2)
In
0035H
Ith_UnsensREF_HVS(decimal digits=2)
In
0036H
Ir_REF_HVS(decimal digits=2)
In
0037H
Id_2ndH_REF_HVS(decimal digits=2)
In
0038H
Id_3rdH_REF_HVS(decimal digits=2)
In
0039H
I0_HVS(decimal digits=2)
In
003AH
I0_NP_HVS(decimal digits=2)
In
003BH
Id_1stH_REF_Br1(decimal digits=2)
In
003CH
Ith_REF_Br1(decimal digits=2)
In
003DH
Ith_UnsensREF_Br1(decimal digits=2)
In
003EH
Ir_REF_Br1(decimal digits=2)
In
003FH
Id_2ndH_Br1(decimal digits=2)
In
0040H
Id_3rdH_Br1(decimal digits=2)
In
0041H
I0_Br11(decimal digits=2)
In
0042H
I0_Br12(decimal digits=2)
In
0043H
I0_Br13(decimal digits=2)
In
0044H
I0_NP_Br1(decimal digits=2)
In
0045H
Id_1stH_REF_Br2(decimal digits=2)
In
0046H
Ith_REF_Br2(decimal digits=2)
In
0047H
Ith_UnsensREF_Br2(decimal digits=2)
In
0048H
Ir_REF_Br2(decimal digits=2)
In
0049H
Id_2ndH_Br2(decimal digits=2)
In
004AH
Id_3rdH_Br2(decimal digits=2)
In
004BH
I0_Br21(decimal digits=2)
In
004CH
I0_Br22(decimal digits=2)
In
004DH
I0_Br23(decimal digits=2)
In
004EH
I0_NP_Br2(decimal digits=2)
In
8.4.3.2 Current and Voltage
Address
Analog Name
Unit
1000H
Ia_HVS(decimal digits=2)
A
1001H
Ib_HVS(decimal digits=2)
A
1002H
Ic_HVS(decimal digits=2)
A
1003H
I1_HVS(decimal digits=2)
A
1004H
I2_HVS(decimal digits=2)
A
1005H
I0_HVS(decimal digits=2)
A
1006H
I0_NP_HVS(decimal digits=2)
A
1007H
I0_Gap_HVS(decimal digits=2)
A
1008H
Ua_HVS(decimal digits=2)
V
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Address
Analog Name
Unit
1009H
Ub_HVS(decimal digits=2)
V
100AH
Uc_HVS(decimal digits=2)
V
100BH
Uab_HVS(decimal digits=2)
V
100CH
Ubc_HVS(decimal digits=2)
V
100DH
Uca_HVS(decimal digits=2)
V
100EH
U1_HVS(decimal digits=2)
V
100FH
U2_HVS(decimal digits=2)
V
1010H
U0_HVS(decimal digits=2)
V
1011H
U0_DeltVT_HVS(decimal digits=2)
V
1012H
Ia_Bak_HVS(decimal digits=2)
A
1013H
Ib_Bak_HVS(decimal digits=2)
A
1014H
Ic_Bak_HVS(decimal digits=2)
A
1015H
I1_Bak_HVS(decimal digits=2)
A
1016H
I2_Bak_HVS(decimal digits=2)
A
1017H
I0_Bak_HVS(decimal digits=2)
A
1018H
Flag_VCE_HVS(decimal digits=2)
1019H
Flag_Dir_ROC_HVS(decimal digits=2)
101AH
Accu_InvOC_HVS(decimal digits=2)
%
101BH
Accu_InvROC_HVS(decimal digits=2)
%
101CH
U/F_OvExc(decimal digits=2)
101DH
Accu_InvOvExc(decimal digits=2)
%
101EH
f(decimal digits=2)
Hz
101FH
Ia_Br11(decimal digits=2)
A
1020H
Ib_Br11(decimal digits=2)
A
1021H
Ic_Br11(decimal digits=2)
A
1022H
I1_Br11(decimal digits=2)
A
1023H
I2_Br11(decimal digits=2)
A
1024H
I0_Br11(decimal digits=2)
A
1025H
Uab_Br11(decimal digits=2)
V
1026H
Ubc_Br11(decimal digits=2)
V
1027H
Uca_Br11(decimal digits=2)
V
1028H
U1_Br11(decimal digits=2)
V
1029H
U2_Br11(decimal digits=2)
V
102AH
Flag_VCE_Br11(decimal digits=2)
102BH
Accu_InvOC_Br11(decimal digits=2)
%
102CH
Ia_Br12(decimal digits=2)
A
102DH
Ib_Br12(decimal digits=2)
A
102EH
Ic_Br12(decimal digits=2)
A
102FH
I1_Br12(decimal digits=2)
A
1030H
I2_Br12(decimal digits=2)
A
1031H
I0_Br12(decimal digits=2)
A
1032H
Uab_Br12(decimal digits=2)
V
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Address
Analog Name
Unit
1033H
Ubc_Br12(decimal digits=2)
V
1034H
Uca_Br12(decimal digits=2)
V
1035H
U1_Br12(decimal digits=2)
V
1036H
U2_Br12(decimal digits=2)
V
1037H
Flag_VCE_Br12(decimal digits=2)
1038H
Ia_Br13(decimal digits=2)
A
1039H
Ib_Br13(decimal digits=2)
A
103AH
Ic_Br13(decimal digits=2)
A
103BH
I1_Br13(decimal digits=2)
A
103CH
I2_Br13(decimal digits=2)
A
103DH
I0_Br13(decimal digits=2)
A
103EH
Uab_Br13(decimal digits=2)
V
103FH
Ubc_Br13(decimal digits=2)
V
1040H
Uca_Br13(decimal digits=2)
V
1041H
U1_Br13(decimal digits=2)
V
1042H
U2_Br13(decimal digits=2)
V
1043H
Flag_VCE_Br13(decimal digits=2)
1044H
I0_NP_Br1(decimal digits=2)
A
1045H
U0_DeltVT_Br1(decimal digits=2)
V
1046H
Ia_Br21(decimal digits=2)
A
1047H
Ib_Br21(decimal digits=2)
A
1048H
Ic_Br21(decimal digits=2)
A
1049H
I1_Br21(decimal digits=2)
A
104AH
I2_Br21(decimal digits=2)
A
104BH
I0_Br21(decimal digits=2)
A
104CH
Uab_Br21(decimal digits=2)
V
104DH
Ubc_Br21(decimal digits=2)
V
104EH
Uca_Br21(decimal digits=2)
V
104FH
U1_Br21(decimal digits=2)
V
1050H
U2_Br21(decimal digits=2)
V
1051H
Flag_VCE_Br21(decimal digits=2)
1052H
Accu_InvOC_Br21(decimal digits=2)
%
1053H
Ia_Br22(decimal digits=2)
A
1054H
Ib_Br22(decimal digits=2)
A
1055H
Ic_Br22(decimal digits=2)
A
1056H
I1_Br22(decimal digits=2)
A
1057H
I2_Br22(decimal digits=2)
A
1058H
I0_Br22(decimal digits=2)
A
1059H
Uab_Br22(decimal digits=2)
V
105AH
Ubc_Br22(decimal digits=2)
V
105BH
Uca_Br22(decimal digits=2)
V
105CH
U1_Br22(decimal digits=2)
V
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Chapter 8 Communication
Address
Analog Name
Unit
105DH
U2_Br22(decimal digits=2)
V
105EH
Flag_VCE_Br22(decimal digits=2)
105FH
Ia_Br23(decimal digits=2)
A
1060H
Ib_Br23(decimal digits=2)
A
1061H
Ic_Br23(decimal digits=2)
A
1062H
I1_Br23(decimal digits=2)
A
1063H
I2_Br23(decimal digits=2)
A
1064H
I0_Br23(decimal digits=2)
A
1065H
Uab_Br23(decimal digits=2)
V
1066H
Ubc_Br23(decimal digits=2)
V
1067H
Uca_Br23(decimal digits=2)
V
1068H
U1_Br23(decimal digits=2)
V
1069H
U2_Br23(decimal digits=2)
V
106AH
Flag_VCE_Br23(decimal digits=2)
106BH
I0_NP_Br2(decimal digits=2)
A
106CH
U0_DeltVT_Br2(decimal digits=2)
V
8.4.4 Fetch settings value of equipment
Function Code: 03H
8.4.4.1 Equipment Settings
Address
Setting Name
Unit
0000H
Setting_Group.
0001H
Equip_ID (ASCII Hi Word)
0002H
Equip_ID (ASCII Mi Word)
0003H
Equip_ID (ASCII Lo Word)
0004H
Comm_Addr
0005H
COM1_Baud
bps
0006H
COM2_Baud
bps
0007H
Printer_Baud
bps
Bit0: COM1 870-5-103 Protocal
Bit1: COM1 LFP Protocal
0008H
Protocol
Bit2: COM1 Modbus Protocal
Bit4: COM2 870-5-103 Protocal
Bit5: COM2 LFP Protocal
Bit6: COM2 Modbus Protocal
Bit0:En_Auto_Print
0009H
Control
Bit1:En_Net_Print
Word
Bit3:En_Remote_Cfg
Bit4:GPS_Pulse
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8.4.4.2 System Settings
(1) Protection Configuration
Address
Setting Name
Unit
Bit0:En_Diff
Bit1:En_PPF_HVS
Bit2:En_EF_HVS
Bit3:En_EF_Gap_HVS
Bit4:En_OvExc
Bit5:En_PoleDisagr_HVS
Bit6:En_REF_HVS
1000H
Protection Config
Bit7:En_Bak_Br11
Word 1
Bit8:En_Bak_Br12
Bit9:En_Bak_Br13
Bit10:En_Bak_Br21
Bit11:En_Bak_Br22
Bit12:En_Bak_Br23
Bit13:En_EF_Br1
Bit14:En_EF_Br2
Bit15:En_Reserved
(2) System Settings
Address
Setting Name
Unit
1002H
Sn (decimal digits=1)
MVA
1003H
U1n_HVS (decimal digits=2)
kV
1004H
U1n_Br1 (decimal digits=2)
kV
1005H
U1n_Br2 (decimal digits=2)
kV
1006H
U1n_VT_HVS (decimal digits=2)
kV
1007H
U2n_VT_HVS
V
1008H
U2n_DeltVT_HVS
V
1009H
U1n_VT_Br1 (decimal digits=2)
kV
100AH
U2n_VT_Br1
V
100BH
U1n_VT_Br2 (decimal digits=2)
kV
100CH
U2n_VT_Br2
V
100DH
I1n_CT_HVS (integer)
A
100EH
I2n_CT_HVS
A
100FH
I1n_SpareCT_HVS (integer)
A
1010H
I2n_SpareCT_HVS
A
1011H
I1n_CT_Br11 (integer)
A
1012H
I2n_CT_Br11
A
1013H
I1n_CT_Br12 (integer)
A
1014H
I2n_CT_Br12
A
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Chapter 8 Communication
Address
Setting Name
Unit
1015H
I1n_CT_Br13 (integer)
A
1016H
I2n_CT_Br13
A
1017H
I1n_CT_Br21 (integer)
A
1018H
I2n_CT_Br21
A
1019H
I1n_CT_Br22 (integer)
A
101AH
I2n_CT_Br22
A
101BH
I1n_CT_Br23 (integer)
A
101CH
I2n_CT_Br23
A
101DH
I1n_CT_NP_HVS (integer)
A
101EH
I2n_CT_NP_HVS
A
101FH
I1n_CT_Gap_HVS (integer)
A
1020H
I2n_CT_Gap_HVS
A
1021H
I1n_CT_NP_Br1 (integer)
A
1022H
I2n_CT_NP_Br1
A
1023H
I1n_CT_NP_Br2 (integer)
A
1024H
I2n_CT_NP_Br2
A
Bit0:Yyy12_Conn
Bit1:Ddd12_Conn
Bit2:Dyy11_Conn
Bit3:Ydd11_Conn
1025H
Control
Word
Bit4:Dyy1_Conn
Bit5:Ydd1_Conn
Bit1:Ddd12_Conn
Bit2:Dyy11_Conn
Bit3:Ydd11_Conn
Bit4:Dyy1_Conn
Bit5:Ydd1_Conn
8.4.4.3 Protection Settings
(1) Diff Prot Settings
Address
Setting Name
Unit
2000H
I_Pkp_PcntDiff (decimal digits=2)
Ie
2001H
I_InstDiff (decimal digits=2)
Ie
2002H
Slope1_PcntDiff (decimal digits=2)
2003H
Slope2_PcntDiff (decimal digits=2)
2004H
k_Harm_PcntDiff (decimal digits=2)
2005H
I_Alm_Diff (decimal digits=2)
2006H
TrpLog_Diff
2007H
NR ELECTRIC CO., LTD.
Control
Word
Ie
Bit0:En_InstDiff
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Chapter 8 Communication
(2) HVS PPF Bak Prot Settings
Address
Setting Name
Unit
2008H
V_NegOV_VCE_HVS (decimal digits=2)
V
2009H
Vpp_VCE_HVS (decimal digits=2)
V
200AH
I_OC1_HVS (decimal digits=2)
A
200BH
t_OC1_HVS (decimal digits=2)
S
200CH
TrpLog_OC1_HVS
200DH
I_OC2_HVS (decimal digits=2)
A
200EH
t_OC2_HVS (decimal digits=2)
S
200FH
TrpLog_OC2_HVS
2010H
I_InvOC_HVS (decimal digits=2)
A
2011H
t_InvOC_HVS (decimal digits=2)
S
2012H
TrpLog_InvOC_HVS
2013H
I_Alm_OvLd_HVS (decimal digits=2)
A
2014H
t_Alm_OvLd_HVS (decimal digits=2)
S
2015H
I_InitCool1_OvLd_HVS (decimal digits=2)
A
2016H
t_InitCool1_OvLd_HVS (decimal digits=2)
S
2017H
I_InitCool2_OvLd_HVS (decimal digits=2)
A
2018H
t_InitCool2_OvLd_HVS (decimal digits=2)
S
2019H
I_Blk_OLTC_HVS (decimal digits=2)
A
201AH
t_Blk_OLTC_HVS (decimal digits=2)
S
Bit0:En_VCE_Ctrl_OC1_HVS
Bit1:En_VCE_Ctrl_OC2_HVS
Bit2:En_HVS.VCE_Ctrl_OC_HVS
201BH
Control
Word
Bit3:En_LVS.VCE_Ctrl_OC_HVS
Bit4:Opt_VTS_Ctrl_OC_HVS
Bit5:En_OvLd_HVS
Bit6:En_InitCool1_OvLd_HVS
Bit7:En_OvLd_Blk_OLTC_HVS
Bit8:En_FixDly_InvOC_HVS
Bit9:En_InitCool2_OvLd_HVS
(3) HVS EF Bak Prot Settings
Address
Setting Name
Unit
201CH
V_ROV_VCE_HVS (decimal digits=2)
V
201DH
I_ROC1_HVS (decimal digits=2)
A
201EH
t_ROC11_HVS (decimal digits=2)
S
201FH
TrpLog_ROC11_HVS
2020H
t_ROC12_HVS (decimal digits=2)
2021H
TrpLog_ROC12_HVS
2022H
I_ROC2_HVS (decimal digits=2)
A
2023H
t_ROC21_HVS (decimal digits=2)
S
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S
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Address
Setting Name
Unit
2024H
TrpLog_ROC21_HVS
2025H
t_ROC22_HVS (decimal digits=2)
2026H
TrpLog_ROC22_HVS
2027H
I_ROC3_HVS (decimal digits=2)
A
2028H
t_ROC3_HVS (decimal digits=2)
S
2029H
TrpLog_ROC3_HVS
202AH
I_InvROC_HVS (decimal digits=2)
A
202BH
t_InvROC_HVS (decimal digits=2)
S
202CH
TrpLog_InvROC_HVS
S
Bit0:En_VCE.ROV_Ctrl_ROC1_HVS
Bit1:En_VCE.ROV_Ctrl_ROC2_HVS
Bit2:Opt_I_ROC1
Bit3:Opt_I_ROC2
Bit4:Opt_I_ROC3
202DH
Control
Bit5:En_Dir_Ctrl_ROC1_HVS
Word
Bit6:En_Dir_Ctrl_ROC2_HVS
Bit7:Opt_VTS_Ctrl_ROC_HVS
Bit8:Cfg_Dir_I0_HVS
Bit9:Opt_I_InvROC
Bit10:En_Dir_Ctrl_InvROC_HVS
Bit11:En_FixDly_ROC_HVS
(4) HVS Gap EF Bak Prot Settings
Address
Setting Name
Unit
202EH
V_ROV_Gap_HVS (decimal digits=2)
V
202FH
t_ROV_Gap_HVS (decimal digits=2)
S
2030H
TrpLog_ROV_Gap_HVS
2031H
I_ROC_Gap_HVS (decimal digits=2)
A
2032H
t_ROC_Gap_HVS (decimal digits=2)
S
2033H
TrpLog_ROC_Gap_HVS
2034H
Control Word
Bit0: Reserved
(5) OvExc Prot Settings
Address
Setting Name
2035H
k_OvExc (decimal digits=2)
2036H
t_OvExc (decimal digits=1)
2037H
TrpLog_OvExc
2038H
k_Alm_OvExc (decimal digits=2)
2039H
t_Alm_OvExc (decimal digits=1)
203AH
k0_InvOvExc (decimal digits=2)
203BH
t0_InvOvExc (decimal digits=1)
NR ELECTRIC CO., LTD.
Unit
S
S
S
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Address
Setting Name
203CH
k1_InvOvExc (decimal digits=2)
203DH
t1_InvOvExc (decimal digits=1)
203EH
k2_InvOvExc (decimal digits=2)
203FH
t2_InvOvExc (decimal digits=1)
2040H
k3_InvOvExc (decimal digits=2)
2041H
t3_InvOvExc (decimal digits=1)
2042H
k4_InvOvExc (decimal digits=2)
2043H
t4_InvOvExc (decimal digits=1)
2044H
k5_InvOvExc (decimal digits=2)
2045H
t5_InvOvExc (decimal digits=1)
2046H
TrpLog_InvOvExc
Unit
S
S
S
S
S
(6) PoleDisagr Prot Settings
Address
Setting Name
Unit
2047H
I_OC_PD (decimal digits=2)
A
2048H
I_NegOC_PD (decimal digits=2)
A
2049H
I_ROC_PD (decimal digits=2)
A
204AH
t_PD1 (decimal digits=2)
S
204BH
TrpLog_PD1
204CH
t_PD2 (decimal digits=2)
204DH
TrpLog_PD2
S
Bit0:En_NegOC_PD
204EH
Control
Bit1:En_ROC_PD
Word
Bit2:En_ExTrp_Ctrl_PD2
Bit3:En_OC_PD2
(7) HVS REF Prot Settings
Address
Setting Name
Unit
204FH
I_Pkp_PcntREF_HVS(decimal digits=2)
In
2050H
I_InstREF(decimal digits=2)
In
2051H
Slope_PcntREF(decimal digits=2)
2052H
TrpLog_REF
2053H
Control
Word
Bit0:En_InstREF
Bit1:En_PcntREF_HVS
(8) Br11 Bak Prot Settings
Address
Setting Name
Unit
2054H
V_NegOV_VCE_Br11 (decimal digits=2)
V
2055H
Vpp_VCE_Br11 (decimal digits=2)
V
2056H
I_OC1_Br11 (decimal digits=2)
A
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Address
Setting Name
Unit
2057H
t_OC1_Br11 (decimal digits=2)
S
2058H
TrpLog_OC1_Br11
2059H
I_OC2_Br11 (decimal digits=2)
A
205AH
t_OC2_Br11 (decimal digits=2)
S
205BH
TrpLog_OC2_Br11
205CH
I_InvOC_Br11 (decimal digits=2)
A
205DH
t_InvOC_Br11 (decimal digits=2)
S
205EH
TrpLog_InvOC_Br11
Bit0:En_VCE_Ctrl_OC1_Br11
205FH
Control
Word
Bit1:En_VCE_Ctrl_OC2_Br11
Bit2:En_OC2_SOTF_Br11
Bit3:Opt_VTS_Ctrl_OC_Br11
Bit4:En_ FixDly_ InvOC_Br11
(9) Br12 Bak Prot Settings
Address
Setting Name
Unit
2060H
V_NegOV_VCE_Br12 (decimal digits=2)
V
2061H
Vpp_VCE_Br12 (decimal digits=2)
V
2062H
I_OC1_Br12 (decimal digits=2)
A
2063H
t_OC1_Br12 (decimal digits=2)
S
2064H
TrpLog_OC1_Br12
2065H
I_OC2_Br12 (decimal digits=2)
A
2066H
t_OC2_Br12 (decimal digits=2)
S
2067H
TrpLog_OC2_Br12
Bit0:En_VCE_Ctrl_OC1_Br12
2068H
Control
Word
Bit1:En_VCE_Ctrl_OC2_Br12
Bit2:En_OC2_SOTF_Br12
Bit3:Opt_VTS_Ctrl_OC_Br12
(10)Br13 Bak Prot Settings
Address
Setting Name
Unit
2069H
V_NegOV_VCE_Br13 (decimal digits=2)
V
206AH
Vpp_VCE_Br13 (decimal digits=2)
V
206BH
I_OC1_Br13 (decimal digits=2)
A
206CH
t_OC1_Br13 (decimal digits=2)
S
206DH
TrpLog_OC1_Br13
206EH
I_OC2_Br13 (decimal digits=2)
A
206FH
t_OC2_Br13 (decimal digits=2)
S
2070H
TrpLog_OC2_Br13
2071H
NR ELECTRIC CO., LTD.
Control
Bit0:En_VCE_Ctrl_OC1_Br13
Word
Bit1:En_VCE_Ctrl_OC2_Br13
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Address
Setting Name
Unit
Bit2:En_OC2_SOTF_Br13
Bit3:Opt_VTS_Ctrl_OC_Br13
(11)Br21 Bak Prot Settings
Address
Setting Name
Unit
2072H
V_NegOV_VCE_Br21 (decimal digits=2)
V
2073H
Vpp_VCE_Br21 (decimal digits=2)
V
2074H
I_OC1_Br21 (decimal digits=2)
A
2075H
t_OC1_Br21 (decimal digits=2)
S
2076H
TrpLog_OC1_Br21
2077H
I_OC2_Br21 (decimal digits=2)
A
2078H
t_OC2_Br21 (decimal digits=2)
S
2079H
TrpLog_OC2_Br21
207AH
I_InvOC_Br21 (decimal digits=2)
A
207BH
t_InvOC_Br21 (decimal digits=2)
S
207CH
TrpLog_InvOC_Br21
Bit0:En_VCE_Ctrl_OC1_Br21
207DH
Control
Word
Bit1:En_VCE_Ctrl_OC2_Br21
Bit2:En_OC2_SOTF_Br21
Bit3:Opt_VTS_Ctrl_OC_Br21
Bit4:En_ FixDly_ InvOC_Br21
(12)Br22 Bak Prot Settings
Address
Setting Name
Unit
207EH
V_NegOV_VCE_Br22 (decimal digits=2)
V
207FH
Vpp_VCE_Br22 (decimal digits=2)
V
2080H
I_OC1_Br22 (decimal digits=2)
A
2081H
t_OC1_Br22 (decimal digits=2)
S
2082H
TrpLog_OC1_Br22
2083H
I_OC2_Br22 (decimal digits=2)
A
2084H
t_OC2_Br22 (decimal digits=2)
S
2085H
TrpLog_OC2_Br22
Bit0:En_VCE_Ctrl_OC1_Br22
2086H
Control
Word
Bit1:En_VCE_Ctrl_OC2_Br22
Bit2:En_OC2_SOTF_Br22
Bit3:Opt_VTS_Ctrl_OC_Br22
(13)Br23 Bak Prot Settings
Address
2087H
248
Setting Name
V_NegOV_VCE_Br23 (decimal digits=2)
Unit
V
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Chapter 8 Communication
Address
Setting Name
Unit
2088H
Vpp_VCE_Br23 (decimal digits=2)
V
2089H
I_OC1_Br23 (decimal digits=2)
A
208AH
t_OC1_Br23 (decimal digits=2)
S
208BH
TrpLog_OC1_Br23
208CH
I_OC2_Br23 (decimal digits=2)
A
208DH
t_OC2_Br23 (decimal digits=2)
S
208EH
TrpLog_OC2_Br23
Bit0:En_VCE_Ctrl_OC1_Br23
208FH
Control
Word
Bit1:En_VCE_Ctrl_OC2_Br23
Bit2:En_OC2_SOTF_Br23
Bit3:Opt_VTS_Ctrl_OC_Br23
(14)Br1 EF Prot Settings
Address
Setting Name
Unit
2090H
I_ROC1_Br1 (decimal digits=2)
A
2091H
t_ROC1_Br1 (decimal digits=2)
S
2092H
TrpLog_ROC1_Br1
2093H
I_ROC2_Br1 (decimal digits=2)
A
2094H
t_ROC2_Br1 (decimal digits=2)
S
2095H
TrpLog_ROC2_Br1
2096H
V_Alm_ROV_Br1 (decimal digits=2)
V
2097H
t_Alm_ROV_Br1 (decimal digits=2)
S
(15)Br2 EF Prot Settings
Address
Setting Name
Unit
2098H
I_ROC1_Br2(decimal digits=2)
A
2099H
t_ROC1_Br2(decimal digits=2)
S
209AH
TrpLog_ROC1_Br2
209BH
I_ROC2_Br2(decimal digits=2)
A
209CH
t_ROC2_Br2(decimal digits=2)
S
209DH
TrpLog_ROC2_Br2
209EH
V_Alm_ROV_Br2(decimal digits=2)
V
209FH
t_Alm_ROV_Br2(decimal digits=2)
S
(16)Br1 REF Prot Settings
Address
Setting Name
Unit
20A0H
I_Pkp_PcntREF_Br1(decimal digits=2)
In
20A1H
I_InstREF_Br1(decimal digits=2)
In
20A2H
Slope_PcntREF_Br1(decimal digits=2)
20A3H
TrpLog_REF_Br1
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Chapter 8 Communication
Address
Setting Name
Control
Word
20A4H
Unit
Bit0:En_InstREF_Br1
Bit1:En_PcntREF_Br1
(17)Br2 REF Prot Settings
Address
Setting Name
Unit
20A5H
I_Pkp_PcntREF_Br2(decimal digits=2)
In
20A6H
I_InstREF_Br2(decimal digits=2)
In
20A7H
Slope_PcntREF_Br2(decimal digits=2)
20A8H
TrpLog_REF_Br2
20A9H
Control
Bit0:En_InstREF_Br2
Word
Bit1:En_PcntREF_Br2
8.4.5 Diagnostics
Function Code: 08H
Modbus function 08 provides a series of tests for checking the communication system between the
master and slave, or for checking various internal error conditions within the slave.
The function uses a two–byte sub function code field in the query to define the type of test to be
performed. The slave echoes both the function code and sub function code in a normal response.
The listing below shows the sub function codes supported by the equipment.
Code
Name
00H
Return Query Data
01H
Restart Comm Option
04H
Force Listen Only Mode
0BH
Return Bus Message Count
0CH
Return Bus Comm. Error Count
0DH
Return Bus Exception Error Cnt
0EH
Return Slave Message Count
0FH
Return Slave No Response Cnt
8.4.6 Exception Responses
Except for broadcast messages, when a master device sends a query to a slave device it expects
a normal response. If the slave receives the query without a communication error, but cannot
handle it (for example, if the request is to read a non–existent coil or register), the slave will return
an exception response informing the master of the nature of the error.
The listing below shows the exception codes supported by the equipment.
Code
248
Description
01H
Illegal Function
02H
Illegal Data Address
03H
Illegal Data Value
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Chapter 8 Communication
Code
07H
Description
Negative Acknowledge
8.5 Communication with Printer
When communicating locally with a printer using the rear series port, a special connection line is
necessary which is provided by manufacture of the equipment.
There are two parameters need to be set in RCS-985T for communication with printer,
[Printer_Baud] and [En_Auto_Print], the former decides the communication speed and the later
decides the printer’
s activating way. Please refer to chapter 6 for details.
8.6 Front EIA(RS)232 Interface Communication
The front communication port is provided by a DB9 female D-type connector located under the
small hinged cover on the front panel. It provides RS232 serial data communication and is
intended for use with a PC locally to the relay (up to 15m distance). This port supports the courier
communication protocol only. Courier is the communication language developed by NR to allow
communication with its range of protection relays. The front port is particularly designed for use
with relays settings program RCSPC which is a Windows based software package.
The pin connections of relay’
s DB9 front prot are as follows:
Pin No.2 Tx Transmit data
Pin No.3 Rx Receive data
Pin No.5 common
None of the other pins are connected in the relays. The relays should be connected to the serial
port of a PC, usually called as COM1 or COM2. The serial port pin connections, which is DB9 male,
is as below (if in doubt check you PC manual):
Pin No.2 Rx Transmit data
Pin No.3 Tx Receive data
Pin No.5 common
For successful data communication, the Tx pin on the relays must be connected to the Rx pin on
the PC, and Rx pin on the relay must be connected to Tx pin on the PC as shown in Figure 8.6-1.
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Chapter 8 Communication
Figure 8.6-1
Front panel RS232 port communication connection
8.7 Communication with External Time Synchronization Source
The clock function (Calendar clock) is used for time-tagging for the following purposes:
Event recording
Fault recording
Present recording
Self-supervision
When the relays are connected to the GPS clock, all the relay clocks are synchronized with the
external time standard. There are two way to adjust the relay clock.
time synchronization via RS-485 serial port
time synchronization via binary input
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Chapter 9 Installation
9.1 Receipt of Relays
Upon receipt, relays should be examined immediately to ensure no external damage has been
sustained in transit. If damage has been sustained, a claim should be made to the transport
contractor and NR should be promptly notified. Relays that are supplied unmounted and not
intended for immediate installation should be returned to their protective bags and delivery carton.
Section 9.3 of this chapter gives more information about the storage of relays.
9.2 Handling of Electronic Equipment
A person’
s normal movements can easily generate electrostatic potentials of several thousand
volts. Discharge of these voltages into semiconductor devices when handling electronic circuits
can cause serious damage that, although not always immediately apparent, will reduce the
reliability of the circuit. The relay’
s electronic circuits are protected from electrostatic discharge
when housed in the case. Do not expose them to risk by removing the front panel or printed circuit
boards unnecessarily.
Each printed circuit board incorporates the highest practicable protection for its semiconductor
devices. However, if it becomes necessary to remove a printed circuit board, the following
precautions should be taken to preserve the high reliability and long life for which the relay has
been designed and manufactured.
Before removing a printed circuit board, ensure that you are at the same electrostatic potential as
the equipment by touching the case.
Handle analog input modules by the front panel, frame or edges of the circuit boards.
Printed circuit boards should only be handled by their edges. Avoid touching the electronic
components, printed circuit tracks or connectors.
Do not pass the module to another person without first ensuring you are both at the same
electrostatic potential. Shaking hands achieves equipotential.
Place the module on an anti-static surface, or on a conducting surface that is at the same potential
as you.
If it is necessary to store or transport printed circuit boards removed from the case, place them
individually in electrically conducting anti-static bags.
In the unlikely event that you are making measurements on the internal electronic circuitry of a
relay in service, it is preferable that you are earthed to the case with a conductive wrist strap. Wrist
straps should have a resistance to ground between 500kΩto 10MΩ. If a wrist strap is not available
you should maintain regular contact with the case to prevent a build-up of electrostatic potential.
Instrumentation which may be used for making measurements should also be earthed to the case
whenever possible.
More information on safe working procedures for all electronic equipment can be found in BS EN
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Chapter 9 Installation
100015: Part 1:1992. It is strongly recommended that detailed investigations on electronic circuitry
or modification work should be carried out in a special handling area such as described in the
British Standard document.
9.3 Storage
If relays are not to be installed immediately upon receipt, they should be stored in a place free from
dust and moisture in their original cartons. Where de-humidifier bags have been included in the
packing they should be retained.
To prevent battery drain during transportation and storage a battery isolation strip is fitted during
manufacture. With the lower access cover open, presence of the battery isolation strip can be
checked by a red tab protruding from the positive polarity side.
Care should be taken on subsequent unpacking that any dust, which has collected on the carton,
does not fall inside. In locations of high humidity the carton and packing may become impregnated
with moisture and the de-humidifier crystals will lose their efficiency.
Prior to installation, relays should be stored at a temperature of between –25°C to +70°C (-13°F to
+158°F).
9.4 Unpacking
Care must be taken when unpacking and installing the relays so that none of the parts are
damaged and additional components are not accidentally left in the packing or lost. Ensure that
any User’
s CDROM or technique documentation is NOT discarded – this should accompany the
relay to its destination substation.
NOTE: With the lower access cover open, the red tab of the battery isolation strip will be
seen protruding from the positive (+) side of the battery compartment. Do not remove this
strip because it prevents battery drain during transportation and storage and will be
removed as part of the commissioning tests. Relays must only be handled by skilled
persons.
The site should be well lit to facilitate inspection, clean, dry and reasonably free from dust and
excessive vibration.
9.5 Relay Mounting
RCS-985T is dispatched either individually or as part of a panel/rack assembly. Individual relays
are normally supplied accompanied with this manual showing the dimensions for panel cutouts
and whole centers. This information can also be found in the product publication.
9.5.1 Rack Mounting
RCS-985T may be rack mounted using single tier rack frames, as illustrated in Figure 9.5-1 and
Figure 9.5-2. The frames must have been designed to have dimensions in accordance with
IEC60297 and are supplied pre-assembled ready to use. On a standard 483mm rack system this
enables combinations of widths of case up to a total equivalent of size 80TE to be mounted side by
side.
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Chapter 9 Installation
Once the tier is complete, the frames are fastened into the racks using mounting angles at each
ES C
76.2
2 79.4
3 54.8
GR P
end of the tier.
Figure 9.5-1 Rack mounting of relays— front face
Figure 9.5-2 Rack mounting of relays— rear face
Relays can be mechanically grouped into single tier (8U) or multi-tier arrangements by means of
the rack frame.
Where the case size summation is less than 80TE on any tier, or space is to be left for installation
of future relays, blanking plates may be used. These plates can also be used to mount ancillary
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Chapter 9 Installation
components.
9.5.2 Panel Mounting
The relays can be flush mounted into panels using M4 self-tapping screws with captive 3mm thick
washers.
For applications where relays need to be semi -projection or projection mounted, a range of collars
are available. Where several relays are mounted in a single cutout in the panel, it is advised that
they are mechanically grouped together horizontally and/or vertically to form rigid assemblies prior
to mounting in the panel.
NOTE: It is not advised that RCS-985T are fastened using pop rivets as this will not allow
the relay to be easily removed from the panel in the future if repair is necessary.
If it is required to mount a relay assembly on a panel complying to IEC 60529 IP51 enclosure
protection, it will be necessary to fit a metallic sealing strip between adjoining relays and a sealing
ring around the complete assembly.
9.6 RELAY WIRING
This section serves as a guide to selecting the appropriate cable and connector type for each
terminal on the RCS-985T.
9.6.1 Medium and Heavy Duty Terminal Block Connections
Heavy duty terminal block: CT circuits.
Medium duty: All other terminal blocks.
Loose relays are supplied with sufficient M4 screws for making connections to the rear mounted
terminal blocks using jointing terminals.
The following minimum wire sizes are recommended:
Current transformers
2.5mm 2
Auxiliary Supply, Vx
1.5mm 2
EIA(RS)485 Port
See separate section
Other Circuits
1.0mm 2
Due to the limitations of the jointing terminal, the maximum wire size that can be used for any of
the medium or heavy duty terminals is 4.0mm2 using jointing terminals that are not pre-insulated.
Where it required to only use pre-insulated ring terminals, the maximum wire size that can be used
is reduced to 2.5mm 2 per ring terminal.
The wire used for all connections to the medium and heavy duty terminal blocks, except the
EIA(RS)485 port, should have a minimum voltage rating of 300Vrms.
It is recommended that the auxiliary supply wiring should be protected by a 16A high rupture
capacity (HRC) fuse of type NIT or TIA. For safety reasons, current transformer circuits must never
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be fused. Other circuits should be appropriately fused to protect the wire used.
9.6.2 EIA (RS) 485 Port
Connections to the EIA (RS) 485 port are made using ring terminals. It is recommended that a 2
core screened cable is used with a maximum total length of 1000m or 200nF total cable
capacitance. A typical cable specification would be:
Each core:
16/0.2mm copper conductors,PVC insulated
Nominal conductor area:
0.5mm 2 per core
Screen:
Overall braid, PVC sheathed
9.6.3 IRIG-B Connections (if applicable)
The IRIG-B input and BNC connector have a characteristic impedance of 50Ω. It is recommended
that connections between the IRIG-B equipment and the relay are made using coaxial cable of
type RG59LSF with a halogen free, fire retardant sheath.
9.6.4 EIA(RS)232 Front Port of Downloading/Monitoring/T est
Short term connections to the EIA(RS)232 port, located at the bottom of face cover, can be made
using a screened multi-core communication cable up to 15m long, or a total capacitance of 2500pF.
The cable should be terminated at the relay end with a 9-way, metal shelled, D-type male plug.
The pin allocations are detailed in section 8.6 about connectors.
9.6.5 Earth Connection
Every relay must be connected to the cubicle earth bar using the M4 earth studs in the rear
faceplate of the relay case. The minimum recommended wire size is 4.0 mm2 and should have a
ring terminal at the relay end.
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Chapter 10 Commissioning
10.1 General
This relay is fully numerical in their design, implementing all protection and non-protection
functions in software. The relay employ a high degree of self-checking and in the unlikely event of
a failure, will give an alarm. As a result of this, the commissioning test does not need to be as
extensive as with non-numeric electronic or electro-mechanical relays.
To commission numerical relays, it is only necessary to verify that the hardware is functioning
correctly and the application-specific software settings have been applied to the relay.
Blank commissioning test and setting records are provided at the end of this manual for
completion as required.
Before carrying out any work on the equipment, the user should be familiar with the contents of the
safety and technical data sections and the ratings on the equipment’
s rating label.
10.2 Safety Instructions
WARNING: Hazardous voltages are present in this electrical equipment during operation.
Non-observance of the safety rules can result in severe personal injury or property
damage.
WARNING: Only qualified personnel shall work on and around this equipment after
becoming thoroughly familiar with all warnings and safety notices of this manual as well
as with the applicable safety regulations.
Particular attention must be drawn to the following:
The earthing screw of the device must be connected solidly to the protective earth conductor
before any other electrical connection is made.
Hazardous voltages can be present on all circuits and components connected to the supply
voltage or to the measuring and test quantities.
Hazardous voltages can be present in the device even after disconnection of the supply
voltage (storage capacitors!)
The limit values stated in the technical data (Chapter 2) must not be exceeded at all, not even
during testing and commissioning.
When testing the device with secondary test equipment, make sure that no other
measurement quantities are connected. Take also into consideration that the trip circuits and
maybe also close commands to the circuit breakers and other primary switches are
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disconnected from the device unless expressly stated.
DANGER: Current transformer secondary circuits must have been short-circuited before
the current leads to the device are disconnected.
WARNING: Primary test may only be carried out by qualified personnel, who are familiar
with the commissioning of protection system, the operation of the plant and safety rules
and regulations (switching, earthing, etc.)
10.3 Commission Tools
Minimum equipment required:
Multifunctional dynamic current and voltage injection test set with interval timer.
Multimeter with suitable AC current range and DC voltage ranges of 0-440V.
Continuity tester (if not included in the multimeter).
Phase angle meter.
Phase rotation meter.
NOTE: Modern test set may contain many of the above features in one unit.
Optional equipment:
An electronic or brushless insulation tester with a DC output not exceeding 500 V (for
insulation resistance test when required).
A portable PC, with appropriate software (this enables the rear communications port to be
tested, if this is to be used, and will also save considerable time during commissioning).
EIA RS-485 to EIA RS-232 converter (if EIA RS-485 IEC60870-5-103 port is being tested).
An EPSON ® 300K printer.
RCS-9000 serials dedicated protection tester TEST or HELP-90.
10.4 Setting Familiarization
When commissioning a RCS-9671C relay for the first time, sufficient time should be allowed to
become familiar with the method by which the settings are applied. The Chapter 6 contains a
detailed description of the menu structure of this relay.
With the front cover in place all keys are accessible. All menu cells can be read. LED indicators
and alarms can be reset. Protection or configuration settings can be changed, or fault and event
records cleared. However, menu cells will require the appropriate password to be entered before
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changes can be made.
Alternatively, if a portable PC is available together with suitable setting software (such as
RCS-9700 SAS software), the menu can be viewed a page at a time to display a full column of
data and text. This PC software also allows settings to be entered more easily, saved to a file on
disk for future reference or printed to produce a setting record. Refer to the PC software user
manual for details. If the software is being used for the first time, allow sufficient time to become
familiar with its operation.
10.5 Product Checks
These product checks cover all aspects of the relay which should be checked to ensure that it has
not been physically damaged prior to commissioning, is functioning correctly and all input quantity
measurements are within the stated tolerances.
If the application-specific settings have been applied to the relay prior to commissioning, it is
advisable to make a copy of the settings so as to allow them restoration later. This could be done
by extracting the settings from the relay itself via printer or manually creating a setting record.
10.5.1 With the Relay De-energized
The RCS-9671C transformer differential relay is fully numerical and the hardware is continuously
monitored. Commissioning tests can be kept to a minimum and need only include hardware tests
and conjunctive tests. The function tests are carried out according to user’
s correlative regulations.
The following tests are necessary to ensure the normal operation of the equipment before it is first
put into service.
Hardware tests
These tests are performed for the following hardware to ensure that there is no hardware
defect. Defects of hardware circuits other than the following can be detected by
self-monitoring when the DC power is supplied.
User interfaces test
Binary input circuits and output circuits test
AC input circuits test
Function tests
These tests are performed for the following functions that are fully software-based. Tests of
the protection schemes and fault locator require a dynamic test set.
Measuring elements test
Timers test
SOE recording and disturbance recording test
Conjunctive tests
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The tests are performed after the relay is connected with the primary equipment and other
external equipment.
On load test.
Phase sequence check and polarity check.
10.5.1.1 Visual Inspection
After unpacking the product, check for any damage to the relay case. If there is any damage, the
internal module might also have been affected, contact the vendor. Following items listed is
necessary.
Protection panel
Carefully examine the protection panel, protection equipment inside and other parts inside to
see that no physical damage has occurred since installation.
The rated information of other auxiliary protections should be checked to ensure it is correct
for the particular installation.
Panel wiring
Check the conducting wire which is used in the panel to assure that their cross section
meeting the requirement.
Carefully examine the wiring to see that they are no connection failure exists.
Label
Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to
make sure that their labels meet the requirements of this project.
Equipment plug-in modules
Check each plug-in module of the equipments on the panel to make sure that they are well
installed into the equipment without any screw loosened.
Earthing cable
Check whether the earthing cable from the panel terminal block is safely screwed to the panel
steel sheet.
Switch, keypad, isolator binary inputs and push button
Check whether all the switches, equipment keypad, isolator binary inputs and push buttons
work normally and smoothly.
10.5.1.2 Insulation Test (if required)
Insulation resistance tests are only necessary during commissioning if it is required for them to be
done and they have not been performed during installation.
Isolate all wiring from the earth and test the isolation with an electronic or brushless insulation
tester at a DC voltage not exceeding 500V, The circuits need to be tested should include:
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Current transformer circuits
DC power supply
Optic-isolated control inputs
Output contacts
Communication ports
The insulation resistance should be greater than 100MΩ at 500V.
Test method:
To unplug all the terminals sockets of this relay, and do the Insulation resistance test for each
circuit above with an electronic or brushless insulation tester.
On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected
to the protection
10.5.1.3 External Wiring
Check that the external wiring is correct to the relevant relay diagram and scheme diagram.
Ensure as far as practical that phasing/phase rotation appears to be as expected.
Check the wiring against the schematic diagram for the installation to ensure compliance with the
customer’
s normal practice.
10.5.1.4 Auxiliary Supply
The relay can be operated from either 110/125Vdc or 220/250Vdc auxiliary supply depending on
the relay’
s nominal supply rating. The incoming voltage must be within the operating range
specified in the following table, before energizing the relay, measure the auxiliary supply to ensure
it within the operating range.
Rated Voltage
110/125VDC
220/250VDC
Variation
88 - 144 VDC
176 - 288 VDC
It should be noted that the relay can withstand an AC ripple of up to 12% of the upper rated voltage
on the DC auxiliary supply.
WARNING: Energize the relay only if the auxiliary supply is within the specified operating
ranges.
10.5.2 With the Relay Energized
The following groups of checks verify that the relay hardware and software is functioning correctly
and should be carried out with the auxiliary supply applied to the relay.
The current transformer connections must remain isolated from the relay for these checks. The trip
circuit should also remain isolated to prevent accidental operation of the associated circuit
breaker.
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10.5.2.1 User interface
This test ensures that the LCD, LEDs and keys function correctly.
LCD display
Only apply the rated DC voltage and check whether the LCD displays normal operation status
report as mentioned former. If there is a failure, for example VT circuit fail because of not
applying voltage, the LCD displays failure report. If the LCD displays failure report, press the
“ECS”key for 1 second and the LCD will return to normal operation status report.
LED indicators
Apply the rated DC voltage and check that the "HEALTHY" LED is lighting in green. We need
to emphasize that the "HEALTHY" LED is always lighting in operation course except that the
equipment find serious problems listed in section 4.2.11.2.
Keypad
Press key “ESC”or “▲ ”and enter the command menu. Do some jobs to ensure that all buttons are
in good condition.
10.5.2.2 Watchdog contacts
Using a continuity tester, check the watchdog contacts (equipment being blocked, BO_Fail)
are in the states given in Table 10.5-1 below.
Table 10.5-1 Watchdog contact status
Terminals
Contacts
Relay de-energized
Relay energized
Closed
Open
3A1-3A3
3A2-3A4
3B4-3B26
10.5.2.3 Date and Time
If the time and date is not being maintained by substation automation system, the date and time
should be set manually.
Set the date and time to the correct local time and date using menu item ”CLOCK”.
In the event of the auxiliary supply failing, with a battery fitted on CPU board, the time and date will
be maintained. Therefore when the auxiliary supply is restored the time and date will be correct
and not need to set again.
To test this, remove the auxiliary supply from the relay for approximately 30s. After being
re-energized, the time and date should be correct.
10.5.2.4 Binary input check
This test checks that all the binary inputs on the protection are functioning correctly. The binary
inputs should be energized one at a time. Ensuring correct polarity, connect the field supply
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voltage to the appropriate terminals for the input being tested.
There two voltage levels of opto-couple for binary inputs, one is 24V DC and the other is
250/220/125/110V DC. The negative pole of DC 24V and negative pole of DC 250/220/125/110V
have been connected with the corresponding negative pole of opto-couplers through the inner rear
board in equipment. The positive pole terminals of opto -couplers have been connected to the rear
connectors for binary input connecting, and common positive pole has also be connected to the
rear connector.
Please see the panel diagram carefully and find the right connector terminal numbers of common
positive pole of DC 24V and DC 250/220/125/110V.
Note
The binary inputs may be energized from an external DC auxiliary supply (e.g. the station battery)
in some installations. Check that this is not the case before connecting the field voltage otherwise
damage to the protection may result. The status of each binary input can be viewed using either
DBG2000 software installed in a portable PC or by checking the front man-machine interface LCD.
When each binary input is energized the display will change to indicate the new status of the
inputs. Please check binary input both on CPU module and MON module and ensure they are
consistent.
Please note only the positive pole of opto-coupler for binary inputs are listed in following tables.
1) Binary inputs of contacts status (24V opto-couplers)
Path: Main Menu -> VALUES-> CPU(MON) STATUS-> ->CONTACT INPUT -> [signal name]
No.
Signal name
Equipment
Wiring
CPU
MON
terminal No.
connector No.
status
status
1
2
3
……
2) External binary inputs (250/220/125/110V opto-couplers or 24V opto-couplers)
Path: Main Menu -> VALUES-> CPU(MON) STATUS -> OTHER INPUT -> [signal name]
No.
Signal name
Equipment
Wiring
CPU
MON
terminal No.
connector No.
status
status
Binary inputs via 24V opto-couplers
1
2
3
……
Binary inputs via 250/220/125/110V opto-couplers
1
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2
3
… ..
10.5.2.5 Binary output check
Check alarm signal contacts
(1) Simulate a VT and CT circuit failures, and then the following contacts should close:
No.
Signal name
Equipment
Wiring
Contact output
terminal No.
connector No.
(Close or open?)
1
2
3
……
(2) Simulate overload condition, and then the following contacts should close:
No.
Signal name
Equipment
Wiring
Contact output
terminal No.
connector No.
(Close or open?)
1
2
3
……
(3) Simulate zero-sequence overvoltage of branch A and B, and then the following contacts
should close:
No.
Signal name
Equipment
Wiring
Contact output
terminal No.
connector No.
(Close or open?)
1
2
3
……
(4) Simulate HV side pole disagreement, and then the following contacts should close:
No.
Signal name
Equipment
Wiring
Contact output
terminal No.
connector No.
(Close or open?)
1
2
3
……
(5) Simulate HV side overexcitation and then the following contacts should close:
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No.
Signal name
Equipment
Wiring
Contact output
terminal No.
connector No.
(Close or open?)
1
2
3
……
Check protection tripping signal contacts
Please simulate internal faults on transformer to make differential protection, HV side overcurrent
protection, restricted earth fault protection of each side and zero-sequence overcurrent protection
of side A and B operate. Then simulate a fault to make overexictation protection operates. Please
energize the binary input of enabling each protection function contact and set the corresponding
logic setting of each protection first. Following contacts will close.
No.
Signal name
Equipment
Wiring
Contact output
terminal No.
connector No.
(Close or open?)
1
2
3
……
Check tripping output contacts
First configure one tripping matrix of some protection to select all tripping output channels. Then
simulate a fault to make the protection operates and following contacts will close.
No.
Signal name
Equipment
Wiring
Contact output
terminal No.
connector No.
(Close or open?)
1
2
3
……
10.5.2.6 Communications port
This test should only be performed where the protection is to be accessed from a remote location
and will vary depending on the communications standard being adopted.
It is not the intention of the test to verify the operation of the complete system from the relay to the
remote location, just the protection’
s rear communications port and any protocol converter
necessary.
Courier communications
Ensure that the RS-232 wire link the RS-232 port in front of the RCS-985T and the communication
baud rate in RCSPC must be set as “9600”.
Check that communications can be established with this protection using the portable PC.
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Remote communication
This test is to check the status of communications between RCS -985T and the engineer’
s
workstation in SAS (Substation automation system) if it is applicable. Before test, the
communication baud rate in RCS -985T must be set as “1200-38400”depends on substation
automation system, and the protection’
s [Comm_Adrr] must be set to a value between 1 and 254.
In the menu of “DEBUG”->”COMM STATUS”on the LCD display, “485A”or “485B”indicates the
communication status of 485A port or 485B port. If “Data_Received”is “N”, it means the equipment
has not received data from external system. If “Frame_ Valid”is ‘
N’
, it indicates the setting error of
baud rate or protocol while “Address_Valid”is “N”, it means the communication address is set
wrongly. ”Data_Sent”is "N”means datagram sent from the equipment is wrong. If all those status
are ‘
Y’
, it means communication is established successfully.
10.5.2.7 AC Current inputs check
This test verified that the accuracy of current measurement is within the acceptable tolerances.
Apply current equal to the current transformer secondary winding rating to each current
transformer input of the corresponding rating in turn, see the following table or external connection
diagram for appropriate terminal numbers, checking its magnitude using a multimeter/test set
readout. The corresponding reading can then be checked in the relays menu.
The measurement accuracy of the relay is 2.5%. However an additional allowance must be made
for the accuracy of the test equipment being used.
Current channel linearity and precision checkout
Group No.
Three-phase
current channel 1
Three-phase
current channel 2
Item
Input
Value
Measurement (on LCD)
Angle
Value
Angle
IA
IB
IC
IA
IB
IC
IA
… … ..
IB
IC
Three-phase
current channel n
Zero-sequence
current channel 1
Zero-sequence
current channel 2
……
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IB
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Three-phase
current channel n
3Io
10.5.2.8 AC Voltage inputs check
10.5.2.9 Testing the AC Voltage Inputs
This test verified that the accuracy of voltage measurement is within the acceptable tolerances.
Apply rated voltage to each voltage transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relays menu.
The voltage measurement accuracy of the relay is 2.5%. However an additional allowance must
be made for the accuracy of the test equipment being used.
Voltage channel linearity and precision checkout
Group No.
Three-phase
voltage channel 1
Phase-to-phase
voltage channel 1
Phase-to-phase
voltage channel 2
Item
……
Three-phase
voltage channel n
Angle
Upp
Upp
Upp
voltage channel 2
Value
UC
Phase-to-phase
voltage channel n
Zero-sequence
Angle
UB
Upp
voltage channel 1
Value
Measurement (on LCD)
UA
……
Zero-sequence
Input
Uo
3Uo
3Uo
3Uo
10.5.3 Protective Function Testing
The setting checks ensure that the entire application-specific relay, for the particular installation,
has been correctly applied to the relay.
NOTE: The trip circuit should remain isolated during these checks to prevent accidental
operation of the associated circuit breaker.
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10.5.3.1 Demonstrate correct protection operation
The above tests have already demonstrated that the protection is within calibration, thus the
purpose of these tests is as follows:
To conclude that the primary function of the protection can trip according to the correct
application settings.
To verify correct setting of all related protective elements.
10.5.3.2 Preparation before testing
(1) Please configure equipment settings according to section 6.1.
(2) Please configure system settings according to section 6.2.
(3) Please configure system protection settings according to section 6.3.
10.5.3.3 Differential protection test
(1) Check differential protection settings and modify them (if needed).
(2) Percentage differential protection test.
(3) Checking setting of restraint coefficient of second harmonic.
(4) Unrestrained instantaneous differential protection test.
(5) Function test of percentage differential protection blocked by CT circuit failure.
10.5.3.4 HV side backup overcurrent protection test
(1) Check the protection settings and modify them (if needed).
(2)Test voltage controlled overcurrent protection element.
10.5.3.5 HV side backup ground protection test
(1) Check the protection settings and modify them (if needed).
(2) Zero-sequence overcurrent protection test.
10.5.3.6 HV side “gap”protection test
(1) Check the protection settings and modify them (if needed).
(2) “Gap”zero-sequence overcurrent protection test.
10.5.3.7 Backup overcurrent protection of branches
(1) Check the protection settings and modify them (if needed). Please note there are six branches
needed to be tested: A1, A2, A3, B1, B2 and B3.
(2) Test voltage controlled overcurrent protection element.
10.5.3.8 Zero-sequence overcurrent protection of A/B side
(1) Check the protection settings and modify them (if needed).
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(2) Zero-sequence overcurrent protection of A/B side test.
10.5.3.9 Pole disagreement protection test
(1) Check the protection settings and modify them (if needed).
(2) Pole disagreement protection test.
10.5.3.10 Overexcitation protection test
(1) Check the protection settings and modify them (if needed).
(2) Definite time overexcitation protection test.
(3) Inverse time overexcitation protection test.
10.5.3.11 Tests of restricted earth fault protection of each side
(1) Check the protection settings and modify them (if needed). Please note there are three sides
needed to be tested: HV side, LV A side and LV B side.
(2) Finish zero-sequence percentage differential protection test.
(3) Finish zero-sequence unrestrained instantaneous differential protection test.
10.5.3.12 Overload, air blast and on-load tap change blocking tests
(1) Check the protections settings and modify them (if needed).
(2) Overload alarm test.
(3) Initiating cooling test.
(4) On-load tap change blocking function test..
10.5.3.13 CT circuit failure alarm test
(1) Check the protections settings and modify them (if needed).
(2) Test of CT circuit abnormality alarm
(3) Test of differential current abnormality alarm in differential protection circuit.
(4) Test of CT circuit failure in differential protection
10.5.3.14 VT circuit failure alarm test
(1) Check the protections settings and modify them (if needed).
(2) Test VT circuit failure alarm of each side.
10.5.3.15 Other function check
Check the “RESET”bottom on panel. Please push the “RESET”button to reset “TRIP”LED.
Check whether there are any kinds of reports displayed on LCD of equipment during function test.
Check printing function. Connect printer provided to equipment and push the “PRINT”button to
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print last tripping report. Use keypad to select other kinds of reports to print.
10.5.4 Print Fault Report
In order to acquire the details of protection operation, it is convenient to print the fault report of
protection device. For further details, see section 7.4.3 “View Reports and Waveform by Printing”.
10.5.5 On-load Checks
The objectives of the on-load checks are:
Confirm the external wiring to the current inputs is correct.
Measure the magnitude of on-load current (if applicable).
Check the polarity of each current transformer.
However, these checks can only be carried out if there are no restrictions preventing the
tenderization of the plant being protected.
Remove all test leads, temporary shorting leads, etc. and replace any external wiring that has
been removed to allow testing.
If it has been necessary to disconnect any of the external wiring from the protection in order to
perform any of the foregoing tests, it should be ensured that all connections are replaced in
accordance with the relevant external connection or scheme diagram. Confirm current transformer
wiring.
10.5.6 Final Checks
After the above tests are completed, remove all test or temporary shorting leads, e tc. If it has been
necessary to disconnect any of the external wiring from the protection in order to perform the
wiring verification tests, it should be ensured that all connections are replaced in accordance with
the relevant external connection or scheme diagram.
Ensure that the protection has been restored to service.
If the protection is in a new installation or the circuit breaker has just been maintained, the circuit
breaker maintenance and current counters should be zero. If a test block is installed, remove the
test plug and replace the cover so that the protection is put into service.
Ensure that all event records, fault records, disturbance records and alarms have been cleared
and LED’
s has been reset before leaving the protection.
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Chapter 11 Maintenance
11.1 Maintenance Schedule
It is recommended that products supplied by NR receive periodic monitoring after installation. In
view of the critical nature of protective relays and their infrequent operation, it is desirable to
confirm that they are operating correctly at regular intervals.
NR protective relays are designed for a life in excess of 10 years.
RCS series relays are self-supervising and so require less maintenance than earlier designs of
relay. Most problems will result in an alarm so that remedial action can be taken. However, some
periodic tests should be done to ensure that the relay is functioning correctly and the external
wiring is intact.
11.2 Regular Test
Although some functionality checks can be performed from a remote location by utilizing the
communications ability of the relays, these are predominantly restricted to checking that the relay
is measuring the applied currents and voltages accurately. Therefore it is recommended that
maintenance checks are performed locally (i.e. at the substation itself).
WARNING: Before carrying out any work on the equipment, the user should be familiar
with the contents of the Safety and technique Data sections and the ratings on the
equipment’
s rating label.
11.2.1 Alarms
The alarm status LED should first be checked to identify if any alarm conditions exist. If so, try to
find the cause to the alarm and eliminate it and clear the alarms to extinguish the LED.
11.2.2 Binary Inputs
The opto-isolated inputs can be checked to ensure that the relay responds to their energization.
11.2.3 Binary output
The output relays can be checked to ensure that they operate by repeating the commissioning
test.
11.2.4 Analog inputs
If the power system is energized, the values measured by the relay can be compared with known
system values to check that they are in the approximate range that is expected. If they are, then
the analog/digital conversion and calculations are being performed correctly by the relay.
Alternatively, the values measured by the relay can be checked against known values injected into
the relay via the test block, if fitted, or injected directly into the relay terminals. Suitable test
methods can be found in relevant manuals. These tests will prove the calibration accuracy is being
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maintained.
11.3 Failure Tracing and Repair
Failures will be detected by automatic supervision or regular testing.
When a failure is detected by supervision, a remote alarm is issued and the failure is indicated on
the front panel with LED indicators and LCD display. It is also recorded in the alarm record.
Failures detected by supervision are traced by checking the “ALM REPORT”screen on the LCD.
See section 4.2.11.
When a failure is detected during regular testing, confirm the following:
Test circuit connections are correct
Modules are securely inserted in position
Correct DC power voltage is applied
Correct AC inputs are applied
Test procedures comply with those stated in the manual
11.4 Replace Failed Modules
If the failure is identified to be in the relay module and the user has spare modules, the user can
recover the protection by replacing the failed modules.
Repair at the site should be limited to module replacement. Maintenance at the component level is
not recommended.
Check that the replacement module has an identical module name (AC, DC, CPU, MON, SIG, OPT,
RLY, OUT, etc.) and hardware type-form as the removed module. Furthermore, the CPU module
replaced should have the same software version. And the AC and DC module replaced should
have the same ratings.
The module name is indicated on the top front of the module. The software version is indicated in
LCD menu “VERSION”.
WARNING: Units and modules may only be replaced while the supply is switched off and
only by appropriately trained and qualified personnel. Strictly observe the basic
precautions to guard against electrostatic discharge.
CAUTION: When handling a module, take anti-static measures such as wearing an
earthed wrist band and placing modules on an earthed conductive mat. Otherwise, many
of the electronic components could suffer damage. After replacing the CPU module, check
the settings.
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DANGER: After replacing modules, be sure to check that the same configuration is set as
before the replacement. If this is not the case, there is a danger of the unintended
operation of switchgear taking place or of protections not functioning correctly. Persons
may also be put in danger.
1)
Replacing a module
Switch off the DC power supply
Disconnect the trip outputs
Short circuit all AC current inputs and disconnect all AC voltage inputs
According to different module to take different operating steps, and please refer to
following.
WARNING: Hazardous voltage can be present in the DC circuit just after switching off the
DC power supply. It takes approximately 30 seconds for the voltage to discharge.
2)
Replacing the Human Machine Interface Module (front panel)
Open the relay front panel
Unplug the ribbon cable on the front panel by pushing the catch outside.
Detach the HMI module from the relay
Attach the replacement module in the reverse procedure.
3)
Replacing other modules
Unscrew the module connector
Unplug the connector from the target module.
Unscrew the module.
Pull out the module
Inset the replacement module in the reverser procedure.
After replacing the CPU module, input the application-specific setting values again.
11.5 Replace Relay Battery
Each relay has a battery to maintain status data and the correct time when the auxiliary supply
voltage fails. The data maintained includes event, fault and disturbance records.
This battery will periodically need changing. If the battery-backed facilities are not required to be
maintained during an interruption of the auxiliary supply, the steps below can be followed to
remove the battery.
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Chapter 11 Maintenance
CAUTION: Before carrying out any work on the equipment, the user should be familiar with
the contents of the safety and technique data sections and the ratings on the equipment’
s
rating label.
Instructions for replacing the battery
Withdraw the CPU board from RCS-985T.
Gently extract the battery from its socket. If necessary, use a small, insulated screwdriver
to prize the battery free.
Ensure that the metal terminals in the battery socket are free from corrosion, grease and
dust.
The replacement battery should be removed from its packaging and placed into the
battery holder, taking care to ensure that the polarity markings on the battery agree with
those adjacent to the socket as shown as below.
Figure 11.5-1 Battery replacement
NOTE: Ensure that the battery is securely held in its socket and that the battery terminals
are making good contact with the metal terminals of the socket.
Insert the CPU module into RCS-985T.
11.6 Cleaning
Before cleaning the equipment ensure that all AC and DC supplies, current transformer and
voltage transformer connections are isolated to prevent any chance of an electric shock whilst
cleaning.
The equipment may be cleaned using a lint-free cloth moistened with clean water. The use of
detergents, solvents or abrasive cleaners is not recommended as they may damage the relay’
s
surface and leave a conductive residue.
11.7 Storage
The spare relay or module should be stored in a dry and clean room. Based on IEC standard
60255-6 the storage temperature should be –40°C to 70°C, but the temperature of 0°C to 40°C is
recommended for long-term storage.
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Chapter 12 Decommissioning and Disposal
Chapter 12 Decommissioning and Disposal
12.1 Decommissioning
12.1.1 Switching off
To switch off the RCS-985T, switch off the external miniature circuit breaker of the power supply.
12.1.2 Disconnecting Cables
Disconnect the cables in accordance with the rules and recommendations made by relational
department.
DANGER: Before disconnecting the power supply cables that connected with the DC
module of the RCS-985T, make sure that the external miniature circuit breaker of the
power supply is switched off.
DANGER: Before disconnecting the cables that are used to connect analog input module
with the primary CTs and VTs, make sure that the circuit breaker for the primary CTs and
VTs is switched off.
12.1.3 Dismantling
The RCS-985T rack may now be removed from the system cubicle, after which the cubicles may
also be removed.
DANGER: When the station is in operation, make sure that there is an adequate safety
distance to live parts, especially as dismantling is often performed by unskilled personnel.
12.2 Disposal
In every country there are companies specialized in the proper disposal of electronic waste.
NOTE: Strictly observe all local and national regulations when disposing of the device.
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Chapter 12 Decommissioning and Disposal
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Chapter 12 Manual Version History
Chapter 13 Manual Version History
The version histories of the software and the manual for RCS-985T are listed below.
Software
Version
RCS-985T
V3.11-T070047
Manual
Version
R1.00
Source
Documentation
RCS-985T_X_Instruction Manual_EN_Customized_
T070047_R1.00_(EN_YJBH2003.0091.1201)
Modifying description of each manual version is shown below.
Manual
Version
R1.00
NR ELECTRIC CO., LTD.
Section
Page No.
Description of change
Note
Original version
249
0
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