Experiment 3
Combinational Logic Circuits
Objective:
• To build several combinational logic functions using Verilog HDL
language constructs.
• To synthesize simple logic functions and use various I/O devices on
the FGPA board.
Write code for logic circuit
• Truth table.
• K_map
Half adder
Full adder
Z
X
y
z
X
y
Xilinx Spartan-3E XC3S500E FT256 FPGA.
0
