Alex Pallotta, apallott@purdue.edu
ECE-2K7
Mini Project
4 April 2025
1.0: Introduction
The 555 timer was invented by Hans Camenzind in 1971 while under contract for
Signetics. Hans was tasked to create a Phase-Locked Loop (PLL), the resulting design was an
oscillator for a PLL so that the frequency was independent from the voltage of the power supply.
The first product test was in 1971 and while it was successful Camezind had the idea to use
direct resistance, instead of relying on constant current resulting in the the design of the chip
moving from 9 pins to 8, allowing the 555 timer to be produced in a 8 pin package instead of a
14 pin package. The uses for the chip went way beyond what Camenzind expected it could be
used for with engineers across the world finding that the device is useful for, pulse generation,
timing, oscillating circuits, and others.
The 555 timer has two main configurations that it can be used in astable and monostable
mode. Astable mode outputs continuous rectangular pulses with a specified period. The period
depending on a combination of two series resistors and a capacitor. The monostable state differs
from the astable state as the chip outputs one long pulse in response to a trigger signal that is
withing a defined range for the output to activate.
The objective of this project is to take the knowledge of timing, capacitors, and resistors,
and apply it to the 555 timer to explore the wide range of uses these concepts have and learn
more about running experiments for any class.
1
2.0: Theory
2.1: 555 Timer Overview
The 555 timer has 8 pins that each play a critical function for the chip to operate properly.
Between the Vcc (pin 8) and ground (pin 1) there are three 5kΩ resistors in series that act as
three voltage dividers. Under the resistors there are two comparators that the resistors connect to.
Looking at figure 2.1.1 the upper comparator takes the voltage after the first 5kΩ resistor into its
negative terminal, with pin 5 the control voltage connecting to the wire emitting from the resistor
in series. The positive terminal of the upper comparator is connected to the threshold (pin 6). The
lower comparator takes voltage from the resistor after two of the 5kΩ resistor into the positive
terminal. The lower comparator takes the trigger (pin 2) into the negative terminal. The output of
the comparators enter a flip flop, the flip flop has two inputs set (S) and reset ®, the output of the
left comparator is the S input and the upper comparator makes up the R input. The flip flop has
two outputs Q and Q-, Q attaches to the output (pin 3) and Q- attaches to the ground (pin 1) via a
transistor via a transistor that is controlled by the flip flop. S sets the output of Q to high while R
resets the output to the low, while the Q- output will always be the opposit of the Q output. The
left comparator checks if the voltage from the trigger is below ⅓ of Vcc. If the output is under ⅓
of Vcc the comparator switches the output of Q to on turning on the output pin. The right
comparator checks if the threshold voltage is above ⅔ of Vcc, if that is the case it resets the flip
flow turning the output pin to the low state. The flip flop connects to a transistor that connects
the discharge pin to ground when the output is low. In the 555 timer there is a normally on and
normally off location for the output. The output is normally off so there will be no voltage
emitting from the output pin, for this to occur there has to be no current passing through the
output pin based on Ohm’s Law. The flip flop uses the outputs of the two comparators to
2
determine whether there is current going through the output pin, in a normal case the flip flop
sends current through the reset pin, but when conditions are right for the output to be high the
flip flop redirects that current through the output pin creating an output voltage.
Figure 2.1.1: 555 Timer Block Diagram
2.2: Monostable Mode
The other mode the 555 timer can operate in is monostable. The monostable operates
differently from astable in the sense that the monostable has one longer output pulse that repeats
after a certain interval. The monostable circuit is made up of a resistor and capacitor. The output
pulse begins when beings when a trigger signal enters the chip with a voltage below ⅓ Vcc
turing the output pin to high. Over a period of time the voltage of the capacitor charges to over ⅔
of Vcc where the output pin is reset to the low state. The device remains in the low state until the
capacitor discharges to below ⅓ of Vcc. The time the output stays high and low depends on the
values of the chosen resistor and capacitor. The relationship between these three values can be
3
represented with the equation t = 1.1RC, where t is the time the output remains high in seconds,
R is the resistance in Ohms, and C is the capacitance in Henery. Using this equation with the
given resistors and capacitors in the kits, it is possible to create many different output times for
the circuit.
Figure 2.2.1: 555 Timer in Monostable Circuit
2.3: Astable Mode
As mentioned in section 1 there are two modes that the 555 timer can operate in,
monostable, and astable. The astable state operates as a continuous repeating pulses in a circuit
featuring two resistors R1 R2, and a capacitor. Initially the capacitor is not charged meaning that
the voltage on the trigger pin will be below ⅓ of Vcc causing the output pin to go high, and the
internal transistor to be cut off. Based on the structure of the circuit the discharge pin is not
shorted by being attached to the ground, the capacitor beings changing with Vcc through the
series resistors R1 and R2. When the capacitor reaches ⅔ of Vcc the threshold pin changes the
4
state of the internal latch turning the output into the low state. When in the low state the
capacitor discharges through the R2 resistor into the discharge pin, the process repeats when the
capacitor discharge to ⅓ of Vcc. The time the output will remain high can be calculated with the
equation t = 0.693(R_a + R_b)C, where t is the time the output is high, R_a and R_b are the
series resistor values and C is the chosen capacitance. The time the output is low can be
represented with the equation t=(R_b)C where t is the time the circuit is low, R_b is the value of
one of the series resistors, and C is the capacitance. Finding the frequency of the high and low
output states for the circuit can be done with the equation f = 1.44((R_a+2R_b)C), where f is the
frequency, R_a and R_b are series resistors, and C is the capacitor value. Another equation that is
very important for the design of the astable circuit is the duty cycle equation, the duty cycle
represents the percent of time the output of the circuit is high which is shown in the equation,
D = (R_a+R_b)/(R_a+2R_b), where D is the duty cycle and R_a and R_b are the series resorts.
Using these equations it is possible to create an infinite amount of cycles for the astable circuit
with different combinations of resistors and capacitors.
5
Figure 2.3.1: 555 Timer in Astable Circuit
6
3.0: Experiment Procedure
3.1: Monostable Circuit Procedure
Figure 3.1.1: Circuit Schematic for Monostable Mode
​
For the first section of the lab the assignment was to create a monostable circuit that
would create an output pulse lasting 3 seconds when the trigger switch was connected. To begin
this experiment the general monostable circuit featuring the 555 timer, resistor and capacitor in
series. The goal of the circuit was once the switch was connected the output pin would go high
for 3 seconds turing on the LED for that time then return to the low state once the 3 second pulse
was finished. The time the output was high was related to the chosen resistance and capacitance
values via the equation t=1.1RC, where t is the time the output was high, R was the resistance
value, and C was the capacitance. To make the calculations easier the capacitance value was
chosen to be 100uF before being put into the formula to reduce the number of unknown
7
variables. Using this capacitance, the equation was rearranged to solve for R, which was
determined to be approximately 27kΩ as seen in Figure 3.1.2. Once all of the values were
determined a simulated circuit was created in Ltspice to get an idea of how the circuit would
behave with the chosen R and C values. After the simulation a physical circuit was built based on
a schematic shown in the data sheet for the 555 timer. Once the circuit was built and ready to test
a 5V DC Power supply with a current limit of 0.1A was applied to the positive rail of the
breadboard and ground attached to the common ground rail on the breadboard. To measure the
output of the circuit an oscilloscope was used attaching the probes across the diode. Recording
the voltage vs time plot in roll mode to illustrate the time that the output was on after connecting
the switch. Taking screenshots of the resulting graph with cursors in different locations to show
the basic trend of the output while also having the exact time and voltage values recorded as
well. Comparing those values to the theoretical values calculated for, and the values determined
in the simulation.
Figure 3.1.2: Calculations for Resistor Value for Monostable Circuit with 3 Second Pulse
8
3.2: Astable Circuit Procedure
Figure 3.2.1: Circuit Schematic for Astable Mode with 75% Duty Cycle
For the first section of the lab the assignment was to create two circuits using the 555
timer in astable mode that would have a 60% and 75% duty cycle respectively. To do this the
general astable state circuit was constructed featuring two resistors all in series with one
capacitor. The goal of this circuit was to have the diode alternate between its high and low states
based upon the given duty cycle. To do this the equations t2=0.693RbC, and t1 =
0.693(Ra+Rb)C were used to determine the required resistance and capacitor values, where t2
was the time the output was low, and t1 was the time the output was high (Figure 3.2.2). To make
the calculations easier the capacitance value was selected to be 100uF before any calculations
occurred to limit the number of unknown variables. The 100uF capacitor is the largest one
available in the kits provided resulting in the fact that the resistor values used to be the lowest
required values. Once the resistance values were calculated for both the 60% and 75% duty cycle
9
a simulated circuit was created in Ltspice based on the schematics from All About Circuits. After
the simulation was created there was a general idea of how the physical circuit would behave.
After the simulation was completed a physical circuit was built based upon the schematic
generated in the simulation. Once the Circuit was built it was connected to a DC Power Supply
set to 5V with a current limit of 0.1A with the positive rail on the breadboard, with the ground
attached to the common ground rail in another location on the breadboard. The output of the 555
timer was measured using an oscilloscope in roll mode, using the probes to measure across the
diode to determine the voltage and time that the output was high vs low. Taking screenshots of
both cycles with cursors in place to determine the voltage and length of time that the output was
high and low.
10
Figure 3.2.2: Calculations for Resistance Values for Astable State
3.3: Application Circuit Procedure
The application that was chosen for the 555 timer was railroad crossing lights. The
majority of railroad crossings have flashing lights that alert drivers that a train is coming, the
lights grab the attention of drivers from much farther away than signs or gates alone could. The
lights ensure that the driver will slow before they would go over the tracks preventing any
11
potential collisions between the car and train. These lights can be created in a circuit featuring
two 555 timers in astable mode connecting to multiple LEDs.
Figure 3.3.1: Schematic for Railroad Crossing Light Circuit Using 555 Timer
This circuit operates with two 555 timers in the astable state, connected to each other
through the output pin. Each 555 timer has a set of 3 LEDs that are also connected to the output
pin. When the circuit is initially connected to the voltage source the first 555 timer is powered on
and the first set of LEDs connected to that timer are powered on. During the time the first 555
timer is on the second 555 timer is off, the first timer remains on until the capacitor charges to ⅔
of the Vcc value, once the capacitor reaches this state it creates an open circuit turning off the
first 555 timer and turning the second one one, simultaneously turing on the other set of LEDs,
the second set of LEDs remain on until the capacitor discharges to below ⅓ of Vcc. When the
capacitor discharges to this value the second 555 timer turns off and the first 555 timer turns on
again, and the cycle repeats itself.
12
4.0: Results and Discussion
4.1: Monostable Circuit Results
Figure 4.1.1: Monostable Circuit Simulation Voltage vs Time Plot
Figure 4.1.2: Monostable Circuit Oscilloscope Voltage vs Time Plot
13
Time High (s)
Percent Error (S)
Theoretical
3
N/A
Simulation
3.009
0.3%
Experimental
3.32
10.67%
Table 4.1.1: Comparison of Theoretical, Simulated, and Experimental Results For Monostable
Circuit
Based on the results from the monostable circuit the theoretical calculation was pretty accurate
with the simulation having a very small percent error and the experimental data having around a
percent error of ten. Obviously the used resistor values do create error since the theoretical
calculated resistance value was 27kΩ with a 100uF capacitor while the used value of resistance
was 27.6kΩ with the same capacitance. This resistance was used due to the limitation of resistors
in the kits provided, there was no 27kΩ resistor so a 22kΩ and 5.6kΩ resistor had to be
combined to reach a resistance close to the ideal value. Since the capacitor and resistors are in
series the resistor creates a voltage drop before entering the capacitor. Having a larger resistance
value created a larger voltage drop that would result in an increased amount of time for the
capacitor to charge to ⅔ of Vcc. Another source of error is human error in the oscilloscope
measurements, in the voltage vs time plot for the simulation (Figure 4.1.1) there is visible curves
on the edge of the line when the capacitor turns on and off that originate from the charging of the
capacitor. These lines are still present in the oscilloscope plot but due to the amount of noise in
the readings it is too difficult to find the end of the charging cycles. Not accounting for the time
the capacitor is charging created error in the time the output was high.
14
4.2: Astable Circuit Results
Figure 4.1.1: Simulated Voltage vs Time Plot of Astable Circuit with 60% Duty Cycle
Figure 4.1.2: Simulated Voltage vs Time Plot of Astable Circuit with 75% Duty Cycle
15
Figure 4.1.3: Experimental Voltage vs Time Plot of Astable Circuit with 60% Duty Cycle (High)
Figure 4.1.4: Experimental Voltage vs Time Plot of Astable Circuit with 60% Duty Cycle (Low)
16
Figure 4.1.5: Experimental Voltage vs Time Plot of Astable Circuit with 75% Duty Cycle (High)
Figure 4.1.6: Experimental Voltage vs Time Plot of Astable Circuit with 75% Duty Cycle (Low)
17
Time High (s)
Time Low (s)
Percent Error
High
Percent Error
Low
Theoretical
1.2
0.8
N/A
N/A
Simulation
1.21
0.51
0.833%
-36.25%
Experimental
1.2
0.53
0%
-33.25%
Table 4.2.1: Comparison of Theoretical, Simulated, and Experimental Results For 60% Duty
Cycle Astable Circuit
Time High (s)
Time Low (s)
Percent Error
High
Percent Error
Low
Theoretical
0.75
0.25
N/A
N/A
Simulation
0.736
0.487
-1.87%
94.8%
Experimental
0.73
0.5
-2.67%
100%
Table 4.2.1: Comparison of Theoretical, Simulated, and Experimental Results For 75% Duty
Cycle Astable Circuit
The experimental and simulated circuits had varying results from the theoretical circuit. While
the time the circuit output was high had a very low percent error for both duty cycles, the percent
error for the time the circuit output was low had a massive percent error for both circuits, with
the 60% duty cycle having a 30% error, while the 75% duty cycle had close to a 100% error with
only small differences between the simulated and experimental results. The error most likely
originates from the used resistor values. The used resistors do not exactly match the theoretically
calculated values because the provided resistors do not have exact matches for the values
calculated therefore a combination of several resistors had to be used to get close to the ideal
value. The combined resistors match the total value of Ra + Rb very well as seen by the low
percent error for the time that the circuit output was high, but the Rb value was less accurate than
18
the Ra value. This is a major reason for the issues seen for the time that the circuit was low. The
capacitor discharges through Rb into the discharge pin of the 555 timer, with a Rb value that was
not extremely accurate the capacitor will not discharge at the same rate because there is not the
ideal value of resistance to control the speed of discharging present. The error in the discharge
time is primarily due to the error in the Rb value coupled with the inherent error in human
measurement, and the noise seen on the oscilloscope.
4.3: Application Circuit Results
Figure 4.3.1: Simulated Voltage vs Time Plot for Application Circuit
19
Figure 4.3.2: Experimental Voltage vs Time Plot of Application Circuit (High)
Figure 4.3.3: Experimental Voltage vs Time Plot of Application Circuit (Low)
20
Time High (s)
Time Low (s)
Percent Error
High
Percent Error
Low
Theoretical
0.78
0.78
N/A
N/A
Simulation
0.79
0.77
1.28%
-1.28%
Experimental
0.74
0.97
-5.13%
24.4%
Table 4.3.1: Comparison of Theoretical, Simulated, and Experimental Results For Application
Circuit
The application circuit functioned quite well with lower percent error when compared to the
other experiments, but there was one measurement that had a large percent error, which is the
time that the circuit was low for the experimental circuit. The error for this part originates from
the capacitor, for this circuit it was suggested that the circuit use a very small capacitor that
would charge and discharge to alternate which 555 timer was on. The amount of noise in the
circuit and the high spikes when each 555 timer turned on suggest that the capacitor used during
the experiment was damaged in some way that made the value inaccurate and created a
significant amount of noise and variation in the data, altering the charging and discharging
periods, along with making an accurate measurement with the cursors on the oscilloscope very
difficult. It is clear that damage to the capacitor is the source of error in the circuit because the
simulated circuit behaves almost exactly the same as the theoretical circuit, while the
experimental circuit had a much larger percent error and clear issues with the noise in the output
that was not solely due to the oscilloscope.
21
5.0: Conclusions
Over the course of this project it has become clear that the 555 timer is an extremely
useful chip. It is useful in a wide variety of circuits that can perform an even wider range of uses.
There are two main circuit setups for a 555 timer, monostable and astable. The monstable setup
is great for applications that need to switch between states for a defined period of time that does
not need to constantly repeat. The monostable setup could be used for circuits that simulate
pedestrian crossing signs and other button pushing circuits. The astable circuit works well for
circuits that need to continuously alternate between outputs, such as railroad crossing lights, or a
traffic light. In both circuit setups a variable resistor would be very useful because it would allow
you to change the time the output was high or low. This would allow you to use the same circuit
in a larger range of applications instead of having to build a specific circuit for each use. Using a
traffic light as an example, different intersections have different amounts of time that the light
stays green, Instead of creating a new circuit for every new traffic light made, you could use the
same circuit adjusting the variable resistor to match the desired time for each light in each
intersection. The wide range of uses and customization in 555 timer circuits demonstrate why
they are such a popular component when making circuits.
For the monostable mode experiment the circuit behaved very close to the theoretical
behavior with low percent error for the time the circuit output remained high and low. The
simulated circuit behaved almost exactly like the theoretical circuit, while the experimental
circuit behaved with more error but still had a relatively low error. The main source of this error
was not having resistors that match the theoretical values, another source of error was the noise
in the circuit that made making exact measurements on the oscilloscope much more difficult.
These issues could obviously be fixed with having exact resistors that matched the theoretical
22
values, but also by adding a capacitor before the switch to smooth out the large amount of noise
that occurs when the switch is connect to ensure that getting an accurate reading is possible.
For the astable circuit the experiment and simulation had significantly more error than the
monostable circuit. There was a small amount of error for the time the output was high for both
duty cycles, but for the time the output was low there was a significantly higher amount of error,
with the 75% duty cycle having much more error than the 60% duty cycle. This error was once
again due to the resistance values not exactly matching the ideal calculated values, but more
specifically the Rb value. The Ra and Rb resistance in series was a much closer match to the
ideal resistance than Ra and Rb compared to their ideal values. The error occurred on the time
the the output of the 555 timer was low, because the capacitor discharges through Rb into the
discharge pin. The Rb value in both circuits was less accurate when compared to the Ra value,
the difference in resistance from Rb changes the speed that the capacitor can discharge creating
the error seen in the circuit. To fix this error exact values of Ra and Rb should be used to ensure
that the capacitor discharges at the desired rate.
For the application circuit the simulation circuit behaved very similarly to the theoretical
circuit with very low error percentage, while the experimental circuit had a larger percent error.
Based of the high voltage spikes and large amounts of noise in the oscilloscope readings it is
very likely that the error in this circuit originated from damage to the capacitor used for
alternating the state of the output pin for both 555 timers. Replacing this capacitor with a new
one would ensure that there was no damage to it, eliminating any errors that the semi-functional
capacitor had. A broken capacitor will not function properly and will allow large voltage spikes
through it, a capacitor could be damaged through overwhelming amounts of voltage or current,
the used capacitor likely was exposed to these conditions during the testing of the circuit. To
23
ensure that this would not occur again, the person performing the experiment must be extremely
careful of the output of the power supply when testing the circuit as well as check if any
components of the circuit are damaged and replace them if they are to eliminate error.
24
6.0: References
“Police Lights Themed Flashing Led Circuit Using 555 IC.” Elonics.Org,
elonics.org/police-lights-themed-flashing-led-circuit-using-555-ic/. Accessed 8
Apr. 2025.
Mainwaring, Geoff “Reon From Zircon,” et al. “555 Timer IC - Working Principle, Block
Diagram, Circuit Schematics.” How To Mechatronics, 17 Feb. 2022,
howtomechatronics.com/how-it-works/555-timer-ic-working-principle-block-diag
ram-circuit-schematics/.
“555 Timer Monostable Circuit Calculator - Engineering Calculators & Tools.” All About
Circuits, www.allaboutcircuits.com/tools/555-timer-monostable-circuit/. Accessed
8 Apr. 2025.
“555 Timer Astable Oscillator Circuit - Engineering Calculators & Tools.” All About Circuits,
www.allaboutcircuits.com/tools/555-timer-astable-circuit/. Accessed 8 Apr. 2025.
Fuller, Brian. “Hans Camenzind, 555 Timer Inventor, Dies.” EE Times, 15 Aug. 2012,
www.eetimes.com/hans-camenzind-555-timer-inventor-dies/?_ga.
25