XU Yue, Sharon CHEN
Application Engineer
2019.09.05
• 射频匹配概述
• ADS 阻抗匹配仿真流程介绍
• 阻抗匹配仿真实验
•
实验1 匹配架构设计(Smith Chart Wizard)
•
实验2 替换真实组件与有损传输线(CILD)
•
实验3 匹配电路优化
•
实验4 汇入 Layout 档案
•
实验5 EM + Component 联合仿真(RFPro)
•
实验6 Pre-Layout and Post-Layout 仿真比对
ቐ
Pre-Layout
ቊ
Post-Layout
• 总结
RF
Matching
ADS
Matching
Flow
RF Basic: Efficient Impedance Matching with ADS
Hot
Key
Lab 1
Lab 2
Lab 3
Lab 4
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Lab 6
2
• 在通信系统中，射频信道都是不可或缺的。射频系统的性能好坏会直接决定通信质量的好坏。
• 当使用密度较高的射频模块组建射频系统时，工程师最重要的工作就是调谐各模块之间的匹配设计，从
而使系统性能最优。
• 另外，如果需要对某些组件进行设计，例如 PA、天线等射频组件，匹配也将直接影响射频组件的性能。
RF
Matching
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RF Basic: Efficient Impedance Matching with ADS
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• 小型化趋势，组件尺寸减小。手动调谐匹配网络会花费
更多的时间。
• 频率升高，空间狭小，重复测量难以保证每次精度。
• 盲目的进行设计与Tuning，除了花费时间外，也不利于
技术经验的积累。
• From Internet
RF
Matching
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RF Basic: Efficient Impedance Matching with ADS
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器件选型
电路设计
佈线
电路板制作
手动Tuning
超过一周
一周
器件选型
电路设计
佈线
电路板制作
/同步仿真
根据仿真结果
后手动Tuning
一周
RF
Matching
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RF Basic: Efficient Impedance Matching with ADS
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0.5-2 days
Lab 2
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5
• 射频匹配概述
• ADS 阻抗匹配仿真流程介绍
• 阻抗匹配仿真实验
•
实验1 匹配架构设计(Smith Chart Wizard)
•
实验2 替换真实组件与有损传输线(CILD)
•
实验3 匹配电路优化
•
实验4 汇入 Layout 档案
•
实验5 EM + Component 联合仿真(RFPro)
•
实验6 Pre-Layout and Post-Layout 仿真比对
ቐ
Pre-Layout
ቊ
Post-Layout
• 总结
RF
Matching
ADS
Matching
Flow
RF Basic: Efficient Impedance Matching with ADS
Hot
Key
Lab 1
Lab 2
Lab 3
Lab 4
Lab 5
Lab 6
6
Pre-Layout
Layout
• Design Matching Circuit
(Smith Chart Wizard)
• Design Microstrip/Strip Line
(CILD - Controlled Impedance Line Designer)
Post-Layout
.brd
Allegro
Import PCB
Layout
EM +Component
Co-Simulation
ODB++
Protel, PADS, …
RFPro
•
•
•
•
RF
Matching
ADS
Matching
Flow
RF Basic: Efficient Impedance Matching with ADS
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Select Net
Set up Ports
Frequency Range
Add Components
Lab 4
Lab 5
Lab 6
7
• 假设发射机需要获得最大功率转换效率，所需要匹配的阻抗值为 2.992+j*2.847.
• 频率：2-3GHz
Matching
Network
2.992+j*2.847
RF
Matching
ADS
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RF Basic: Efficient Impedance Matching with ADS
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• Help > F1
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RF Basic: Efficient Impedance Matching with ADS
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• Help > F1
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RF Basic: Efficient Impedance Matching with ADS
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• Help > F1
RF
Matching
ADS
Matching
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RF Basic: Efficient Impedance Matching with ADS
Hot
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Lab 2
Lab 3
Lab 4
Lab 5
Lab 6
11
• 射频匹配概述
• ADS 阻抗匹配仿真流程介绍
• 阻抗匹配仿真实验
•
实验1 匹配架构设计(Smith Chart Wizard)
•
实验2 替换真实组件与有损传输线(CILD)
•
实验3 匹配电路优化
•
实验4 汇入 Layout 档案
•
实验5 EM + Component 联合仿真(RFPro)
•
实验6 Pre-Layout and Post-Layout 仿真比对
ቐ
Pre-Layout
ቊ
Post-Layout
• 总结
RF
Matching
ADS
Matching
Flow
RF Basic: Efficient Impedance Matching with ADS
Hot
Key
Lab 1
Lab 2
Lab 3
Lab 4
Lab 5
Lab 6
12
RF
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ADS
Matching
Flow
RF Basic: Efficient Impedance Matching with ADS
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13
Notes:
• 请勿将 Unarchive 后的 Workspace 存放在中文路径下
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RF Basic: Efficient Impedance Matching with ADS
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1 创建一个新的Schematic
3
点击 Tool → Smith Chart..
Lab1_a_SmithChart
2 命名为 Lab1_a_SmithChart
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若出现此提醒，
点击OK即可
1 点击”Palette”
点击Smith Chart图示，
2 并摆放至画面中
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Notes:
• 再次打开Smith Chart Utility
• 此选项代表电路图中 smart
component 与 Smith Chart
Utility 的连动关系
直接点击OK
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可以看到所连动的组件名称
1 输入频率
2 单击ZS*
3
输入阻抗 2.992+j*2.847
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1 点击 Circles → Q…
2 输入欲匹配Q值圆之值“1.1”→ 点击OK
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2
单击 ZL，开始匹配
1 (From Load to Source)
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3 点击Build ADS Circuit，将此设计好的电路建立至电路图
RF Basic: Efficient Impedance Matching with ADS
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2
单击
Push Into Hierarchy
查看子电路
1 单击图示
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单击
Pop Out Hierarchy
返回主电路
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点击”Insert Wire”，再点击组件
2 端点，即可将组件互相连接
1
从下拉式选单中找到
“Simulation-S_Param”，
并点击 “S P” 和 ”TermG”，
将对象摆放至画面中。
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Tips: How to View Smith Chart Simulation Result?
1 点击 Smith Chart 图示
2 选取S(1,1)
→ 点击 >>Add>>
3
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Tips: Add Marker
1
点击 Insert a New Marker，
并将Marker放置在仿真出的
曲线上
RF
Matching
ADS
Matching
Flow
RF Basic: Efficient Impedance Matching with ADS
确认 Marker 落点在 2.4 GHz，
2 若没有，可以直接点击数字，自
行更改至 2.4 GHz
Hot
Key
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27
How to View
Smith Chart Result
1 双击 Marker 框框
2
4
3
Tips: 点开 Zo 的下
拉式选单，选择"50“
Notes:
• 匹配电路阻抗为 3.074 + j*2.599
• 与设计目标 2.992 + j*2.847相当接近
RF
Matching
ADS
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RF Basic: Efficient Impedance Matching with ADS
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RF Basic: Efficient Impedance Matching with ADS
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1 创建一个新的Schematic
Lab2_a_CILD_Murata
2 命名为 Lab2_a_CILD_Murata
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2 并接上 TermG 和 S参数仿真器
1 复制上一个 lab 所设计的子电路到新的 Schematic
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Hint: How to Import Component Library in ADS?
1
在ADS主画面点击
File → Manage Libraries
3 选取组件库(Murata)
2
点击 Add Library Definition File…
4
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Hint: How to check if the component library has been imported?
成功导入
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1 在下拉式选单中找到"muRata Components"
2
3 双击电容，选择 组件值 与 Part Number
选择 GRM15
将电容放置至中央
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1 选择 Discrete Optimize setting，以利之后优化分析
Tips: 此方框可以上下左右拉伸
2 在 Normal Value 字段选择与 lab1 设计的容值相近的电容
3 取消勾选此项
6
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Tips: 单击组件，按下“Ctrl+R”，击可旋转组件
将 理想电容 置换为 muRata电容
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在下拉式选单中找到“muRataLibWeb Set Up"
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1 点击 Tool → Controlled Impedance Line Designer
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Notes:
• 如果一次优化结果与目标值不一致，
可以重复点击 “Optimize”，直至阻抗
达到目标设计
2 点击 Optimize
1
设定频率 2.4 GHz
点击 Optimize 3
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1 点击 Add New Line Type…
2
输入lineType_TL1
3
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2 按下齿轮，仿真
电长度设计目标：7.159、10.17、30.78
Notes:
• 记住每条传输线所计算出的线长
7.15 (deg) → 58 mil
10.17 (deg) → 83 mil
30.78 (deg) → 250 mil
1 输入长度
TL1
TL3
TL2
3
观察电长度是否为自己希望设计的数值若否，则不断更改Length，重复仿真
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3 选择刚才命名的LineType，并输入CILD计算的线长度
4 点选Display
为了避免板面复杂，
取消勾选这两项
1
在下拉式选单中
2 双击 LTLINE1
找到“Tlines-LineType"，
并点击单端传输线，放置中央
5
Tips: 此窗口可以上下左右拉伸
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将ideal传输线全部置换为LineType的传输线
Notes:
•
图中29mil长度的传输线，并非
是匹配作用，而是实际中电容
过后需要一小段传输线方便连
接或测试
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How to View
Smith Chart Result
阻抗已偏掉, 目标:2.992+j*2.847
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Matching
ADS
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RF Basic: Efficient Impedance Matching with ADS
Notes:
• 因实际组件具有寄生效应，因此必须对
组件进行Tuning，但有个更快的方法，
就是使用优化功能，让ADS自动帮我们
Tuning。
Hot
Key
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44
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RF Basic: Efficient Impedance Matching with ADS
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45
Lab3_a_CILD_Murata_Opt
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直接点击数字进行更改
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• 常用的优化方式：Random, Gradient, Hybrid
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将迭代次数更改至2000
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50
输入 “dB(S11)”
下拉式选单选择 “SP1”
输入 "-15"
下拉式选单选择 “<”
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51
输入 “dB(S22)”
下拉式选单选择 “SP1”
下拉式选单选择 “<”
输入 "-15"
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RF Basic: Efficient Impedance Matching with ADS
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55
Tips: How to View S-Parameter Result?
1
3
4
2
5
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How to View
Smith Chart Result
Notes:
• 此时输入阻抗为 2.992 - j*2.847 ohm，
反射越小，代表从输入端看进去的阻抗
越接近 2.992 + j*2.847 ohm。
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Before Optimization:
After Optimization:
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Notes:
• 此步骤为最后一个Lab时使用，
另存完毕后即可关闭窗口
Lab6_a_Correlation
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1
4 下拉式选单选择 “ODB++ File Format”
5
2
3
不用解压缩，可以直接汇入
7
6
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Notes:
• 这里的迭层红色字体处有误 我们将在之
后的步骤修改。
• 此时先点击 OK 按键，并在弹出的
Status 窗口点击 OK，PCB 导入工作即
可完成。
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3
将 Thickness 更改为20 mil
打开
1 PCB_odb.subst
2 单击介质层
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1
2
5
找到 Rogers_RO4350
3
并单击选取
Notes:
• 直接在键盘按下 ”R” 会快
速找到R开头的材料
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4
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点击存档，
2 即完成Stack-up的修改
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1
在下拉式选单中选择
Rogers_RO4350
RF Basic: Efficient Impedance Matching with ADS
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2 点击 “Hide All Layers”，仅显示 top 层
1
打开在 PCB_odb文
件夹之下的 layout
Tips:
• 鼠标滚轮往自己滑，为”缩小” Layout
界面，反之。
• 按住鼠标右键，可以”移动” Layout。
• 鼠标左键为”选取”
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按照讲义顺序，依序
1 加入六个端口
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Notes:
• 当箭头显示的颜色和当下的Layer的颜
色不同时，代表Port会被加到其他层。
• 这一排工具栏能够帮助我们对准，选
取右边数来第二项。
Port 2
Port 5
Port 1
Port 4
Port 3
Port 6
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1 点击 “Port Editor”
2
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选取 P2, P3 拖曳至 P1 下方的 Gnd，
代表 Port 2 和 Port 3 是 Port 1 的
reference ground
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存档
2
3
选取 P5, P6 拖曳至 P4 下方的 Gnd，
代表 Port 5 和 Port 6 是 Port 4 的
reference ground
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完成后直接关闭 “Port Editor” 窗口
1
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开启 RFPro，在弹出的设置窗口检查
Substrate设置是否正确，点击OK
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• RFPro 仿真平台由 ADS Layout 接口进入，在独立的接口中完成电磁场仿真所需的全部设置，显示三维结构和
电磁场分析结果，查看和输出仿真结果，快速进行 Circuit + Layout 同步仿真分析。
✓ Layout
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✓ Solver
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✓ Integration
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通过Ctrl键选择P1与P4，拖拽到
Full EM Analysis下的Ports处
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通过Ctrl键选择C1 C2 C3，拖拽到Full EM
Analysis下的Component Models处
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2
1
点击 C1 → 右键单
击选择 Properties
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点击 Add →
选择 Model DB
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1
在料号栏中输入：GRM1555C2A4R7CA01
选取下方出现的搜寻结果
3
2
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检查组件是否有误，无误点击Done完成设定
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Notes:
• 重复前文步骤，完成C2 C3设定
• C2料号：GRM1555C2A3R2BA01
• C3料号：GRM1555C1H1R3BA01
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2 将频率范围设定为 2 ~ 3GHz
惊叹号消失，代
表组件设定完成
1
双击 “Options..”
3
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查看仿真状态，显示 Completed 代表仿真完成
双击 “Run”，
进行仿真
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2
下拉式选单选择
Smith Chart
双击
3 单击矩阵左上角，
1 “S-Parameters”
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显示 S(1,1) 的仿真结果
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1 点击 File → Save As…
2
存档为“Lab5_RFPro"
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2
将 TermG1 改为50 ohm
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Run Simulation
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How to View
Smith Chart Result
•
•
此下拉式选单可以选择先
前的仿真结果
分别把 Lab5_RFPro 和
Lab1 的 S(1,1) 结果叫出
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— Pre-Layout: CILD+Murata（红色）
— Post-Layout: RFPro电磁分析（蓝色）
— 代表我们希望匹配的阻抗2.992+j*2.847
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• 射频匹配概述
• ADS 阻抗匹配仿真流程介绍
• 阻抗匹配仿真实验
•
实验1 匹配架构设计(Smith Chart Wizard)
•
实验2 替换真实组件与有损传输线(CILD)
•
实验3 匹配电路优化
•
实验4 汇入 Layout 档案
•
实验5 EM + Component 联合仿真(RFPro)
•
实验6 Pre-Layout and Post-Layout 仿真比对
ቐ
Pre-Layout
ቊ
Post-Layout
• 总结
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整个实验完成了射频匹配从 Pre-Layout 到 Post-Layout 的全部流程
1.
在 Pre-Layout，我们学到 Smith Chart，CILD 等小工具的使用。
2.
在 Post-Layout，了解 ADS 如何导入 PCB File，以及 RFPro 如何快速完成对
Circuit + Layout 的联合仿真。
3.
最后，透过 Correlation 的比对，验证 Pre-Layout 和 Post-Layout 的结果是相当
接近的，虽然 Pre-Layout 不能取代 Post-Layout，但在前期有效的评估，可以帮
助节省在系统设计初期组件选择的时间，避免多次迭代。
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