ELECTRONIC DEVICE Objective Paper –“Topic & Level-wise Upto GATE-2020 & ESE-2019” (VERSION : 04|03|20) GATE / ESE For “Electrical”, “Elect. & Comm.” Engg. Also useful for: Public Sector Units & State Engineering Service Examination This booklet contains GATE(EC/IN/EE) 34 years problem including last 23 years ESE(EC/EE) and in-house developed concept building problems. Product of, TARGATE EDUCATION place of trust since 2009 Copyright © TARGATE EDUCATION All rights reserved No part of this publication may be reproduced, stored in retrieval system, or transmitted in any form or by any means, electronics, mechanical, photocopying, digital, recording or otherwise without the prior permission of the TARGATE EDUCATION. Authors: Subject Experts @TARGATE EDUCATION First time in INDIA 1) Online doubt clearance. https://www.facebook.com/groups/targate.education/ This Group is Strictly for TARGATE EDUCATION Members and Students. We have to discuss all the subject related doubts here. Just take the snap shot of the problem and post into the group with additional information. 2) Weekly Online Test series. https://test.targate.org More than 50 online test in line with GATE pattern. Free for TARGATE EDUCATION Members and Students Includes weekly test, grand and mock test at the end. https://www.facebook.com/targate.education/ For regular technical updates; like new job openings and GATE pattern changes etc. TARGATE EDUCATION BILASPUR CENTRE : Ground Floor, Below Old Arpa Bridge, Jabrapara Road, Sarkanda, Bilaspur (Chhattisgarh) 495001 Phone No: 07752-406380 Web Address: www.targate.org, E-Contact: info@targate.org SYLLABUS: ELECTRONIC DEVICES & CIRCUITS (EC) GATE-2020 Energy bands in intrinsic and extrinsic silicon; Carrier transport: diffusion current, drift current, mobility and resistivity; Generation and recombination of carriers; Poisson and continuity equations; P-N junction, Zener diode, BJT, MOS capacitor, MOSFET, LED, photo diode and solar cell; Integrated circuit fabrication process: oxidation, diffusion, ion implantation, photolithography and twin-tub CMOS process. ESE Electrons and holes in semiconductors, Carrier Statistics, Mechanism of current flow in a semiconductor, Hall effect; Junction theory; Different types of diodes and their characteristics; Bipolar Junction transistor; Field effect transistors; Power switching devices like SCRs, GTOs, power MOSFETS; Basics of ICs bipolar, MOS and CMOS types; basic of Upto Electronics. Expert Comment IES and GATE syllabus for devices is almost same, but in case of IES; light numerical & deep theoretical questions are asked. Whereas in GATE light theoretical and deep numerical questions are expected. . Table of Contents 1. 2. 3. 4. SEMICONDUCTOR PHYSICS 3 1.1 BASIC THEORETICAL PROBLEM 3 1.2 BASIC NUMERICAL PROBLEM 7 1.3 BAND BANDING 20 1.5 GENERATION & REC. 21 1.4 FERMI 26 1.6 DIFFUSION 31 1.7 HALL EFFECT 35 1.8 PHOTONICS / LED 40 THEORY OF PN- JUNCTION 45 2.1 DEPLETION LAYER 45 2.2 COMBINED PROBLEMS 53 2.3 RECOVERY TIME 61 2.4 ZENER / AVALANCHE 62 2.5 JUNCTION CAPACITANCE 64 BJT-CONSTRUCTION 71 3.1 THEORETICAL PROBLEM 71 3.2 NUMERICAL PROBLEM 78 E-MOSFET 85 4.1 THEORETICAL PROBLEM 85 4.2 COMBINED NUMER. PROBLEM 90 5. 6. 4.3 CMOS 101 4.4 MOS CAP. & ENERGY BAND 103 IC TECHNOLOGY 112 MOS TRANSISTOR 112 COMBINED PROBLEMS 112 SPECIAL PURPOSE DIODE 117 PHOTO DETECTOR 117 SOLAR CELL 118 01 Semiconductor Physics (C) Number of valence electrons (D) Atomic weight 1.1 Basic Theoretical Problem (1) AA[ESE-EC-1999] The Ohm’s law for conduction in metals is : (A) J E (B) J (6) E (D) J E (C) J E (A) Ionic (B) Metallic AB [GATE-EC-1997-IITM] (2) (3) (4) (5) AC The nature of crystal bonding in germanium is : (C) Covalent The units of q are KT (D) Vander Wall type (A) V (B) V 1 (C) J (C) Farad (7) AD The continuity equations in a semiconductor are a particular way of expressing the AD [ESE-EC-2008] In addition to conduction, which one of the following mechanisms can account for the transport of charges in a semiconductor (not ordinarily encountered in metals)? (A) law of conservation of energy (A) E.M.F. generated within the body of the semiconductor (B) law of conservation of momentum (B) Mutual attraction between charges (C) Poisson’s equation (C) Mutual repulsion between charges (D) law of conservation of charge (D) Diffusion AB [ESE-EC-2011] A ‘hole’ in a semiconductor has (8) AA [ESE-EC-2002] In a degenerate semiconductor, the majority carriers are controlled by (A) Fermi-Dirac statistics 1. Positive charge equal to the electron charge. 2. Positive mass equal to the mass of the electron. (B) Maxwell-Boltzmann statistics 3. An ‘effective mass’ greater than the effective mass of electron. (D) Pauli’s exclusion principle 4. Negative mass and positive charge equal to the charge in nucleus. (A) 1, 2, 3 and 4 (B) 1 and 3 only (C) 2 and 4 only (D) 3 and 4 only AD Two group IV elements have the same diamond cubic structure the one with the larger -------- is expected to have the smaller energy gap (C) Bose-Einstein (B-E) statistics (9) AD[GATE-EC-2003-IITM] n-type silicon is obtained by doping silicon with: (A) Germanium (B) Aluminium (C) Boron (D) Phosphorus AC [GATE-EC-2004-IITD] (10) The impurity commonly used for realizing the base region of a silicon n-p-n transistor is (A) Packing factor (A) Gallium (B) Indium (B) Coordination number (C) Boron (D) Phosphorus www.targate.org Page 1 Electronic Devices & Circuit AB [GATE-EC-1998-IITD] (11) A long specimen of p-type semiconductor material: (A) is positively charged (B) is electrically neutral (C) has an electric field directed along (D) acts as a dipole AA [GATE-EC-2008-IISC] (12) Which of the following is true? (A) A silicon wafer heavily doped with boron is a P+ substrate. (B) A silicon wafer lightly doped with boron is a P+ substrate. (C) A silicon wafer heavily doped with arsenic is a P+ substrate. (D) A silicon wafer lightly doped with arsenic is a P+ substrate. AD (13) Which of the following elements act as donor impurities? 1. Ag 2. P 3. B 4. Bi 5. As 6. In Select the correct answer using the code given below: (A) 1, 2 and 3 (B) 1, 2, 4 and 6 (C) 2, 3 and 4 (D) 2, 4 and 5 AA [GATE-EC-2017-IITR] (14) A bar of Gallium Arsenide (GaAs) is doped with Silicon such that the Silicon atoms occupy Gallium and Arsenic sites in the GaAs crystal. Which one of the following statements is true? (A) Silicon atoms act as p-type dopants in Arsenic sites and n-type dopants in Gallium sites. (B) Silicon atoms act as n-type dopants in Arsenic sites and p-type dopants in Gallium sites. (C) Silicon atoms act as p-type dopants in Arsenic as well as Gallium sites. (D) Silicon atoms act as n-type dopants in Arsenic as well as Gallium sites. AB [ESE-EC-2009] (15) Consider the following statements: 1. Acceptor level is formed very close to the conduction band. 2. The effective mass of the free electron is same as that of a hole. 3. The magnitude of the charge of a free electron is same as that of a hole. 4. Addition of donor impurities adds holes to the semiconductor. Page 2 Which of the above statements are correct? (A) 1 and 3 (B) 2 and 3 (C) 2 and 4 (D) 3 and 4 AC (16) Match list-I with list-II and select the correct answer using the codes given below the lists: List – I Diffusion (A) (B) (C) (D) Codes: 2. 3. List – II Conduction band Valence band Fick’s law 4. Electric field 1. Drift Free electrons Holes (A) A 3 B 4 C 2 D 1 (B) 4 3 2 1 (C) 3 4 1 2 (D) 4 3 1 2 AA (17) Match List I with List II and select the correct answer using the codes given below the lists: List I List II (List of materials) diagram) (Energy-band A. Conductor 1. B. Semiconductor 2. C. Insulator 3. Codes: (A) (B) A 1 3 B 3 1 C 2 2 (C) 1 2 3 (D) 2 3 1 AD[GATE-EC-2007-IITK] (18) The electron and hole concentrations in an intrinsic semiconductor are ni per cm3 at 300 K. Now, if acceptor impurities are introduced with a concentration of NA per cm3 (where N A n i ) the electron concentration per cm3 at 300 K will be : TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics (A) ni (B) ni N A (D) (C) N A ni (D) ni2 NA AA[GATE-EC-2014-IITKGP] (19) In the figure, In ( i ) is plotted as a function of 1/T, where i is the intrinsic resistivity of silicon, T is the temperature, and the plot is almost linear. AC&A [GATE-EC-1990-IISC] (21) Under high electric fields, in a semiconductor with increasing electric field, (A) The mobility decreases of charge carriers (B) The mobility of the carriers saturates. (C) The velocity of the charge carriers saturates. (D) The velocity of the carriers increases. The slope of the line can be used to estimate (A) band gap energy of silicon (Eg) (B) sum of electron and hole mobility in silicon ( n p ) (C) reciprocal of the sum of electron and hole mobility in silicon ( n p ) 1 (D) intrinsic carrier silicon ( nl ) concentration of AC (20) Which of the following sketches best describes the DN versus N D dependence of electrons in silicon at room temperature ? AC [GATE-EC-1987-IITB] (22) In an intrinsic semiconductor the free electron concentration depends on: (A) Effective mass of electrons only (B) Effective mass of holes only (C) Temperature of the Semiconductor. (D) Width of the forbidden energy band of the semiconductor. AC (23) Consider the following statements regarding a semiconductor: 1. Acceptor level lies close to the valence band 2. Donor level lies close to the valence band. 3. n-type semiconductor behaves as an insulator at zero Kelvin. 4. p-type semiconductor behaves as an insulator at zero Kelvin (A) Of these statements (A) 2 and 3 are correct (B) 1 and 3 are correct (C) 1 and 4 are correct (D) 3 and 4 are correct (B) (C) AA (24) The resistance of metallic wire would (A) increase as the operating frequency increases (B) decrease as the operating frequency increases (C) remain unaffected on increasing the operating frequency (D) initially increase upto a certain value of the operating frequency and then decrease with increase in operating frequency. www.targate.org Page 3 Electronic Devices & Circuit AD [ESE-EC-2011] (25) An intrinsic semiconductor has the following properties 1. Its electron concentration equals its hole concentration. 2. Its carrier density increases with temperature. 3. Its conductivity decreases with temperature. (A) 1, 2 and 3 (B) 2 and 3 only (C) 1 and 3 only (D) 1 and 2 only AD [ESE-EC-2010] (26) When donor atoms are added to semiconductor, it (A) Increases the energy band gap of the semiconductor (B) Decreases the energy band gap of the semiconductor (C) Introduces a new narrow band gap near the conductor band (D) Introduces a new discrete energy level below the conduction band AA [ESE-EC-2011] (27) Consider the following statements with regard to semiconductors: 1. In a N-type material free electron concentration is nearly equal to density of donor atoms. 2. 1 part in 108 donor type impurity added to Ge improves its conductivity at 30 0 C by a factor 12. 3. Phosphorus is an example of n type impurity. 4. Conductivity of Si is more sensitive to temperature than Ge. Which of these statements are correct? (A) 1, 2 and 3 (B) 1, 3 and 4 (C) 2 & 4 (D) 1, 2, 3 & 4 AB [GATE-EC-2006-IITKGP] (28) The concentration of minority carriers in an extrinsic semiconductor under equilibrium is (A) Directly proportional to the doping concentration. (B) Inversely proportional to the doping concentration. (C) Directly proportional to the intrinsic concentration (D) Inversely proportional to the intrinsic concentration. eE2 / T1 / eE2 / T1 AD (29) If an intrinsic semiconductor is doped with a very small amount of boron, then in the extrinsic semiconductor set formed, the number of electrons and holes will Page 4 (A) decrease (B) increase and decrease respectively (C) Increase (D) Decrease and Increase respectively AC [GATE-EC-2009-IITR] (30) In an n-type silicon crystal at room temperature, which of the following can have a concentration of 4 1019 cm 3 ? (A) Silicon atom (B) Holes (C) Dopant atoms (D) Valence electrons AA [ESE-EC-2008] (31) Match List-I with List-II and select the correct answer using the code given below the lists: List I (Material) Intrinsic semiconductor Insulator (B) Extrinsic (C) semiconductor Conductor (D) Codes: (A) (A) (B) (C) (D) A 3 2 3 2 B 4 1 1 4 C 2 3 2 3 1. List II (Carrier Concentr ation /m3) 1028 2. 3. 10 22 1 01 8 4. 1014 D 1 4 4 1 AC [GATE-EC-1989-IITK] (32) Due to illumination by light, the electron and hole Concentrations in a heavily doped N Type semi conductor increases by n and p respectively if n i is the intrinsic concentration then, (A) n P (B) n P (C) n P (D) n P ni2 AD (33) For the n-type semiconductor with n = N D and p ni2 / N D , the hole concentration will fall below the intrinsic value because some of the holes. (A) drop back to acceptor impurity states (B) drop o donor impurity states (C) virtually leave the crystal. (D) recombine with the electrons. TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics AC (34) Consider the following statements : The intrinsic carrier concentration of a semiconductor AB [ESE-EC-2008] (38) The drift velocity of electrons in silicon varies with applied electric field in which one of the ways? (A) It monotonically increases with increasing field 1. depends on doping 2. increases exponentially with decrease of band gap of the semiconductor 3. increases non-linearly with increase of temperature 4. increases linearly with increase of temperature (C) It first increases, then decreases showing negative differential region, again increases and finally saturates Which of the statements given above are correct? (D) The drift velocity remains unchanged with increases in field. (A) 1, 2 and 3 (B) 1 and 3 (C) 2 and 3 (D) 2 and 4 AC [GATE-EC-2011-IITM] (35) Drift current in semiconductors depends upon (A) Only the electric field (B) It first increases linearly, then sub linearly and finally attains saturation with increasing field AC [ESE-EC-1997] (39) The increasing temperature, the electric conductivity would: (A) increase in metals as well as in intrinsic semiconductors (B) Only the carrier concentration gradient (B) increase in metals but decrease in intrinsic semiconductors (C) Both the electric field and the carrier concentration (C) decrease in metals but increase in intrinsic semiconductors (D) Both the electric field and the carrier concentration gradient (D) decrease in metals as well as in intrinsic semiconductors AD [GATE-EC-1995-IITK] (36) The drift velocity of electrons, in silicon: AC (40) In a p-type semiconductor, the conductivity due to holes ( p ) is equal to (e = charge (A) is proportional to the electric field for all values of electric field of hole, p = hole mobility, p = hole (B) is independent of the electric field concentration) (C) Increases at low values of electric field and decreases at high values of electric field exhibiting negative differential resistance (A) (D) Increase linearly with electric field at low values of electric field and gradually saturates at higher values of electric field. AB (37) Consider the following statements: If an electric field is applied to an n-type semiconductor bar, the electrons and holes move in opposite directions due to their opposite charges. The net current is 1. due to both electrons and holes with electrons as majority carriers 2. the sum of electron and hole currents 3. the difference between electron and hole current Which of these statements is/are correct (A) 1 alone (B) 1 and 2 (C) 2 alone (D) 3 alone p.e p (B) p p .e (C) p .e . p (D) 1 p.e. p AD (41) If a sample of Germanium and a sample of silicon have the same impurity density and are kept at room temperature (A) both will have equal value of resistivity (B) both will resistivity have equal negative (C) resistivity of germanium will be higher than that of silicon (D) resistivity of silicon will be higher than that of germanium AFALSE[GATE-EC-1994-IITKGP] (42) A p-type silicon sample has a higher conductivity compared to an n-type silicon sample having the same dopant concentration. (True/False) www.targate.org Page 5 Electronic Devices & Circuit AB [ESE-EC-2008] (43) An n-type semiconductor is illuminated by a steady flux of photons with energy greater than the band gap energy. The change in conductivity obeys which relation? (A) 0 (B) e( µn + µp )n (C) e( µn n µp p) (D) e µ n n AC (44) For a photoconductor with equal electron and hole mobitilities and perfect Ohmic contacts at the ends, an increases in the intensity of optical illumination results in (A) a change in open circuit voltage (B) a change in short circuit current (C) a reduction of resistance (D) an increases of resistance AB [ESE-EC-2008] (45) Mobility is defined as (A) Diffusion velocity per unit field (B) Drift velocity per unit field (C) Displacement per unit field (D) Number of free electrons/number of bound electrons AA [GATE-EC-1999-IITB] (46) The mobility of an electron in a conductor is expressed in terms of: 2 (B) cm/V – s 2 (D) cm /s (A) cm /V – s (C) cm / V 2 AB (47) The mobility of hole in a material is expressed in units of (A) V/s (B) m 2 / V s (C) m 2 / s (D) J/K AA [ESE-EC-2002] (48) The unit of mobility is (A) m 2V 1 s 1 (B) m V 1 s 1 (C) Vsm 1 (D) Vm s 1 AA[GATE-EC-2009-IITR] (49) The ratio of the mobility to the diffusion coefficient in a semiconductor has the unit (A) V1 (B) cm V 1 (C) V cm -1 (D) V s AB [ESE-EC-2002] (50) Consider the following statements : Page 6 The temperature dependence of resistivity of a sample of n-type silicon is based upon carrier concentration and carrier mobility variations with temperature because 1. The resistivity of silicon increases with temperature. 2. The mobility decreases with temperature. 3. The carrier concentration increases with temperature. 4. The resistivity of silicon decreases with temperature. Which of these statements are correct? (A) 1, 2 and 3 (B) 2, 3 and 4 (C) 1 and 2 (D) 3 and 4 AA [GATE-EC-1987-IITB] (51) According to the Einstein relation, for any semiconductor the ratio of diffusion constant to mobility of carriers: (A) Depends upon the temperature of the semiconductor. (B) Depends upon the type of the semi conductor. (C) Varies with life time of the semi conductor. (D) is a universal constant AD [ESE-EC-2008] (52) An intrinsic semiconductor is doped lightly with p-type impurity. It is found that the conductivity actually decreases till a certain doping level is reached. Why does this occur? (A) The mobility of holes decreases (B) The mobility of both electrons and holes decreases (C) The hole density actually reduces (D) Effect of reduction in electrons due to increase in holes compensates more than the effect of increase in holes on conductivity AB[ESE-EC-2014] (53) At very high temperature, an n-type semiconductor behave like (A) a p-type semiconductor (B) an intrinsic semiconductor (C) a superconductor (D) an n-type semiconductor AA[ESE-EE-2006] (54) For an n-type semiconductor having any doping level, which of the following hold (s) good : 1. pn N D ni2 2. p p N D ni2 3. nn N D ni2 4. pn nn ni2 TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics Select the correct answer using the code given below : AD[ESE-EE-2019] (58) The thermal voltage VT of a semiconductor (A) 1 and 4 (B) 2 and 4 diode at 27 0 C temperature is nearly (C) 3 and 4 (D) Only 4 (A) 17 mV (B) 20 mV (C) 23mV (D) 26 mV AB[ESE-EE-2007] (55) Match List-I with List-II and select the correct answer using the code given below the lists: List-I (Semiconductor Property) A. Carrier mobility B. Diffusion length C. Diffusion coefficint D. Energy gap eV(electron volt) 2. 3. m 2 / V-sec m 4. m2 / s 1.2 Basic Numerical Problem Example 1. A perfectly compensated semiconductor is one in which the donor and acceptor impurity concentrations are exactly equal. Assuming complete ionization, determine the conductivity of silicon at T = 300 K in which the impurity concentrations are N a N d 1014 cm 3 . Assume List-II (Corresponding Unit) 1. ********** ( q 1.6 10 19 , n 1350 p 480 ni 1.5 1010 cm 3 ) . Sol. For an intrinsic semiconductor, i eni n p Codes : A B C D (a) (A) 4 2 3 1 For N d N a 104 cm 3 , (B) 2 3 4 1 n 1350cm2 / V s, p 480cm 2 / V s (C) 2 3 1 4 (D) 4 2 1 3 Then i 1.6 x1019 1.5 x1010 1350 480 AA[ESE-EE-2010] (56) Assertion (A): In a p-type semiconductor, with increase in the level of doping at a fixed temperature, the hole concentration increases but the election concentration falls. Reason (R): Law of mass action holds good in case of semiconductor. (A) Both A and R are true and R is the correct explanation of A Or i 4.39 x106 ( cm) 1 (b) For N d N a 1018 cm13 , n 300 cm 2 / V s , p 130 cm 2 / V s Then (B) Both A and R are true but R is not the correct explanation of A i 1.6 x1019 1.5 x1010 300 130 (C) A is true but R is false Or (D) A is false but R is true i 1.03 x10 6 ( cm) 1 AB[ESE-EE-2012] (57) If n is the number of electrons per unit volume of the semiconductor and Vd is the drift velocity of the electrons, then the current flowing through a semiconductor is given by (A) i n Vd (B) i nVd (C) i Vd n (D) i nVd 1/2 Example 2. (a) A silicon semiconductor is in the shape of rectangular bar with a cross section area of 100 m 2 , a length of 0.1 cm, and is doped with 5 1016 cm 3 arsenic atom. The temperature is T = 300 K. Determine the current if 5 V is applied across the length. (b) Repeat part (a) if the length is reduced to 0.01 cm. (c) Calculate the average drift velocity of electrons in parts (a) and (b). www.targate.org Page 7 Electronic Devices & Circuit Sol. (a) R and p0 2.95x1013 cm3 L L and en N d A A 16 3 13 12 2 For N d 5 x10 cm , n 1100 cm / V s Then R n 2 2.4 x10 n0 i p0 2.95 x1013 (ii) n0 1.95 x1013 cm3 0.1 2 4 2 1.6 x10 1100 5 x10 100 10 19 16 Or Then 4 2 R 1.136 x10 5 x1015 5 x1015 13 2 n0 2.4 x10 2 2 Then I Nd Na N Na 2 d ni 2 2 n0 or V 5 I 0.44 mA R 1.136 x104 n0 5 x1015 cm3 13 2 (b) In this case n 2 2.4 x10 and p0 i n0 5 x1015 R 1.136 x103 p0 1.15x1011 cm3 Example 4. A sample of silicon at T = 450 K is doped with boron at a concentration of 1.5 1015 cm 3 and with arsenic at a concentration of 8 1014 cm-3 . (i) Is the material n or p type ? (ii) Determine the electron and hole concentrations. (iii) Calculate the total ionized impurity concentration. N c 2.8 1019 , N v 1.04 1019 . Then I V 5 I 4.4 mA R 1.136 x103 (c) E V L For (a), E 5 50V / cm 0.10 Sol. For T 450 K And 450 ni2 2.8 x1019 1.04 x1019 300 vd (1100)(500) vd 5.5 x105 cm / s For (b), E 1.12 exp (0.0259)(450 / 300) V 5 500V / cm L 0.01 or And ni 1.72 x1013 cm3 vd (1100)(500) vd 5.5 x105 cm / s Example 3. Consider a T = 300 K. germanium semiconductor at (a) N a N d p-type (b) p0 2 Calculate the thermal equilibrium concentrations of n0 and p0 for (i) N a 1013 cm 3 N d 0 , and (ii) N d 5 1015 cm 3 , N a 0 , Sol. (i) Ge : 2 Na Nd N Nd 2 a ni 2 2 Then 1.5 x1015 8 x1014 2 2 Or p0 N a N d 7 x1014 cm 3 Then 1013 1013 13 2 p0 2.4 x10 2 2 Page 8 Na Nd N Nd 2 a ni 2 2 1.5 x1015 8 x1014 13 2 1.72 x10 2 ni 2.4 1013 /cm 3 . p0 3 13 2 n 2 1.72 x10 n0 i p0 7 x1014 TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics n0 4.23 x1011 cm 3 2 1.5 1010 nn 8.333 nn2 0.14 0.05 6 10 19 1.602 10 (c) Total ionized impurity concentration N I N a N d 1.5 x1015 8 x1014 Or 0.14nn2 5.201 1019 nn 1.125 1031 0 N I 2.3 x1015 cm 3 Example 5. A bar of Silicon 0.1 cm long has a cross-sectional area 8 10 8 m 2 , heavily doped with phosphorus. What will be the majority carrier density resulting from doping if bar is to have a resistance of 1.5k . nn 5.201 1019 (5.20 1019 ) 2 4 0.14 1.12 1031 2 0.14 nn 3.715 10 20 per m3 (neglecting other value) N D . This is majority carrier density. Note : Infact practically, holes concentration will be very much less than electron concentration and hence can be neglected. So Given : for Silicon at room temperature, 2 n 0.14m /V-sec p 0.05 m 2 /V-sec n nn n q neglecting n p . ni 1.5 1010 per cm 3 Sol. l A where l 0.1cm = 0.1 102 m R 8 A 8 10 m n N D n q 8.33 N D 0.14 1.602 10 19 N D 3.715 1020 nn RA 1.5 10 8 10 l 0.1 10 2 Hence for heavily doped material, concentration of minority carries can be neglected. 8 G & B AD (59) A bar of intrinsic Silicon has a crosssectional area of 2.5 10 4 m2 . The electron 0.12 -m This is same as calculated above. 3 nn N D 2 R 1.5 k 1.5 103 while 1 1 0.12 8.333( m) 1 density is 1.5 1016 per m3. How long the bar be in order that current in the bar will be 1.2 mA when 9 volts are applied across it. n ( nn n n p p ) q Assume : This is because phosphorus is donor impurity and will form n-type material. n 0.14m 2 /V-sec , p 0.05 m 2 /V-sec nn = np = concentration of majority carriers, electrons concentration of minority carriers, electrons According to law of mass action, nn n p n12 (A) 1.215mm (B) 0.185 mm (C) 2.125mm (D) 0.856 mm G & B AA (60) The resistivity of pure Silcon is 2.3 105 -cm at 27 0 C . Calculate intrinsic concentration at 127 0 C . Assume n 0.14m 2 /V-sec at 300 0 K , n2 np i nn (A) 7.635 1018 m 3 n2 ( nn n i p )q nn nn (nn2 n ni2 p ) q (C) 1.352 1018 m3 p 0.05 m 2 /V-sec at 3000 K (B) 7.635 1015 m 3 (D) 1.352 1015 m3 www.targate.org Page 9 Electronic Devices & Circuit G & B AA (61) A specimen of Silicon has a square cross section of 3 3 mm and its length is 5 cm. It is subjected to a voltage of 1 V applied across its length. The current flowing through it is observed to be 6 mA. Calculate, i) concentration of free electrons ii) drift velocity of electrons. Assume mobility of electrons as 1300 cm 2 /V-sec and charge on one electron as 1.6 10 19 C. G & B A 52.32 mA/cm 2 (66) A sample of germanium is doped to extent of 1014 donor atoms per cm 3 and acceptor atoms of 7 1013 per cm 3 . At the same temperature the resistivity of pure germanium is observed as 60 -cm . If the applied electric field is 2 V/cm, calculate the total current density. Hint : Use pure resistivity to get ni and then ND p N A n (A) 1.6025 1021 m -3 , 2.6m/s Use law of mass action to get n and p. (B) 1.6025 1019 m -3 , 2.6m/s Use J [ n n p p ] qE . (C) 1.6025 1021 m -3 ,9.6m/s Assume n 3800cm 2 /V-s and p 1800 cm 2 /V-s (D) 1.6025 1019 m -3 , 9.6 m/s Common Data Questions (for Next Four Questions) : The resistance per unit length of a piece of copper wire with circular cross section with diameter of 1.03 mm is 2.5 104 /cm . Concentration of free electrons is 8.4 10 28 per m 3 . The current density is 2.1 106 A/m 2 . G & B AA (62) Calculate its current flowing Common Data Questions (for Next Two Questions) : A specimen of Silicon has square cross-section of 2 2 mm and length of 2 cm. The current is due to electrons with mobility 1300cm 2 /V-s . A d.c. voltage of 1 V is impressed across the bar gives 8 mA current. G & B AB (67) Calculate concentration of free electrons (A) 0.923 10 21 m -3 (A) 1.749 mA (B) 3.749 mA (B) 1.923 10 21 m -3 (C) 7.149 mA (D) 4.149 mA (C) 1.923 10 22 m -3 G & B AC (D) 9.231 10 21 m -3 (63) Calculate its conductivity G & B AC (68) Calculate its drift velocity (A) 4.8 106 (-m) 1 (B) 3.6 106 (-m) 1 (C) 4.8 107 (-m)1 (D) 3.6 105 (-m)1 G & B AA (64) Calculate velocity of free electrons (A) 1.56 10 4 m/s (B) 5.14 10 2 m/s (A) 4.5 ms (B) 5.5 ms (C) 6.5 ms (D) 7.5 ms G & B AA (69) Calculate the thermal equilibrium hole concentration in silicon at T 400 K . Assume that the Fermi energy is 0.27 eV above the valence band energy. The value of Nv for silicon at T 300 K is N v 1.04 1019 cm 3 . (C) 5.14 10 3 m/s (A) 6.43 1016 cm -3 (D) 1.56 10 2 m/s (B) 6.43 1015 cm -3 G & B AA (65) Calculate its mobility. (A) 3.567 103 m 2 /V-sec (B) 3.567 105 m 2 /V-sec 5 2 (C) 6.667 10 m /V-sec (D) 8.854 10 3 m 2 /V-sec Page 10 (C) 1.4 1013 cm -3 (D) 4.43 1013 cm -3 \AB [GATE-EC-2002-IISC] (70) The band gap of silicon at 300 K is (A) 1.36 ev (B) 1.10 ev (C) 0.80 ev (D) 0.67 ev TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics AC [GATE-EC-2005-IITB] (71) The band gap of silicon at room temperature is: (A) 1.3 eV (B) 0.7 eV (C) 1.1 eV (D) 1.4 eV AC (72) If the temperature of an extrinsic semiconductor is increased so that the intrinsic carrier concentration is double then : (A) majority carrier density doubles (B) the minority carrier density doubles (C) the minority carrier density becomes four times the original value (D) both majority and minority carrier density doubles A225.2 [GATE-EC-2014-IITKGP] (73) Consider a silicon sample doped with ND = 1 x 1015 / cm3 donor atoms. Assume that the intrinsic carrier concentration Ni=1.5x 1010 / cm3. If the sample is additionally doped with NA = 1 x 1018 / cm3 acceptor atoms, the approximate number of electrons / cm3 in the sample, at T = 300 K, will be _______. AC [GATE-EC-1995-IITK] (74) In a P-type Si sample the hole concentration is 2.25 10 15 / cm 3 . The intrinsic carrier Concentration is 1.5 1010 / cm 3 the electron concentration is (A) Zero (B) 1010 / cm 3 (C) 10 5 / cm 3 (D) 1.5 1025 / cm 3 AC [GATE-EC-1997-IITM] (75) The intrinsic carrier density at 300 k is 1 . 5 1 0 1 0 / c m 3 , in silicon. For n-type 3 silicon doped to 2 .25 10 15 atom/cm , the equilibrium electron and hole densities are: (A) n 1.5 1015 / cm3 , p 1.5 1010 / cm3 (B) n 1.5 1015 / cm3 , p 2.25 1015 / cm3 (C) n 2.25 1015 / cm3 , p 1.0 105 / cm3 (D) n 1.5 1010 / cm3 , p 1.5 1010 / cm3 AB [GATE-EC-1991-IITM] (76) A Silicon Sample is uniformly doped with 3 1016 phosphorus atoms/cm and 2 1 0 1 6 3 boron atoms/cm If all the dopants are fully ionized, the material is (A) n – type with carrier concentration of 1016 / cm 3 (B) p – type with carrier concentration of 1016 / cm 3 (C) p – type with carrier concentration of 2 1016 / cm 3 (D) n–type with a carrier concentration of 2 1016 / cm 3 AB (77) In a non-degenerate germanium sample maintained under equilibrium conditions near room temperature, it is known that intrinsic concentration ni 1 013 / c m 3 , n 2 p and N A 0 . What are the values of n (electron concentration) and ND (Donor concentration) ? n ND 12 3 13 (A) 7 .07 1 0 p er c m 1 .4 1 4 1 0 p er c m 3 (B) 1 .4 1 4 1 0 1 3 p e r cm 3 0 .7 0 7 1 0 1 3 p er c m 3 (C) 2 .8 2 8 1 0 1 3 p er cm 3 0 .7 0 7 1 0 1 3 p er c m 3 (D) 1 .4 1 4 1 0 1 3 p e r cm 3 1 .4 1 4 1 0 1 3 p er c m 3 A2.4-2.6 (78) The concentration of hole-electron pairs in pure silicon at T = 300 K is 7 1 0 1 5 per cubic meter. Antimony is doped into silicon 7 in a proportion of 1 atom to 10 atoms. Assuming that half of the impurity atoms contribute electrons in the conduction band, Approximate free electron concentration per cubic meter (the number of silicon atoms per 28 cubic meter is 5 10 ) is ______ 10 21 AD [GATE-EC-2014-IITKGP] (79) A silicon bar is doped with donar impurities ND = 2.25 x 1015 atoms /cm3. Given the intrinsic carrier concentration of silicon at T = 300 K is ni = 1.5 x 1010 cm-3. Assuming complete impurity ionization the equilibrium electron and whole concentration are (A) N0 = 1.5 x 1016 cm-3, p0 = 1.5 x 105 cm-3 (B) N0 = 1.5 x 1010 cm-3, p0 = 1.5 x 1015 cm-3 (C) N0 = 2.25 x 1015 cm-3, p0 = 1.5 x 1010 cm-3 (D) N0 = 2.25 x 1015 cm-3, p0 = 1 x 105 cm-3 AD (80) Two pure specimen of a semiconductor material are taken from a sample. One is doped with 1018 cm3 number of donors and the other is doped with 1016 cm3 number of acceptors. The minority carrier density in the first specimen is 10 7 cm 3 . What is the minority carrier density in the other specimen? (A) 1016 cm 3 (B) 10 27 cm 3 (C) 1018 cm 3 (D) 10 9 cm 3 www.targate.org Page 11 Electronic Devices & Circuit AB (81) A n type semiconductor material has a doping level, N D 1 0 16 c m 3 . Now to increase the minority carriers concentration 4 times, we must add "X" in the material with Y doping concentration. X and Y are (given n i 1 .5 1 0 10 cm 3 ) (A) Arsenic, 7 .5 1 0 cm (B) Boron, 7 .5 1 0 1 5 c m 3 15 3 Statement For Linked Answer Questions for next Three Questions : A pure Ge is doped with donor impurities of 1 : 107, let n i 2 .5 1 0 1 3 /cm3 and total number of atoms in Ge is 4.42 10 22 /cm 3 AB (85) Find the concentration of electron. (A) 4 .4 2 1 0 15 / m 3 (C) Antimony, 8 .5 1 0 1 5 c m 3 (B) 4 4 .2 1 0 15 / m 3 (D) Phosphorous, 8 .5 1 0 1 4 c m 3 (C) 4 .4 2 1 0 1 5 / cm 3 AB 17 3 (82) GaAs is doped to N a 1 0 cm . Excess electrons and holes are generated such that n p 1 0 1 5 cm 3 . Determine the total concentration of holes. (A) 1 .0 0 1 0 17 / cm 3 (B) 1 .0 1 1 0 17 15 / cm (D) 4 .4 2 1 0 2 9 / cm 3 AB (86) Find the concentration of holes. (A) 1.41 10 11 holes/m 3 (B) 1.41 1011 holes/m 3 (C) 1.41 1017 holes/m 3 3 (D) 1.41 10 3 holes/m 3 3 (C) 1.00 10 / cm (D) 1 .0 1 1 0 15 / cm 3 AA (83) A sample of silicon at T = 300K is doped with boron at a concentration of 2.5 101 3 cm 3 and with arsenic at a concentration of 1.5 10 7 cm 3 . The material is (Note: Assume complete ionization has been taken place.) (A) p-type with p0 1.5 1013 cm 3 Statement For Linked Answer Questions for Next Two Questions : In germanium semiconductor at T = 300 K, the impurity concentration are N D 5 1 0 15 / cm 2 , N A 0 Note: For Ge n i 2 .5 1 0 1 3 atoms/cm3 AA (87) The thermal equilibrium electron concentration n 0 is : (B) p-type with p0 2.5 1017 cm 3 (A) 5 1015 / cm 3 (B) 1.15 1011 / cm 3 (C) 1.15 10 9 / cm 3 (C) n-type with n0 1.5 1013 cm 3 (D) 5 1 0 6 / c m 3 (D) n-type with n0 1.5 107 cm 3 [ESE-EC-2003] (84) Assume n i 1 .4 5 1 0 1 0 / cm 3 for silicon. In an n-type silicon sample, the donor concentration at 300 K is 5 1 0 1 4 /cm3 and corresponds to 1 impurity atom for 108 silicon atoms. The electron and hole concentrations in the sample will be : (A) n 5 1 0 1 4 / c m 3 and p 4 .2 1 0 5 / c m 3 (B) n 5 10 1 4 / cm 3 and (C) n 5 1 0 1 4 / cm 3 and p 4 .2 1 0 5 / c m 3 AC [ESE-EC-2008] (89) Why does the mobility of electrons in a semiconductor decrease with increasing donor density? (B) Doping decreases the relaxation time (C) Electrons are trapped by the donors (D) n 5 10 1 4 / cm 3 and Page 12 (A) 1.25 1011 / cm 3 (B) 3.96 1013 / cm 3 (C) 4.36 1013 / cm 3 (D) None of these (A) Doping increases the effective mass of electrons p 4 .2 1 0 5 / c m 3 p 4 .2 1 0 5 / c m 3 AA (88) The thermal equilibrium hole concentration p 0 is : (D) More holes are generated so that the effective mobility decreases. TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics AB (90) Mobility varies as T over a temperature range of 100 to 4000 k. For silicon, m = _________ for holes. m (A) 2.2 (B) 2.7 (C) 1.66 (D) 2.33 A0.3-0.7 (91) If the drift velocity of holes under a field gradient of 200 V/m is 100 m/s their mobility is SI units is _________. AC [GATE-EC-1995-IITK] (92) A small concentration of minority carries is injected into a homogeneous Semiconductor crystal at one point. An electric field of 10V/cm is applied across the crystal and this move. The minority carries a distance of 1 cm is 20 sec mobility in cm 2 / v sec is (A) 1,000 (B) 2,000 (C) 5,000 (D) 500,000 AC (93) In above question, suppose some impurity is added in the material and the overall mobility becomes 900cm2 /Vs. Then the mobility of electron, only due to addition of ion impurity is, (A) 2000 cm 2 / Vs (B) 2700 cm 2 / Vs (C) 540 cm 2 / Vs (D) 450 cm 2 / Vs AD (94) Six volts is applied across a 2 cm long semiconductor bar. The average drift velocity is 104 cm/s. The electron mobility is (A) 4396 cm2/V-s (B) 3 10 4 cm 2 / V-s (A) 20 ns (C) 3.75 ns (B) 10 ns (D) 5.5 ns AB (97) The density of impurity atoms that must be added to an intrinsic silicon crystal to convert it to 10 4 m n-type silicon if p 0.138m 2 / V-sec n 0.046m 2 / V-sec f or silicon, will be (A) 4.528 10 23 / m 3 (B) 13.586 10 23 / m 3 (C) 1.234 1017 / m 3 (D) 9.143 1017 / m 3 AA [GATE-EC-2003-IITM] (98) The intrinsic carrier concentration of silicon sample at 300K is 1.5 10 16 / m 3 . If after doping, the number of majority carriers is 5 10 20 / m 3 , the minority carrier density is (A) 4.50 1011 / m 3 (B) 3.33 10 4 / m 3 (C) 5.00 10 20 / m 3 (D) 3.00 105 / m 3 AD [GATE-EC-2006-IITKGP] (99) A heavily doped n-type semiconductor has the following data. Hole-electron mobility ratio: 0.4 Doping Concentration : 4.2 10 8 atoms/m3 Intrinsic concentration : 1.5 10 4 atoms/m3 (C) 6 10 4 cm 2 / V-s The ratio of conductance of the n-type semiconductor to that of the intrinsic Semiconductor of same material and at the same temperature is given by (D) 3333 cm 2 / V-s (A) 0.00005 (B) 2,000 (C) 10,000 (D) 20,000 AA [GATE-EC-1997-IITM] (95) An n-type silicon bar 0.1 cm long and 100 m 2 in crosssectional area has a majority carrier concentration of 3 20 5 10 /m and the carrier mobility is 0.13 m2/V-s at 300K. If the charge of an electron is 1.6 10 19 coulomb, then the resistance of the bar is (A) 10 6 (B) 10 4 (C) 10 1 (D) 10 4 Statement For Linked Answer Questions for Next Two Questions : The silicon sample with unit cross-section area shown below is in thermal equilibrium. The following information is given: T = 300k, Electronic charge = 1.6 10 19 C , thermal voltage = 26mv and electron mobility = 1350 cm 2 / v s AC (96) The relaxation time of an electron scattering in a lattice by mechanism 'X' is 5 ns and by 'Y' is 15 ns. Then effective relaxation time in presence of both mechanisms present at same time is www.targate.org Page 13 Electronic Devices & Circuit AC [GATE-EC-2010-IITG] (100) The magnitude of the electric field at x = 0.5 m is : (A) 1 KV/cm (B) 5KV/cm (C) 10KV/cm (D) 26KV/cm AA [GATE-EC-2010-IITG] (101) The magnitude of the electric drift current density at x = 0.5 m is (A) 2.16 10 4 A/cm2 (B) 1.08 104 A/cm2 (C) 4.32 103 A/cm2 (D) 6.48 10 2 A/cm2 A100 [GATE-EC-2015-IITK] (102) A dc voltage of 10V is applied across an n-type silicon bar having a rectangular crosssection and a length of 1cm as shown in figure. The donor doping concentration ND and the mobility of electrons n are 1016 cm-3 and 1000 cm2 V1 -1 s , respectively . The average time (in s ) taken by the electrons to move from one end of the bar to other end is________. (A) n remains constant over the temperature range (B) n increases monotonically with increasing temperature (C) n increases first, remains constant over a range and again increases with increasing temperature (D) n increases, shows a peak and then decreases with rise in temperature AD [ESE-EC-2005] (105) The intrinsic concentration in a 13 3 semiconductor at 300K is 10 cm . When it is doped with donor type impurities, the majority carrier concentration becomes 1017 cm 3 . What is the value of its minority carrier density? (A) 0 .9 99 1 0 1 7 cm3 (B) 1017 cm 3 (C) 1 0 4 cm3 AD (106) Match List-I (Current) with ListII(Variation) and select the correct answer using the code given below the lists: A B A32-35 [GATE-EC-2016-IISc] (103) Consider a region of silicon devoid of electrons and holes, with an ionized donor density of N d+ 1017 cm 3 . The electric field at x = 0 is 0 V/cm and the electric field at x = L is 50 kV/cm in the positive x direction. Assume that the electric field is zero in the and z directions at all points. Given q = 1.6 × 10−19 coulomb, 0 8.85 1014 F / cm , r 11.7 for silicon, the value of L in nm is ______ . AB [ESE-EC-2008] (104) A Si sample is doped with a fixed number of group V impurities. The electron density n is measured from 4 K to 1200 K for the sample. Which one of the following is correct? Page 14 (D) 1 0 9 c m 3 C D List-I Hole diffusion current 1 List-II n. E Electron drift current Hole drift current 2 p. E 3 -dp/dx Electron diffusion current 4 dn/dx Codes : A B C D (A) 2 1 3 4 (B) 3 4 2 1 (C) 2 4 3 1 (D) 3 1 2 4 A0.520[GATE-EC-2015-IITK] (107) A silicon sample is uniformly doped with donor type impurities with a concentration of 1016 /cm 3 . The electron and hole mobilities in the sample are 1200 cm 2 /V-s and 400cm 2 /V-s respectively. Assume complete ionization of impurities. The charge of an electron is 1.6 1 0 19 C . The resistivity of the sample (in -cm ) is ____ . TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics A3.1-3.3 (108) The concentration of electron in a p-type silicon at 3000 k assuming resistivity as 0.02 cm is : _ _ _ _ _ _ 1 0 8 / m 3 Assume p 475m2 / V-sec n l 1.45 10 10 / cm 3 AD (109) A sample of Ge is doped to the extent of 3 1014 donor atoms/cm and 7 1 0 1 3 acceptor 3 atoms/cm . At the temperature of the sample the resistivity of pure Germanium is 60 cm . If the applied electric field is 2 V/cm, the total conduction current density is A1.92 [GATE-EC-2015-IITK] (113) A piece of silicon is droped uniformly with phosphorous with a doping concentration of 1016/cm3. The expected value of mobility versus doping concentration for silicon assuming full dopant ionization is shown below. The charge of an electron is –1 1.6 10 19 C. The conductivity (in S cm ) of the silicon sample at 300 K is ______ (A) 22.3 mA/cm2 (B) 32.3 mA/cm2 (C) 42.3 mA/cm2 (D) 52.3 mA/cm2 AB (110) An n-type silicon sample has a resistivity of 5 -c m at T = 300K. The mobility is n 1 3 5 0 c m 2 /V -s . The donor impurity concentration is (A) 2.86 10 14 cm 3 (B) 9.25 1014 cm 3 (C) 11.46 1015 cm 3 (D) 1.1 10 15 cm 3 AB [GATE-EC-2004-IITD] (111) The resistivity of uniformly doped n-type silicon sampled is 0.5 cm If the electron mobility (µn) is 1250 AC [ESE-EC-2005] (114) The free electron density in a conductor is (1/1.6) 10 22 cm 3 . The electron mobility is 10 cm 2 /Vs. What is the value of its resistivity? (A) 1 0 4 m (B) 1 .6 10 2 m (C) 1 0 4 cm (D) 1 0 4 mho cm AD (115) In a particular semiconductor the donor impurity concentration is N d 1 0 1 4 cm 3 . Assume the following parameters, n 1000cm2 /V-s , T 3 N c 2 1019 cm 300 cm 2 / V sec and the charge of an electron is 1 .6 1 0 1 9 coulomb, the donor impurity T Nv 11019 300 E g 1 .1 e V concentration (ND ) in the sample is: (A) 2 1 0 1 6 / c m 3 (B) 1016 / cm 3 (C) 10 15 / cm 3 (D) 1015 / cm 3 AB[GATE-EC-2005-IITB] (112) A silicon sample ‘A’ is doped with 1018 atoms/cm3 of Boron. Another sample ‘B’ of identical dimensions is doped with 1018 atoms/cm3 of phosphorus. The ratio of Electron to hole mobility 3. The ratio of conductivity of the sample A to B is : 1 3 (A) 3 (B) 2 (C) 3 3 (D) 2 3/2 cm3 , An electric field of E = 10 V/cm is applied. The electric current density at 300 K is (A) 2.3A/cm 2 (B) 1.6A/cm 2 2 (C) 9.6A/cm (D) 3.4A/cm 2 AB [ESE-EC-2014] (116) A p-type silicon sample has an intrinsic carrier concentration of 1.5 1010 / cm3 and a hole concentration of 2.25 1015 cm3 . Then the electron concentration is (A) 1.5 10 25 / cm3 (B) 105 / cm3 (C) 1010 / cm3 (D) 0 www.targate.org Page 15 Electronic Devices & Circuit AB[ESE-EC-2015] (117) By doping Germanium with Gallium, the types of semiconductors formed are: 1. N type 2. P type 3. Intrinsic 4. Extrinsic Which of the above are correct ? (A) 1 and 4 (B) 2 and 4 (C) 1 and 3 (D) 2 and 3 AA[ESE-EC-2015] (118) An n-type silicon can be formed by adding impurity of : 1. Phosphorous 2. Arsenic 3. Boron 4. Aluminium Which of the above are correct ? (A) 1 and 2 (B) 2 and 3 (C) 3 and 4 (D) 1 and 4 AB[ESE-EC-2015] (119) According to Einstien's relationship for a semiconductor, the ratio of diffusion constant to the mobility of the charge carriers is (A) Variable and is twice the volt equivalent of the temperature (B) Constant and is equal to the volt equivalent of the temperature (C) Equal to the two and is twice the volt equivalent of the temperature (D) Equal to one and is equal to the volt equivalent of the temperature AD[ESE-EC-2015] (120) The number of holes in an N-type silicon with intrinsic value 1.5 1010 / cm3 and doping concentration of 1017 / cm3 , by using mass-action law is (A) 6.67 106 / cc (B) 4.44 1025 / cc (C) 1.5 10 (B) 0.818 1010 cm3 (C) 0.918 1012 cm3 (D) 0.818 1012 cm3 AA[ESE-EC-2016] (123) Assume that the values of mobility of holes and that of electrons in an intrinsic semiconductor are equal and the values of conductivity and intrinsic electron density are 2.32 / m and 2.5 1019 / m3 respectivelly. Then, the mobility of electron/hole is approximately (A) 0.3 m 2 / Vs (B) 0.5 m 2 / Vs (C) 0.7 m2 / Vs (D) 0.9 m 2 / Vs AC[ESE-EC-2016] sample A is doped with 1018 atom / cm3 of Boron and another silicon sample B of identical dimensions is doped with of 1018 atom / cm3 Phosphorous. If the ratio of electron to hole mobility is 3, then the ratio of conductivity of the sample A to that of B is (124) A silicon (A) 3 2 (B) 2 3 (C) 1 3 (D) 1 2 AA[ESE-EC-2018] (125) A sample of germenium is made p-type by addition of indium at the rate of one indium atom for every 2.5 108 germenium atoms. Given, ni 2.5 1019 / m 3 at 300 K and the number of germanium atoms per m3 4.4 1028 . What is the value of n p ? 24 (A) 3.55 1018 / m3 3 (B) 3.76 1018 / m3 / cc (D) 2.25 10 / cc AC[ESE-EC-2015] (121) A continuity equation is also called as the law of conversation of (A) Mass (B) Energy (C) Charge (D) Power AB[ESE-EC-2016] (122) A Ge sample at room temperature has intrinsic carrier concentration 13 3 ni 1.5 10 cm and is uniformly doped with acceptor of 3 1016 cm 3 and donor of 2.5 1015 cm 3 .Then, the minority charge carrier concentration is : Page 16 (A) 0.918 1010 cm3 (C) 7.87 1018 / m3 (D) 9.94 1018 / m3 AB[ESE-EE-2001] (126) A specimen of instrinsic germenium with the density of charge carriers of 2.5 1013 / cm3 , is doped with donor impurity atoms such that there is one donor impurity atom for every 106 germanium atoms. The density of germanium atoms is 4.4 10 22 / cm3 . The hole density would be (A) 4.4 1016 / cm 3 (B) 1.4 1010 / cm3 TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics AB[ESE-EE-2006] (130) Which one of the following equations represents the energy gap ( EG ) variation of (C) 4.4 1010 / cm3 (D) 1.4 1016 / cm3 AD[ESE-EE-2001] (127) If for intrinsic Silicon at 27 0 C , the charge concentration and mobilities of freeelectrons and holes are 1.5 1016 per m3 , 0.13 m 2 / (Vs) silicon with temperature (T ) ? (A) EG (T ) 2.11 3.60 104T (B) EG (T ) 1.21 3.60 10 4T and 0.05 m 2 / (Vs) respectively, its conductivity will be (C) EG (T ) 1.41 2.23 10 4T (A) 2.4 10 3 / ( m) 1 (D) EG (T ) 0.785 2.23 104T AA[ESE-EE-2010] (131) Assertion (A): At 0 0 K , a semiconductor behaves as an insulator. Reason (R): No free carries are available in the semiconductor at 0 0 K . (B) 3.15 10 3 / ( m) 1 (C) 5 10 4 / ( m) 1 (D) 4.32 104 / ( m) 1 A[ESE-EE-2005] (128) In a p-type silicon sample, the hole concentration is 2.25 1015 / cc . If the intrinsic carrier concentration is 10 1.5 10 / cc , what is the electron concentration in the P-type silicon sample (A) zero (B) 1010 / cc (C) 105 / cc (D) 1.5 10 25 / cc AB[ESE-EE-2006] (129) Match List-I (Parameter) with List-II (Variation) and select the correct answer using the code given below the lists: List-I A. Electron mobility around room temperature B. Energy gap C. Intrinsic carrier concentration D. Mole density (gm/mole) (B) Both A and R are true but R is not the correct explanation of A (C) A is true but R is false (D) A is false but R is true B & B AD (132) The electron and hole concentrations in an intrinsic semiconductor are ni and pi respectively. When doped with a p-type material, these change to n and p, respectively. Then (A) n+p=n i +p i (B) n+n i =p+pi (C) npi =n i p (D) np=n i p i B & B AA (133) In a semiconductor, it is observed that (3/4) th of the current is carried by electrons and (1/4) th by holes. If the drift speed of electrons is two times that of holes, the relation between electron and hole concentrations is List-II 1. Increases with temperature 2. Decreases with temperature 3. Remains constant as temperature is varied Codes: (A) Both A and R are true and R is the correct explanation of A (A) n = 1.5 p (B) n = 2 p (C) n = 3 p (D) p = 1.5n B & B AA (134) Find the conductivity of the n-type silicon, which is doped with N D =1017cm-3 . Assuming 50 percent of the donors are ionized at 3000 K . A B C D (A) 2 1 1 1 ( µ n (si)=1000,µ p (si)=350,µ n (Ge)=3500 (B) 1 2 1 3 and µ p (Ge)=1500 arein cm 2 /V-sec ) (C) 2 2 1 3 (D) 2 2 1 1 (A) 8(Ω-cm) -1 (B) 12(Ω-cm) -1 (C) 16(Ω-cm)-1 (D) 10(Ω-cm)-1 www.targate.org Page 17 Electronic Devices & Circuit B & B A20 m/sec (135) The current density of n-type germanium is 100 A/m2 and the resistivity of 0.5-m . If the mobility of electron is 0.4 m 2 / V sec . The drift velocity is _____ m/sec B & B AD (136) n-type devices are preferred over p-type devices because of the following reason. (A) Mobility of hole > Mobility of electron (B) Mobility of hole = Mobility of electron (C) For same doping n type materials give loss current than p type materials (D) For same doping n type materials give more current than p type materials B & B AA (137) In an extrinsic semiconductor if (A) The resistivity decreases (B) The temperature increases (C) The photo conductivity is low 1. The doping cocentration is low 2. The length of the semi-conductor is reduced Resistivity is negative 3. The band gap is high 4. Resistance decreases 5. The doping concentration is increased Codes: A (A) 5 B 4 C 3 (B) 4 3 5 (C) 5 1 2 (D) 5 2 3 (D) 4.63 1015 cm 3 and 4.86 108 cm 3 B & B AA (140) Determine the percentage of si atoms that contributes a conduction electron hole pair at 3000 K ,(given silicon concentration as 4.99 1022 atoms / cm3 , n i 1.48 1010 cm 3 ). Assume that a covalent bonded semiconductor contributes approximately one electron hole pair per atom to the current conduction process. (A) 0.297 10 10 (B) 3.367 1010 (C) 0.438 10 2 (D) 2.27 102 B & B AA (141) Assume that we have an infinity long n-type semiconductor bar at 3000 K with an electric field of 1000 V/cm in the positive Xdirection. At t = 0, electron-hole pairs are generated at x = 0 by a light pulse. At t = 1 sec , the charge concentration maximum is measured as a function of x, and it occurs at x p 0.5cm . The mobility (in cm 2 / V -sec) and diffusion constant (in cm 2 / sec) of holes respectiely are (A) 500, 13 (C) 250, 5 B & B AB (138) The current produced in a Ge sample of area 1cm 2 and length 0.3 mm when a potential difference of 2V is applied across it [Assume n i =2×1019 m-3 , n =m 2 /V-sec and p = 0.17m 2 /V-sec ] (A) 2 A (B) 1.11 A (C) 0.5 A (D) 100 mA B & B AC (139) Calculate majority and minority carrier concentrations to convert an intrinsic Silicion into an n-type silicon of resistivity of 10 ohm-cm. [ µ n = 1350 cm2 /V-sec, n i =1.5×1010cm -3 ] (A) 4.63×1015 cm -3 and 4.86×105 cm -3 (B) 4.63 1016 cm3 and 4.86 10 4 cm 3 Page 18 (C) 4.63 1014 cm 3 and 4.86 105 cm 3 (B) 1000, 50 (D) 350, 20 B & B AB (142) How many free electrons are there in a bar of extrinsic germanium measuring 4 mm 50 mm 1.5 mm if its intrinsic concentrations is 2.4 1019 per m3 and extrinsic hole density is 7.85 1014 per m3. Assume all donor atoms are ionized. (A) 2.201 1015 (B) 2.201 1017 (C) 6.875 1015 (D) 6.875 1017 Test AA (143) Consider a very lightly doped p-type semiconductor (i.e. p >> n is not valid), then using mass action law and electrical neutrality principle, which of the following equation is valid. (Assume only acceptor present in the material). impurities 1 N A N A2 4ni2 2 1 (B) n N N 4n 2 (A) p TARGATE EDUCATION GATE-(EC / EE) A 2 A 2 i are TOPIC 1 : Semiconductor Physics (C) increases at high values of electric field (E) & decreases at low values of E 1 N D N D2 4ni2 2 1 (D) n N N 4 n 2 (C) p D 2 D (D) increases at low values of electric field (E) & saturates at high value of E 2 i Test AC (144) Which of the following graph correctly represents the relationship between the concentration of minority carriers in an extrinsic semiconductor (Nm) and the doping concentration (Nd) under the thermal equilibrium situation. Test AB (147) Fermi level of a certain semiconductor satisfies certain conditions (i) As doping concentration increases it goes towards into valence band. (ii) As temperature increases it moves away valence band. What type of semiconductor it is (A) n-type (C) Intrinsic (A) (B) p-type (D) None A 3.09 cm 3 , 0.617 cm 3 (148) In a sample of GaAs at T = 200 K, we have experimentally determined that n0 5 p and that N a 0 . Calculate n0 , p0 . kT = 0.0259 at 300 K, N c 4.7 1019 , N v 7 1018 , Es 1.42eV (B) AC (149) Silicon at T = 300 K is uniformly doped with arsenic atoms at a concentration of 2 1016 cm 3 and boron atoms at a concentration of 1 1016 cm 3 . Determine the thermal equilibrium concentrations of majority and minority carriers. ni 1.5 1010 (C) (A) 0.324 1013 cm3 , 0.123 1013 cm3 (B) 0.324 1016 cm3 , 1.23 1016 cm3 (D) (C) 3.24 1013 cm3 , 1.23 1013 cm3 (D) 3.24 1014 cm3 , 1.24 1014 cm3 Test A32.00 to 35.00 (145) A silicon semiconductor bar is lightly doped with p-type impurities, it is given that, intrinsic carrier concentration (ni ) 1.5 Common Data Questions (for Next Three Questions) : In silicon at T = 300 K. we have experimentally found that n0 4.5 10 4 cm 3 and N d 5 1015 cm 3 . 1010 cm 3 , electron mobility (n ) 1500cm 2 Ans. p-type /V-sec and hole mobility ( p ) 300cm / (150) Is the material n type or p type? V-sec . If the conductivity of the bar is minimum, then the hole concentration i.e. p is ______ 109 cm 3 . Ans. 5 1015 cm 3 , 4.5 10 4 (151) Determine the majority and minority carrier concentrations. Test AD (146) The drift velocity of electrons in a semiconductor Ans. Acceptor, N A 10 cm , donor , N D 5 1015 cm 3 (152) What types and concentrations of impurity atoms exist in the material ? 2 (A) is independent of electric field (E) 16 3 (B) is proportional to electric field (E) for all values of E www.targate.org Page 19 Electronic Devices & Circuit Common Data Questions (for Next Two Questions) : A silicon crystal having a cross-sectional area of 0.001 cm 2 and a length of 10 3 cm connected at its ends to a 10-V battery. At T = 300 K, we want a current of 100 mA in the silicon. Ans. 100 (153) The required resistance R will be : Ans. 0.01( -cm) (154) The required conductivity will be : 13 1 N c 2 1019 (T / 300) 3/ 2 cm -3 N v 1 1019 (T / 300) 3/2 cm -3 Eg 1.10eV KT 0.026 eV q 1.6 10 19 Neamen AC (160) Calculate the electric current density at T = 300 K (A) 2.59A/cm2 3 Ans. 4.63 10 cm (155) To achieve this conductivity, the density of donor atoms to be added will be : (B) 3.11A/cm2 Ans. 1.13 1015 cm 3 (156) The concentration of acceptor atoms to be added to form a compensated p-type material with the conductivity given from Q.154 if the initial concentration of donor atom N d 1015 cm 3 . q 1.6 10 19 . (D) 3.90A/cm2 Common Data Questions (for Next Two Questions) : Three volt is applied across a 1-cm-long semiconductor bar. The average electron drift velocity is 10 4 cm/s . Ans. 3333cm2 / V-s (157) Find the electron mobility. Ans. 2.4 103 cm / s (158) If the electron mobility in Q.157 were 800 cm 2 /V-s , what is the average electron drift velocity ? (C) 1.60A/cm 2 Neamen AC (161) At what temperature will this current increase by 5% (Assume the mobilities are independent of temperature). (A) 300 K (B) 400 K (C) 456 K (D) 356 K ********** 1.3 Band Banding Common Data Questions (for Next Four Questions) Consider the equilibrium energy band diagram shown below. Neamen AD (159) In a particular semiconductor material, n 1000 cm 2 / V-s, p 600 cm 2 / V-s , and N C N V 1019 cm -3 . These parameters are independent of temperature. The measured conductivity of the intrinsic material is 10 6 ( -cm) 1 at T 300 K . Find the conductivity at T 500 K in 1 19 ( cm) ( q 1.6 10 ) (A) 0.581 103 (B) 5.81 10 1 (C) 5.81 102 (D) 5.81 103 Common Data Questions (for Next Two Questions) : Consider a semiconductor that is uniformly doped with N d 1014 cm 3 and N a 0 , with an applied electric field of E = 100 V/cm. Assume that n 1000 cm 2 N-s and p 0 . Also assume the following parameters : Page 20 A2 (162) What is the value of the effective electric field for electrons _____(in kV/cm) ? A2 (163) What is the effective electric field for holes ______(in kV/cm) ? A Left to right (164) The above energy level tilt was found for the p type of material, Indicates the applied electric filed applied on bar from (Left to right or Right to left) ……………? A No left is more positive (165) The above energy level tilt was found for the p type of material, Indicates applied potential will more positive at right and lesser in left side (yes/no)? TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics AYes (166) Tilt of the energy level does not depend on the type of the material but depends on the direction of the electric filed. (yes/no)? AD [GATE-EC-2014-IITKGP] (167) An N-type semiconductor having uniform doping is biased as shown in the figure. If EC is the lowest energy level of the conduction band, EV is the highest energy level of the valance band and E F is the Fermi level which one of the following represents the energy band diagram for the biased N-type semiconductor? (A) 4.4 102 (B) 2.2 102 (C) 0 (D) 2.2 10 2 ********** 1.5 GENERATION & REC. Uniform Generation Example 1. 3 16 An n-type silicon sample with N d 10 cm is 21 3 1 steadily illuminated such that g ' 10 cm -s . p 0 10 6 s If n 0 , calculate the position of the quasi-Fermi levels for electrons and holes with respect to the intrinsic level (assume that ni 1.5 1010 cm-3 ). Find the values of all the (A) energy levels. Sol. n-type, (B) n p g ' p 0 1021 106 1015 cm3 16 3 We have n0 10 cm 10 2 n 2 1.5 x10 p0 i n0 1016 (C) 2.25 x10 cm 4 3 Now n n E Fn EFi kT ln 0 ni (D) 1016 1015 (0.0259)ln 10 1.5 x10 or AC [GATE-EC-2015-IITK] (168) The energy band diagram and the electron density profile n(x) in a semiconductor are shown in figures. Assume that n(x) q x KT 10 e cm 3 , with 0.1V / cm and x expressed in cm. kT 0.026V , D n 36cm 2 s -1 and Given q 15 D KT . The electron current density (in µ q A/cm2 ) at x = 0 is : EFn EFi 0.3498 eV Example 2. Light is incident on a silicon sample starting at t = 0 and generating excess carriers uniformly throughout the silicon for t > 0. The generation rate is g ' 5 10"cm3s 1 . The silicon (T = 300 K) is n type with N d 5 1016 cm3 and N a 0 . Let n, 1.5 1010 cm-3 , 7 n 0 106 s , and 2 p 0 10 s . Also let n 1000cm /V-s and p 420cm 2 /V-s. Determine the conductivity of the silicon as a function of time for t 0 . www.targate.org Page 21 Electronic Devices & Circuit Sol. n-type, so that minority carriers are holes. Uniform generation throughout the sample means we have g ' p (p ) p0 t Homogeneous solution is of the form t p H A exp p0 and the particular solution is AA (170) The minority carrier life-time and diffusion constant in a semiconducting material are respectively 100 microsecond and 100 cm2 /s. The diffusion length of the carriers is (A) 3.162 cm (B) 0.01 cm (C) 0.0141 cm (D) 1 cm Common Data Questions (for Next Two Questions) : Consider a p-type silicon semiconductor at T = 300 K doped at N ,, 5 1015 cm 3 . (Assume ni 1.5 1010 /cm3 ) p p g ' p0 so that the total solution is Ans. (A) (171) Determine the position of the Fermi level with respect to the intrinsic Fermi level. (A) 0.3294 eV t p g ' p 0 A exp p0 At t 0 , p 0 so that (B) 0.5294eV 0 g ' p 0 A A g ' p0 (C) 0.0294 eV Then (D) 0.03294eV t p g ' p 0 1 exp p 0 AD (172) Excess carriers are generated such that the excess-carrier concentration is 10 percent of the thermal-equilibrium majority carrier concentration. Determine the quasi-Fermi levels with respect to the intrinsic Fermi level. (A) 0.2697 eV ,0.0318 eV The conductivity is en n0 e p p0 e n p (p ) e n n0 e n p p So (B) 0.2697 eV ,0.3318 eV 1.6 x1019 1000 5 x1016 1.6 x1019 1000 420 5 x1021 107 t 1 exp p 0 (C) 0.0318 eV ,0.2697 eV (D) 0.02697 eV ,0.0318 eV AD [GATE-EC-2014-IITKGP] (173) A thin p-silicon sample is uniformly illuminated with light which generates excess carriers. The recombination rate is directly proportional to Then t 8 0.114 1 exp p 0 (A) The minority carrier mobility (B) The minority carrier recombination lifetime 7 where p 0 10 s (C) The majority carrier concentration AD mass (169) An electron has effective * m n 0 .5 7 m 0 ( m 0 = rest mass of electron). (D) The excess minority carrier concentration (B) 1450cm2 / Vs AA [GATE-EC-2016-IISc] (174) Consider a silicon sample at T = 300 K, with a uniform donor density N d 5 1 0 16 c m 3 , illuminated uniformly such that the optical generation rate is Gopt 1.5 1020 cm 3 s 1 throughout the (C) 1800cm2 / Vs sample. The incident radiation is turned off at t = 0. Assume low-level injection to be If the mean time between two collisions in the material is 0.438 picoseconds, the mobility of material is (A) 1250cm2 / Vs (D) 1350cm2 / Vs Page 22 TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics valid and ignore surface effects. The carrier lifetimes are p0 0.1s and n 0 0.5 s . p 5 1013 cm3 , what will be the excess electron-hole recombination rate ? (A) 5 1029 cm 3s 1 (B) 5 1017 cm 3s 1 (C) 5 1019 cm 3s 1 The hole concentration at t = 0 and the hole concentration at t 0.3 s , respectively, are (A) 1 .5 1 0 13 cm 3 and 7.47 1011 cm 3 (B) 1 .5 1 0 13 cm 3 and 8.23 10 11 cm 3 (C) 7 .5 1 0 13 cm 3 and 3 .7 3 1 0 1 1 c m 3 13 (D) 7 .5 1 0 cm 3 11 and 4 .1 2 10 cm AA (176) Light shining on a p-type semiconductor causes a uniform generation of 10 21 electron-hole pairs per cm 3 , per second. If the mean carrier lifetime is 1 µs, the electron density in the semiconductor will be : (B) 1 0 2 1 / c m 3 (C) 10 6 / cm 3 (D) 10 9 / cm 3 AA [GATE-EC-1992-IITD] (177) A Semi conductor is irradiated with light such that Carriers are uniformly generated throughout its volume. The Semiconductor is n-type with ND = 1019/cm3. If the excess electron concentration in the steady state is n 1015 / cm 3 and if p10 sec., [minority carries life time] the generation rate due to irradiation 3 intrinsic concentration ni 1.5 10 cm the minority carrier hole lifetime is found to be p0 20s . AC (179) What will be the thermal-equilibrium hole recombination rate in this material ? (A) 2.25 109 cm 3s 1 (B) 5.0 10 20 cm 3s 1 (C) 1.125 109 cm 3s 1 (D) 8.88 1010 cm 3s 1 AD (180) What is the lifetime of the majority carrier electrons ? (A) 5.63 108 s (B) 4.45 106 s (C) 1.13 109 s (D) 8.89 106 s Common Data Questions (for Next Two Questions) In a silicon semiconductor material at T = 300 K, the doping concentrations are Nd 1015 cm3 and N a 0 . The equilibrium recombination rate is R p 0 1012 cm 3 s 1 . a uniform generation rate produces an excess-carrier concentration of n p 1014 cm3 . (A) is 10 20 e-h pairs/cm3/s (B) is 1024 e-h pairs/cm3/s A2.25 (181) The excess-carrier lifetime is _____ 107 s. (C) is 1010 e-h pairs/cm3/s (D) Cannot be determined us he given data is insufficient AC semiconductor in which n0 1015 cm3 and ni 1010 cm3 . Assume (178) Consider Common Data Questions (for Next Two Questions) At T = 300 K, an n-type silicon sample contains 16 3 a donor concentration Nd 10 cm and 10 3 A14 [GATE-EC-2015-IITK] (175) An n-type silicon sample is uniformly illuminated with light which generates 1020 electron hole pairs per cm3 per second. The minority carrier lifetime in the sample is 1s . In the steady state, the hole concentration in the sample is approximately 10x, where x is integer. The value of x is __________ (A) 1 0 1 5 / c m 3 (D) 5 107 cm 3s1 A4.44 (182) By _______ 10 9 factor does the total recombination rate decrease ? a Test AD (183) An n-type semiconductor has that the excess-carrier lifetime is 106 s. If the excess-hole concentration is www.targate.org n 7.847 1013 cm 3 , p 0.796 1013 cm 3 Page 23 Electronic Devices & Circuit Ans. (A) (188) Determine the number of electron-hole pairs that are generated per unit volume per unit time by the uniform absorption of 1 watt of n 3800cm2 /V-sec , p 1800 cm 2 /V-sec . Calculate its conductivity, if it acts as a photo surface in which 2 1013 EHP's/cm 3 generated on an average due to continuous illumination. 0 light at a wavelength of 6300 A . Assume each photon creates one electron-hole pair. ( C 3 108 m/sec ) (A) 0.056(-cm)-1 (B) 0.05(-cm) (A) 3.17 1019 e-h pairs/cm 3 -sec -1 (B) 3.17 1016 e-h pairs/cm 3 -sec (C) 0.62(-cm)-1 (C) 5.21 1016 e-h pairs/cm3 -sec (D) 0.068(-cm) -1 (D) 0.317 1019 e-h pairs/cm3 -sec Ans. (B) (184) Consider a semiconductor in which n0 1015 cm 3 and ni 1010 cm 3 , Assume that the excess-carrier lifetime is 106 s . Determine the electron-hole recombination rate if the excess-hole concentration is p 5 1013 cm -3 . 16 -3 -1 19 -3 -1 (A) 5 10 cm sec (B) 5 10 cm sec (A) 6.25 1013 /cm3 (B) 3.17 1012 /cm3 (C) 3.17 1014 /cm3 (D) 6.25 1012 /cm3 Ans. 2 1021 cm -3 /sec (190) An n-type gallium arsenide semiconductor is doped with Nd 1016 cm-3 and N u 0 . The (C) 0.4 1016 cm -3sec -1 (D) 0.4 1019 cm -3sec -1 Common Data Questions (for Next Two Questions) : A semiconductor, in thermal equilibrium, has a hole concentration of p0 1016 cm 3 and an intrinsic concentration of n , 1010 cm 3 . The minority carrier lifetime is p 0 2 10 7 s . Calculate the steady-state increase in conductivity and the steady-state excess carrier recombination rate if a uniform generation rate, g ' 2 1021 cm3 s 1 , is incident on the semiconductor. minority carrier lifetime is 2 107 s. Ans. 5×1010 cm -3sec-1 (185) Determine the thermal-equilibrium recombination rate of electrons. 18 -3 -1 Ans. 5×10 cm sec (186) Determine the change in the recombination rate of electrons if an excess electron concentration of n 1012 cm 13 exists. Ans. (D) (187) Determine the thermal equilibrium recombination rate for electrons and holes in this material. (A) 1.125×106 cm -3sec-1 ( n 8500cm 2 /V-sec, p 400 cm 2 /V-sec) Common Data Questions (for Next Two Questions) : In a silicon semiconductor material at T = 300 K, the doping concentrations are N d 1015 cm 3 and N a 0 . The equilibrium recombination rate is R p 0 1011 cm 3 -s 1 . A uniform generation rate produces an excess-carrier concentration of n p 1014 cm 3 . Ans. 4.44 109 (191) By what factor does the total recombination rate increase? (B) 0.125×109cm-3sec-1 (C) 0.125×106 cm -3sec-1 (D) 1.25×109 cm -3sec-1 Common Data Questions (for Next Two Questions) : A sample of semiconductor has a cross-sectional area of 1cm 2 and a thickness of 0.1 cm. Page 24 Ans. (C) (189) If the excess minority carrier lifetime is 10s . What is the steady-state excess carrier concentration? Ans. 2.25 107 sec (192) What is the excess-carrier lifetime? Non- uniform Generation AA [ESE-EC-2011] (193) Given that at room temperature, the volt equivalent of temperature V T 26 mV, TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics holes mobility p 500 cm2/Vs and the life time of holes is 130 ns, in a sample of ntype silicon bar that is exposed to radiation at one end at low-injection level, what is the diffusion length of holes? (A) 1300 microns (B) 100 Armstrong’s (C) 169 microns (D) 100 microns Common Data Questions (for Next Two Questions) Consider a bar of p-type silicon material that is homogeneously doped to a value of 3 1015 cm 3 at T = 300 K. The applied electric field is zero. A light source is incident on the end of the semiconductor as shown in figure. x (C) 3.11exp Ln x (D) 4.05exp Ln AB (196) For a particular semiconductor sample consider following parameters : Hole concentration x L p0 1015 e p cm 3 , x 0 Electron concentration x L n0 5 1014 e n cm 3 , x 0 Hole diffusion coefficients Dp 10cm2 /s Electron diffusion coefficients D n 2 5 c m 2 /s 4 Hole diffusion length Lp 5 10 cm The excess-carrier concentration generated at x = 13 3 0 is p(0) n(0) 10 cm . Assume the following parameters (neglect surface effects): n 1200cm2 / V s n0 5 107 s p 400cm 2 / V s p 0 1 10 7 s AD (194) The steady-state excess electron concentration at any distance x into the semiconductor is : L (A) 1013 exp n x L (B) 1013 exp n x Electron diffusion length L n 10 3 cm The total current density at x0 is (A) 1.2A/cm2 2 (B) 5.2A/cm (C) 3.8A/cm2 (D) 2A/cm2 A15.9-16.1 [GATE-EC-2017-IITR] (197) As shown, a uniformly doped Silicon (Si) bar of length L = 0.1 m with a donor 16 3 concentration ND 10 cm is illuminated at x = 0 such that electron and hole pairs are generated at the rate of x G L G L0 1 ,0 X L, L 17 3 1 where GL0 10 cm s . Hole lifetime is 19 10 4 s , electronic charge q 1.6 10 C , hole diffusion coefficient steady state across hole concentration that goes to 0 at x = L, the magnitude of the diffusion current density at x = L/2, in A/ cm 2 , is ______. x (C) 10 13 exp Ln x (D) 1013 exp Ln AA (195) The electron diffusion current density (in mA/cm2) at a distance x in the semiconductor will be x (A) 12.6exp Ln L (B) 12.6exp n x Ans. 0.934 A/cm 2 (198) In a p-type silicon semiconductor, excess carriers are being generated at the end of the semiconductor bar at x 0 as shown in Figure. The doping concentration is N , 5 1016 cm3 and N d 0 . The steady- www.targate.org Page 25 Electronic Devices & Circuit state excess-carrier concentration at x 0 is 1015 cm3 . (Neglect surface effects.) The applied electric field is zero. Assume that n 0 p 0 8 107 s . Calculate n , and the electron and hole diffusion current densities at x 0 . ( kT / q 26 mV ,1.6 10 19 C ) 1.4 Fermi Example 1. Common Data Questions (for Next Three Questions) : The Fermi energy level for a particular material at T = 300 K is 6.25 eV. The electrons in this material follow the Fermi-Dirac distribution function. (Assume KT 0.0259 eV ) Sol. Find the probability of an energy level at 6.50 eV being occupied by an electron. Ev 6.25 eV , T 300 K , At E 650 eV f (E) 1 6.43x10 5 6.50 6.25 1 exp 0.0259 or 6.43 x101% Q. Sol. Find the probability of an energy level at 6.50 eV being occupied by an electron. If the temperature is increased to T = 950 K. (Assume that EF is a constant.) 950 T 950 K kT (0.0259) 300 or kT 0.0820 eV Then 1 f (E) 0.0453 6.50 6.25 1 exp 0.0820 or Q. 4.53% 0.30 0.30 ln(99) kT 0.06529 kT ln(99) G & B AA (199) Calculate the probability that a state in the conduction band is occupied by an electron and calculate the thermal equilibrium electron concentration in silicon at T = 300 K. Assume the Fermi energy is 0.25 eV below the conduction band. The value of N c for silicon at T = 300 K is N c 2.8 1019 cm 3 . (A) 6.43 105 (B) 1.43 10 5 (C) 6.43 103 (D) 1.43 10 3 AB [ESE-EC-2006] (200) Match List-I(Material) with List-II (Energy Level) and select the correct answer using the code given below the lists: List-I A p-type semiconductor at 0K 1 0.99 0.30 1 exp kT Then 1 0.30 1 exp 0.99 1.0101 kT B Intrinsic semiconductor at 0 K temperature C n-type semiconductor at room temperature 2 D p-type semiconductor at room temperature 4 3 List-II Donor energy level is closed to the conduction band Acceptor energy level is closed to the valence band Fermi-level is very closed to valence band Fermi-level is halfway between the valence band and the conduction band (A) (B) (C) (D) A 1 B 2 C 3 D 4 3 4 1 2 1 3 4 2 3 1 2 4 AD[ESE-EC-2005 & 2008] (201) Match List-I (Type of conductor) with ListII (Position of Fermi Level) and select the correct answer using the code given below the lists: Which can be written as Page 26 1 Codes : Calculate the temperature at which there is a 1 percent probability that a state 0.30 eV below the Fermi level will be empty of an electron. Assume KT = 0.0259 eV. Sol. 1 0.01 Then So T 756 K ********** Q. 1 0.30 exp 0.0101 99 kT TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics List-I List-II A n-type semiconductor 1 Middle of band gap B p-type semiconductor 2 Above conduction band C Degenerate n-type 3 Near but below conduction band D Intrinsic semiconductor 4 Near but above valance band AA (204) The Fermi level in an n-type material is expressed as : Nc nn (A) Ec kT ln Nc nn (B) Ec kT ln Nc nn (C) Ev kT ln Nc nn (D) Ev kT ln Codes : (A) A 1 B 2 C 3 D 4 (B) 3 4 1 2 (C) 1 4 3 2 (D) 3 4 2 1 AC (205) Two semiconductor material (A) and (B) are connected to form a diode like structure. EFA and EFB are respective Fermi levels of these materials after joining them. For the diode to be in equilibrium, we must have AB [ESE-EC-2012] (202) Given : (A) EFA > EFB N(E) : Density of states (B) EFA < EFB F(E) : Probability that a quantum state with energy E is occupied by an electron (C) EFA = EFB Ec (D) EFA – EFB = constant : Energy level of conduction band The expression N ( E ) f ( E )dE gives EC (A) minimum number of electrons in conduction band (B) concentration of electrons in conduction band D [GATE-EC-2020-IITD] (206) A single crystal intrinsic semiconductor is at a temperature of 300 K with effective density of states for holes twice that of electrons. The thermal voltage is 26 mV. The intrinsic Fermi level is shifted from mid-bandgap energy level by (C) energy of electron (A) 18.02 meV (B) 26.90 meV (D) conductivity of electrons in conduction band (C) 13.45 meV (D) 9.01 meV AD (203) Consider the following statements for an ntype semiconductor: 1. EF lies below ED at a room temperature AB [GATE-EC-1987-IITB] (207) Consider two energy levels: E1 ,E ev above the Fermi level and E2, E ev below the Fermi level. P1 and P2 are respectively the Probabilities of E1 being occupied by an electrons and E2 being empty .Then (T) (A) P1 > P2 2. EF lies above ED as T 0 (B) P1 = P2 3. EF = ED at some intermediate (C) P1 < P2 (D) P1 and P2 depend on number of free electrons temperature 4. EF is invariant with temperature Where EF is Fermi energy and ED is donor lever energy. (A) 1 and 2 (B) 2 and 3 (C) 4 only (D) 1, 2 and 3 AC [GATE-EC-1995-IITK] (208) The probability that an electron in a metal occupies the Fermi level at any temperature (>00K). (A) 0 (B) 1 (C) 0.5 (D) 0.1 www.targate.org Page 27 Electronic Devices & Circuit AC (209) In the Fermi-Dirac statistics, the probability of electron occupation of an energy level equal to the Fermi level is (A) 0 (B) 0.25 (C) 0.5 (D) 1.0 AA [GATE-EC-2016-IISc] (210) A small percentage of impurity is added to an intrinsic semiconductor at 300 K. Which one of the following statements is true for the energy band diagram shown in the following figure? (A) 0.367 eV (C) 0.585 eV AA (214) A silicon semiconductor sample at T = 300 K is doped with phosphorus atoms at a concentrations of 1015 cm 3 . The position of the Fermi level with respect to the intrinsic Fermi level is (A) 0.3 eV (B) 0.2 eV (C) 0.1 eV (D) 0.4 Ev AC [GATE-EC-2008-IISC] (215) Silicon is doped with boron to a concentration of 4 1 0 1 7 atoms/cm3. Assume the intrinsic carrier concentration of silicon to be 1.5 10 10 /cm3 and the value of KT q (A) Intrinsic semiconductor doped with pentavalent atoms to form n-type semiconductor (B) Intrinsic semiconductor doped with trivalent atoms to form n-type semiconductor (C) Intrinsic semiconductor doped with pentavalent atoms to form p-type semiconductor (D) Intrinsic semiconductor doped with trivalent atoms to form p-type semiconductor AB (211) For the intrinsic semiconductor with energy gap of 0.7 eV, determine the position of Fermi-level at 300 K if m p 6me (A) 0.35 eV (B) 0.385 eV (C) 0.375 eV (D) 0.405 eV AB (212) In an n-type semiconductor, the Fermi level lies 0.3 eV below the conduction band at 300 K. If the temperature is increased to 330 K, the new position of Fermi level is : (A) 0.03 eV (B) 0.33 eV (C) 0.3 eV (D) 0.13 eV AA (213) In a p-type semiconductor, the Fermi-level lies 0.4 eV above the valance band. If the concentration of acceptor atom is tripled, the new position of Fermi level is: (Assume kT = 0.03 eV) Page 28 (B) 0.485 eV (D) 0.6 eV to be 25 mv at 300K. Compared to undoped silicon, the fermi level of doped silicon. (A) Goes down by 0.13 ev (B) Goes up by 0.13 ev (C) Goes down by 0.427 ev (D) Goes up by 0.427 ev AB (216) A p type Si material has been doped with acceptor impurity concentration N A 1016 cm 3 and light falling on the material produces excess carriers n 10 9 cm 3 . If intrinsic concentration 10 3 is ni 1.5 10 cm , the separation between quasi Fermi levels is (A) 0.72eV (B) 0.41eV (C) 0.28eV (D) 0.34Ev AB[ESE-EC-2014] (217) In degenerately doped n-type semiconducter, the Fermi level lies in conduction band when (A) concentration of electrons in the conduction band exceeds the density of states in the valence band. (B) concentration of electrons in the valence band exceeds the density of states in the conduction field. (C) concentration of electrons in the conduction band exceeds the product of the density of states in the valence band conduction band. (D) None of the above AB[ESE-EC-2014] (218) Statement (I): When a small additional energy, usually thermal, the valence electrons in germenium can become free electrons. TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics Statement (II): The valence electrons in germenium are in the fourth orbit and are at high energy level. as compared to germanium devices ( 850 C to 100 0 C ) .With respect to this, which of the following are incorrect? (A) Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I). 1. Higher resistivity of silicon 2. Higher gap energy of silicon 3. Lower intrinsic concentration of silicon 4. Use of silicon devices in high-power applications (B) Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I). (C) Statement (I) is true but Statement (II) is false. (D) Statement (I) is false but Statement (II) is true. AD[ESE-EC-2015] (219) The energy gap in the energy band structure of a material is 9eV at room temperature. The material is : (A) Semiconductor (B) Conductor (C) Metal (D) Insulator AB[ESE-EC-2016] (220) Which one of the following statements is correct? (A) For insulators the band-gap is narrow as compared to semiconductors (B) For insulators the band-gap is relatively wide whereas for semiconductors it is narrow (C) The band-gap is narrow in width for both the insulators and conductors (D) The band-gap is equally wide for both conductors and semiconductors AC[ESE-EC-2014] (221) The position of the intrinsic Fermi level of an undoped semiconductor ( EFi ) is given by EC EV kT NV (A) ln 2 2 NC (B) EC EV kT NV ln 2 2 NC (C) EC EV kT NV ln 2 2 NC (D) EC EV kT NV ln 2 2 NC AB[ESE-EC-2018] (222) Silicon devices can be employed for a higher temperature limit ( 190 0 C to 2000 C ) Select the correct answer using the code given below: (A) 1, 2 and 4 (B) 1, 2 and 3 (C) 1, 3 and 4 (D) 2, 3 and 4 AA[ESE-EE-2010] (223) Assertion (A) : The energy band diagram of a real semiconductor can not be represented by flat conduntion and valence bands. Reason (R) : The presence of energy states in the forbidden energy gap results in carrier trapping, giving rise to finite curvature in the bands. (A) Both A and R are true and R is the correct explanation of A (B) Both A and R are true but R is not the correct explanation of A (C) A is true but R is false (D) A is false but R is true B & B AC (224) Given Donor concentration as 2.63×1019 cm-3 in silicon sample, then the temperature at which Fermi level coincides with edge of conduction band is [Assume m n = m ] (A) 3100C (B) 100 K (C) 3100 K (D) 3000 K Test A1.27 to 1.35 (225) Two semiconductor materials have same properties except that material A has a bandgap of 1 eV and material B has bandgap of K eV. If the ratio of intrinsic carrier concentration of material A to material B is 500 at a constant temperature, then the bandgap of material B, i.e. K is __________ eV. (Assume kT = 25 meV) Test AB (226) In silicon, at temperature (T), the intrinsic carrier concentration at thermal equilibrium is (ni). Which of the following figures depict the correct relationship between T and ni ? www.targate.org Page 29 Electronic Devices & Circuit Ans. A (232) Consider the energy levels shown in below figure. Let T = 300 K. (a) If E1 EF 0.30eV , determine the probability that an energy state at E E1 is occupied by an electron and the probability that an energy state at E E2 is empty. (A) (B) (C) (A) 1.78 1014 (B) 1.78 1019 (C) 78.1 1019 (D) 7.81 1019 Ans. D (233) Calculate the temperature at which there is a 10% probability that an energy state 0.55 eV above the Fermi energy level is occupied by an electron. (D) (A) 641 K (B) 441 K (C) 614 K (D) 461 K Ans. C (234) The carrier effective masses in a semiconductor are mn* 0.62 m0 and m*p Test AB (227) Which of the following is valid for a intrinsic semiconductor at room temperature. Given m n 3m p . (A) Fermi level lies at the center of Forbidden band (B) Fermi level lies at below the center of Forbidden band (C) Fermi level lies at above the center of Forbidden band (D) Fermi level lies in conduction band Ans. 0.259 (228) If EF EC . Find the probability of a state being occupied at E EC kT . 1.4n . Determine the position of the intrinsic Fermi level with respect to the center of the bandgap at T 300 K . Assume kT = 0.0259 eV (A) 0.0758eV (B) 0.0258eV (C) 0.0158eV (D) 0.158eV Common Data Questions (for Next Two Questions) : The electron concentration in silicon at T = 300 K is n0 5 10 4 cm -3 , Ans. B (235) Determine p0 . Is this n- or p-type material? (A) 4.5 10 20 cm 3 , p-type Ans. 0.259 (229) If EF Ev , find the probability of a state being empty at E Ev kT . (B) 4.5 1015 cm 3 , p-type Ans. 0.259 (230) Determine the probability that an energy level is occupied by an electron if the state is above the Fermi level by kT. (D) 4.5 10 6 cm 3 , p-type Ans. 0.259 (231) Determine the probability that an energy level is empty of an electron if the state is below the Fermi level by kT. Page 30 (C) 5.4 10 6 cm 3 , n-type Ans. A (236) Determine the position of the Fermi level with respect to the intrinsic Fermi level, ni 1.5 1010 cm -3 , kT = 0.0259 eV. (A) 0.03266 (B) 0.08266 (C) 0.3266 (D) 0.30266 TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics Common Data Questions (for Next Three Questions) : For a particular semiconductor, E g 1.50eV. m*p 10 mn* , T 300 K , and 1.6 Diffusion ni I 10 5 cm 3 . kT 0.0259 eV ( x / L p )cm -3 for x0 and the electron concentration is given by Example 1. The hole concentration is given by p 1015 exp Ans. A (237) Determine the position of the intrinsic Fermi energy level with respect to the center of the bandgap. (A) 0.0447 eV (B) 0.447 eV (C) 0.7949 eV (D) 0.3487 eV Ans. D (238) Impurity atoms are added so that the Fermi energy level is 0.45 eV below the center of the bandgap (i) Are acceptor atom or donor atoms added? (ii) What is the concentration of impurity atoms added in cm3 ? 5 1014 exp -3 ( x / Lp )cm for x 0 . The values of Ln and Lp are 5 104 cm and 10 3 cm, respectively. The hole and electron diffusion coefficients are 10 cm 2 /s and 25 cm 2 /s , respectively. The total current density is defined as the sum of the hole diffusion current density at x = 0 and the electron diffusion current density at x 0 . Calculate the total current density. ( q 1.6 1019 C ) Sol. J p ( x 0) eD p (A) p-type, 9.71 1010 eDp (B) n-type, 9.71 1010 dp x0 dx 1.6 x1019 10 1015 1015 ( Lp ) 5 x10 4 Or (C) n-type, 1.79 1010 J p ( x 0) 3.2 A / cm 2 (D) p-type, 1.97 1013 Now (239) Silicon at T = 300 K contains acceptor atoms at a concentration of N a 5 1015 cm 3 . Donor atoms are added forming an n-type compensated semiconductor such that the Fermi level is 0.215 eV below the conduction band edge. What concentration of donor atoms are added ? N c 2.8 1019 . Common Data Questions (for Next Two Questions) : Consider an n-type gallium arsenide semiconductor at T = 300 K doped at N d 5 1016 cm3 . ( ni 1.8 106 /cm 3 ) Ans. 0.6228 eV ,0.0025 eV (240) Determine E Fn E F if the excess-carrier concentration is 0.1 N d . Ans. 0.5632 eV ********** dn |x 0 dx 5 x1014 eDn Ln 1.6 x10 25 5 x10 19 14 103 Or Ans. 1.2 1016 cm 3 (241) Determine EFi EFp . J n ( x 0) eDn J n ( x 0) 2 A / cm 2 Then J J p ( x 0) J n ( x 0) 3.2 2 Or J 5.2 A / cm 2 AC (242) Excess carriers are generated in a sample of N-type semiconductors by shining light at one end. Note: Already potential difference is applied to the two ends of the bar then the net current flow in the sample will be made up of (A) Diffusion flow of carriers (B) Drift flow of carriers (C) Both diffusion and drift flow of carriers (D) Neither diffusion nor drift flow of carriers www.targate.org Page 31 Electronic Devices & Circuit AD (243) Match List - I with List - II and select the correct answer using the codes given below the lists : List - I A. Drift current AB [ESE-EC-2009] (245) Diffusion current of holes in a semiconductor is proportional to (with p = concentration of holes/unit volume) (A) dp dx2 (B) dp dx (C) dp dt (D) d2 p dx2 B. Einstein's equation C. Diffusion current D. Continuity equation List - II 1. Law of conservation of charge 2. Electric field 3. Thermal voltage 4. Concentration gradient (A) Diffusion flow of carriers Codes: (B) Drift flow of carriers (A) A 2 B 1 C 4 D 3 (B) 4 3 2 1 (C) (D) 4 2 1 3 2 4 3 1 AB (244) Match List-I (Equation) with List-II (relation between/description) and select the correct answer using the codes given below the lists: List – I (Equation) A. Continuity B. Einstein’s equation C. Poisson’s equation D. Diffusion equation List – II (Relation between/description) 1. Relates diffusion constant with mobility 2. Relates charge density with electric field 3. Relates flow with rate of change of concentration in space 4. Rate of change of minority carrier density with time Codes: A B C D (A) 4 1 3 2 (B) 4 1 2 3 (C) 1 4 2 3 (D) 1 4 3 2 Page 32 AA (246) Excess carriers are generated in a sample of N-type semiconductor by shinning light at one end. The current flow in the sample will be made up of (C) Both diffusion and drift flow of carriers (D) neither diffusion nor drift flow of carries AD (247) The diffusion of both electrons and holes occurs in a semiconductor (with q = charge of electron/hole; D n , D p diffusion n p , x x gradient for electrons/holes) What is the total diffusion current (Jdiff )? constant for electrons/ holes; (A) qDn n p qDp x x (B) qDn n p qDp x x x x (C) qDn n p qDp x x x x (D) qDn n p qDp x x AA[GATE-EC-2006-IITKGP] (248) Under low level injection assumption, the injected minority carrier current for an extrinsic semiconductor is essentially the (A) diffusion current (B) drift current (C) recombination current (D) induced current AA (249) Assuming that the electron mobility in intrinsic silicon is 1500 cm 2 / V s at room temperature (T=300 K) and the corresponding ‘volt equivalent of temperature’ VT 25.9 mV , what is the TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics approximate value of the electron diffusion constant? (A) 38.85 cm 2 / s (B) 4 cm 2 / s (C) 400 cm 2 / s (D) 4000 cm 2 / s 12.9to13.1 [GATE-EC-2014-IITKGP] (250) At T = 300 k, the hole mobility of a semiconductor kT p 500 cm 2 / V S and 26 mV . q The hole diffusion constant DP in cm2 / s is_. AD [ESE-EC-2011] (251) The diffusion constant for holes in silicon is 13 cm 2 / s . What is the diffusion current if the gradient of the hole concentration dP 2 1014 holes per cm 3 per cm? dX (A) 0.416 mA (B) 3.2 10 5 A (C) 32 A (D) 0.416 mA AA (255) The electron concentration in a sample of Ge at 3000 K vary linearly from 1017 /cm 3 at x = 0 to 6 1016 /cm 3 at x 2 m . Find the current density in the Ge bar. Assume n type sample. (A) –3136 A/cm2 (B) 3136 A/cm2 (C) 2136 A/cm2 (D) – 2136 A/cm2 AD [GATE-EC-1997-IITM] (256) The electron concentration in a sample of uniformly doped n-type silicon at 300 K varies linearly from 1 0 17 / cm 3 at x = 0 to 6 10 16 / cm 3 at x = 2 m Assume a situation that electrons are supplied to keep this concentration gradient constant with time. If electronic charge is 1 .6 1 0 1 9 coulomb and the diffusion constant Dn 35cm2 / s, the current density in the silicon, if no electric field is present, is : (B) 112 A/cm 2 (A) Zero A3990-4010[GATE-EC-2014-IITKGP] (252) Assume electronic charge q = 1.6 10 19 C , kT/q = 25 mV and electron mobility n 1000cm 2 / V-s . If the concentration gradient of electrons injected into a p-type silicon sample is 1 10 2 1 cm 4 , the magnitude of electron diffusion current density (in A/cm2) is : AA (257) Holes are being steadily injected into a region of n-type silicon. In the steady state, the excess-hole concentration profile shown in below figure is established in the n-type silicon region. Here "excess" means over and above the concentration pn0 . If A15.8-16.2 (253) The hole concentration in p - type GaAs is given by ni 1.5 1010 / cm 3 and W 5m , find the density of the current that will flow in the x direction. (C) +1120 A/cm 2 (D) 1120A / cm2 N D 10 19 / cm 3 , x p 1016 1 cm 3 L for 0 x L where L 1 0 m . The hole diffusion coefficient is 10cm2/s. The hole diffusion current density at x 5m is (A) 8.64 10 18 A/cm 2 ________A/cm 2 . AB electron (254) In a silicon sample the concentration drops linearly from 1018 cm 3 to 1016 cm 3 over a length of 2.0 m . The current density due to the electron diffusion current is Dn 35 cm 2 /s . (A) 9.3 10 4 A/cm 2 (B) 2.8 10 4 A/cm 2 (B) 6.64 10 18 A/cm 2 (C) 4.6 4 10 18 A/cm 2 (D) 4.64 10 16 A/cm 2 A0.23-0.27 (258) Consider a sample of silicon at T = 300K. Assume that the electron concentration (n) varies linearly with distance (x) as shown in Figure. (C) 9.3 10 9 A/cm 2 (D) 2.8 109 A/cm 2 www.targate.org Page 33 Electronic Devices & Circuit Select the correct answer using the codes given below: (A) 1 and 2 (B) 1 and 3 (C) 1 and 4 (D) 3 and 4 A1.1 to 1.25 [GATE-EC-2016-IISc] (261) The figure below shows the doping distribution in a p-type semiconductor in log scale. The diffusion current density is found to be J n 0.19 A/cm 2 . If the electron diffusion coefficient is Dn 25 cm 2 /s , what is the electron concentration at x = 0 is ______ 1014 cm 3 ? A2.4-2.6 (259) In a sample of silicon at T = 300 K, the electron concentration varies linearly with distance, as shown in below figure. The diffusion current density is found to be J n 0 .19 A/cm 2 . If the electron diffusion coefficient is Dn 25cm2 / s . The electron concentration at x = 0 is _____ 10 13 cm 3 : AD [ESE-EC-2002] (260) Consider two samples of silicon semiconductor identical in all respects except that one is uniformly doped with 1015 cm3 donor impurity atoms (sample A) and the other is non-uniformly doped with donors for open side such that N d ( x ) N 0 e ax (sample B). Let a = 1 (hm) 1 and N0 = 1 01 7 Consider the following sample B. 1. Sample A will not have any current at equilibrium but current will flow out of sample B 2. Both samples will have built-in electric – field 3. Sample A will have zero built-in electric field whereas sample B will have a constant built-in electric field 4. No current will flow at equilibrium from either sample A or sample B. Page 34 The magnitude of the electric field (in kV/cm) in the semiconductor due to non uniform doping is ______ . AA (262) The concentration of holes in a semiconductor is as shown in figure. It linearly decreases from x = 0 to x = w. If the bar is kept in thermal equilibrium condition. The potential developed between the points x (0) and x ( w ) .if the ratio of the concentrations at x 0 and x wis 10 3. Assume room temperature of 27 0 C . (A) 179.6 mV (B) 431 mV (C) 12.4 mV (D) None of these Common Data Questions (for Next Two Questions) Consider a semiconductor in thermal equilibrium (no current). Assume that the donor concenntration varies exponentially as N d ( x) N d 0 exp( x) over range the range 0 x 1 / ; where N d 0 is a constant : AA (263) Electric field in the range 0 x 1/ will be (A) independent of x (B) linearly dependent on x (C) zero (D) none of these TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics AC (264) The potential difference between x = 0 and x = 1/ will be kT (A) 2 e kT (B) e kT (C) e (D) (A) 0.25 1014 cm 3 (B) 1.25 1016 cm 3 (C) 1.25 1017 cm3 (D) 0.25 1016 cm 3 1 kT e Statement For Linked Answer Questions for Next Two Questions : A 5m long block of p-type Si has an acceptor 4x doping profile given by N A ( x) 1014 1015 e10 , where x is measured in cm. The material must have a nonzero internal electric field E in thermal equilibrium. AD (265) The hole drift current density at x0 is : (A) 1.65A/cm 2 (B) 1.65A/cm 2 (C) 2 0 .8 A /cm 2 (D) 2 0 .8 A /cm 2 AC (266) The value of electric field E at x 5 m is : (A) –1.64 V/cm (B) 1.64 V/cm (C) –16.4 V/cm (D) 16.4 V/cm Test A79 to 81 (267) The minority carrier hole diffusion coefficient is Dp = 12 cm2/s and majority carrier electron diffusion coefficient is Dn = 48 cm2/s. If the sum of election and hole mobilities is 100 cm2/V-sec, then electron mobility is _________ (cm2 /V-sec). Ans. A (268) Consider a sample of silicon at T = 300 K. Assume that the electron concentration varies linearly with distance, as shown in Figure. The diffusion current density is found to the J n 0.19 A/cm 2 . If the electron diffusion coefficient is Dn 25 cm 2 /s , determine the electron concentration at x = 0. ( q 1.6 1019 C ). Ans. 18 mA (269) The electron concentration in silicon decreases linearly from 1016 cm 3 to 1015 cm 3 over a distance of 0.10 cm. The cross-sectional area of the sample is 0.05 cm2 . The electron diffusion coefficient is 25 cm 2 /s . Calculate the electron diffusion current. ( q 1.6 1019 C ). Ans. 25cm 2 /s (270) The electron concentration in a sample of ntype silicon varies linearly from 1017 cm 3 at x 0 to 1016 cm 3 at x 4m . There is no applied electric field. The electron current density is experimentally measured to be 400 A/cm 2 . What is the electron diffusion coefficient? q 1.6 1019 C . Ans. 16A / cm 2 (271) The hole concentration in p type GaAs is given by for p 1016 (1 x / L )cm -3 0 x L where L 10 m . The hole diffusion coefficient is 10 cm 2 /s . Calculate the hole diffusion current density at (a) x = 0, (b) x 5 m , and (c) x 10m . ( q 1.6 1019 C ). Common Data Questions (for Next Two Questions) : Assume that the mobility of a carrier at T = 300 K is 925 cm 2 /V-s . ( kT 0.0259 eV). Ans. 23.96cm2 /s (272) Calculate the carrier diffusion coefficient. Ans. 1093cm2 /V-s (273) Calculate the carrier mobility and the diffusion coefficient of a carrier at T = 300 K is D 28.3 cm 2 /s. ********** 1.7 Hall Effect B [GATE-IN-2020-IITD] (274) If I is the current flowing through a Hall effect sensor and B is the magnetic flux density perpendicular to the direction of the current (in the plane of the Hall effect sensor), the Hall voltage generated is ___ www.targate.org Page 35 Electronic Devices & Circuit (A) Directly, proportional to I and inversely proportional to B in a magnetic field B to develop Hall voltage VH is NOT proportional to (B) Directly proportional to both I and B (A) B (B) I (C) 1/ w (D) 1 / d (C) Inversely proportional to both I and B (D) Inversely proportional to I and directly proportional to B AA[GATE-EC-2006-IITKGP] (275) The majority carriers in an n-type semiconductor have an average drift velocity ‘V’ in a direction perpendicular to a uniform magnetic field ‘B’. The electric field ‘E’ induced due to Hall effect acts in the direction. (A) V B (B) B V (C) Along ‘V’ (D) Opposite to ‘V’ AA (276) Hall effect is observed in a specimen when it (metal or a semiconductor) is carrying current and is placed in a magnetic field. The resultant electric field inside the specimen will be in (A) a direction normal to both current and magnetic field (B) the direction of current (C) a direction anti parallel to magnetic field (D) an arbitrary direction depending upon the conductivity of the specimen AA (277) Which of the following can be determined by using a Hall crystal? 1. Concentration of holes in a p-type semiconductor. 2. Concentration of electrons in a n-type semiconductor. 3. Temperature of the set-up with any type of semiconductor. 4. Diffusion constant and life-time of minority carriers of any type of semiconductor. Select the correct answer by using the code given below: (A) Only 1 and 2 (B) 1, 2 and 4 (C) Only 3 and 4 (D) Only 2 and 4 AC (278) A semiconductor specimen of breadth d (through which external B field is applied), width w (through which hall voltage is calculated) and carrying current I is placed Page 36 AA (279) Measurement of Hall coefficient enables the determination of (A) Type of SC (N OF P Type) & mobility of charge carriers (B) Temprature around the setup (C) temperature coefficient and thermal conductivity (D) Fermi level and forbidden energy gap AC [ESE-EC-2009] (280) Which of the following quantities cannot be measured/determined using Hall effect (If operating temperature in known)? (A) Type of semiconductor (p or n) (B) Mobility of charge carriers (C) Diffusion constant (D) Carrier concentration AD (281) Which of the following statements related to the Hall effect? 1. A potential difference is developed across a current carrying metal strip when the strip is placed in a transverse magnetic field. 2. The Hall effect is very weak in metals but is large in semiconductors. 3. The Hall effect is very weak in semiconductors but is large in metals. 4. It is applied in the measurement of the magnetic field intensity (A) 1, 2 and 3 (B) 2 and 4 (C) 1, 3 and 4 (D) 1, 2 and 4 AB [ESE-EC-2002] (282) In an extrinsic semiconductor, the Hall coefficient RH (A) Increases with increase of temperature (B) Decreases with increase of temperature (C) Is independent of the change of temperature (D) Changes with the change of magnetic field AC[ESE-EC-2002] (283) Consider a semiconductor bar having square cross-section. Assume that holes drift in the positive x-direction and a magnetic field is applied perpendicular to the direction in which holes drift. The sample will show TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics (A) A negative resistance in positive ydirection (B) A positive voltage in positive ydirection (C) A negative voltage in positive ydirection (D) A magnetic field in positive y-direction B (284) (A) 1.14 ( -cm ) (B) 7.10 ( -cm ) (C) 0.88 ( -cm ) (D) 8.18 ( -cm ) AA (287) A silicon Hall device at T 300 K has the following geometry, : d 10 3 cm, 2 1 W 10 cm and L 10 cm . The following parameters are measured I x 0.75 mA , V x 15 V , V H 5 .8 m V and B z 1000 gauss = 10 1 tesla. Consider a semiconductor carrying current and placed in a transverse magnetic field B, as shown above. The measured potential across 1 and 2 surfaces is positive at 2. What is the type of material? (A) Intrinsic Si material (B) n-type semiconductor material (C) p-type semiconductor material The silicon hall device is : (D) No such conclusion can be drawn Common Data questions (for Next Two Questions) Consider a GaAs sample at T = 300 K. A Hall effect device has been fabricated with the following geometry: d = 0.01 cm, W = 0.05 cm and L = 0.5 cm. The electrical parameters are : 2 I x = 2.5 mA, V x = 2.2 V and B z 2 .5 1 0 tesla. The Hall voltage is V H 4 .5 m V . (A) p-type (B) n-type (C) intrinsic (D) can't be determined A 8.0-8.1 (288) A silicon Hall device at T 300 K has the geometry, : d 10 3 cm, 1 and The W 10 cm L 10 cm . following parameters are measured I x 0.75 mA , V x 15 V , V H 5.8 m V and B z 1000 gauss = 10 1 tesla. following 2 AD (285) The type and majority carrier concentration of the device will be respectively The majority carrier concentration will be ….. 1 01 5 cm 3 (A) p-type, p 1 .1 5 2 1 0 15 cm 3 (B) n-type, n 1.152 1015 cm 3 (C) p-type, p 8.68 1014 cm 3 (D) n-type, n 8.68 1014 cm3 AC (286) What will be the resistivity of the sampe ? AD (289) A silicon Hall device at T 300 K has the following geometry, : d 10 3 cm, 2 1 and The W 10 cm L 10 cm . following parameters are measured www.targate.org Page 37 Electronic Devices & Circuit I x 0.75 m A , V x 15 V , V H 5 .8 m V and B z 1000 gauss = 10 1 tesla. AC[ESE-EC-2015] (293) Statement (I): Hall voltage is given by VH RH I .H where I is the current, H is t the magnetic field strength, t is the thickness of prode and RH is the Hall constant. What will be the majority carrier mobility ? (A) 3127cm2 /V-s (B) 581cm 2 /V-s (C) 194 cm 2 /V-s (D) 387 cm2 /V-s AC (290) In an n-type semiconductor, n 1017 / cm 3 , and µn 1200 cm 2 / V s. If an electric field of 1000 V/cm is applied in the +x direction, and a magnetic field (B) of 10 4 Weber/cm2 is applied in the +y direction, then the electric field in the +z direction due to the Hall effect will be (A) 1000 V/cm (B) 10 V/cm (C) 120 V/cm (D) – 120 V/cm 4 A1.24-1.25 (291) The Hall constant in p-Si bar is given by 3 5 103 cm /Coulomb. The hole concentration in the bar is given by( ______ 1015 /cm 3 . AB [ESE-EC-2014] (292) The electrical conductivity and electron mobility for aluminium are 3.8 107 (ohm-m)-1 and 0.0012 m2 / V-s , respectvely. What is the Hall voltage for an aluminium specimen that is 15 mm wide for a current of 25 A and a magnetic field of 0.6 Tesla (imposed in a direction perpendicular to the current ) for the given value of Hall coefficient, RH as 3.16 1011 V-m/A- Tesla ? 8 Statement (II): Hall effect does not sense the carrier concentration. (A) Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I). (B) Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I). (C) Statement (I) is true but Statement (II) is false. (D) Statement (I) is false but Statement (II) is true AA[ESE-EC-2015] (294) For which one of the following materials, is the Hall coefficient closest to zero? (A) Metal (B) Insulator (C) Intrinsic semiconductor (D) Alloy AD[ESE-EC-2016] (295) The Hall-coefficient of a specimen of doped semiconductor is 3.06 10 4 m3C 1 and the resistivity of the specimen is 6.93 103 m . The majority carrier mobility will be (A) 0.014 m2 V 1s 1 (B) 0.024 m 2 V 1s 1 (C) 0.034 m2 V 1s 1 (D) 0.044 m 2 V 1s 1 AA[ESE-EC-2016] has Hall-coefficient of 3.68×10 4 m 3C 1 and then its carrier concentration value is (296) Doped silicon (A) 2.0×10 22 m 3 (B) 2.0×1022 m 3 (A) 316 10 V (C) 0.2×10 22 m3 (B) 3.16 10 8 V (D) 0.2×10 22 m 3 (C) 316 108 V 8 (D) 3.16 10 V Page 38 AC[ESE-EE-2006] (297) In a Hall effect experiment, a p-type semiconductor sample with hole TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics concentration p1 is used. The measured value of the Hall voltage is VH 1 , If the ptype sample is now replaced by another ptype sample with hole concentration p2 where p2 2 p1 , what is the new Hall voltage VH 2 ? (A) 2 VH 1 (C) (1 / 2) VH 1 (B) 4 VH 1 (D) (1 / 4) VH 1 B & B AD (298) The magnitude of induced hall voltage VH in the given Figure is (Given n-type Germanium bar with Test AA (301) The relationship among mobility ( ), conductivity ( ) and Hall coefficient (RH) is (A) RH (B) RH (C) RH (D) 2 RH Test AC (302) Which of the following statements is false for a specimen exhibiting Hall effect (RH means Hall coefficient). (A) RH is negative for metal (B) RH is negative for n-type semiconductor doping = 1.5×106 cm -3 , BZ =0.5wb/m 2 , (C) RH is zero for intrinsic semiconductor d y =4×10-3m , E x =700 v/m,µ n =0.38 m -2 /vsec, (D) RH is positive for p-type semiconductor -3 d y =4×10 m , E x =700 v/m,µ n -2 Test A1 to 1.12 (303) A semiconductor specimen is connected as shown in below figure and is exhibiting Hall effect. Given Hall co-efficient = 300m3 /coulomb , -3 =0.38 m /vsec,Wz =1×10 m ) Bz 0.1wb/m 2 Induced electric field = 32 V/m Lx 0.01m , VH 1.25V , Applied current density is ____ A/m 2 . (A) 133 mV (C) 532 V (B) 133 V (D) 532 mV B & B A 62.5 (299) A sample of Si is droped with 1.0 1017 phosphorous atoms/ cm3 . If the applied current is 1 mA and magnetic field strength is 10-5 Wb/cm 2 , the magnetude of Hall voltage in a sample of 100 m thick is ....... V . B & B AC (300) A Si sample is doped with Arsenic . Assume effective densities of states at edge of conduction band N C 8.85 1018 cm 3 & Ans. (B) (304) A sample of silicon is doped with 1016 baron atoms per cm’. The Hall sample has the same geometrical dimensions given in figure. The current is I, = 1 mA with Bz 350 gauss = 3.5 102 tesla. Determine (a) the Hall voltage and (b) the Hall held. ( q 1.6 1019 C ) KT=0.026 ( E C , E V are edges of conduction band, valence band respectively ). Find location of Fermi level (E F ) if doping concentration is 4.41 1014 cm 3 (A) E F conincides with E C (B) E F lies 0.257 eV above E C (C) E F lies 0.257 eV below E C (D) E F lies 0.257 eV below intrinsic Fermi level www.targate.org Page 39 Electronic Devices & Circuit (A) (B) (C) (D) Ans. 0.825mV 2.19 mV , 2.19V / cm 2.19 mV ,0.219V / cm 0.219 mV ,0.219V / cm 0.219 mV ,2.19V / cm (308) The Hall voltage Ans. n-type (309) The conductivity type Common Data Questions (for Next Three Questions) : Ans. 4.92 1015 cm 3 (310) The majority carrier concentration Germanium is doped with 5 1015 donor atoms per cm3 at T = 300 K. The dimensions of the Hall device are d 5 10 3 cm , W 2 10 2 cm , and Ans. 1020 cm 2 /V-sec (311) The majority carrier mobility L = 10 1 cm . The current is I, = 250 A , the applied voltage is V A 100 mV , and the magnetic flux density is Bz 500gauss = ********** 5 102 tesla. ( q 1.6 1019 C ) 1.8 Photonics / LED AC [ESE-EC-2009] (312) The minimum energy of a photon required for intrinsic excitation is equal to (A) Energy of bottom of conduction band (B) Energy of top of valence band (C) Forbidden gap energy (D) Fermi energy AA (313) Silicon is not suitable for fabrication of light-emitting diodes because it is : Ans. 0.3125mV (305) Calculate the Hall voltage. Ans. 1.56 10 2 V / cm (306) Calculate the Hall field Ans. 3125 cm2 /V-sec (307) Calculate the carrier mobility. Common Data Questions (for Next Four Questions) : Consider silicon at T = 300 K. A Hall effect device is fabricated with the following geometry : d = 5 10 2 cm , W 5 10 2 cm , and L = 0.50 cm. The electrical parameters measured are : I, = 0.50 mA, VA 1.25V , and Bz 650 gauss = 2 tesla. The 6.5 10 E H 16.5mV/cm . Determine. ( q 1.6 1019 C ) Hall field is (A) An indirect band gap semiconductor (B) A direct band gap semiconductor (C) A wide band gap semiconductor (D) None of the above AB [IES-EC-2012] (314) The efficiency of an LED for generating light is directly proportional to the (A) applied voltage (B) current injected (C) temperature (D) level of doping AD [ESE-EC-2009] (315) Which one of the following is not LED material? (A) GaAs (B) GaP (C) SiC (D) SiO2 AA [ESE-EC-2010] (316) LED is a Page 40 (A) p-n diode (B) thermistor (C) gate (D) transistor TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics AD [ESE-EC-2003] (317) The light emitting diode (LED) emits light of a particular colour because (A) It is fabricated from a fluorescent material. (B) Transition between energy levels of the carriers takes place while crossing the p-n junction. (C) Heat generated in converted into light. the diode is (D) The band gap of the semi-conductor material used in the fabrication of the diode is equal to the energy hV of the light photon. AD[ESE-EC-2013] (318) The wavelength beyond which photo electric emission cannot take place is called. (A) Long wavelength (B) Optical wavelength (C) Photoelectric wavelength (D) Critical wavelength AA (319) Which one of the following is true with regard to photo emission? (A) Velocity of emitted photon is dependent on light intensity. (B) Rate of photo emission is inversely proportional to light intensity. (C) Maximum velocity of electrons increases with decresing wavelength. (D) Both electrons and holes are produced AA [GATE-EC-2003-IITM] (320) A particular green LED emits A1AA [GATE-EC-2004-IITD] (322) The longest wavelength that can be absorbed by silicon, which has the band gap of 1.12 eV, is 1.1 µm. If the longest wavelength that can be absorbed by another material is 0.87 µm. then the band gap of this material is: (A) 1.416 eV (B) 0.886 eV (C) 0.854 eV (D) 0.706 eV 1.12[GATE-EC-2014-IITKGP] (323) The cut-off wavelength (in m) of light that can be used for intrinsic excitation of a semiconductor material of bandgap E g 1.1eV is ____ . AC (324) Given that the band gap of cadmium sulphide is 2.296 eV, the maximum photon wave length for electron-hole pair generation will be (A) 5400 µm (B) 540 µm (C) 5400 A0 (D) 540 A0 AA [GATE-EC-2014-IITKGP] (325) At T = 300 K, the band gap and the intrinsic carrier concentration of GaAs are 1.42 eV and 106 cm 3 , respectively. In order to generate electron hole pairs in GaAs, which one of the wavelength ( λ C ) ranges of incident radiation, is most suitable? (Given that: Plank's constant is 6.62 10 34 J-s, velocity of light is 3 1 0 10 cm/s and charge of electron is 1.6 10 1 9 C ). (A) 0 .42 m < C 0.8 7 m (B) 0 .8 7 m < C 1 .42 m (C) 1.42 m < C 1.6 2 m (D) 1 .6 2 m < C 6 .6 2 m 0 light of wavelength 5490 A . The energy bandgap of semiconductor material used is (Plank’s constant = 6.626 x 10-34 J-S) AC [ESE-EC-2005] (326) Which one of the following is the correct relationship between the band gap of a material used in a photo detector and the energy of the incident photon? (A) 2.26 eV (B) 1.98 eV (C) 1.175 eV (D) 0.74 eV AC (321) The wave length of light emitted by a GaAS is 8670 10 10 m . Given plank's constant = 6.626 10 34 Joule-S. Velocity of light = 2.998 10 8 ms 1 and 1ev 1.602 10 19 Joule. The energy gap in GaAS is (A) 0.18 eV (B) 0.7 eV (C) 1.43 eV hc (A) E g λ hυ 2 (B) 3 l Eg (C) hv Eg (D) 1 hv E g 2 AA[ESE-EC-2013] (327) The light emitting diode (LED) shown in the above figure has a voltage drop of 2V. The current flowing through LED is (D) 2.39 eV www.targate.org Page 41 Electronic Devices & Circuit (A) 11.8 mA (B) 0.0147 mA (C) 2.941 (D) 0.0176 Ma AB [GATE-EC-2018-IITG] (328) Red (R), Green (G) and Blue (B) Light Emitting Diodes (LEDs) were fabricated using p-n junctions of three different inorganic semiconductors having different band-gaps. The builtin voltages of red, green and blue diodes are V R , V G and V B , respectively. Assume donor and acceptor doping to be the same ( N A and N D , respectively) in the p and n sides of all the three diodes. Which one of the following relationships about the built-in voltages is TRUE? (A) V R VG V B (B) VR VG VB (C) V R VG V B (D) V R VG V B Common Data Questions (for Next Two Questions) : The forbidden energy band of GaAs is 1.42 eV. Ans. (B) (329) Determine the minimum frequency of an incident photon that can interact with a valence electron and elevate the electron to the conduction band. (h 6.625 1034 J-s) (A) 2.1 1033 (B) 3.43 1014 (C) 3.43 1033 (D) 0.4 1014 Ans. (B) (330) What is the corresponding wavelength ? (A) 0.0875m (B) 0.875m (C) 8.75m (D) 87.5m ----000000---- Page 42 TARGATE EDUCATION GATE-(EC / EE) TOPIC 1 : Semiconductor Physics Answer : 211. 212. 213. 214. 215. 216. 217. 218. 219. 220. B A D B 221. 222. 223. 224. 225. 226. 227. 228. 229. 230. C A * * 231. 232. 233. 234. 235. 236. 237. 238. 239. 240. * D * * 241. 242. 243. 244. 245. 246. 247. 248. 249. 250. * D A * 251. 252. 253. 254. 255. 256. 257. 258. 259. 260. D * * D 261. 262. 263. 264. 265. 266. 267. 268. 269. 270. * A * * 271. 272. 273. 274. 275. 276. 277. 278. 279. 280. * * A C 281. 282. 283. 284. 285. 286. 287. 288. 289. 290. D C D C 291. 292. 293. 294. 295. 296. 297. 298. 299. 300. * C * C 301. 302. 303. 304. 305. 306. 307. 308. 309. 310. A * * * 311. 312. 313. 314. 315. 316. 317. 318. 319. 320. C A A A 321. 322. 323. 324. 325. 326. 327. 328. 329. 330. C A * B B A C B B B 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. A B D B B C D A D C 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. B A D A B C A D A C 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. CA C C A D D A B D C 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. A C D C C D B B C C 41. 42. 43. 44. 45. 46. 47. 48. 49. 50. D * B C B A B A A B 51. 52. 53. 54. 55. 56. 57. 58. 59. 60. A D B A B A B D D A 61. 62. 63. 64. 65. 66. 67. 68. 69. 70. A A C A A A B C A B 71. 72. 73. 74. 75. 76. 77. 78. 79. 80. C C * C C B B * D D 81. 82. 83. 84. 85. 86. 87. 88. 89. 90. B B A @ B B A A C B 91. 92. 93. 94. 95. 96. 97. 98. 99. 100. * C C D A B A D C 101. 102. 103. 104. 105. 106. 107. 108. 109. 110. A * D B 111. 112. 113. 114. 115. 116. 117. 118. 119. 120. B * B D 42. False 121. 122. 123. 124. 125. 126. 127. 128. 129. 130. 73. 225.2 C A B B 78. 2.4 to 2.6 131. 132. 133. 134. 135. 136. 137. 138. 139. 140. 91. 0.3 to 0.7 A A C A 102. 100 141. 142. 143. 144. 145. 146. 147. 148. 149. 150. 103. 32-35 A A C * 107. 0.520 151. 152. 153. 154. 155. 156. 157. 158. 159. 160. 108. 3.1 to 3.3 * * D C 113. 1.92 161. 162. 163. 164. 165. 166. 167. 168. 169. 170. 135. 20 m/sec C 2 D A 145. 32.00 to 35.00 171. 172. 173. 174. 175. 176. 177. 178. 179. 180. A D C D 148. 3.09 cm 3 , 0.617 cm 3 181. 182. 183. 184. 185. 186. 187. 188. 189. 190. 150. p-type * D C * 151. 5 1015 cm 3 , 4.5 10 4 191. 192. 193. 194. 195. 196. 197. 198. 199. 200. * A A B 152. 201. 202. 203. 204. 205. 206. 207. 208. 209. 210. Acceptor, N A 1016 cm 3 , donor , N D 5 1015 cm 3 D D A 153. 100 * B B D B * 2 D * * B B C C A C * * A B D A D D A * * * * 14 * A C C D B B D D * * A * B D * B D A B * D A D * B * A A B * * C C A * C C B A C * A * B B C A www.targate.org C C B B C B B A B B C * B B A D A D B * D A B A A D C A C A * A C B A D A * A A C * D A * D A * A C * D * D B B Page 43 Electronic Devices & Circuit 154. 0.01( -cm)1 272. 23.96cm2 /s 155. 4.63 1013 cm 3 273. 1093cm2 /V-s 156. 1.13 1015 cm 3 288. 8.0 to 8.1 157. 3333cm2 / V-s 291. 1.24 to 1.25 299. 62.5 158. 2.4 103 cm / s 303. 1 to 1.12 164. Left to right 305. 0.3125mV 165. No left is more positive 166. Yes 306. 1.56 10 2 V / cm 181. 2.25 307. 3125 cm 2 /V-sec 182. 4.44 308. 0.825mV 185. 5×1010 cm-3sec-1 309. n-type 186. 5×1018cm -3sec-1 310. 4.92 1015 cm 3 190. 2 10 21 cm -3 /sec 311. 1020 cm 2 /V-sec 191. 4.44 109 192. 2.25 107 sec 197. 15.9 to 16.1 198. 0.934 A/cm 2 225. 1.27 to 1.35 228. 0.259 229. 0.259 230. 0.259 231. 0.259 239. 1.2 1016 cm 3 240. 0.6228 eV ,0.0025 eV 241. 0.5632 eV 250. 12.9 to 13.1 252. 3990 to 4010 253. 15.8 to 16.2 258. 0.23 to 0.27 259. 2.4 to 2.6 261. 1.1 to 1.25 267. 79 to 81 269. 18 ma 270. 25cm2 /s 271. 16 A / cm 2 Page 44 TARGATE EDUCATION GATE-(EC / EE) 02 Theory of PN- Junction 1 4 16 16 1 4.14 x 10 1.04 x 10 Or xn 0.366 m 2.1 Depletion Layer Example 1. Consider the uniformly doped GaAs junction at T = 300 K. At zero bias, only 20 percent of the total space charge region is to be in the p region. The built-in potential barrier is Vbi 1.20 V . For zero bias, (a) N a , (b) N d , (c) xn (d) x p , and (e) E max . (d) x p 0.25 xn x p 0.0916 m (e) Emax Sol. (a) GaAs : Vbi 1.20V , ni 1.8 x10 cm 3 Or Emax 5.25 x10 4 V / cm Or xp 0.25 xn Also (1) xp xn 4 16 14 x p 0.2W 0.2 xn x p N d xn N a x p eN d xn eN a x p 1.6 x10 1.04 x10 0.366 x10 (13.1) 8.85 x10 19 6 1/ 2 Nd 0.25 Na AD The transition region in an open circuited pn junction contains (A) free electrons only (B) holes only Now (C) both free electrons and holes N N Vbi Vi ln a 2 d ni Or 0.25 N a2 1.20 0.0259 ln 2 ni (D) uncovered immobile impurity ions (2) Then 0.25 N a2 1.20 exp 2 ni 0.0259 Or 1.20 N a 2ni exp 2(0.0259) Or N a 4.14 x1016 cm 3 (3) (b) N d 0.25 N a N d 1.04 x1016 cm 3 1/2 2 Vbi N a 1 (c) xn e N d N a N d 2(13.1)(8.85 x10 14 )(1.20) 1.6 x10 19 www.targate.org AB [ESE-EC-2008] The depletion layer in a p-n junction is made of (A) Ionized donors in p-side and ionized acceptors in n-side (B) Ionized acceptors in p-side and ionized donors in n-side (C) Accumulated holes in p-side and accumulated electrons in n-side (D) None AC [ESE-EC-2008] The doping concentration on the n-side of a p-n junction diode is enhanced. Which one of the following will get affected? (A) Width of the depletion region on n-side (B) Width of the depletion region on p-side (C) Width of the depletion region on both sides (D) No change in width of depletion regions Page 45 Electronic Devices & Circuit (4) (5) B [GATE-EC-2020-IITD] Consider the recombination process via bulk traps in a forward biased pn homojunction diode. The maximum recombination rate is U max . If the electron and the hole capture cross-sections are equal, which one of the following is FALSE? (A) With all other parameters unchanged, U m ax decreases if the intrinsic carrier density is reduced. (B) U m ax occurs at the edges of the depletion region in the device. (C) With all other parameters unchanged, U m ax increases if the thermal velocity of the carriers increases. (D) U m ax depends exponentially on the applied bias. AC [GATE-EC-2007-IITK] In a p n junction diode under reverse bias, the magnitude of electric field is maximum at (A) the edge of the depletion region on the p-side (B) the edge of the depletion region on the n-side (C) the p+n junction (D) the centre of the depletion region on the n-side (9) AA [GATE-EC-2007-IITK] A p+n junction has built in potential of 0.8 V. The depletion layer width at a reverse bias of 1.2V is 2m. For a reverse bias of 7.2V, the depletion layer width will be : (A) 4 m (B) 4.9 m (C) 8 m (D) 12 m AA [ESE-EC-2008] (10) In a step-graded p-n junction diode, what is the ratio of depletion-region penetration depths into p and n regions (if the ratio of acceptor to donor impurity atoms densities is 1:2)? (A) 2 : 1 (B) 4 : 1 (C) 1 : 2 (D) 1 : 4 AC [GATE-EC-2015-IITK] (11) The electric field profile in the depletion region of a p-n junction in equilibrium is shown in the figure. Which one of the following statements is NOT TRUE? AB (6) The depletion layer across junction lies (A) mostly in the p region (B) mostly in the n region a p n (C) Equally in both the p and n regions (D) entirely in the p region (7) AB [GATE-EC-2004-IITD] In an abrupt p-n junction, the doping concentrations on the p-side and n-side are N A 9 1016 / cm3 and respectively. ND 11016 / cm3 The p-n junction is reverse biased and the total depletion width is 3 µm. The depletion width on the p-side is : (A) 2 .7 µ m (B) 0.3 µm (C) 2.25 µm (8) (D) 0.75 µm AA [GATE-EC-1990-IISC] In a uniformly doped abrupt p-n junction the doping level of the n-side is four (4) times the doping level of the p-side the ratio of the depletion layer width of n-side verses p-side is : (A) 0.25 (B) 0.5 (C) 1.0 (D) 2.0 Page 46 (A) The left side of the junction is n-type and the right side is p-type (B) Both the n-type and p-type adepletion regions are uniformly doped (C) The potential difference across the depletion region is 700 mV (D) If the p-type region has a doping concentration of 1015 cm-3 , then the doping concentration in the n-type region will be 1016 cm-3 AD [GATE-EC-2017-IITR] (12) An n - n Silicon device is fabricated with uniform and nondegenerate donor doping concentrations of ND1 11018 cm3 and ND2 11015 cm3 corresponding to the n and n regions respectively. At the operational temperature T, assume complete impurity ionization, kT/q = 25 mV, and intrinsic carrier 10 3 concentration to be ni 110 cm . What is the magnitude of the built-in potential of this device? (A) 0.748 V (C) 0.288 V TARGATE EDUCATION GATE-(EC / EE) (B) 0.460 V (D) 0.173 V TOPIC 2 : Theory Of PN Junction S4AD [GATE-EC-2016-IISc] (13) Consider the charge profile shown in the figure. The resultant potential distribution is best described by (B) (C) (A) (D) (B) A30to32 [GATE-EC-2014-IITKGP] (15) Consider an abrupt PN junction (at T = 300 K) shown in the figure. The depletion region width Xn on the N-side of the junction is 0.2 µm and the permittivity of silicon si is (C) 1.044x10-12 F/cm. At the junction the approximate value of the peak electric field (in Kv/cm) is --------. (D) AA [GATE-EC-2017-IITR] (14) An abrupt pn junction (located at x = 0) is uniformly doped on both p and n sides. The width of the depletion region is W and the electric field variation in the xdirection is E(x). Which of the following figures represents the electric field profile near the pn junction? (A) AB [GATE-EC-2014-IITKGP] (16) When a silicon diode having a doping concentration of NA = 9 x 1016 cm-3 on p-side and ND = 1 x 1016 cm-3 on n-side is reverse biased, the total depletion width is found to be 3 µm. Given that the permittivity of silicon is 1.04 x 10-12 F/cm, the depletion on width on the p-side and the maximum electric field in the depletion region, respectively, are (A) 2 .7 m a nd 2 .3 1 0 5 V / cm (B) 0 .3 m a n d 4 .1 5 1 0 5 V / c m (C) 0 .3 m a n d 0 .4 2 1 0 5 V / c m (D) 2 .1 m a n d 0 .4 2 1 0 5 V / cm www.targate.org Page 47 Electronic Devices & Circuit AD [GATE-EC-2014-IITKGP] (17) The donor and accepter impurities in an abrupt junction silicon diode are 16 18 -3 3 1 10 cm & 5 x 10 cm , respectively. Assume that the intrinsic carrier concentration in silicon ni = 1.5 x 10 10 cm -3 at 300K, KT 26mV and the permittivity of q silicon €si = 1.04 x 10 -12 F/cm the built in potential and the deplotion width of the diode under thermal equilibrium conditions, respectively, are (A) 0.7 V and 1 x 10 -4 cm (B) 0.86 V and 1 x 10 -4 cm (C) 0.7 V and 3.3 x 10 -5 cm (D) 0.86 V and 3.3 x 10 -5 cm AA&B [GATE-EC-1998-IITD] (18) The built in potential (diffusion potential) in a p-n junction (A) is equal to the difference in the Fermi level of the two sides, expressed in volts. (B) Increases with the increase in the doping levels of the two sides. (C) Increases with the increase in temperature. (D) is equal to the average of the Fermi levels of two sides. AD [GATE-EC-1995-IITK] (19) The diffusion potential across a P-N junction. (A) Decreases with increasing doping concentration. (B) Increases with decreasing band gap. (C) Does not depend on doping concentrations. (D) Increases with increase in doping concentration. A AA [ESE-EC-2013] (20) A potential barrier of 0.50 V exits across a p n junction. If the deplection region is 5.0107 m wide, what is the maximum intensity of the electric field in this region? (A) 2 106 V / m (B) 2.5107 V / m bias of 5 V is applied to the junction. The depletion width for this junction is: (A) 1.4 µm (B) 2.4 µm (C) 3.4 µm (D) 4.4 µm Statement for Linked Answer Questions for Next Six Questions : An abrupt Si p-n junction has N a 1 0 1 8 / cm 3 on one side and N d 5 1015 / cm 3 on the other side, the junction is described has circular cross section with a diameter of 10m. Note : ni 1.5 1010 /cm3 , KT 26 mV,r 11.7 (22) Complete Junction _____ in m. depletion A0.457 width in A0.455 (23) Penetration of Junction depletion width in n side _____ in m. A2.27 (24) Penetration of Junction depletion width in p side _____ in nm. A2.85 (25) Net amount of charge occupied by depletion charge in N side _ _ _ _ _ _ _ 1 0 14 C . A3.48 (26) Magnitude of the electric field at junction _ _ __ _ _ _ _ 1 0 4 V / c m AYes (27) Polarity of the electric field at junction is negative. (yes/no) AB (28) A p n junction diode has N A 10 16 cm 3 and N D 1 0 1 5 c m 3 . The voltage required to align the conduction bands of both sides to same level is, (Given ni 1.5 1010 cm 3 ) (A) 0.31 V (B) 0.64 V (C) 0.41 V (D) 0.82 V Common Data for Questions for Next Two Questions Consider a silicon p-n junction at room temperature having the following parameters : Doping on the n-side = 11017 cm3 7 (C) 2.510 V / m Depletion width on the n-side = 0 .1 m (D) 2.5108 V / m Depletion width on the p-side = 1 .0 m AA (21) Consider a silicon junction with NA ND. The resistivity of p side is 3.5 cm . and internal contact potential is 0.35 V.A reverse Intrinsic carrier concentration = 1.4 10 10 cm 3 Thermal voltage = 26 mV Permittivity of free space = 8.85 10 14 F cm 1 Page 48 TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction Dielectric constant of silicon = 12 AB [GATE-EC-2009-IITR] (29) The built-in potential of the junction a constant and x is length along the diode as shown. (A) is 0.70 V (B) is 0.76 V (C) is 0.82 V (D) cannot be estimated from the data given AB [GATE-EC-2009-IITR] (30) The peak electric field in the device is (A) 0.15 MV-cm–1, directed from p-region to n-region (B) 0.15 MV-cm–1, directed from n-region to p-region (C) 1.80 MV-cm–1, directed from p-region to n-region (D) 1.80 MV-cm–1, directed from n-region to p-region Statement for Linked Answer Questions for Next Two Questions : A Si diode has AA (34) The magnitude of maximum electric field in depletion region is given by (A) qad 2 (B) 2 q a d 2 (C) 3 q a d 5 2 2 N D 1 0 1 6 cm 3 , N A 1 0 1 7 c m 3 and n i 1 .5 1 0 1 0 cm 3 . AB (31) Built in voltage of this diode at T = 300K is (A) 0.713 V (B) 0.757 V (C) 0.692 V (D) 0.811 V AA (32) If S i 1 1 .7 0 the width of depletion region on n side, when diode is forward biased at 0.5V, is (A) 0.1739 m (B) 0.1913 m (C) 0.356 m (D) 0.9431 m -48.36 [GATE-EC-2016-IISc] (33) Consider a silicon p-n junction with a uniform acceptor doping concentration of 1017 cm−3 on the p-side and a uniform donor doping concentration of 1016 cm−3 on the nside. No external voltage is applied to the diode. Given: kT/q = 26 mV, ni =1.5 1010 cm−3, Si 12 0 , 0 8.85 10 14 F/m, and q 1.6 10 19 C . The charge per unit junction area (nC cm−2) in the depletion region on the p-side is ______. Statement for Linked Answer Questions for Next Three Questions. A p-n junction diode has the difference of doping concentrations given by N D N A a x , where 2 2 (D) qad 3 AC (35) For previous question, the built in potential is (A) 2 q a d 2 3 3 (C) 2 q a d 3 (B) 2 q a d 3 2 (D) 3 q a d 2 A Linearly Grown (36) Type of doping profile_______ (step graded/ Linearly Grown)? AD [GATE-EC-2018-IITG] (37) In a p-n junction diode at equilibrium, which one of the following statements is NOT TRUE? (A) The hole and electron diffusion current components are in the same direction. (B) The hole and electron drift current components are in the same direction. (C) On an average, holes and electrons drift in opposite direction. (D) On an average, electrons drift and diffuse in the same direction. A0.40-0.43 [GATE-EC-2018-IITG] (38) A p-n step junction diode with a contact potential of 0.65 V has a depletion width of 1m at equilibrium. The forward voltage (in volts, correct to two decimal places) at which this width reduces to 0.6 m is ____. www.targate.org Page 49 Electronic Devices & Circuit A0.11-0.13 [GATE-EC-2018-IITG] (39) A junction is made between p Si with doping density N A1 1015 cm 3 and p Si with doping density N A 2 1017 cm 3 . Given: Boltzmann constant k 1.38 10 23 J K 1 , electronic charge q 1.6 10 19 C . Assume 100% acceptor ionization. (B) At room temperature (T = 300K), the magnitude of the built-in potential (in volts, correct to two decimal places) across this junction will be _________________. A0.230 to 0.232 [GATE-EC-2019-IITM] (40) A Germanium sample of dimensions 1cm 1cm is illuminated with a 20 mW, 600 nm laser light source as shown in the figure. The illuminated sample surface has a 100 nm of loss-less Silicon dioxide layer that reflects one-fourth of the incident light. From the remaining light, one-third of the power is reflected from the Silicon dioxideGermanium interface, one-third is absorbed in the Germanium layer, and one-third is transmitted through the other side of the sample. If the absorption coefficient of Germanium at 600 nm is 3 104 cm1 and the bandgap is 0.66 eV, the thickness of the Germanium layer, rounded off to 3 decimal places, is _____ m . AC [GATE-EC-2019-IITM] (41) Which one of the following options describes correctly the equilibrium band diagram at T = 300 K of a Silicon pnn+p ++ configuration shown in the figure? p n n+ p++ (C) (D) A[ESE-EC-2015] (42) The built-in-potential (diffusion potential) in a p-n junction 1. is equal to the difference in the Fermilevel of the two sides, expressed in volts. 2. increases with the increase in the doping levels of the two sides. 3. increases with temperature. 4. is equal to the average of the Fermilevels of the two sides. the increase in Which of the above statements are correct? (A) 1 and 2 only (B) 1 and 3 only (C) 1, 2 and 3 (D) 2, 3 and 4 AB[ESE-EC-2016] (43) In a semiconductor diode, cut-in voltage is the voltage (A) upto which the current is zero (B) upto which the current is very small (C) at which the current is 10% of the maximum rated current (D) at which depletion layer is formed (A) Page 50 AC[ESE-EC-2018] (44) Consider the following statements regarding the formation of P-N junctions: TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction 1. Holes diffuse across the junction from P-side to N-side. 2. The deplection layer is wiped out. 3. There is continuous flow of current across the junction. 4. A barrier potential is set up across the junction. AC[ESE-EE-2005] (48) Find the break region (voltage range) over which the dynamic resistance of a diode is multiplied by a factor of 1000. Let this region be contained between v1 and v2 , then is | v 1 v2 | given by (A) log C 1000VT Which of the above statements are correct? (B) 1000VT (A) 1 and 3 (B) 2 and 3 (C) (log e103 ) VT (C) 1 and 4 (D) 2 and 4 AB[ESE-EC-2018] (45) Statement (I): The width of depletion layer of a P-N junction is increased under reverse bias. Statement (II): Junction breakdown occurs under reverse bias. (A) Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I). (D) The value cannot be computed with the given data AD[ESE-EE-2006] (49) Consider the following statements: An applied bias voltage in a p-n junction diode (n region positive with respect to regioin) results in 1. increase in potential barrier 2. reduction in space charge layer width 3. increase in space charge layer width (B) Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I). 4. increase in magnitude of electric field Which of these statements are correct? (A) 1 and 2 (B) 1 and 3 (C) Statement (I) is true but Statement (II) is false. (C) 1 and 4 (D) 1, 3 and 4 (D) Statement (I) is false but Statement (II) is true. AA[ESE-EE-2002] (46) In a p-n junction, to make the depletion region extent predominantly into p-region, the concentration of impurities in the pregion must be (A) Much less than the concentation of impurities in n-region (B) Much higher than the concentation of impurities in n-region (C) Equal to the concentration of impurities in n-region (D) zero AC[ESE-EE-2005] (47) Two p-n junction diode are connected back to back to make a transistor. Which one of the following is correct? (A) The current gain of such a transistor will be high (B) The current gain of such a transistor will be moderate (C) It cannot be used as a transistor due to large base width (D) It can be used only for pnp transistor AC[ESE-EE-2006] (50) In a biased step-graded p-n junction, what is the correct expression for the equilibrium contact potential (V0 ) ? where VT T / q , T being the temperature, q the electronic charge, N A and N D are the doping levels of the p and n regions, respectively, and ni is the instrinsic carrier concentration. (A) V0 VT ln( N A / N D ni2 ) (B) V0 VT ln( N D / N A ni2 ) (C) V0 VT ln( N A N D / ni2 ) (D) V0 VT ln(ni2 / N A N D ) AC[ESE-EE-2014] (51) In a p-n junction diode under reverse bias, the magnitude of electric field is maximum at (A) the edge of the deplection region on the p side. (B) the edge of the deplection region on the n side. (C) the p-n junction. (D) the center of the deplection region on the side www.targate.org Page 51 Electronic Devices & Circuit AB[ESE-EE-2015] (52) A silicon diode is preferred to a germanium diode because of its (A) higher reverse current (B) lower reverse current and higher reverse breakdown voltage (C) higher reverse current and lower reverse breakdown voltage (D) None of the above AA[ESE-EE-2018] (53) Consider the following statements in the relevant context : 1. The two types of currents that flow in semiconductor diodes and transistors are drift and diffusion currents. 2. The junction region is called depletion region or space-charge region. 3. When currents flow through the diode in forward bias, the depletion region current is mostly of 'diffusion' type. 0.635V ,0.253V ,1.10 V (57) Calculate the built-in potential barrier, Vbi , for Si. Ge, and GaAs pn junctions if they each have the following dopant concentrations at T = 300 K : ni Si 1.5 1010 / cm3 ni Ge 2.4 1013 / cm 3 ni GaAs 1.8 106 / cm3 N d 1014 cm 3 , N d 1017 cm 3 Common Data Questions (for Next Two Questions) : Consider the impurity doping profile shown in Figure in a silicon pn junction. For zero applied voltage. Which of the above statements are correct? (A) 1, 2 and 3 (B) 1 and 2 only (C) 1 and 3 only (D) 2 and 3 only B & B AC (54) In an open circuited PN diode x p0 , x n0 are penetration of deplection region into p, n sides under open circuit condition. With x n0 x p0 , say the diode is reverse biased then (A) x n0 , x p0 increase equally (B) x n0 , x p0 are unaffacted (C) increase in x n 0 > increase in x p0 (D) increase in x p0 > increase in x n 0 Test AC (55) An abrupt silicon pn junction at zero bias and at T = 300 K has a dopant concentration of N a 1017 cm 3 on p-side and N d 5 1015 cm 3 on n-side. The difference between fermi-level and intrinsic level on n-side will be (Assume VT 0.026 V ) (A) 0.17 eV (C) 0.33 eV (B) 0.25 eV (D) 0.45 eV Test A0.25 (56) In an uniformly doped GaAs junction at T = 300 K, at zero bias, only 20% of the total space charge region is in p-region. The ratio of impurity doping concentrations N d to N a N i.e. d is _______. Na Page 52 Ans. 0.635V (58) Determine Vbi Ans. 0.864 m,0.0864 m (59) Calculate xn and x p . Common Data Questions (for Next Two Questions) : A particular type of junction is an n region adjacent to an intrinsic region. This junction can he modeled as an n-type region to a lightly doped p-type region. Assume the doping concentrations in silicon at T = 300K are Nd 1016 cm3 and N a 1012 cm3 . For zero applied bias. ( VT 26 mV, ni 1.5 1010 cm -3 ) Ans. 0.456 V (60) Determine Vbi . Ans. 2.43 10 7 cm (61) Determine xn . Ans. 2.43 10 3 cm (62) Determine x p . Ans. 3.75 102 V/cm (63) Determine Emax . TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction Eg 1.10eV , n 0 p 0 10 7 s . Dn 25cm2 /s , 2.2 Combined Problems D p 10cm 2 /s , N c 2.8 10 19cm 3 , and Nv SOLVED PROBLMES Example 1. A symmetrically doped silicon pn junction has doping concentrations of Na Nd 5 1016 cm 3 . If the peakelectric field in the junction at breakdown is E 4 105 V1cm . Determine the breakdown voltage of this junction. (q 1.6 1019 C , 0 8.854 10 14 F/cm, r 11.7,VT 0.0259V ) Sol. 1.04 10 19 cm 3 . The ratio of the forward to reverse current is to be no less than 104 with forward-and reverse-bias voltages of 0.50 V. Also, the reverse saturation current is to be no larger than 1 A . What is the maximum temperature at which the diode will meet these specifications? Sol. One condition eV J s exp a kT exp eVa 104 kT Ir Js If eN d xn We can write Emax xn or Va kT 0.5 4 e ln(10 ) ln(10 4 ) Emax eN d or 4 x10 11.7 8.85x10 1.6 x10 5 x10 14 5 19 kT T 0.05429 (0.0259) e 300 16 Or which yields xn 5.18 x105 cm T 629 K We find Second condition : 5 x10 5 x10 Vbi (0.0259) ln 1.5 x1010 2 16 16 eDn n p 0 eDp pn 0 I s A Ln Lp D Dp Aeni2 n Ln N a Lp N d 0.778V Now 2 Vbi VR N a 1 xn e N d N a N d 1/ 2 1 AeNC NV N a which becomes or 2(11.7)(8.85 x1014 ) 5 2 5.18 x 10 1.6 x1019 5 x1016 1 (Vbi VR ) 16 16 16 5 x10 5 x10 5 x10 Dp Eg exp p 0 kT 10 6 104 1.6 10 19 2.8 1019 1.04 1019 1 E 25 10 exp g 18 7 7 5 10 10 10 kT which yields 2.68 x10 9 1.29 x1010 (Vbi VR ) Dn 1 n 0 N d Or So Eg 10 exp 4.66 10 kT Vbi VR 20.7 VR 19.9V Example 2. An ideal uniformly doped silicon pn junction diode has a cross-sectional area of 10 4 cm 2 . The p region is doped with 5 1018 acceptor atoms per cm 3 and then region is doped with 1015 donor atoms per cm3 . Assume that the following parameter values are independent of temperature: For E g 1.10 eV kT Eg ln 4.66 10 10 1.10 ln 4.66 1010 or www.targate.org Page 53 Electronic Devices & Circuit T kT 0.04478eV (0.0259) 300 Then T 519 K This second condition yields a smaller temperature, so the maximum temperature is T 519 K Example 3. Consider two ideal pn junction at T = 300 K having exactly the same electrical and physical parameters except for the bandgap energy of 0.525 eV and a forward-bias current of 10 mA with Va 0.255 V . For the second pn junction, “design” the bandgap energy so that a forwardbias voltage of Va 0.32 V will produce a current of 10 A . Sol. Eg eV eVa I ni2 exp exp exp kT kT kT Then eVa Eg I exp kT So eV Eg 1 exp a1 kT I1 I2 eVa 2 Eg 2 exp kT Or eVa1 eVa 2 Eg 1 Eg 2 I1 exp I2 kT We have 0.255 0.32 0.525 E g 2 10 x103 exp 6 10 x10 0.0259 Or lifetime is p 0 10 7 s . The cross-sectional area is A 104 cm2 . Calculate the reverse saturation current and the diode current at a forward-bias voltage of 0.50 V. Sol. For a silicon p n junction, I s Aeni2 1 Nd Dp p0 2 104 1.6 x1019 1.5 x1010 1 12 16 10 107 Or I s 3.94 x1015 A Then V I D I s exp D 3.94 x1015 Vi 0.50 exp 0.0259 Or I D 9.54 x10 7 A Example 5. Consider a uniformly doped silicon pn junction with doping concentrations N A 5 1017 cm3 and Nd 1017 cm3 . (a) Calculate Vbi at T = 300 K. (b) Determine the temperature at which Vbi decreases by 1 percent. N N Sol. (a) Vbi Vi ln a 2 d ni 5 x1017 1017 0.0259 ln 1.5 x1010 2 Or Vbi 0.8556V Eg 2 0.59 10 exp 0.0259 Then 3 (b) For a 1% change in Vbi , assume that Eg 2 0.59 (0.0259)ln 103 Which yields E g 2 0.769 eV Eg ni2 exp kT Now Example 4. Consider a p n silicon diode at T = 300 K with doping concentrations of N a 1018 cm3 and 1018 cm 3 and N d 1016 cm 3 . The minority carrier hole diffusion coefficient is 2 D p 12cm /s and the minority carrier hole Page 54 the change is due to ni2 , where the major depedence on temperature is given by N N ln 2 a d ni T2 Vbi (T2 ) Vbi (T1 ) N N ln 2 a d ni Ti TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction (C) It acts like a closed switch (D) It behaves as a clipper ln N a N d ln ni2 T2 ln N a N d ln ni2 T1 AD (66) The AC resistance of a forward-biased P-N junction diode operating at a base voltage 'V' and carrying current 'I' is : E ln N a N d ln NC NV g kT2 Eg ln N a N d ln NC NV kT2 ln 5 x10 17 (A) Zero (B) A constant value dependent of V and I 10 17 (C) V/I (D) V / I Eg ln 2.8 x1019 1.04 x1019 kT2 AC (67) A p-n junction diode’s dynamic conductance is directly proportional to / ln 5 x1017 1017 (A) The applied voltage Eg ln 2.8 x1019 1.04 x1019 kT1 (B) The temperature (C) Its current Or Vbi (T2 ) Vbi (T1 ) 79.897 88.567 79.897 88.567 (D) The thermal voltage Eg Eg 9.9-10.1 (68) A diode with a forward bias of 0.8 V is carrying 2.6 mA of current at room temperature. If η 1 for this diode, the dynamic resistance (r) of the diode will be ( ____ ). kT2 34.57 Note : Thermal Equivalent voltage is (26 mV) kT2 Eg kT1 We can write 8.67 0.990 Eg 8.67 kT2 1.12 8.67 0.0259 AD (69) The reverse bias saturation current for a p n junction diode is 1µA at 300 K. Its ac resistance at 150 m V forward bias is: So that Eg kT2 42.90 1.12 T (0.0259) 2 300 We then find T2 302.4 K Dynamic Resistance (64) For a Si p-n junction diode the static resistance in terms of diode voltage V D and current I D is (A) VD ID (B) (C) dVD dI D (D) None VD ID (A) 51.4 (B) 61 .4 (C) 71 .4 (D) 81 .4 Common Data questions (for Next Two Questions) An ideal Ge p-n junction diode has a reverse saturation current of 30 µ A at a temperature 12 5 0 C . AD (70) At this temperature the dynamic resistance of the diode at a forward voltage of 0.2 V is : (A) 50 (B) 5.37 (C) 30 AB (65) Under small signal operation of a diode (A) Its bulk resistance increases (D) 3.36 AD (71) At this temperature, the dynamic resistance of the diode at a reverse voltage of 0.2 V is: (A) 0.50 M (B) 5.37 M (C) 0.70 M (D) 0.389 M (B) Its junction resistance predominates www.targate.org Page 55 Electronic Devices & Circuit Temperature effect on Reverse Current AB [ESE-EC-2003] (72) The reverse current of a silicon diode is temperature of the diode is 200 C , VD is found to be 700mV. If the temperature rises to 40 0 C , VD becomes approximately equal to (A) Highly bias voltage sensitive (B) Highly temperature sensitive (C) Both bias voltage and temperature sensitive (D) Independent temperature of bias voltage and AB[GATE-EC-2005-IITB] (73) A silicon PN junction at a temperature of 200 C has a reverse saturation current of 10 pico-Ameres (pA). The reserve saturation current at 400 C for the same bias is approximately : (A) 30 pA (B) 40 pA (C) 50 pA (D) 60 pA AC [GATE-EC-2004-IITD] (74) A silicon PN junction at a temperature of 200 c has a reverse saturation current of 10pA. The reverse saturation current at 400 c for the same bias is approximately. (A) 740 mV (B) 660 mV (C) 680 mV (D) 700 mV AD [ESE-EC-2008] (79) Consider a Ge diode operating At 27 0 C and just beyond the threshold voltage of Ge. What is the value of dυ / dT ? (A) 1 .9 m V / 0 C (B) 2 .0 m V / 0 C (C) 2.1m V / 0 C (D) 2.3 mV / 0 C AD [GATE-EC-2011-IITM] (80) A silicon PN junction biased with a constant at room temperature. When the temperature is increased by 10 0 C , the forward bias voltage across the PN junction (A) 20pA (B) 30pA (A) Increases by 60 mV (C) 40 pA (D) 80pA (B) Decreases by 60 mV AA (75) The leakage current in a certain diode is 25 µ A at 250 C. The New temperature required to have leakage current of 40 µA? (A) 31.77 0 C (B) 6.77 0 C (D) Decreases by 25mV AA (81) In a forward-biased p-n junction, the net electron and hole currents across the junction space charge region are due to (A) diffusion (C) 13.77 0 C (B) drift (D) None of these (C) recombination Temp. effect on Built-in Potential AA (76) The change in barrier potential of a silicon pn junction with temperature is (A) 0.025 volts per degree C (B) 0.250 volts per degree C (C) 0.030 volts per degree C (D) 0.014 volts per degree C AA (77) The change in barrier potential of a Si p-n junction diode with temperature is: (A) 2.5 m V (B) 0.25 mV (C) 0.30 mV (D) None of these AB [GATE-EC-2002-IISC] (78) In the figure, silicon diode is carrying a constant current of 1 mA. When the Page 56 (C) Increases by 25 mV (D) displacement AB (82) A p+- n junction is fabricated such that the length of n side is smaller than diffusion length of holes. Then the excess minority carrier concentration on n side varies as (A) decaying exponentially (B) decaying linearly (C) decaying with square root dependence (D) none of above Miscellaneous Problem AA[GATE-EC-2013-IITB] (83) In a forward biased pn junction diode, the sequence of events that best describes the mechanism of current flow is TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction (A) injection, and subsequent diffusion and recombination of minority carriers (B) Injection, and subsequent drift and generation of minority carriers (C) Extraction, and subsequdent diffusion and generation of minority carriers (D) Extraction, and subsequent drift and recombination of minority carriers AD (84) In an unbiased p-n unction, the junction current at equilibrium is (A) due to diffusion of majority carrier (C) Its cut-in voltage is high (D) Its breakdown voltage is high AB [ESE-EC-2008] (89) When a positive d.c. voltage is applied to the n-side relative to p-side, a diode is said to be given a (A) forward bias (C) zero bias (B) reverse bias (D) neutral bias AC [ESE-EC-2008] (90) Consider the following statements for a p-n junction diode: (B) due to diffusion of minority carrier 1. It is an active component (C) zero due to equal and opposite currents crossing the junction 2. Depletion layer width decreases with forward biasing. (D) zero because no charges cross the junction 3. In the reverse biasing case, saturation current increases with increasing temperature. AA [ESE-EC-2008] (85) In a p-n diode, hole diffuse from p-region to n-region because Which of the statements given above are correct? (A) there is higher concentration of holes in p-region (A) 1, 2 and 3 (B) 1 and 2 only (B) holes are positively charged (C) 2 and 3 only (D) 1 and 3 only (C) holes are urged to move by the barrier potential (D) the free electrons in the n-region attract the holes AD [ESE-EC-2009] (86) What current does D D I Aq P n ni2 LP N D Ln N A AD (91) Which of the following characteristics of a silicon P-N junction bode is suitable for use as an ideal diode? 1. It has very low saturation current 2. It has a high value of forward cut- in voltage 3. 4. It can withstand large reverse voltage When compared with germanium diodes, silicon diodes shown a lower degree of temperature dependence under reverse baised condition Select the correct answer using the codes given below Represent in pn junction diode? (Where symbols have their usual meaning) (A) Forward current (B) Diffusion current (C) Drift current (D) Reverse saturation current AC [ESE-EC-2003] (87) In switching diode fabrication, a dopant is introduced into silicon which introduces additional trap levels in the material thereby reducing the mean life time of carriers. This do pant is (A) Aluminium (B) Platinum (C) Gold (D) Copper Codes: (A) 1 and 2 (B) 1, 2, 3 and 4 (C) 2, 3 and 4 (D) 1 and 3 AC (92) Silicon diodes are preferred to Ge diode for high temperature operation because (A) Doping of silicon is a simple process (B) Rate of increase of reverse saturation current with temperature is more in the case of Si AC (88) Silicon diode is less suited for low voltage rectifier operation because (C) The reverse saturation current of silicon diodes is smaller than that of germanium (A) It can withstand high temperatures (D) Silicon diodes can be used to rectify even very small voltages. (B) Its reverse saturation current is low www.targate.org Page 57 Electronic Devices & Circuit AC (93) The ratio of hole to electron current crossing a p-n junction is given by (A) (C) p n I n p (0 ) (B) n p I p n (0 ) Ln Lp (D) p n Lp Ln Ln Lp AA (94) Gold is often diffused into silicon PN junction devices to (A) Increase the recombination rate qv (C) I 0 (1 e ) mKT 1 qv mKT 1 (D) I 0 e AC [GATE-EC-2016-IISc] (97) The I-V characteristics of three types of diodes at the room temperature, made of semiconductors X, Y and Z, are shown in the figure. Assume that the diodes are uniformly doped and identical in all respects except their materials. If EgX, EgY and EgZ are the band gaps of X, Y and Z, respectively, then (B) Reduce the recombination rate (C) Make silicon a direct gap semi conductor (D) Make silicon semi-metal AB [GATE-EC-1988-IITKGP] (95) In the circuit shown below the current voltage relationship when D1 and D2 are identical is given by (Assume Ge diodes) (A) E gX > EgY > EgZ (B) E gX = EgY = EgZ (C) E gX < EgY < EgZ (D) no relationship among these band gaps exists. A28-30[GATE-EC-2015-IITK] (98) For a silicon diode with long P and N regions, the accepter and donor impurity concentrations are 1 1017 cm -3 and (A) V K T s in h 1 q (B) V 2 KT I ln q I0 (C) V K T sin h 1 I q 2 (D) V K T [ E xp ( I ) 1] q AA (96) The current through a PN junction diode with V volts applied to the P region to the N region (where I0 is the reverse saturation current of the diode) m The ideality factor, K is the Boltzmann constant, T is the absolute temperature and q the magnitude of charge on an electron) is qv mKT I e 1 (A) 0 (B) I 0 e qv mKT 1 1 1015 cm -3 , respectively. The lifetimes of electrons in P region and holes in N region are both 100 s . The electron and hole diffusion coefficients are 49 cm2/s and 36 cm2 /s, respectively. Assume kT/q = 26 mV, the intrinsic carrier concentration is 1 1 0 1 0 cm–3, and q = 1 .6 1 0 1 9 C . When a forward voltage of 208 mV is applied across the diode, the hole current density (in nA/cm2) injected from P region to N region is ____. AA [GATE-EC-2014-IITKGP] (99) The doping concentrations on the p-side and n-side of a silicon dioode are 1x1016 cm-3 and 1x1017 cm-3, respectively. A forward bias of 0.3 V is applied to the diode. At T = 300 K, the intrinsic carrier concentration of silicon 1 = 1.5 x 1010 cm-3 and KT 26mV . q the electron concentration at the edge of the depletion negien on the p-side is (A) 2.3 x109 /cm3 (B) 1 x 1016 /cm3 (C) 1 x 1017 /cm3 (D) 2.25 x 106 /cm3 Page 58 TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction eE2 / AC [GATE-EC-2003-IITM] (100) At 300 K, for a diode current of 1 mA, a certain germanium diode requires a forward bias of 0.1435 V, whereas a certain silicon diode requires a forward bias of 0.718 V. Under the conditions stated above, the closest approximation of the ratio of reverse saturation current in germanium diode to that in silicon diode is: (A) 1 (B) 5 (D) 810 3 (C) 4 10 eAB [GATE-EC-1998-IITD] (101) The static characteristic of an adequately forward biased p-n junction is a straight line, if the plot is of (A) logI vs. logV (B) logI vs. V (C) I vs logV (D) I vs V. AD [ESE-EC-2008] (102) What is the typical value for the ratio of current in a p-n junction diode in the forward bias and that in the reverse bias? (A) 1 (B) 10 (C) 100 (D) 1000 Common Data questions (for next two questions) In a pn junction diode, the doping levels are N D 1 0 16 and N A 1 0 17 cm–3. The diffusion length & diffusion constants for both electron holes are given below on both sides of junction n side p side D n h 1 0cm 2 n h / s L 5 m D en 1 5 c m 2 / s L ne 1 0 m D hp 20 cm 2 / s L hp 12 m D ep 10 cm 2 / s L ep 5 m for holes for electrons for holes for electrons AA (103) The hole current density due to diffusion at junction at bias voltage V D 0 .5 V is (given n i 1.5 1 0 1 0 cm 3 ) (A) 1 6 .2 m A /c m 2 (B) 18 .3 m A/cm A34.00 to 38.00 [GATE-EC-2019-IITM] (105) In an ideal pn junction with an ideality factor of 1 at T = 300 K, the magnitude of the reverse-bias voltage required to reach 75% of its reverse saturation current, rounded off to 2 decimal places, is _____mV. [k =1.38 × 10 -23 JK -1 , h = 6.625×10 -34 J-s, q = 1.602 10 19C] AA[ESE-EE-2006] (106) The reverse saturation current of a Si-based p-n junction diode increases 32 times due to a rise in ambient temperature. If the original temperature was 400 C , what is the final temperature? (A) 900 C (B) 270 C (C) 450 C (D) 500 C B & B AD (107) For a silicon p-n juntion diode, the applied forward bias voltage is Va 0.65V and the reverse saturation current density is 4.15 1011 A / cm 2 at T 3000 K . The total forward bias current density is (A) 10 mA / cm2 (B) 14 mA / cm2 (C) 5.56 A / cm 2 (D) 11.13 A / cm 2 B & B AB (108) At a juction temperature of 250 C . For what forward voltage drop ID I0 e vD / vT 1 can be approximated as I D I 0 e vD / vT with less than 1% error, for a Ge diode (Given K 8.62 10 5 eV / 0 K ) (A) VD 0.1194V (B) VD 0.1186V (C) VD 0.1194V 2 (D) VD 0.1186V (C) 25 m A/cm 2 (D) 11 .4 m A /cm 2 AD (104) In previous question, the ratio of total hole current due to diffusion to the total diode current is (A) 9/10 (B) 8/9 (C) 11/12 (D) 10/11 B & B AA (109) The P and N sides of a silicon diode has resistivities of 2 cm & 1 cm respectively . Find height of potential barrier. (Assume n 1300 cm 2 / V sec , p 500cm 2 / V sec ) www.targate.org Page 59 Electronic Devices & Circuit (A) 0.66 V (C) 0.76 V (B) 0.06 V (D) 0.83 V B & B AD (110) In a semiconductor diode, the barrier potential offers opposition to only (A) free electrons in n- region (B) holes in p-region (C) minority carriers in both regions (D) majority carriers in both regions B & B AD (111) A Si PN diode is considered under open circuit condition, with doping on n, p sides as 11017 cm 3 & 2.5 1018 cm 3 respectively. Given intrinsic concentration as 1.5 1010 cm 3 . Find shift between Fermi level in n side with respect to intrinsic Fermi level. (A) 0.49 eV (B) 0.901 eV (C) 0.492 eV (D) 0.409 eV Test AB (112) A diode is used at a temperature of 25°C, due to increase in temperature the reverse saturation current of the diode increased by 300%. The new temperature of the diode is (A) 350 C (B) 450 C (C) 550 C (D) 650 C Test A7.50 to 8.50 (113) The ratio of hole diffusion current to the electron diffusion current crossing the junction of an infinitely long p-n diode is 4. If conductivity on p side is 1.4 S/cm and on n side is 2.8 S/cm, then the ratio of diffusion lengths Ln and Lp i.e. (Ln /Lp) is ______. Ans. 0.0596V (114) An "isotype" step junction is one in which the same impurity type doping changes from one concentration value to another value. An n-n isotype doping profile is shown in below figure. Determine the built-in potential barrier. Ans. (A) (115) Consider an ideal pn junction diode at T = 300 K operating in the forward-bias region. Page 60 Calculate the change in diode voltage that will cause a factor of 10 increase in current. ( VT 0.0259V ) (A) 119.3mV (B) 69.5 mV (C) 100 mV (D) 15 mV Ans. 59.6mV (116) Calculate the applied reverse-bias voltage at which the ideal reverse current in a pn junction diode at T = 300 K reaches 90 percent of its reverse saturation current value. ( VT 0.0259V ) Ans. 0.083 (117) Consider an ideal silicon pn junction diode with the following parameters: 6 n 0 p 0 0.1 10 s . Dn 25cm2 /s . D p 10cm 2 /s . What must be the ratio of N a / N d so that 95 percent of the current in the depletion region is carried by electrons ? Common Data Questions (for Next Two Questions) : A germanium p+n diode at T = 300 K has the following parameter : Na 1018 cm3 , N d 1016 cm 3 , D p 49cm 2 /s , D,, 100cm 2 /s , p 0 n0 5s , and A 104 cm2 . Ans. 6.55 A (118) Determine the diode current for a forwardbias voltage of 0.2 V Ans. 2.91nA (119) Determine the diode current for a reversebias voltage of 0.2 V. Ans. 4.02 10 14 A (120) A silicon step junction has uniform impurity doping concentrations of N a 5 1015 cm3 and Nd 1 1015 cm3 , and a cross-sectional area of A 104 cm2 . Let n 0 0.4s and p 0 0.1s . Consider the geometry in below figure. Calculate the ideal reverse saturation current due to holes. Ans. 0.5827 (121) A silicon diode can be used to measure temperature by operating the diode at a fixed forward-bias current. The forward-bias voltage is then a function of temperature. At TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction T = 300 K, the diode voltage is found to be 0.60 V. Determine the diode voltage at T = 310 K. 0 ( kT / q 0.0259 at 300 K ) Ans. 72.3 (122) A silicon pn junction diode at T = 300 K has a cross-sectional area of 102 cm2 . Length of the p region is 0.2 cm and the length of the n region is 0.1 cm. The doping concentrations are N d 1015 cm3 and Na 1016 cm 3 . Determine (a) approximately the series resistance of the diode. ( q 1.6 1015 C ) Ans. 5.09 m (123) An abrupt silicon p+n junction has an nregion doping concentration of 15 3 Nd 5 10 cm . What must be the minimum n-region width such that avalanche break-down occurs before the depletion region reaches an ohmic contact (punchthrough)? ( q 1.6 1019 C , 0 8.854 10 14 F/cm, r 11.7,VT 25.9V ) (A) Of the order of the reverse recovery time (B) Negligible in comparison to the reverse recovery time (C) Greater than the reverse recovery time (D) Equal to the mean carrier life time τ for the excess minority carriers AB [GATE-EC-1998-IITD] (127) A P.N junction is series with a 100 ohms resistor, is forwarded biased. So that a current of 100 mA flows. If the voltage across this combination is instantaneously reversed at t = 0 current through diode is approximately given by (A) 0 mA (B) 100 mA (C) 200 mA (D) 50 mA AA[GATE-EC-2006-IITKGP] (128) In the circuit shown below, the switch was connected to position 1 at t<0 and at t = 0, it is changed to position 2. Assume that the diode has zero voltage drop and a storage time ts . For 0 < t ts , VR is given by (all in Volts) Ans. 0.443V (124) The minimum small-signal diffusion resistance of an ideal forward-biased silicon pn junction diode at T = 300 K is to be rd 48 . The reverse saturation current in I s 2 1011 A . Calculate the maximum applied forward-bias voltage that can be applied to meet this specification. ( VT 0.0259V ) ********** 2.3 Recovery Time AB [GATE-EC-1989-IITK] (125) The switching speed of P+N junction (having a heavily doped P region) depends primarily on: (A) VR 5 (B) VR 5 (C) 0 VR 5 (D) 5 VR 0 A*[GATE-EC-1991-IITM] (129) Referring to the below figure the switch S is in position 1 initially and steady state condition exist from time t = 0 to t = t0, the switch is suddenly thrown into position 2. The current I through the 10 K resistor as a function of time t, from t = 0 is ? (give the sketch showing the magnitudes of the current at t = 0, t = t0 and t ). (A) The mobility of minority carriers in the P+-region. (B) The lifetime of minority carriers in the P+ -region. (C) The mobility of majority carriers in the N-region. (D) The lifetime of majority carriers in the N-region. ANS : AB [ESE-EC-2003] (126) When a junction diode is used in switching applications, the forward recovery time is www.targate.org Page 61 Electronic Devices & Circuit (A) Tunnelling of charge carriers across the junction. (B) Thermionic emission. (C) Diffusion of charge carriers across the junction. (D) Hopping of charge carriers across the junction AC (130) Consider a diode in series with a resistance, forward biased by a voltage source. If the applied voltage is suddenly made negative, then the current in the circuit will also change polarity, and have a constant magnitude for a short duration, because, for this duration, (A) the voltage across the diode will remain constant, until the stored minority carrier charge disappears. (134) In a Zener diode (A) Both p and n sides are lightly doped (B) p side is heavily doped than n side (C) Both p and n sides are heavily doped (D) n side is heavily doped than p side AC (135) If V Z & V A are Zener and Avalanche break down voltages and Ez & EA are (A) | V Z || V A |, E Z E A (B) the diode acts as an inductor (C) the diode acts as a current source (D) none of the above (B) | V Z | | V A |, E Z E A AC[ESE-EE-2005] (131) What is the reverse recovery time of a diode when switched from forward bias VF to (D) | V Z | | V A |, E Z E A (C) | V Z | | V A |, E Z E A AB (136) A Zener diode : reverse bias VR ? (A) Has a high forward voltage rating (A) Time taken to remove the stored minority carriers. (B) Has a sharp breakdown at low reverse voltage (B) Time taken by the diode voltage to attain zero value. (C) Is useful as an amplifier (C) Time to remove stored minority carriers plus the time to bring the diode voltage to reverse bias VR . (D) Time taken by the diode current to reverse. 9 Ans. 9.6 10 s (132) Consider a diode with a junction capacitance of 18 pF at zero bias and 4.2 pF at a reverse bias voltage of VR 10 V . The minority carrier lifetimes are 107 s . The diode is switched from a forward bias with a current of 2 mA to a reverse bias voltage of 10 V applied through a 10 k resistor. Estimate the tum-off time. ********** 2.4 ZENER / AVALANCHE AA [GATE-EC-1995-IITK] (133) A Zener diode works on the principle of (D) None of the above AA (137) A general propose diode is more likely to suffer an avalanche breakdown rather than a Zener breakdown because: (A) It is lightly doped (B) It is heavily doped (C) It has weak covalent bonds (D) None of the above AB [GATE-EC-2011-IITM] (138) A zener diode, when used in voltage stabilization circuits, is biased in (A) Reverse bias region breakdown voltage below (B) Reverse breakdown region (C) Forward bias region (D) Forward bias constant current mode AC [GATE-EC-1989-IITK] (139) In a Zener diode. (A) Only the P-region is heavily doped. (B) Only the N-region is heavily doped. Page 62 the TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction (C) Both P and N-regions are heavily doped. (D) Both P and N-regions are lightly doped. AA [GATE-EC-2008-IISC] (140) Consider the followings. S1 : for zener effect to occur, a very abrupt junction is required S2 : for quantum tunnelling to occur, a very narrow energy barrier is required Which of the following is correct? doped with a donor density ND. Assume that breakdown occurs when the magnitude of the electric field at any point in the device becomes equal to the critical field E crit . Assume E crit to be independent of ND. If the built-in voltage of the p n junction is much smaller than the breakdown voltage, V BR , the relationship between V B R and ND is given by (A) VBR N D constant (B) N D V BR constant (A) Only S2 is true (B) S1 & S2 are both true but S2 is not a reason for S1 (C) S1 & S2 are both true and S2 is reason for S1. (D) Both S1 & S2 are false AC[ESE-EC-2013] (141) A Zener diode has the following properties. 1. It is properly doped crystal diode with sharp breakdown 2. It is reverse biased 3. Its forward characteristics are just that of ordinary diode 4. Its reverse characteristics are like ordinary diode (C) N D V BR constant (D) N D / V BR constant AA [GATE-EC-2014-IITKGP] (144) In the figure assume that the forward voltage drops of the PN diode D1 and schottky diode D2 are 0.7 V and 0.3 V, respectively if ON denotes conducting state of the diode and OFF denotes non-conducting state of the diode then in the circuit, (B) 1, 2 and 4 only (A) Both D1 and D2 are ON (B) D1 isON and D2 is OFF (C) 1, 2 and 3 only (C) Both D1 and D2 are OFF (D) 3 and 4 only (D) D1 is OFF and D2 is ON (A) 1, 2, 3 and 4 AD [GATE-EC-1988-IITKGP] (142) For a p.n junction match the type of breakdown with phenomenon (1) Avalanche breakdown (A) Collision of carriers with crystal ions (2) Zener breakdown (B) Early effect (3) Punch through (C) Rupture of covalent bond due to strong electric field. (A) 1 – b; 2 – a, 3 – c (B) 1 – c; 2 – a; 3 - b (C) 1 – a; 2 – b; 3 – c AD[ESE-EE-2016] (145) What is the type of breakdown that occurs in a Zener diode having breakdown voltage (6 V)? (A) Avalanche breakdown only (B) Zener breakdown only (C) Avalanche breakdown where breakdown voltage is below 6V and Zener breakdown otherwise (D) Zener breakdown where breakdown voltage is below 6V and Avalenche breakdown otherwise AD[ESE-EE-2001] (146) Assertion (A): In avalanche breakdown, the reverse current sharply increases with voltage due to a field emission. Reason (R): The field emission requires lightly doped 'p' and 'n' regions. (D) 1 – a; 2 – c; 3 – b AC [GATE-EC-2016-IISc] (143) Consider avalanche breakdown in a silicon p n junction. The n-region is uniformly (A) Both A and R are true and R is the correct explanation of A (B) Both A and R are true but R is not the correct explanation of A www.targate.org Page 63 Electronic Devices & Circuit (C) A is true but R is false (D) A is false but R is true Or (d) ********** Emax 3.89 x105 V / cm A (11.7) 8.85 x10 10 CT W 0.301x10 4 Or 14 2.5 Junction Capacitance Example 1. Consider the junction has a cross-sectional area of 10 4 cm 2 and has an applied reverse-bias voltage of VR 5 V . Calculate (a) Vbi , (b) xn , x p ,W . (c) E max . and (d) the total junction capacitance. N N Sol. (a) Vbi Vi ln a 2 d ni 5 x1017 1017 (0.0259) ln 1.5 x1010 2 4 CT 3.44 pF AB [GATE-EC-1987] (147) The diffusion capacitance of a p-n junction: (A) Decreases with increasing current and increasing temperature (B) Decreases with decreasing current and increasing temperature (C) Increases with increasing current and increasing temperature (D) Does not depend on current and temperature Or Vbi 0.856V (b) 2 Vbi VR N a 1 xn e N d N a N d 1/ 2 2(11.7)(8.85 x1014 )(5.856) 1.6 x10 19 1/ 2 5 x1017 1 17 17 17 1x10 5 x10 1x10 AD (148) A varactor is a reverse biased p-n junction whose capacitance varies with voltage due to the variation in the (A) conductivity of the space charge region (B) injected minority carrier density (C) capacitance of the neutral p and n regions (D) space charge layer width C [GATE-EC-2020-IITD] (149) A one-sided abrupt pn junction diode has a depletion capacitance CD of 50 pF at a Or xn 0.251m Also 1/2 2 Vbi VR N d 1 xp e N a N a N d reverse bias of 0.2 V. The plot of 1/ CD2 versus the applied voltage V for this diode is a straight line as shown in the figure below. The slope of the plot is ______ 1020 F 2V 1 . 2(11.7) 8.85 x1014 5.856 1.6 x1019 1/ 2 1x1017 1 17 17 17 5 x10 5 x10 1x10 Or x p 0.0503m (A) –1.2 (B) –0.4 (C) –5.7 (D) –3.8 Also AD [GATE-EC-2004-IITD] W xn x p (150) Consider an abrupt p-n junction. Let Vbi be Or W 0.301m (c) Page 64 Emax 2 Vbi Vr W 2(5.856) 0.301x104 the built-in potential of this junction and VR be the applied reverse bias. If the junction capacitance (Cj ) is 1 pF for Vbi VR 1V , then for Vbi VR 4V, Cj will be : TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction (A) 4 pF (C) 0.25 pF (C) The diffusion capacitance is much higher than the depletion capacitance . (B) 2 pF (D) 0.5 pF AB [GATE-EC-1991-IITM] (151) The small signal capacitance of an abrupt P+n junctions 1nf/Cm2 at zero bias. If the built-in voltage is 1 volt, the capacitance at a reverse bias voltage of 99 volts in (A) 10 (B) 0.1 (C) 0.01 (D) 100 Common Data Questions (for next two Questions) An npn transistor in forward-active mode of operation is biased at IC 1mA. The total emitter base junction capacitance is 12 PF and the base transit time is 260 psec. AB (152) Determine the magnitude of diffusion capacitance of the emitter base junction in pF (A) 1 (B) 10 (C) 100 (D) 8 AD (153) Determine the magnitude of depletion capacitance of the emitter base junction in pF (A) 4 (B) 20 (C) 25 (D) None of these AB [GATE-EC-1990-IISC] (154) In a junction diode (A) The depletion capacitance increases with increase in the reverse bias (B) The depletion capacitance decreases with increase in the reverse bias (C) The depletion capacitance increases with increase in the forward bias (D) The depletion capacitance is much higher than the depletion capacitance when it is forward biased. A2.5[GATE-EC-2015-IITK] (155) The built-in potential of an abrupt p-n junction is 0.75 V. If the junction capacitance (CJ ) at a reverse bias ( V R ) of 1.25 V is 5 pF, the value of C J (in pF) when V R 7 .2 5 V is ______. AD (156) Find the wrong statement regarding the P-N junction diode (A) The depletion capacitance decrease with increases in reverse bias. (B) The diffusion capacitance increases with increases in the forward bias. (D) The depletion capacitance increases with increases in reverse bias. AC (157) The barrier capacitance CT (A) Increases with the width at the space charge layer (B) Increases with increasing reverse voltage (C) Is due to the immobile charges at the junction varying with the applied voltage (D) Can be defined as Q/V A3.1-3.3 (158) Given that CD at forward current of 1 mA is 0.8 µF its value for a current of 4 mA is (in _µF ) Note : Operating temperature is kept same: AD [GATE-EC-2008-IISC] (159) Which of the following is not associated with a p.n junction? (A) Junction Capacitance (B) Charge storage capacitance (C) Depletion Capacitance (D) Channel length Modulation / V / AC [GATE-EC-2010-IITG] (160) Compared to a PN junction with NA = ND = 10 14 / cm 3 `, which one of the following statement is TRUE for a P-N junction with NA = ND = 1020/cm3? (A) Reverse breakdown voltage is lower and depletion capacitance is lower (B) Reverse breakdown voltage is higher and depletion capacitance is lower (C) Reverse breakdown voltage is lower and depletion capacitance is higher (D) Reverse breakdown voltage is higher and depletion capacitance is higher AC [GATE-EC-1995-IITK] (161) The depletion capacitance CJ of an abrupt p-n junction with constant doping on either side varies with reverse bias VR as (B) CJ VR1 (A) CJ VR 1 (C) C J V R 2 1 (D) C J V R 3 AA [ESE-EC-2003] (162) The diffusion capacitance of a p-n junction diode www.targate.org Page 65 Electronic Devices & Circuit (A) Increases exponentially with forward bias voltage (B) Decreases exponentially with forward bias voltage (C) decreases linearly with forward bias voltage (D) Increases linearly with forward bias voltage AD [ESE-EC-2009] (163) The junction capacitance of a linearly graded pn junction (with applied voltage = VB) is proportional 1 (A) V B2 1 (B) V B 2 1 1 (C) V B3 (D) V B 3 AC [ESE-EC-2005] (164) The junction capacitance of a p-n junction depends (A) Doping concentration only (B) Applied voltage only (C) Both doping concentration and applied voltage (D) Barrier potential only AC [ESE-EC-2003] (165) Depletion capacitance in a diode depends on: 1. Applied Junction voltage. 2. Junction built-in potential. 3. Current through junction. 4. Doping profile across the junction. Select the correct answer using the codes given below: (A) 1 and 2 (B) 1 and 3 (C) 1, 2 and 4 (D) 2, 3 and 4 AA (166) For the circuit shown, if we increase the value of Va: (A) Capacitance increases and resistance decreases. AA (167) In PN junction, the space charge capacitance is proportional to V-n where is the applied biase voltage and 'n' is a constant. The Value of 'n' for step graded/ abrupt, linearly graded/ grown, linearly graded and diffused junctions would be respectively (A) 1 , 1 , 1 2 3 2.5 (B) 1 , 1 and 1 3 2 2.5 1 1 (C) , and 1 2 2.5 3 1 1 (D) , and 1 3 2.5 2 AD [GATE-EC-1998-IITD] (168) For small signal as operation, a practical forward biased diode can be modeled as (A) A resistance and a Capacitance (B) An ideal diode and resistance in parallel. (C) A resistance and an ideal diode in series (D) A resistance. AB [GATE-EC-2005-IITB] (169) A Silicon PN junction under reverse bias has depletion region of width 10 m. The relative permittivity of silicon. r 11 .7 and the permittivity of free space F/m. The depletion 0 8 .8 5 1 0 1 2 capacitance of the diode per square meter is : (A) 100F (B) 10F (C) 1 F (D) 20 F A10 [GATE-EC-2017-IITR] (170) As shown, two Silicon (Si) abrupt p-n junction diodes are fabricated with uniform donor doping concentrations of 14 -3 -16 ND1 = 10 cm and ND2 = 10 cm-3 in the nregions of the diodes, and uniform acceptor doping concentrations of 14 3 16 3 N A1 10 cm and N A2 10 cm in the pregions of the diodes, respectively. Assuming that the reverse bias voltage is >> built-in potentials of the diodes, the ratio C2 / C1 of their reverse capacitances for the same applied reverse bias, is _______. (B) Capacitance decreases and resistance increases. (C) Capacitance decreases and resistance increases. (D) None of these Page 66 TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction AC[ESE-EE-2002] (171) The junction capacitance of a linearly graded junction varies with the applied reverse bias Vr as (A) Vr 1 (B) Vr 1/2 (C) Vr 1/3 (D) Vr1/2 AB[ESE-EE-2014] (172) The diffusion capacitance of a forward biased p n junction diode with a steady current I depends on (176) Calculate the maximum electric field in the space charge region at VR 0 and VR 8V . Common Data Questions (for Next Three Questions) : An ideal one-sided silicon n p junction has uniform doping on both sides of the abrupt junction. The doping relation is N d 50 N d . The built-in potential barrier is Vbi 0.752 V . The maximum electric field in the junction is Emax 1.14 10' V/cm for a reverse-bias voltage of 10 V. T = 300 K. ( q 1.6 10 19 C , VT 26 mV , (A) width of the depletion region r 11.7, ni 1.5 1010 cm -3 ) (B) mean lifetime of the holes (C) mean lifetime of the electrons (D) junction area Ans. 4.28 1015 cm -3 , 2.14 1015 (177) Determine N a , N d Test A0.85 to 1.20 (173) Consider an abrupt p-n junction. When reverse biasing voltage (VR) is applied across the junction then the capacitance seen across the junction varies with the voltage. The following graph shows the capacitance voltage characteristics of the diode at room temperature The built in potential of the junction will be ______ V. Common Data Questions (for Next Two Questions) : An abrupt silicon pn-junction has dopant concentrations of N A 2 1016 cm 3 and N d 15 2 10 cm 3 at T = 300 K. Ans. 1.80µm (178) Determine x p for VR 10 Ans. 5.74 10 9 F/cm (179) Determine C 'j for VR 10 . Ans. 73 V (180) The peak electric field in a reverse-biased silicon pn junction is | Emax | 3 105 V1cm . The doping concentrations are Nd 4 1015 cm3 and Na 4 1017 cm3 . Find the magnitude of the reverse-bias voltage. ( 0 8.854 1014 F/cm, r 11.7 ) . Common Data Questions (for Next Two Questions) : Consider a uniformly doped GaAs pn junction at T = 300 K. The junction capacitance at zero bias is C, (0) and the junction capacitance with a 10V reverse-bias voltage is C j (10) . The ratio of the capacitances is C j (0) C j (10) 3.13 Also under reverse bias, the space charge width into the p region is 0.2 of the total space charge width. ( 0 8.854 1014 F/cm, r 11.7 ) ( 0 8.854 10 14 F/cm, r 11.7, ni 1.5 1010 cm -3 ) Ans. 0.671V (174) Calculate Vbi Ans. 1.14 V (181) Determine Vbi Ans. 0.691 10 4 cm Ans. 1.13 1016 cm 3 ,3.25 1015 cm 3 (182) Determine N a , N d . Ans. 1.94 104 V/cm Ans. 18.6 V (183) GaAs pn junction at T = 300 K has impurity doping concentrations of Na 1016 cm 3 and (175) Calculate W at VR 0 www.targate.org Page 67 Electronic Devices & Circuit Nd 5 1016 cm3 . For a particular device application, the ratio of junction capacitances at two values of reverse bias voltage must be C j' (VR1 ) / C j' (VR 2 ) 3 where the reverse bias voltage Determine V R 2 . ( VT 0.0259V ) VR1 1V . Ans. (B) (184) A uniformly doped silicon p+n junction at T = 300 K is to be designed such that at a reverse-bias voltage of VR 10 V , the maximum electric field is limited to Emax 106 V/cm . Determine the maximum doping concentration in the n region. q 1.6 1019 C , 0 8.854 10 (A) (B) (C) (D) 14 F/cm, r 11.7 3.24 10 cm 3 3.24 1017 cm 3 6.96 1014 cm 3 9.36 1018 cm 3 14 Ans. 0.557V (188) Calculate Vbi Ans. 5.32 10 6 cm, 2.66 10 4 cm (189) Calculate xn and x p at zero bias Ans. 70.3V (190) Calculate the applied bias required so that xn 30m . Common Data Questions (for Next Three Questions) : A silicon pn junction is to be designed which meets the following specifications at T 300K . At a reverse-bias voltage of 1.2 V, 10 percent of the total space charge region is to be in then region and the total junction capacitance is to be 3.5 1012 F with a cross-sectional area of 5.5 104 cm 2 . ----000000---- ( q 1.6 1019 C , 0 8.854 10 14 F/cm, r 11.7 ) Ans. 9.92 1014 cm 3 (185) Determine N a Ans. 8.93 1015 cm 3 (186) Determine N d Ans. 0.632 V (187) Determine Vbi . Common Data Questions (for Next Three Questions) : A silicon pn junction at T = 300 K has the doping profile shown in below figure. ( q 1.6 1019 C , 0 8.854 10 14 F/cm, r 11.7 ) Page 68 TARGATE EDUCATION GATE-(EC / EE) TOPIC 2 : Theory Of PN Junction Answer : 24. 2.27 25. 2.85 26. 3.48 27. Yes 33. – 48.36 36. Linearly Grown 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. D B C B C B B A A A 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. C D D A * B D AB D A 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. A * * * * * * B B B 38. 0.40 to 0.43 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. 39. 0.11 to 0.13 B A * A C * D * * * 40. 0.230 to 0.232 41. 42. 43. 44. 45. 46. 47. 48. 49. 50. 56. 0.25 C A B C B A C C D C 57. 0.635V, 0.253V, 1.10V 51. 52. 53. 54. 55. 56. 57. 58. 59. 60. 58. 0.635V C B C C C * * * * * 59. 0.864 m,0.0864 m 61. 62. 63. 64. 65. 66. 67. 68. 69. 70. 60. 0.456 V * * * @ B D C * D D 71. 72. 73. 74. 75. 76. 77. 78. 79. 80. 61. 2.43 10 7 cm D B B C A A A B D D 62. 2.43 10 3 cm 81. 82. 83. 84. 85. 86. 87. 88. 89. 90. A B A D A D C C B C 63. 3.75 102 V/cm 91. 92. 93. 94. 95. 96. 97. 98. 99. 100. 68. 9.9 to 10.1 D C C A B C * A C 98. 28 to 30 101. 102. 103. 104. 105. 106. 107. 108. 109. 110. 105. 34.00 to 38.00 B A A D 113. 7.50 to 8.50 111. 112. 113. 114. 115. 116. 117. 118. 119. 120. 114. 0.0596V D * * * 116. 59.6mV 121. 122. 123. 124. 125. 126. 127. 128. 129. 130. * * # @ 117. 0.083 131. 132. 133. 134. 135. 136. 137. 138. 139. 140. 118. 6.55 A C A C A 119. 2.91nA 141. 142. 143. 144. 145. 146. 147. 148. 149. 150. C C C D 120. 4.02 10 14 A 151. 152. 153. 154. 155. 156. 157. 158. 159. 160. 121. 0.5827 B D D C 122. 72.3 161. 162. 163. 164. 165. 166. 167. 168. 169. 170. 123. 5.09 m C D B 10 171. 172. 173. 174. 175. 176. 177. 178. 179. 180. 124. 0.443 V C * * * 132. 9.6 10 9 s 181. 182. 183. 184. 185. 186. 187. 188. 189. 190. 155. 2.5 * * * * 158. 3.1 to 3.3 15. 30 to 32 170. 10 22. 0.457 173. 0.85 to 1.20 23. 0.455 174. 0.671V D B * * D B A B D * * C A B C * B * A B C D * C * * A A * B B D D A * * D * B A B C A * * B * A B D * D * * * www.targate.org Page 69 Electronic Devices & Circuit 175. 0.691 10 4 cm 176. 1.94 104 V/cm 177. 4.28 1015 cm -3 , 2.14 1015 178. 1.80µm 179. 5.74 109 F/cm 180. 73 V 181. 1.14 V 182. 1.13 1016 cm 3 ,3.25 1015 cm 3 183. 18.6 V 185. 9.92 1014 cm 3 186. 8.93 1015 cm 3 187. 0.632 V 188. 0.557V 189. 5.32 10 6 cm, 2.66 10 4 cm 190. 70.3V Page 70 TARGATE EDUCATION GATE-(EC / EE) 03 BJT-Construction 3.1 Theoretical Problem (1) (5) AD [GATE-EC-2015-IITK] If the base width in a bipolar junction transistor is doubled, which one of the following statements will be TRUE? (A) Current gain will increase. (B) Unity gain frequency will increase. (6) (C) Emitter-base junction capacitance will increase. (D) Early voltage will increase. (2) AB[GATE-EC-2006-IITKGP] The phenomenon known as "Early Effect" in a bipolar transistor refers to a reduction of the effective base-width caused by (A) electron-hole recombination at the base (B) the reverse biasing of the basecollector junction (C) the forward biasing of emitter-base junction (D) the early removal of stored base charge during saturation to cutoff switching (3) (4) AB [ESE-EC-2013] In a bipolar junction transistor an increase in magnitude of collector voltage increases the space – charge width at the output junction diode. This causes the effective base width to decrease. The effect is known as (A) Half effect B) Early effect (C) Miller effect (D) Zener effect AA [ESE-EC-1997] The modulation of effective base width by collector voltage is known as Early Effect, hence reverse collector voltage. (A) increases both alpha and beta (B) decreases both alpha and beta (C) increases alpha but decreases beta (D) decreases beta but increases alpha www.targate.org (7) AC [GATE-EC-1995-IITK] The Early-Effect in a bipolar junction transistor is caused by (A) Fast – turn – on (B) Fast – turn – off (C) large collector – base reverse bias. (D) large emitter – base forward bias. AD The collector-emitter breakdown voltage with an open-circuited base is generally much smaller than the collector-base breakdown voltage with an open emitter, because (A) of the heavy emitter doping which causes tunnelling (B) base width modulation causes enhanced currents (C) the base-emitter junction breaks down at a small voltage (D) of the current multiplication effect of the transistor from the emitter to collector AA[GATE-EC-1995-IITK] The Ebers=Moll model is applicable to (A) Bipolar junction transistors (B) NMOS transistors (C) Unipolar junction transistors (D) Junction field-effect (8) AD [GATE-EC-2016-IISc] The Ebers-Moll model of a BJT is valid (A) only in active mode (B) only in active and saturation modes (C) only in active and cut-off modes (D) in active, saturation and cut-off modes AD[GATE-EC-1993-IITB] (9) cut-off frequency of a bipolar junction transistor (A) increase with the increase in base width (B) increase with the increase in emitter width Page 71 Electronic Devices & Circuit (C) increases with collector width the increase in (D) increase with decrease in the base width AD (10) Consider the following statements: 1. The β of a bipolar transistor reduces if the base width is increased. 2. The β of a bipolar transistor increases if the doping concentration in the base is increased. Which one of the following is correct? (A) 1 is FALSE and 2 is TRUE. (B) Both 1 and 2 are TRUE. (C) Both 1 and 2 are FALSE. (D) 1 is TRUE and 2 is FALSE. ADECREASE[GATE-EC-1992-IITD] (11) In a transistor having finite , forward bias across the base emitter junction is kept constant and the reverse bias across the collector base junction is increased. Neglecting the leakage across the collector base junction and the depletion region generations current, the base current will ____ (increase/decrease/remains constant). AC[ESE-EC-1999] (12) In a junction transistor, the collector cutoff current ' I CBO ' reduces considerably by doping the (A) emitter with high level of impurity (B) emitter with low level of impurity (C) collector with high level of impurity (D) collector with low level of impurity AD (13) In an n-p-n transistor biased in the active region, as the magnitude of the collectorbase voltage is increased, (A) the base current increases because more electrons are injected from the emitter (B) the base current increases because more holes are injected from the base to the collector (C) the emitter current decreases because the base-emitter junction gets slightly less forward biased. (D) the collector current increases slightly because the netural base width reduces Page 72 AA (14) In an n-p-n transistor biased in the active region: (A) electrons diffuse across the emitterbase junction and drift across the base-collector junction (B) electrons drift across the emitter-base junction and diffuse across the basecollector junction (C) electrons drift across the emitter-base junction and drift across the basecollector junction (D) electrons diffuse across the emitterbase junction and diffuse across the base-collector junction AB (15) In a p-n-p transistor biased in the active region, in the n-type base, holes (A) drift (B) diffuse and recombine (C) experience avalanche multiplication (D) are injected from the collector AA (16) Consider a p-n-p transistor biased in the active region. The electron current across the reverse-biased base-collector junction is small because (A) there are very few electrons in the ptype collector (B) there is a large amount recombination in the collector of (C) electrons do not diffuse across the ntype base (D) no electrons are injected into the base from the emitter AD (17) Consider a p-n-p transistor biased in the active region. But the hole current across the reverse-biased base-collector junction is large because (A) there are very few electrons in the ptype collector (B) there is a large amount of recombination in the collector (C) electrons do not diffuse across the ntype base (D) no electrons are injected into the base from the emitter AD (18) In BJT fabrication (A) Base width is generally made longer than diffusion length to reduce recombination TARGATE EDUCATION GATE-(EC / EE) TOPIC 3 : BJT Construction based problem (B) Base width is generally made smaller than diffusion length to enhance breakdown voltage (C) Base width is generally made smaller than emitter width to increase capacitance between the two materials. (D) Base width is generally made smaller than diffusion length to reduce recombination AC [ESE-EC-2008] (19) For a npn bipolar transistor, what is the main stream of current in the base region? (A) Drift of holes (B) Diffusion of holes (C) Drift of electrons (D) Diffusion of electrons AC [GATE-EC-1995-IITK] (20) The break down voltage of a transistor with its base open is BVCEO and that with emitter open is BVCBO, then AA (23) In an n-p-n transistor biased in the active region, if recombination can be neglected in the p-type base, the excess electron density in the base will be (A) linear (B) exponential (C) quadratic (D) hyperbolic AA (24) A BJT has doping levels N E , N B , N C in emitter, base and collector such that N E N B N C , then which of following diagram shows the correct position and width of the depletion regions (shaded in figure), X E and X C are the two depletion region at base emitter and base collector junctions respectively. (A) (A) BVCEO = BVCBO (B) BVCEO > BVCBO (C) BVCEO < BVCBO (D) BVCEO is not related to BVCBO AB [GATE-EC-2014-IITKGP] (21) An increase in the base recombination of a BJT will increase (B) (A)The common emitter dc current gain (B) The breakdown voltage BVCEO (C) The unity – gain out off frequency fT (C) (D) The transconductance A(A-3,B-1,C-1)[GATE-EC-1995-IITK] (22) In a bipolar junction transistor (Match the following) List-I A. The current gain increases B. The collector breakdown voltage increases C. The cut-off frequency increases List-II 1. The base doping is increased and the base width is reduced 2. The base doping is reduced and the base width is increased 3. The base doping the base width are reduced 4. The emitter area is increased and the collector area is reduced 5. The base doping and the base width are increased (D) AC [GATE-EC-2017-IITR] (25) For a narrow base PNP BJT, the excess minority carrier concentrations ( n E for emitter, p B for base, n C for collector) normalized to equilibrium minority carrier concentrations ( n E 0 for emitter, p B0 for base, n C0 for collector) in the quasi-neutral emitter, base and collector regions are shown below. Which one of the following biasing modes is the transistor operating in? www.targate.org Page 73 Electronic Devices & Circuit List II 1. Moderate resistivity (A) Forward active (B) Saturation (C) Inverse active (D) Cutoff AB (26) Match List - I (Biasing of the junctions ) with List - II (Functions) and select the correct answer using the codes given below the lists: List I A. E-B junctions forward bias and C - B junction reverse bias ` 2. Very high resistivity 3. Large size 4. Very high conductivity Codes: A (A) 1 B 4 C 2 D 3 (B) 4 1 2 3 (C) 4 1 3 2 (D) 1 4 3 2 AC [ESE-EC-1998] (29) Match List I (Models of BJT) with List II (Applications) and select the correct answer using the codes given below the lists: List I A. Hybrid model B. Both E-B and C-B forward bias B. Hybrid pi-model C. E-B junction reverse bias and C-B junction forward bias C. S - parameter D. Ebers - Moll model D. Both E-B and C-B junctions reverse bias List II 1. Microwave measurements List II 1. Very low gain amplifier 2. Saturation 3. High gain and amplifier 4. Cut-off condition (A) A 2 B 3 C 1 D 4 (B) 3 2 1 4 (C) 3 2 4 1 (D) 2 3 4 1 AA [ESE-EC-2012] (27) The output impedance of a BJT under common-collector configuration is (A) low (B) high (C) medium (D) very high AC[ESE-EC-1996] (28) Match List I (Regions of bipolar transistor in a monolithic IC) with List II ( Physical properties) and select the correct answer using the codes given below the lists: B. Base C. Collector D. Substrate Page 74 Coupled diode 3. Low frequency 4. High frequency Codes: Codes: List I A. Emitter 2. A (A) 4 B 3 C 1 D 2 (B) 3 4 2 1 (C) 3 4 1 2 (D) 4 3 1 2 AA [ESE-EC-1993] (30) When a junction transistor is operated under saturated conditions (A) both the CB and EB junctions are forward biased (B) the CB junction is forward biased but the EB junction is reverse biased (C) the CB junction is reverse biased but the EB junction is forward biased (D) both the CB and EB junctions are reverse biased eE2 / AC [ESE-EC-2013] (31) When a transistor is saturated, (A) the emitter potential is more than the base-collector potential (B) the collector potential is more than the base – emitter potential TARGATE EDUCATION GATE-(EC / EE) TOPIC 3 : BJT Construction based problem (C) the base potential is more than the emitter – collector potential (D) the base, emitter and collector are almost the same potential AD [GATE-EC-1995-IITK] (32) A BJT is said to be operating in the saturation region if (A) Both junctions are reverse biased (B) Base-emitter junction is R.B. and base collector junction is forward biased (C) Base-emitter junction is forward biased and base-collector junction reverse biased (D) Both the junctions are forward biased AB&C [GATE-EC-1990-IISC] (33) Which of the following effects can be caused by a rise in the temperature? (A) Increase in MOSFET current (IDS) (B) Increase in BJT current (IC) (C) Decrease in MOSFET current (IDS) (D) Decrease in BJT current (IC) AC [GATE-EC-1996-IISC] (34) If a transistor is operating with both of its junctions forward biased, but with the collector base forward bias greater than the emitter-base forward bias, then it is operating in the (A) Forward active mode (B) reverse saturation mode (C) reverse active mode (D) forward saturation Mode AC [GATE-EC-1997-IITM] (35) In a bipolar transistor at room temperature, if the emitter current is doubled, the voltage across the base-emitter junction (A) Doubles (B) Halves (C) Increases by about 20 mV (D) Decreases by about 20 mV AA [ESE-EC-2008] (37) What is the most noticeable effect of a small increase in temperature in the common emitter connected BJT? (A) Increase in ICEO (B) Increase in output resistance (C) Decrease in forward current gain (D) Increase in forward current gain AD [ESE-EC-2004] (38) The set of transistor characteristics that enables α to be directly determined from the slope is (A) The common-emitter output characteristics (B) The common-emitter transfer characteristics (C) The common-base input characteristics (D) The common-base transfer characteristics AC [ESE-EC-2008] (39) While using a bipolar junction transistor as an amplifier, the collector and emitter terminals got interchanged mistakenly. Assuming that the amplifier is a common emitter amplifier and the biasing is suitably adjusted, the interchange of terminals will result into (A) Zero gain (B) infinite gain (C) Reduced gain (D) No change in gain at all AB [GATE-EC-2010-IITG] (40) In a uniformly doped BJT, assume that NE, NB and NC are the emitter, base and collector doping in atmoscm3 respectively. If the emitter injection efficiency of the BJT is close to unity which one of the following is true? (A) N E N B N C AB [ESE-EC-2008] (36) Which one of the following statements is not correct? (A) Reverse saturation current in a BJT approximately doubles for every 10.C rise in temperature (B) The reverse resistance of a junction diode increases with increase in temperature (C) Reverse saturation current of a silicon diode is much smaller than that of a germanium diode (D) The cut-in voltage of silicon diode is larger than that of germanium (B) N E N B and N B N C (C) N E N B and N B N C (D) N E N B N C AC [ESE-EC-2005] (41) Which one of the following is the exact expression for ICEO (i.e., collector to emitter current with base open) in a junction transistor? (A) α . I CBO (B) www.targate.org α . ICBO 1 α Page 75 Electronic Devices & Circuit (C) AD[ESE-EC-2015] (48) Consider the following statements regarding an N-P-N Bipolar Junction Transistor: ICBO 1 α (D) 1 α I CBO AC[ESE-EC-1993] (42) The controller to emitter cut-off current ( I CEO ) of a transistor is related to collector to base cut-off current ( I CBO ) as ( is the CB current gain of the transistor ) (A) I CE O I CBO (B) ( I CEO ) ( I CBO ) (C) I C E O (D) I C EO I C B O 1 AD (43) In the common-emitter configuration, if the transistor is in the active region, then (A) I C β I E (B) I E α I B (C) I B β I C (D) I C β I B AB [ESE-EC-1999] (44) In a junction transistor biased for operation at emitter current ' I E ' and collector current ' I C ' , the transconductance ' g m ' is : (A) KT / ql E (B) q l E / K T (C) (D) I E / I C AD[ESE-EC-2014] (45) The early effect in bipolar junction transistor is caused by (A) fast turn-on (B) fast turn-off (C) large emitter to base forward bias (D) large collector to base reverse bias AD[ESE-EC-2014] (46) A BJT operates as a switch (A) in the active characteristics Emitter diode is forward biased and collector diode is reverse biased in Active Region. 2. Emitter has many free electrons 3. Free electrons are injected into base and pass through collector 4. Depletion layer around junction J1 and J2 of BJT are widened. Which of the above statements are correct? I CBO 1 IC / IE 1. region of transfer (A) 1, 2 and 4 (B) 1, 3 and 4 (C) 2, 3 and 4 (D) 1, 2 and 3 AA[ESE-EC-2015] (49) Statement (I): One of the mechanisms by which a transistor's usefulness may be terminated, as the collector voltage is increased, is called punch through. Statement (II): Punch through results from the increased width of the collector-junction transition region with increased collectorjunction voltage. (A) Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I). (B) Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I). (C) Statement (I) is true but Statement (II) is false. (D) Statement (I) is false but Statement (II) is true. AC[ESE-EC-2016] (50) The leakage current in an NPN transistor is due to the flow of (A) Holes from base to emitter (B) Electrons from collector to base (B) with no signal condition (C) Holes from collector to base (C) under small signal conditions (D) Minority carriers from emitter to collector (D) under large signal conditions AD[ESE-EC-2014] (47) n-p-n transistors are preferred over p-n-p transistors because they have (A) high mobility of holes (B) high mobility of electrons (C) low mobility of holes (D) higher mobility of electrons than the mobility of holes in p-n-p transistors Page 76 AC[ESE-EC-2016] (51) In early effect (A) Increase in magnitude of Collector voltage increases space charge width at the input junction of a BJT (B) Increase in magnitude of Emitter-Base voltage increases space charge width of output junction of a BJT TARGATE EDUCATION GATE-(EC / EE) TOPIC 3 : BJT Construction based problem (C) Increase in magnitude of Collector voltage increases space charge width of output junction of a BJT (D) Decrease in magnitude of Emitter-Base voltage increases space charge width of output junction of a BJT AB[ESE-EC-2019] (52) The effect of reduction in effective base width due to increase in reverse voltage of BJT is : (A) Hall effect (B) Early effect (C) Zener effect (D) Miller effect AB[ESE-EE-2014] (53) The increase in value of of transistor can cause the fixed bias circuit to (A) shift from saturation region to active region. (B) shift the operation from active mode to saturation mode. (C) shift the operation from saturation mode to cut-off mode. (D) shift the operation from cut-off mode to active mode. AC[ESE-EE-2002] (54) Early effect in BJT refers to AB[ESE-EE-2011] (57) Assertion (A): The collector current in a BJT in common base mode increases slightly with increase in collector base voltage. Reason (R): Increased collector-base bias causes avalanche breakdown to increase the current. (A) Both A and R are true and R is the correct explanation of A (B) Both A and R are true but R is NOT the correct explanation of A (C) A is true but R is false (D) A is false but R is true AA[ESE-EE-2011] (58) Assertion (A): The operating point in transistor amplifier shift with changes in temperature. Reason (R): Reverse saturation current approximate doubles for every 100 C increase in temperature. (A) Both A and R are true and R is the correct explanation of A (B) Both A and R are true but R is not the correct explanation of A (A) avalanche breakdown (C) A is true but R is false (B) thermal runway (C) base narrowing (D) A is false but R is true (D) zener breakdown AA[ESE-EE-2006] (55) Which one of the following statements is correct in respect of BJT? (A) Avalanche multiplication starts when the reverse biased collector-base voltage VCB equals the avalanche breakdown voltage BVCBO . (B) The early effect starts as soon as punchthrough occurs in a transistor. (C) The small signal current gain h fe =large signal current gain hFE when AA[ESE-EE-2012] (59) For a Silicon n-p-n transistor, the base to emitter voltage (VBE ) is 0.7 V and the collector to base voltage (VCB ) is 0.2 V. Then the transitor is operating in the (A) Normal active mode (B) Saturation mode (C) Inverse active mode (D) Cut-off mode AA[ESE-EE-2014] (60) Early effect is the modulation of effecitve base width by (A) Emitter voltage hFE / I C 0 . (D) In the CE mode, a transistor can be cut off by reducing I B to zero. AA[ESE-EE-2009] (56) When a transistor is used in switching mode then what is the turn-on time? (A) Sum of delay time and rise time (B) Sum of rise time and storage time (C) Sum of delay time and storage time (D) Sum of rise time and fall time (B) Emitter current (C) Collector voltage (D) Junction temprature AC[ESE-EE-2012] (61) A Bipolar Junction Transistor (BJT) works in three regions: 1. Saturation 2. Active 3. Cut-off www.targate.org Page 77 Electronic Devices & Circuit If BJT is to be used in amplifier circuit, the region it works in is/are (A) 1, 2 and 3 (B) 1 and 2 onlly (A) It is greater than emitter currenr. (B) It equals the base current divided by the current gain. (C) 2 only (D) 1 only (C) It is small. AB[ESE-EE-2012] (62) Statement (I): In a transistor switching circuit, it is desirable that the transistor should not be driven into hard saturation for fast switching applications. Statement (II): When a transistor is under saturation state, both its emitter-base and collector-base junctions remain under forward bias. (A) Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I). (B) Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I). (C) Statement (I) and is true but Statement (II) is false. (D) Statement (I) is false but Statement (II) is true. AA[ESE-EE-2015] (63) When a PNP transistor is properly biased, the holes from the emitter. (A) diffuse through the base into the collector region. (B) recombine with the electrons in the base region. (C) recombine with the electrons in the emitter region. (D) diffuse through the emitter to collector AD[ESE-EE-2016] (64) Which of the following conditions must be satisfied for a transistor to be in saturation? 1. Its collector to base junction should be under forward bias. 2. Its collector to base junction should be under reverse bias. 3. 4. Its emitter to base junction should be under reverse bias. Its emitter to base junction should be under forward bias. (D) It approximately equals the emitter current. ********** 3.2 Numerical Problem AC [ESE-EC-2013] (66) If the value of a transistor changes 0.5% from its nominal value of 0.9 the percentage change in will be (A) 0% (B) 2.5% (C) 5% (D) 7.5% V / AB [ESE-EC-2003] (67) A bipolar junction transistor has a common base forward short circuit current gain of 0.99. Its common emitter forward short circuit current gain will be (A) 50 (B) 99 (C) 100 (D) 200 AB [GATE-EC-2007-IITK] (68) The DC current gain ( ) of a BJT is 50. Assuming that the emitter junction Efficiency is 0.995, the base transport factor is : (A) 0.980 (B) 0.985 (C) 0.990 (D) 0.995 AD [GATE-EC-2011-IITM] (69) For BJT, the common-base current gain = 0.98 and the collector base junction reverse bias saturation current IC0 = 0.6A . This BJT is connected in the common emitter mode and operated in the active region with a base drive current IB = 20 A . The collector current IC for this mode of operation is (A) 0.98 mA (B) 0.99 mA (C) 1.0 mA (D) 1.01 mA AD (70) If emitter injection efficiency of a BJT is 0.98 and its common base dc current gain is 0.96, then the base transport factor is Which of the above conditions are correct? (A) 0.96 (B) 0.94 (A) 1 and 3 (B) 2 and 3 (C) 1.02 (D) 0.98 (C) 2 and 4 (D) 1 and 4 AD[ESE-EE-2019] (65) The important fact about the collector current is: Page 78 AD (71) Consider a BJT with doping in emitter, base and collector as N E 1 0 18 cm 3 , N B 1 0 16 cm 3 and N C 1 0 15 c m 3 TARGATE EDUCATION GATE-(EC / EE) TOPIC 3 : BJT Construction based problem respectively. What value of VBE must be applied in base emitter region, so that excess minority carries in base region is 10% of the emitter doping (A) V BE 0.82 V (B) V B E 0.7 1 V base of another npn BJT T2 has a uniform doping N B of 1017 cm3 . All other parameters are identical for both the devices. Assuming that the hole density profile is the same as that of doping, the common-emitter current gain of T2 is (C) V BE 0.76 V (D) V BE 0.69 V AD (72) In a BJT, I B 5 A , I C B0 1 A and 200 , then collector current I C is : (A) 1 mA (C) 0.9 mA (B) 1.1 mA (D) 1.2 mA AD (73) Consider a BJT with doping in emitter, base and collector as N E 1018 cm 3 , N B 1016 cm 3 and N C 1 0 1 5 c m 3 respectively. The length of depletion region inside base at base-emitter junction and base collector region are 5m and 10m respectively and total base width is 50m . Find new doping level of collector to cause a punch through, assuming width of depletion region in collector region remains constant (A) 5.5 10 15 cm 3 (B) 2.5 10 15 cm 3 (A) approximately 2.5 times that of T1. (B) approximately 2.0 times that of T1. (C) approximately 0.3 times that of T1. (D) approximately 0.7 times that of T1. A 5.7to5.9 [GATE-EC-2014-IITKGP] (77) A BJT is biased in forward active mode assume VBE = 0.7 V, KT/q=25mV and reverse saturation correct IS = 10-13 mA. The Trans conductance of theBJT (In mA/V) is A378to381 [GATE-EC-2014-IITKGP] (78) Consider two BJTs biased at the same collector current with area A1 0.2m 0.2m and A2 300m 300m Assuming that all other device parameters are identical, kT / q 26 m V , the intrinsic carrier concentration is 1 1 0 1 0 c m 3 , and (C) 3.5 1015 cm 3 q 1.61019 C, the difference between the (D) 4.5 1015 cm 3 base-emitter voltage (in mV) of the two BJTs i.e.,VBE1 VBE 2 is ---------. AC [ESE-EC-2011] (74) The collector and emitter current levels for a transistor with common base dc current gain of 0.99 and base current of 20 A are respectively (A) 2 mA and 1.98 mA (B) 1.98 and 2 mA AC[GATE-EC-2005-IITB] (79) For an npn transistor connected as shown in the figure VBE=0.7 Volts. Given that reverse saturation current of the junction at room temperature 3000K is 10-13 A, the emitter current is ( = 1) Note : V T 2 6 m V (C) 1.98 mA and 2 mA (D) 2 mA and 1.98 AA [ESE-EC-2009] (75) The maximum power dissipation capacity of a transistor is 50 mW. If the collector emitter voltage is 10 V, what is the safe collector current that can be allowed through the transistor? (A) 5 mA (B) 2.5 mA (C) 10 mA (D) 25 mA B [GATE-EC-2020-IITD] (76) The base of an npn BJT T1 has a linear doping profile N B ( x ) as shown below. The (A) 30mA (C) 49 mA (B) 39 mA (D) 20 mA A83.15 [GATE-EC-2015-IITK] (80) In the circuit shown I 1 80 m A and I 2 4 mA .Transistor T1 a n d T 2 are identical. Assume that the thermal voltage www.targate.org Page 79 Electronic Devices & Circuit V T is 26mV at 270 C .At 50 0 C .The value of voltage V12 V1 V 2 (in mV ) is: AB [GATE-EC-2014-IITKGP] (83) Consider the common-collector amplifier in the figure (bias circuitry ensures that the transistor operates in forward active region, but has been omitted for simplicity). Let IC be the collector current VBE be the baseemitter voltage and VT be the thermal voltage. Also, gm and r0 are the small-signal transconductance and output resistance of the transistor, respectively. Which one of the following conditions ensures a nearly constant small signal voltage gain for a wide range of values of RE? AC (81) Consider the transistor circuit shown in figure below. (A) gmRE 1 (B) IC RE VT (C) gmr0 1 (D) VBE VT A6.55-6.75 [GATE-EC-2016-IISc] (84) The injected excess electron concentration profile in the base region of an npn BJT, biased in the active region, is linear, as shown in the figure. If the area of the emitter-base junction is 0.001 cm2, µn = 800 cm2 /(V-s) in the base region and depletion layer widths are negligible, then the collector current IC (in mA) at room temperature is _______ For the case, V in V re f 0 .3 V , what is the ratio of I C 1 / I C 2 ? (A) 103 (B) 300 (C) 105 (D) 3 10 (Given: thermal voltage VT = 26 mV at room temperature, electronic charge q = 1.6 × 10−19 C) 3 AB[GATE-EC-2010-IITG] (82) In the silicon BJT circuit shown below, assume that the emitter area of transistor Q1 is half that of transistor Q2 The value of current I0 is approximately (A) 0.5 mA (B) 2 mA (C) 9.3 mA (D) 15 mA Page 80 AB[GATE-EC-2004-IITD] (85) The neutral base width of a bipolar transistor, biased in the active region, is 0.5 m . The maximum electron concentration and the diffusion constant in 14 3 the base are 10 / cm and D n 25 cm 2 /sec respectively. Assuming negligible recombination in the base, the collector current TARGATE EDUCATION GATE-(EC / EE) TOPIC 3 : BJT Construction based problem density is (the electron charge is 1.6 10 1 9 Coulomb) 2 (A) 800 A/cm (B) 8 A/cm 2 (D) 2 A/cm2 (C) 200 A/cm (C) 2.25mA and 1.37 mA (D) 3.25 mA and 1.37 mA 2 A1475[GATE-EC-2015-IITK] (86) An open npn BJT having reverse saturation current I s 1 0 1 5 A is biased in the forward active region with V B E 7 0 0 m V . The thermal voltage (VT) is 25 mV and the current gain ( ) may vary from 50 to 150 due to manufacturing variations. The maximum emitter current (in A) is ____. AC [GATE-EC-2017-IITR] (87) An npn bipolar junction transistor (BJT) is operating in the active region. If the reverse bias across the base-collector junction is increased, then (A) the effective base width increases and common-emitter current gain increases (B) the effective base width increases and common-emitter current gain decrease (C) the effective base width decreases and common-emitter current gain increases AB[ESE-EE-2003] (91) In the transistor circuit as shown below, the collector to ground voltage is +20 V. The possible condition is : (A) Collector-emitter terminals shorted (B) Emitter to ground connection open (C) 10 kilo-ohms resistor open (D) Collector-base terminals shorted AC[ESE-EE-2009] (92) of a BJT varies from 15 to 65. RL 10 , VCC 120V and VBB 8V . If VCE ( Sat ) 1.5V and VBE ( Sat ) 1.75V then what is the value of RB that will result in saturation with an overdrive factor of 10? (D) the effective base width decreases and common-emitter current gain decreases AC[ESE-EC-2014] input signal ranges from 20 A 40 A with an output signal ranging from 0.5mA 1.5mA , what is the (88) If an β ac ? (A) 0.05 (B) 20 (C) 50 (D) 500 AB[ESE-EC-2017] (89) In a transistor, the base current and collector current are, respectively, 60 A and 1.75mA .The value of is nearly (A) 0.91 (B) 0.97 (C) 1.3 (D) 1.7 (C) 79 (D) 7.9 AB[ESE-EE-2009] (93) In a certain self biased Si npn transistor the d.c. base voltage is 3.2V then what is the d.c. emitter voltage?(Assume the transistor is in linear-active mode) (A) 0.7V (B) 2.5V (C) 3.2 V (D) 3.9V AD[ESE-EE-2013] Given I CO I CBO 2 A . 0.99 , the value of ICEO is : iB 15 A .If the transistor is baised in the forward active mode, the collector and emitter current will be (B) 3.25 mA and 2.27 mA (B) 0.79 (94) In AA[ESE-EC-2019] (90) Consider a common-emitter current gain of 150 and a base current of (A) 2.25 mA and 2.27 mA (A) 7.9 a BJT, (A) 2 A (B) 99 A (C) 198 A (D) 200 A AA[ESE-EE-2015] (95) If an npn silicon transistor is operated at VCE 5 V and I C 100 A and has a current gain of 100 in the CE connection, then the input resistance of this circuit will be www.targate.org Page 81 Electronic Devices & Circuit (A) 25 k (B) 450 k (C) 4500 k (D) 2500 k AA[ESE-EE-2009] (96) In the below circuit as shown 99,VBE 0.6 V , then what are the values of VC and I C corresponding to the operating point? (A) 4.6 V and 1.98 mA (B) is a monotonically decreasing function of I C (C) increases with I C , for low I C , reaches a maximum and then decreases with further increases in IC (D) is not a function of IC . B & B AD (102) A silicon bipolar transistor with a common emitter current gain of 60 and the minimum open base break down voltage (BVCEO ) is to be 15 volts. The value of minimum open emitter junction break down voltage (BVCB0 ) is (Assume empirical constant n = 4) (A) 10.8 V (B) 19.3 V (C) 35.8 V (D) 41.7 V (B) 4.7 V and 2.00 mA (A) 99 (B) 91 Test A2.718 (2.50 – 3.00) (103) The npn transistor operating at temperature T = 300 K is biased at collector current of 1 mA. Now, the base-emitter voltage of the transistor is increased by 0.026 V. Assuming the parameters of device as kT 1, 26 mV intrinsic carrier q (C) 79 (D) 61 concentration = 1.5 1010 /cm 3 and q 1.6 (C) 5.4 V and 1.56 mA (D) 4.2 V and 2.1 mA AA[ESE-EE-2016] (97) For a BJT; I C 5 mA , I B 50 A and I CBO 0.5 A , then the value of is AD[ESE-EE-2018] (98) A bipolar transistor has 0.98, I CO 10A . If the base current is 100A , then collector current would be (A) 2.91 mA (B) 3.49 mA (C) 4.94 mA (D) 5.49 mA B & B AB (99) In a Si PNP-transistor, hole current in the emitter region is 11.6 mA and electron current in the emitter region is 0.57 A . The emitter junction efficiency is approximately (A) 9.9 (B) 0.99 (C) 99 (D) 0.099 B & B A20 (100) An NPN transistor in forward-active mode of operarion is biased at IC 10 mA . The total emitter-base capacitance is 120 pF and the base transit time is 260 psec. The deplection capacitance of the emitter-base junction in pF is ...... 10 19 C , the new collector current of transistor is ___ 103 A . Test AA (104) A BJT has 0.99 , I B 25 A and I CBO 200 nA . The percentage error in collector current, when leakage current is neglected in the calculation is (A) less than 1% (B) greater than 1% but less than 2% (C) greater than 2% (D) can’t be calculated Test AC (105) An npn bipolar transistor having uniform doping of N E 1018 cm 3 , N B 1016 cm 3 and NC 6 1015 cm 3 is operating in the inverse active mode with VBE 2V and VBC 0.6V . The geometry of transistor is shown below B & B AC (101) The common-emitter short-circuit current gain of a transistor (A) is a monotonically increasing function of the collector current I C Page 82 TARGATE EDUCATION GATE-(EC / EE) TOPIC 3 : BJT Construction based problem The minority carrier concentration at x x is : (Assume ni 1.5 1010 cm 3 ,VT 25.9mV ) (A) 2.25 10 4 cm 3 (B) 2.6 10 4 cm 3 (C) 2.6 1014 cm 3 (D) 1.25 1014 cm 3 Test AA (106) Consider a p-np bipolar junction transistor, the device is biased in forward active mode thus the Emitter-base junction is forward biased and base-collector junction is reverse biased. The emitter injects holes into the base region and the holes variation in n-type base region is illustrated in figure. The base doping is N B 1017 cm 3 . The minority carrier lifetime and the hole mobility in base region is 10 4 s and 640cm 2 /V-s respectively. The cross section area of the device is 104 cm2 . The recombination current inside the base region will be (A) 8 nA (B) 40 pA (C) 2.6 nA (D) 80 pA Common Data Questions (for Next Two Questions) : The parameters in the base region of an npn bipolar transistor are Dn 20cm2 /s , nB0 104 cm3 , xB 1m and ABE 104 cm2 . (107) Calculate the saturation current. Ans. 3.2 1014 A magnitude of reverse Ans. (i) 7.75 A (ii) 0.368mA (iii) 17.5mA (108) Determine the collector current for (i) vBE 0.5V , (ii) vBE 0.6 V , and (iii) v BE 0.7 V . ----000000---- www.targate.org Page 83 Electronic Devices & Circuit Answer : 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. D B B A C D A D D D 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. * C D A B A D D C C 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. B * A A C B A C C A 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. C D BC C C B A D C B 41. 42. 43. 44. 45. 46. 47. 48. 49. 50. C C D B D D D D A C 51. 52. 53. 54. 55. 56. 57. 58. 59. 60. C B B C A A B A A A 61. 62. 63. 64. 65. 66. 67. 68. 69. 70. C B A D D C B B D D 71. 72. 73. 74. 75. 76. 77. 78. 79. 80. D D D C A B * * C * 81. 82. 83. 84. 85. 86. 87. 88. 89. 90. C B B * B * C C B A 91. 92. 93. 94. 95. 96. 97. 98. 99. 100. B C B D A A D B * A 101. 102. 103. 104. 105. 106. 107. 108. C D * 11. Decrease 22. A-3, B-1, C-1 77. 5.7 to 5.9 78. 378 to 381 80. 83.15 84. 6.55 to 6.75 86. 1475 100. 20 103. 2.50 to 3.00 107. 3.2 1014 A 108. (i) 7.75 A (ii) 0.368mA (iii) 17.5mA A C A * * . Page 84 TARGATE EDUCATION GATE-(EC / EE) 4 E-MOSFET 4.1 Theoretical Problem (5) Threshold Voltage (1) AA [GATE-EC-1994-IITKGP] The threshold voltage of an n-channel MOSFET can be increased by (A) Increasing the channel dopant concentration. (B) Reducing the channel dopant concentration. (C) Reducing the gate-oxide thickness (D) Reducing the channel length. (2) (A) Remain unchanged (B) Decrease (C) Change its polarity (D) Increase (6) B In a MOSFET, the threshold voltage can be lowered by Sign of threshold voltage P. An enhancement 1. Positive (A) increasing the gate oxide thickness (B) reducing the substrate concentration n - MOSFET (C) increasing the substrate concentration Q. Depletion nMOSFET 2. Negative R. An enhancement p-MOSFET 3. Negative S. Depletion p-MOSFET 4. Positive AA As source to body voltage is increased, the threshold voltage for n type MOSFET (A) Increases (B) Remains constant Codes: (C) Decreases (D) May take any arbitrary value (4) AD Match the following and choose the correct combination Types of MOSFET (D) using the dielectric of lower constant (3) AD[GATE-EC-2003-IITM] For an n – channel enhancement type MOSFET, if the source is connected at a higher potential than that of the bulk (i.e. VSB > 0), then threshold voltage VT of the MOSFET will AD The threshold voltage (VT) of a MOSFET is defined as (A) the drain-source voltage at which the transistor goes into saturation (B) the gate-source voltage at which the transistor goes into saturation (C) the drain-source voltage at which a predefined value of drain current starts flowing (D) the gate-source voltage at which a predefined value of drain current starts flowing. (7) P Q R S (A) 2 3 4 1 (B) 3 4 1 2 (C) 4 1 2 3 (D) 1 2 3 4 AD [GATE-EC-2016-IISc] A long-channel NMOS transistor is biased in the linear region with V D S 5 0 m V and is used as a resistance. Which one of the following statements is NOT correct? (A) If the device width is increased, the resistance decreases. (B) If the threshold voltage is reduced, the resistance decreases. www.targate.org Page 85 Electronic Devices & Circuit (C) If the device length is increased, the resistance increases. (D) If V G S is increased, the resistance increases. (8) AC [GATE-EC-2016-IISc] Consider the following statements for a metal oxide semiconductor field effect transistor (MOSFET) : P: As channel length reduces, OFF-state current increases. Q: As channel length reduces, output resistance increases. R: As channel length reduces, threshold voltage remains constant. S: As channel length reduces, ON current increases. Which of the INCORRECT ? above statements (A) P and Q (B) P and S (C) Q and R (D) R and S are Combined Problems (9) AB[GATE-EC-2001-IITK] The effective channel length of a MOSFET in saturation decreases with increase in (A) gate voltage (B) drain voltage (A) linear (B) I D is co m p letly ind ep end en t fro m V D S . (C) exponential (D) hyperbolic AB (13) In the triode region, the I D V DS characteristics of a MOSFET (for small value of VDS ) is: (A) hyperbolic (B) linear (C) quadratic (D) exponential AC (14) The source-bias circuit of figure provided dc biasing for the FET. The resistance from gate to ground (Rg) in that circuit is necessary because without it, (A) the input time-constant will become infinity (B) the input ac signal will have no path to gate terminal (C) the circuit will actually work fine; R1 really necessary (D) it consumes no static power (C) source voltage (D) body voltage AA (10) The achieve the same ON resistance, with the same magnitudes of bias voltages, (A) a PMOS transistor requires a larger area than an NMOS transistor (B) an NMOS transistor requires a larger area than a PMOS transistor (C) a PMOS transistor must have twice the channel length of an NMOS transistor (D) a PMOS transistor must have twice the threshold voltage of an NMOS transistor AC (11) The unity gain frequency f T for a MOSFET (A) increase with increase in channel length (B) increase with increase in transistor width (C) increase with decrease in channel length (D)stays constant for all channel length Page 86 AB (12) In the saturation region, the I D - V D S characteristics of a MOSFET are (Assuming channel width modulation is neglected): AFALSE[GATE-EC-1994-IITKGP] (15) Channel current is reduced on application of a more positive voltage to the GATE of the depletion mode n-channel MOSFET. (True/False) AB [ESE-EC-2008] (16) In a MOSFET, the transfer characteristics can be used to determine which of the following device parameters ? (A) Threshold voltage and output resistance (B) Trans-conductance and output resistance (C) Threshold voltage and transconductance (D) Trans-conductance and channel length modulation parameter AB [ESE-EC-2005] (17) A MOSFET device has both n+type source and drain, and the drain current flows only when gate to source voltage exceeds +2.0V. Which of the following conclusions can be drawn about the device? 1. The device is an n-channel MOSFET 2. It is enhancement type MOSFET TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET 3. It has threshold voltage of value +2.0 V 4. The channel conductance is determined by hole mobility Select the correct answer from the code given below: (A) 1 and 3 (B) 1, 2 and 3 (C) 2 and 4 (D) 1, 2, 3 and 4 (C) heavily doped polycrystalline (D) epitaxial grown silicon AD (23) A MOSFET is a : (A) Minority diffusion device (B) Majority diffusion device. (C) Minority drift device. (D) Majority drift device. AC (18) Choose the correct statement (A) Both MOSFET and BJT are voltage controlled devices (CDs) (B) Both MOSFET and BJT are current CDs (C) MOSFET is a voltage CD whereas BJT is a current CD (D) MOSFET is a current CD whereas BJT is a voltage CD AC [ESE-EC-2011] (19) In a transconductance, the device output (A) Voltage depends upon the input voltage (B) Voltage depends upon the input current AD [GATE-EC-2009-IITR] (24) Consider the following two statements about the internal conditions in an n-channel MOSFET operating in the active region. S1 : The inversion charge decreases from source to drain. S2 : The channel potential increases from source is drain which of the following is correct. (A) Only S2 is true. (B) Both S1 and S2 are false (C) Both S1 and S2 are true, but S2 is not a reason for S1. (D) Both S1 & S2 are true, and S2 is a reason for S1. AD [GATE-EC-1989-IITK] (25) In a MOSFET, the polarity of the inversion layer is the same as that of the (C) Current depends upon the input voltage (A) Charge on the Gate-electrode (D) Current depends upon the input current (B) Minority carries in the drain AD [ESE-EC-2012] (20) A gate to drain-connected enhancement mode MOSFET is an example of (A) an active load (B) a switching device (C) a three - terminal device (C) Majority carries in the substrate (D) Majority carries in the source AB [GATE-EC-1988-IITKGP] (26) In MOSFET devices the n-channel type is better than the P-channel type in the following respects (A) It has better noise immunity (D) Saturation mode (B) It is faster AD (21) Choose the correct statement (A) MOSFET has positive temperature coefficient (TC) whereas BJT has negative TC (B) Both MOSFET positive TC and BJT have (C) Both MOSFET and BJT have negative TC (D) MOSFET has negative TC whereas BJT has positive TC. AC [ESE-EC-1995] (22) In modern MOSFETs, the material used for the gate is (A) high purity silicon (B) high purity silica (C) It is TTL compatible (D) It has better drive capability AD [GATE-EC-2013-IITB] (27) In a MOSFET operating in the saturation region, the channel length modulation effect causes (A) An increase capacitance in the gate-source (B) A decrease in the transconductance (C) A decrease in the unity-gain cutoff frequency (D) A decrease in the output resistance AA [GATE-EE-1999-IITB] (28) An enhancement type n-channel MOSFET is represented by the symbol. www.targate.org Page 87 Electronic Devices & Circuit (A) (A) an n-channel depletion mode device. (B) an n-channel enhancement mode device. (B) (C) a p-channel depletion mode device. (D) a p-channel device. (C) (D) AC [GATE-EC-2008-IISC] (29) The measured Tran conductance g m of an NOMS transistor operating in the linear region is plotted against the gate voltage VG at a Constant drain voltage VD. Which of the following figures represents the expected dependence of g m on VG? enhancement mode AB [GATE-EC-2008-IISC] (31) The drain current of a MOSFET in saturation is given by ID K(VGS VT )2 Where ‘K’ is constant. Then g m ? (A) K (VGS VT ) 2 VDS (B) 2 K (V G S V T ) (A) (C) Id VGS VDS (D) K (VGS VT ) 2 VGS AB [ESE-EC-2002] (32) Match List-I with List-II (For a N-MOSFET) and select the correct answer using codes given below the lists: (B) List I (A) List II OFF 1 Vgs Vth , and Vds (Vgs Vth ) (B) Linear region 2 V d s V th , and Vds (Vgs Vth ) (C) (C) Non-linear 3 Vgs Vth , and Vds (Vgs Vth ) (D) Saturation region 4 Vgs Vth Codes: (D) AC [GATE-EE-2003-IITM] (30) The variation of drain current with gate-tosource voltage ( I D VGS characteristic) of a MOSFET is shown below. The MOSFET is: (A) A 2 B 3 C 1 D 4 (B) 4 1 3 2 (C) 2 1 3 4 (D) 4 3 1 2 AC[ESE-EC-2014] (33) What is an advantage of MOS transistor structure in integrated circuits? (A) Faster switching (B) Less capacitance (C) Higher component density and lower cost (D) Lower resistance Page 88 TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET AD[ESE-EC-2015] (34) Statement (I): Conduction takes place in an enhancement MOSFET only for gate voltages below the threshold level. Statement (II): In an enhancement MOSFET, a channel of semiconductor of the same type as the source and drain is induced in the substrate by a positive voltage applied to the gate. (A) Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I). (B) Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I). (C) Statement (I) is true but Statement (II) is false. AD[ESE-EE-2006] (37) What is the main difference between MOSFETs and BJTs in terms of their I-V characteristics? (A) Current is quadratic with VGS for MOSFETs and linear with VBE for BJTs (B) Current is linear with VGS for MOSFETs and exponential with VBE for BJTs (C) Current is exponential with VGS / VBE in both these devices, but rise is faster in MOSFETs (D) Current is quadratic with VGS for MOSFETs and exponential with VBE for BJTs AB[ESE-EE-2010] (38) The FET shown in the figure below is a (D) Statement (I) is false but Statement (II) is true. AB[ESE-EC-2015] (35) Statement (I): MOSFET is a field effect transistor whose drain current is controlled by the voltage applied at the gate. Statement (II): MOSFET is an insulated gate FET. (A) Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I). (B) Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I). (C) Statement (I) is true but Statement (II) is false. (D) Statement (I) is false but Statement (II) is true. AA[ESE-EC-2016] (36) The figure shown represents (A) n-channel MOSFET (B) Enhanced-mode E-MOSFET (C) p-Chann MOSFET (D) J-FET (A) Common drain (B) Common gate (C) Common source (D) Common source follower AC[ESE-EE-2013] (39) The regions of operation of a MOSFET to work as a linear resistor and linear amplifier are (A) cut-off and saturation respectively (B) triode and cut-off respectively (C) triode and saturation respectively (D) saturation and triode respectively AC[ESE-EE-2013] (40) Statement (I): MOSFET's are intrinsically faster than bipolar devices. Statement (II): MOSFET's have excess minority carrier. (A) Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I). (B) Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I). (C) Statement (I) and is true but Statement (II) is false. (D) Statement (I) is false but Statement (II) is true. www.targate.org Page 89 Electronic Devices & Circuit B & B AC (41) The below figure shows the sketches of the iD VGS characteristic of MOSFETS of enhancement & depletion types of both polarities (operating in saturation). Consider the following table Test AC (45) For PMOS, the n-type substrate is connected to the (A) gate terminal (B) most negative potential of the circuit (C) most positive potential of the circuit (D) source terminal Test AC (46) The trans-conductance ‘ g m ’ of a MOSFET is given by (A) Sl. No. Type of MOSFET I n channel enhancement type II p channel depletion type III p channel enhancement type IV n channel depletion type From the iD VGS characteristics and the above table which of the following correct? (A) P-II, Q-III, R-I, S-IV (B) P-II, Q-III, R-IV, S-I (C) P-III, Q-II, R-IV, S-I (D) P-I, Q-III, R-IV, S-II B & B AD (42) In a depletion MOSFET grown on a substrate. Which region has highest resistivity (A) source (B) drain (C) channel (D) substrate B & B AD (43) In MOSFET channel length modulation is characterized by . If channel length is ‘L’ then (A) is proportional to L2 (B) is proportional to L (C) is inversely proportional to L2 (D) is inversely proportional to L Test AC (44) In an n-channel EMOSFET, a low threshold voltage can be achieved by (A) using the gate dielectric of lower dielectric constant (B) increasing the substrate doping concentration (C) decreasing the substrate doping concentration (D) using the thick gate oxide Page 90 2 I DSS Vp (B) 2 I DSS I DS | Vp | (C) 2 n Cox (D) I DSS VGS 1 V p V p w ID L ********** 4.2 Combined Numer. Problem AB[GATE-EC-2010-IITG] (47) At room temperature, a possible value for the mobility of electrons in the inversion layer of a silicon n-channel MOSFET is (A) 4 5 0 cm 2 /V -s (B) 1 3 5 0 cm 2 /V -s (C) 1 8 0 0 cm 2 /V -s (D) 3 6 0 0 c m 2 /V -s A0.018 - 0.026[GATE-EC-2015-IITK] (48) The current in an enhancement mode NMOS transistor biased in saturation mode was measured to be 1 mA at a drain-source voltage of 5 V. When the drain-source voltage was increased to 6 V while keeping gate-source voltage same, the drain current increased to 1.02 mA. Assume that drain to source saturation voltages is much smaller than the applied drain-source voltage. The channel length modulation parameter (in V–1) is ______ . AD [GATE-EC-2003-IITM] (49) When the gate – to – source voltage (VGS) of - a MOSFET with threshold voltage of 400 mV, working in saturation is 900 mV, the drain current is observed to be 1 mA, Neglecting the channel width modulation effect and assuming that the MOSFET is operating at saturation. The drain current for an applied VGS of 1400 m V is TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET (A) 0.5 mA (C) 3.5 mA (B) 2.0 mA (D) 4.0 mA AD [GATE-EC-2004-IITD] (50) The drain of an n-channel MOSFET is shorted to the gate so that VGS = VDS. The threshold voltage (VT) of – MOSFET is 1 V. If the drain current ID is 1 mA for VGS = 2 V ,then for VGS = 3 V, ID is (A) 2 mA (B) 3 mA (C) 9 mA (D) 4 mA List-I A. The current gain of a BJT will be increased B. The current gain of a BJT will be reduced C. The break-down voltage of a BJT will be reduced List II 1. The collector doping concentration is increased 2. The base width is reduced. 3. The emitter doping concentration to base doping concentration ratio is reduced 4. The base doping concentration is increased keeping the ratio of the emitter doping concentration constant 5. The collector doping concentration is reduced A0.06to0.08 [GATE-EC-2014-IITKGP] (52) The slope of the ID vs. VGS curve of an nchannel MOSFET in linear regime is 10 3 1 at V DS = 0.1 V. For the same device, neglecting channel length modulation, the slope of the I D Vs V GS A /V A28-29 [GATE-EC-2016-IISc] (56) Consider an n-channel metal oxidesemiconductor field effect transistor (MOSFET) with a gate-to-source voltage of 1.8 AA-2,B-3,C-1[GATE-EC-1994-IITKGP] (51) Match the following : curve in A20[GATE-EC-2015-IITK] (55) A MOSFET in saturation has a drain current of 1 mA for V S S 0 .5 V . If the channel length modulation coefficient is 0.05 V–1, the output resistance (in k ) of the MOSFET is _______. under saturation regime is approximately --------. A499to501 [GATE-EC-2014-IITKGP] (53) A depletion type N-channel MOSFET is biased in its linear region for use as a voltage controlled resister. Assume threshold voltage VTH = -0.5 V, VGS = 2.0 V, VDS = 5V, W/L = 100, COx = 10-8 F/cm2 and µn = 800 cm2/V-S. The value of the resistance of the voltage controlled resistor (in ) is _______. A(switching)[GATE-EC-1994-IITKGP] (54) The transit time of a current carriers through the channel of an FET decides it ______ Characteristics. V. Assume that W 4, L N C ox 70 10 6 AV 2 , the threshold voltage is 0.3V, and the channel length modulation parameter is 0.09 V 1 . In the saturation region, the drain conductance (in micro seimens) is _______. Common Data questions (for Next Two Questions) Design the circuit in fig. to obtain a current I D of 80 A . Let the NMOS transistor have Vt 0.6 , n C ox 200 A/V 2 , L 0.8 m and W 4 m . Neglect the channel-length modulation effect (i.e., assume 0). 25 KOhms (57) Find the value required for R = ___ in ohms. +1 Volts (58) Find the dc voltage V D _ __ __ _ in V olts . . Common Data questions (for next three questions) In the circuit in below figure to establish a drain voltage of 0.1 V. Let V t 1 V and k ' n ( W /L ) 1 m A /V 2 . Find the : www.targate.org Page 91 Electronic Devices & Circuit A 12.4 (59) Drain Resistance RD ________ in K-Ohms? A253 (60) Effective resistance between drain and source ( rds ____ in ). A0.395 (61) Drain current (ID) _______ in mA? Common Data questions (for Next Three Questions) The MOSFET in below figure has VT 1V and 2 n C ox (W/L) = 1 mA/V . Determine the drain current ………..in mA, and mode of operation for the following cases : 0mA (cutoff) (62) F o r V G 0 .5 V , R D 1 k 0.5mA (sat) (63) F or V G 2 V , R D 1 k 0.29mA(triode) (64) F or V G 2 V , R D 1 0 k AB (67) The parameter of the transistor in below figure are VTN = 1.2 V, 1 n C ox W / L = 0.5 2 mA/V2 and = 0. The voltage VDS is (A) 1.69 V (B) 1.52 V (C) 1.84 V (D) 0 AB (68) The parameters for the transistor in circuit of given figure are VTN = 2V, 1 n C ox W / L 0.2 A / V 2 . 2 The power dissipated in the transistor is (65) The transistor in below figure has VT 1V and n C o x ( W /L ) 2 m A /V 2 . Determine the drain voltage. (A) 5.84 mW (B) 2.35 mW (C) 0.26mW (D) 58.4 mW AC [GATE-EC-2005-IITB] (69) For an n-channel MOSFET and its transfer curve shown in the figure, the threshold voltage is: Ans.: V D 2 .9 V A2.35 mW (66) The parameters for the transistor shown below are VTN 2 V 1 and n C ox (W /L ) 0.2 mA/V 2 . The 2 power dissipated in the transistor is ____ mW. Page 92 TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET transconductance parameter ' kN nCOX (W/L) 40A/V2 , threshold voltage V TN 1 V , and neglect body effect and channel length modulation effects) (A) 1 V and the device is in active region (B) 1 V and the device is in saturation region (C) 1 V and the device is in saturation region (D) 1 V and the device is in active region. T15 / K / L1 / V1 / R4 AC (70) For the n-channel enhance MOSFET shown below. The threshold voltage Vth = 2 V. The drain current I D of the MOSFET is 4 mA when the drain resistance RD is 1 k. If the (A) 12.5 (B) 25 (C) 50 (D) 100 AC [GATE-EC-2014-IITKGP] (73) For the n-channel MOS transistor shown in the figure the threshold voltage VTh is 0.8 V. Neglect channel length modulation effects. When the drain voltage VD = 1.6 V, the drain current I D was found to be 0.5 mA. If VD is adjusted to be 2 v by changing the values of R and VDD, the new value of ID (in mA) is : value of RD is increased to 4 k , drain current ID will become (A) 2.8 mA (B) 2.0 mA (C) 1.4 mA (D) 1.0 mA A1.4to1.6 [GATE-EC-2014-IITKGP] (71) For the MOSFET M1, shown in the figure assume W/L = 2, V DD = 2.0 V, µn C ox = 100 A / V 2 and VTH = 0.5 V. The transistor M switches from saturation region to linear when V in (in Volts) is ______. AB[GATE-EC-2013-IITB] (72) The small-signal resistance (i.e., dV B / d I D ) in k offered by the n-channel MOSFET M shown in the figure below, at a bias point of V B 2 V is (device data for M : device (A) 0.625 (B) 0.75 (C) 1.125 (D) 1.5 AA[GATE-EC-2013-IITB] (74) The ac schematic of an NMOS commonsource stage is shown in the figure below, where part of the biasing circuits has been omitted for simplicity. For the n-channel MOSFET M, the transconductance g m 1 m A/V , and body effect and channel length modulation effect are to be neglected. The lower cut-off frequency in Hz of the circuit is approximately at (A) 8 (B) 32 (C) 50 (D) 200 AD[GATE-EC-1998-IITD] (75) In the MOSFET amplifier of the figure is the signal output V 1 and V 2 obey the relationship www.targate.org Page 93 Electronic Devices & Circuit (A) V1 (C) V2 2 V 1 2V 2 (B) V1 (D) V2 2 V 1 2V 2 A1[GATE-IN-2015-IITK] (76) In the circuit shown, the voltage source v(t ) 15 0.1sin (100 t ) . The PMOS transistor is biased such that it is in saturation with its gate-source capacitance being 4 nF and its transconductance at the operating point being 1 mA/V. Other parasitic impedances of the MOSFET may be ignored. An external capacitor of capacitance 2 nF is connected across the PMOS transistor as shown. The input impedance in mega ohm as seen by the voltage source is _____ M . (A) (B) (C) AD [GATE-EE-2004-IITD] (77) The value of R for which the PMOS transistor in figure will be biased in linear region is: (A) 220 (B) 470 (C) 680 (D) 1200 AA[GATE-EC-2015-IITK] (78) For the NMOSFET in the circuit shown, the threshold voltage is Vth , where V th 0 . The source voltage VSS is varied from 0 to V D D . Neglecting the channel length modulation, the drain current I D as a function of VSS is represented by Page 94 (D) AD[GATE-EE-2005-IITB] (79) Assume that the N-channel MOSFET shown in the figure is ideal, and that its threshold voltage is +1.0 V the voltage V a b between nodes a and b is (A) 5 V (B) 2 V (C) 1 V (D) 0 V TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET AB (80) For the circuit shown below, both transistors are identical and has following parameters : W n Cox 2.5A/V 2 ,VTH 1V, 3 L (A) 1 V (C) 3 V (B) 2 V (D) 4 V AC [GATE-EC-2008-IISc] (84) Two identical NMOS transistor M1 and M2 Current I1 and respectively, (A) 1 5 A , 3 V voltage V2 are are connected as shown below. Vbias is chosen. So that both transistor are in saturation. The equivalent gm of the pair is defined to be (B) 0.9375 A,1.5 V (C) 1 5 A ,1 .5 V I out at constant Vout . Vi (D) 7.5 A , 3 V Common Data Questions (for next two Questions) Consider the circuit shown below The equivalent gm of the pair is: (A) the sum of individual gm ‘s of the transistors (B) the product of individual gm’s of the transistors (C) nearly equal to the gm of M1 Both transistors have parameters as follows: V T N 0 .8 V ,. k ' n 3 0 A / V 2 A2.5 (81) If the width-to-length ratios of M 1 and M2 W W are 40 , the output V0 is ___V. L 1 L 2 A2.91 W (82) If the width-to-length ratios of 40 L 1 W and 15 , then V 0 is ….. volts. L 2 (D) nearly equal to the gm of M2 AB[GATE-EC-2008-IISc] (85) For the circuit shown in the following figure, transistors M 1 and M 2 are identical NMOS transistors. Assume that M 2 is in saturation and the output is unloaded. AC [GATE-EC-2005-IITB] (83) Both transistors T1 and T2 show in the figure have threshold voltage of 1 volts. The device parameters K1 and K2 of T1 and T2 are respectively, 36 µA/ V 2 and 9µA / V 2 . The output voltage V0 is: www.targate.org Page 95 Electronic Devices & Circuit AB [GATE-EE-2019-IITM] (88) Given, Vgs is the gate-source voltage, Vds is The current I x is related to I b i a s as (A) I x I b ia s I s the drain source voltage, and Vth is the threshold voltage of an enhancement type NMOS transistor, the conditions for transistor to be biased in saturation are (B) I x I bias (C) I x I b ia s I s (D) I x Ibias VDD Vout RE (A) Vgs Vth ;Vds Vgs Vth AC (86) For the above circuit, transistors Q1 and Q2 have aspect ratio as W & L 1 W . L 2 The current I is given by (B) Vgs Vth ;Vds Vgs Vth (C) Vgs Vth ;Vds Vgs Vth (D) Vgs Vth ;Vds Vgs Vth L AC [GATE-EE-2019-IITM] (89) The enhancement type MOSFET in the circuit below operates according to the square law. n Cox 100A/V 2 , the threshold voltage (VT ) is 500 mV. Ignore channel length modulation. The output voltage Vout is : (A) I ref W L 2 Iref (C) W L 1 (B) W L 1 Iref W L 2 (D) None A3 [GATE-EC-2015-IITK] (87) In the circuit shown, both the enhancement mode NMOS transistors have the following characteristics: kn nCox (W/ L) 1mA/ V2 ; VTN 1V . Assume that the channel length modulation parameter is zero and body is shorted to source. The minimum supply voltage VDD (in volts) needed to ensure that transistor M1 operates in saturation mode of operation is _____. Page 96 (A) 100 mV (C) 600 mV (B) 500 mV (D) 2 V 10.1 [GATE-IN-2017-IITR] (90) In the circuit, shown in the figure, the MOSFET is operating in the saturation zone. The characteristics of the MOSFET is given 1 2 by I D VGS 1 mA , where VGS is in V. 2 if VS 5V , then the value of R S in k is _______. TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET AC [GATE-EC-2017-IITR] (91) Assuming that transistors M 1 and M 2 are identical and have a threshold voltage of 1 V, the state of transistors M 1 and M 2 are respectively (A) +5 (B) 7.5 (C) +10 (D) 10 A5.9 to 6.1[GATE-EC-2019-IITM] (94) In the circuit shown, V1 = 0 and V2 = Vdd. The other relevant parameters are mentioned in the figure. Ignoring the effect of channel length modulation and the body effect, the value of Iout is _____mA (rounded off to 1 decimal place). (A) Saturation, Saturation (B) Linear, Linear (C) Linear, Saturation (D) Saturation, Linear Common Data Questions (for Next Two Questions) : Assume that the threshold voltage of the Nchannel MOSFET shown in figure is +0.75 V. The output characteristics of the MOSFET are also shown. A–905.0 to –895.0 OR 895.0 to 905.0 [GATE-EC-2019-IITM] (95) In the circuit shown, the threshold voltages of the pMOS (|Vtp |) and nMOS (Vtn ) transistors are both equal to 1V. All the transistors have the same output resistance rds of 6 M . The other parameters are listed below : W n C ox 60A/V 2 ; 5 L nMOS W p Cox 30A/V 2 ; 10 L pMOS n and µp are the carrier mobilities, and Cox is the oxide capacitance per unit area. Ignoring the effect of channel length modulation and body bias, the gain of the circuit is _____ (rounded off to 1 decimal place). AB [GATE-EE-2005-IITB] (92) The transconductance of the MOSFET is : (A) 0.75 mS (B) 1 mS (C) 2 mS (D) 10 mS AD [GATE-EE-2005-IITB] (93) The voltage gain of the amplifier is : www.targate.org Page 97 Electronic Devices & Circuit A4 [GATE-IN-2019-IITM] (96) In the circuit shown below, all transistors are n-channel enhancement mode MOSFETs. They are identical and are biased to operate in saturation mode. Ignoring channel length modulation, the output voltage Vout is ______ V. - 63 [GATE-EC-2016-IISc] (97) In the circuit shown in the figure, transistor M1 is in saturation and has transconductance gm = 0.01 siemens. Ignoring internal parasitic capacitances and assuming the channel length modulation to be zero, the small signal input pole frequency (in kHz) is ________ AC[GATE-EC-2011-IITM] (98) In the circuit shown below, for the MOS transistors, n Cox 100A/V2 and the threshold voltage VT 1V . The voltage V x at the source of the upper transistor is A20[GATE-IN-2015-IITK] (99) In the circuit shown in the figure, both the NMOS transistors are identical with their threshold voltages being 5 V. Ignoring channel length modulation, the output voltage Vout in volt is _____ V. A0.45-0.55 [GATE-EC-2017-IITR] (100) Consider an n-channel MOSFET having width W, length L, electron mobility in the channel n and oxide capacitance per unit area Cox . If gate-to-source voltage VGS 0.7 V , VDS 0.1V . ( n C ox ) = 100 A / V 2 , threshold voltage VTH 0.3 V and (W/L) = 50, then the trans-conductance g m (in mA/V) is _____. AB [GATE-EC-2017-IITR] (101) Two n-channel MOSFETs, T1 and T2, are identical in all respects except that the width of T2 is double that of T1. Both the transistors are biased in the saturation region of operation, but the gate overdrive voltage ( VGS VTH ) of T2 is double that of T1, where VGS and VTH are the gate-to-source voltage and threshold voltage of the transistors, respectively. If the drain current and transconductance of T1 are I D1 and g m1 respectively, the corresponding values of these two parameters for T2 are (A) 8 I D 1 and 2 g m1 (B) 8 I D 1 and 4 g m1 (C) 4 I D 1 and 4 g m1 (D) 4 I D 1 and 2 g m1 A0.41-0.435 [GATE-EC-2018-IITG] (102) In the circuit shown below, the (W / L ) value for M 2 is twice that for M 1 . The two nMOS transistors are otherwise identical. The threshold voltage VT for both transistors is 1.0V.Note that VGS for M 2 must be>1.0 V. Current through the nMOS transistors can be modeled as (A) 1 V (B) 2 V (C) 3 V (D) 3.67 V Page 98 1 2 W I DS C ox (VGS VT )VDS VDS 2 L for V DS VGS VT TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET range of Vtn that results, if 0.5V1/2 and 2 f 0.6 V W I DS Cox (VGS VT )2 / 2 L for V DS VGS VT (A) 1V to 1.9 V (B) 1V to 1.69 V (C) 1V to 1.5 V (D) 1V to 1.2 V B & B A7.2 to 7.3 (107) A particular NMOS device has parameters VTN 1V , L 2.5m , tox 400 A , and The voltage (in volts, accurate to two decimal places) at V x is _______. A25.40 to 25.60 [GATE-EC-2019-IITM] (103) Consider a long-channel MOSFET with channel length 1 m and width 10 m . The device parameters are acceptor concentration NA 5 1016 cm3 , electron mobility n 800cm2 /V-s , oxide capacitance/area Cox 3.45 107 F/cm2 , threshold voltage VT 0.7 V . The drain saturation current (IDsat) for a gate voltage of 5 V is ____ mA (rounded off to two decimal places). [ 0 8.854 1014 F/cm,εsi 11.9 ] AA[ESE-EE-2009] (104) Two MOSFETs M 1 and M 2 are connected in parallel to carry a total current of 20A. The drain to source voltage of M 1 is 2.5V n 600cm 2 /V-S . A drain current of I D 1.2 mA is required when the device is biased in the saturation region at VGS 5 V . The necessary channel width of the device is ___ m . B & B AA (108) Consider an NMOS device with parameters VTNO 1V and f 0.37V . Determine the maximum value of such that the shift in threshold voltage between VSB 0 and VSB 10 V is no more than 1.2V. (A) 0.496V 1/ 2 (B) 0.496V 2 (C) 0.298V 1/2 (D) 0.356V 1/ 2 Test A45 (109) The drain current in a NMOS transistor with W VT 1V , n Cox 0.003A/V 2 with the L terminal voltages as VGS 1.2V , VDS 0.1V is _____ 106 A . and that of M 2 is 3V. What are the currents of M 1 and M 2 when the current sharing series resistance are each of 0.5 ? (A) 10.5 A and 9.5 A (B) 9.5 A and 10.5 A (C) 10.5 A and 10.5 A (D) 9.5 A and 9.5 A B & B AC (105) For 0.8 m process technology, t ox 15 nm ,ox 3.45 10 11 , n 550cm 2 / V s . The minimum value of VDS required to operate the transistor (having W/L=20) in saturation region with I D 0.2 mA is (A) 0.80 V (C) 0.40 V Test AC I (110) Ratio of D in linear region to the VGS I D in saturation region in enhancement VGS type NMOS is VDS (A) 2(VGS VT ) (B) VDS (C) VGS VT (D) 2 2VDS (VGS VT ) (VGS VT ) (VDS ) Test A1.80 to 2.20 (111) An ideal n-channel MOSFET has the parameters W 15 m , (B) 0.20 V (D) 0.6 V n 1350 cm 2 /V-sec , L 1.5 m , 0 B & B AB (106) In a particular application, an n channel MOSFET operates with VSB in the range of 0V to 4V. If Vtno is nominally 1.0 V, find the tox 350A and VTn 0.8V . If the transistor is operating in linear region at VDS 1.5 V , then the value of g m (transconductance) is approximately ______ mS. (Assume 0 x 3.9 0 , 0 8.85 10 12 F/m ) www.targate.org Page 99 Electronic Devices & Circuit Test A3.00 to 3.50 (112) The n-channel EMOSFET used in the below circuit has VT 1V and W n Cox 0.3mA/V 2 . Then the value of L V0 is _____ V. Test A4.80 to 5.00 (113) In an n-channel enhancement mode MOSFET, parameters are VTN 1.5V and Ans. –1.52 V (118) Calculate the flat-band voltage. Ans. –0.764 V (119) Calculate the threshold voltage. AA (120) The experimental characteristics of an ideal n-channel MOSFET biased in the saturation region are shown in Figure. If W / L 10 and 0 tox 425A , determine VT and n 1 W n Cox 0.40 mA/V 2 . If VGS 5V 2 L and VDS 6V , then the current I D is _____ mA. (Assume the effect of channel length modulaiton is negligible). Test A12.00 to 13.00 (114) An n-channel MOSFET is characterised by following parameters. I D 0.2 mA , VGS 4.8V , VTN 0.8 . If the transistor is working in saturation mode, the conduction 1 W parameter K n n Cox is __________ 2 L (A/V 2 ) . Test A78.00 to 78.50 (115) For a n-channel enhancement MOSFET the parameter are VTN 0.8V, kn 5mA/V 2 and VGS 2.4 V . If the transistor is biased in saturation region with I D 0.5 mA . The W required is : L Test A0.5 w (116) For a MOSFET, n Cox 1mA/V 2 & L n VTn 1V . The drain current (mA) for VGS 2V is _____. Ans. 1.71 1016 cm3 (117) An MOS transistor with an aluminum gate is fabricated on a p-type silicon substrate. The oxide thickness is tox 750 A , and the equivalent fixed oxide charge is 11 2 . The measured threshold Q ss' 10 cm voltage is VT 0.80 V . Determine the ptype doping concentration. Common Data Questions (for Next Two Questions) : An Al-silicon dioxide-silicon MOS capacitor has (A) 0.2V ,342cm 2 /V-sec (B) 0.7 V ,342cm 2 /V-sec (C) 0.2V ,115cm 2 /V-sec (D) 0.7 V ,115cm 2 /V-sec Common Data Questions (for Next Two Questions) : An n-channel MOSFET has the following parameters : n 400 cm 2 /V-s I ,,, 500A L 2 m W 20 m VT 0.75V Assume the transistor is biased in the saturation region at VGS 4 V . Assume that the gate oxide overlaps both the source and drain contacts by 0.75 m . If a load resistance of RL 10 k is connected to the output. AC (121) Calculate the ideal cutoff frequency. (A) 9.30GHz (B) 4.5GHz (C) 5.17 GHz (D) 0.71GHz AD 0 an oxide thickness of 450 A and a doping of N a 1015 cm 3 . The oxide charge density is Q 'ss 3 1011 cm 2 . Page 100 (122) Calculate the cutoff frequency. (A) 3.7 GHz (B) 2.0GHz (C) 5.4 GHz (D) TARGATE EDUCATION GATE-(EC / EE) 1.0GHz TOPIC 4 : E-MOSFET 4.3 CMOS AB [ESE-EC-2005] (123) Consider the following statements related to a CMOS (Complementary metal oxide semiconductor) inverter: 1. It combines an n-channel and a pchannel MOS transistor. 2. For binary 1 input, both transistors are OFF. 3. For binary 0 input, both transistors are ON. 4. Whatever is the state of input, one transistor is ON while the other is OFF. Which of the statements given above are correct? (A) 1, 2, 3 and 4 (B) 1 and 4 (C) 1, 2 and 3 (D) 3 and 4 AA (124) Consider the following statements: In a CMOS inverter 1. One transistor is N-channel and the other is P-channel 2. Both the transistor are enhancement type 3. One transistor is enhancement type and the other is depletion type 4. Both the transistor are N-channel Of these statements (A) 1 and 2 are correct (B) 2 and 4 are correct (C) 1 and 3 are correct (D) 3 and 4 are correct AD (125) Of all logic families, CMOS has become the most preferred, and exclusive, logic style for VLSI and ULSI circuits because (Select the best most answer:) (A) it is the fastest of all logic families (B) it is the most immune to noise AB (127) In the CMOS inverter out of two transistors used: 1. Both are of enhancement type. 2. One transistor is n – channel and the other p – channel. 3. Both are n – channel with one enhancement and the other depletion type 4. One transistor is enhancement and the other is depletion type. Of the above 4 statement, the correct statement is: (A) Only 4 (B) 1 and 2 (C) 1 and 3 (D) None AC [GATE-EC-2004-IITD] (128) Given figure is the voltage transfer characteristic of: (A) An NMOS inverter with enhancement mode transistor as load (B) An NMOS inverter with depletion mode transistor as load (C) A CMOS inverter (D) A BJT inverter Statement For Linked Answer Questions for Next Two Questions : Consider the CMOS circuit shown, where the gate voltage V0 of the n-MOSFET is increased from zero, while the gate voltage of the pMOSFET is kept constant at 3 V. Assume that, for both transistors, the magnitude of the threshold voltage is 1 V and the product of the transconductance parameter and the (W/L) ratio, 2 i.e. the quantity C o x ( W /L ) , is 1mA V . (C) all types of logic gates can be designed in it easily (D) it almost consumes no static power AB[GATE-EC-2010-IITG] (126) Thin gate oxide in a CMOS process is preferably grown using (A) wet oxidation (B) dry oxidation (C) epitaxial deposition (D) ion implantation AD[GATE-EC-2009-IITR] (129) For small increase in VG beyond 1 V, which of the following gives the correct description of the region of operation of each MOSFET ? www.targate.org Page 101 Electronic Devices & Circuit (A) Both the MOSFETs are in saturation region (B) Both the MOSFETs are in triode region (C) n-MOSET is in triode and pMOSFET is in saturation region (D) n-MOSET is in saturation and pMOSFET is in triode region AD[GATE-EC-2009-IITR] (130) Estimate the output voltage V 0 for VG 1.5 V . [Hints : Use the appropriate current-voltage equation for each MOSFET. 1 1 V V (A) 4 (B) 4 2 2 (C) 4 3 V 2 (D) 4 A0.210 to 0.230[GATE-EC-2019-IITM] (133) A CMOS inverter, designed to have a midpoint voltage V1 equal to half of Vdd, as shown in the figure, has the following parameters : Vdd 3 V n Cox 100A / V2 ;Vtn 0.7V for nMOS n Cox 40A / V2 ;| Vtp | 0.9V for pMOS W W The ratio of to is equal to L n L p ____ (rounded off to 3 decimal places). 3 V 2 AA [GATE-EC-2012-IITD] (131) In the CMOS circuit shown, electron and hole mobilities are equal, and M1 and M2 are equally sized. The device M1 is in the linear region if AA[GATE-EC-2002-IISc] (134) Consider the following statements in connection with the CMOS inverter in the figure, where both the MOSFETs are of enhancement type and both have a threshold voltage of 2V. Statement 1 : T1 conducts when V 1 2 V (A) V in 1 .8 7 5 V (B) 1 .8 7 5 V V in 3 .1 2 5 V (C) V in 3 .1 2 5 V (D) 0 V i n 5 V Statement 2 : T1 is always in saturation when V 0 0 V . AC [GATE-EC-2007-IITK] (132) In the CMOS inverter circuit shown, if the transconductance parameters of the NMOS and PMOS transistor are Wp Wn PCox 40A / V 2 Ln Lp and magnitude their threshold voltages are V T 1V , the current I is. Kn K p nCOX (A) Only Statement 1 is TRUE (B) Only Statement 2 is TRUE (C) Both the statements are TRUE (D) Both the statements are FALSE A0.90 [GATE-EC-2014-IITKGP] (135) For the MOSFETs shown in the figure the threshold voltage |Vt| = 2V and K 1 Cax W 0.1mA/ V 2 . The value of ID (A) 0A (B) 25 A (C) 45 (D) Page 102 2 L (in mA) is____. TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET answer : __________________ A: weak inversion (139) answer : __________________. AD[ESE-EE-2016] (136) In a 2 input CMOS logic gate, one input is left floating i.e. connected neither to ground nor to a signal. What will be the state of that input? (A) 1 (B) 0 (C) same as that of the other input (D) indeterminate (neither 1 nor 0) A: Accumulation (140) answer : __________________ *********** 4.4 MOS Cap. & Energy Band A:Strong inversion (141) Energy Band diagram AA [GATE-EC-2016-IISc] (137) The figure shows the band diagram of a Metal Oxide Semiconductor (MOS). The surface region of this MOS is in answer : __________________ A:Flat band (142) (A) inversion (C) depletion (B) accumulation (D) flat band Common Data questions (for Next Six questions) Label-in the "answer" space provided below the figure–the following MOS capacitor band diagrams as corresponding to accumulation, weak inversion, depletion, strong inversion, flat band or threshold. Use each possibility only once.A: Depletion answer : __________________ A:threshold (143) (138) answer : __________________. AD (144) For a MOS capacitor fabricated on a p-type semiconductor, strong inversion occurs when www.targate.org Page 103 Electronic Devices & Circuit (A) Surface potential is equal to Fermi potential. (B) Surface potential is negative Fermi potential. (C) Surface potential is negative and equal to equal to Fermi potential in magnitude. (D) Surface potential is positive and equal to twice the Fermi potential, AA [GATE-EC-2014-IITKGP] (145) If fixed positive charges are present in the gate oxide of an n-channel enhancement type MOSFET, it will lead to (A) A decrease in the threshold voltage (B) Channel length modulation (C) An increase in substrate leakage current (D) An increase in accumulation capacitance D [GATE-EC-2020-IITD] (146) The band diagram of a p-type semiconductor with a band-gap of 1 eV is shown. Using this semiconductor, a MOS capacitor having 2 VT H of 0.16V , C ox' of 100nF/cm and a metal work function of 3.87 eV is fabricated. There is no charge within the oxide. If the voltage across the capacitor is V T H , the magnitude of depletion charge per unit area (in C/cm2) is (Assume 0 x 3.9 0 , 0 8.85 10 12 F/m ). Sol. Given ms 0.693V Qs 4.8 10 8 C/cm2 flat band voltage VFB ms Qs Cox Cox ox 3.9 8.85 1014 7.67 10 8 F/cm 2 8 tox 450 10 VFB 0.693 4.8 108 7.67 10 8 VFB 1.32V AD (147) Consider the dc charge distribution of an ideal MOS capacitor shown in figure below What is the type of semiconductor and mode of biasing? (A) n-type, depletion (B) n-type, inversion (C) p-type, depletion (D) p-type, inversion AC (148) Consider the dc charge distribution of an ideal MOS capacitor shown in figure below (A) n-type, depletion (B) n-type, inversion (A) 1.41 10 8 8 (C) 0.52 10 (B) 0.93 10 (D) 1.70 10 8 8 MOS Capacitance Example 1. A MOS capacitor has an oxide layer of thickness (C) p-type, depletion (D) p-type, inversion AD (149) Consider the dc charge distribution of an ideal MOS capacitor shown in figure below 0 450 A , the metal semiconductor work function potential difference ms 0.693V and the effective positive charge at the semiconductor – oxide layer interface Q S 4.8 108 C/cm2 . Then the flatband voltage is _____ V. Page 104 TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET (C) flat-band mode (D) depletion mode (A) n-type, depletion (B) n-type, accumulation (C) p-type, depletion (D) p-type, accumulation AC (155) Point 5 indicates AB (150) Consider the dc charge distribution of an ideal MOS capacitor shown in figure below (A) Inversion mode (B) threshold mode (C) Accumulation mode (D) depletion mode AC (156) Complete the following table making use of the ideal structure C-V characteristic in figure. (A) n-type, depletion (B) n-type, inversion (C) p-type, depletion (D) p-type, inversion Common Data Questions (for Next Five Questions) : Consider the high-frequency C-V plot shown in figure. For each of the biasing conditions named in the table employ letters (a - e) to identify the corresponding bias point on the ideal MOS-C C-V characteristics. Bias Condition Capacitance(a - e) Inversion Depletion Flat band VG VT Accumulation AA (151) Point 1 indicates (A) inversion mode (B) threshold mode (C) flat-band mode (D) depletion mode AB (152) Point 2 indicates (A) inversion mode (B) threshold mode (C) flat-band mode (D) depletion mode (B) a, c, e, d, b (C) e, c, b, d, a (D) a, b, c, d, e AA [GATE-EC-2005-IITB] (157) A MOS capacitor made using p-type substrate is in the accumulation mode. The dominant charge in the channel is due to the presence of (A) Holes (B) Electrons (C) Positively charged ions (D) Negatively charged ions AD (153) Point 3 indicates (A) inversion mode (B) accumulation mode (C) flat-band mode (D) depletion mode AB [GATE-EC-2001-IITK] (158) MOSFET can be used as a (A) Current controlled capacitor (B) Voltage controlled capacitor (C) Current controlled inductor AC (154) Point 4 indicates (A) inversion mode (B) threshold mode (A) a, c, b, d, e (D) Voltage controlled inductor AC [GATE-EE-1998-IITD] (159) The MOSFET switch in its on-state may be considered equivalent to: www.targate.org Page 105 Electronic Devices & Circuit (A) resistor (C) capacitor (B) inductor (D) battery Answers are given below (160) An n-polysilicon-gate n-channel MOS transistor is made on a p-type Si substrate with The N a 5 1 01 8 c m 3 . SiO 2 thickness is 1 0 0 in the gate region, and the effective interface charge Q i is 4 1 0 1 0 q C /c m 2 . Crosscheck the following parameters: S1 : The MOS capacitor has an n-type substrate. S2 : If positive charges are introduced in the oxide, the C-V plot with shift to the left. Then which of the following is true ? (A) Both S1 and S2 are true (B) S1 is true and S2 is true (C) S1 is false and S2 is true (D) Both S1 and S2 are false AC [GATE-EC-2004-IITD] (164) Consider the following statements S1 and S2. f 0.329 eV Wm 0.415 micro meter Qi 6.4 10 9 C / cm 2 The threshold voltage ( VT ) of a MOS capacitor decreases with increase in gate oxide thickness. The threshold voltage ( VT ) of a S2: MOS capacitor decreases with increase in substrate doping concentration. Which one of the following is correct? (A) S1 is FALSE and S2 is TRUE (B) Both S1 and S2 are TRUE (C) Both S1 and S2 are FALSE (D) S1 is TRUE and S2 is FALSE S1: C i 3.45 10 7 F / cm 2 VFB 0.969V Q d 3.32 10 8 C / cm 2 V T 0 .2 1 5V C d 2 .5 1 0 8 F / cm C m in 2.33 10 8 F / cm 2 Common Data Questions (for next three Questions) The figure shows the high-frequency capacitance-voltage (C-V) characteristics of a Metal/SiO2/silicon (MOS) capacitor having an area of 1 1 0 4 cm 2 . Assume that the permittivities ( 0 r ) of silicon and SiO2 are 1 1 0 1 2 F/cm and 3.5 10 13 F/cm respectively. AA[GATE-EC-2007-IITK] (161) The gate oxide thickness in the MOS capacitor is : (A) 50 nm (B) 143 nm (C) 350 nm (D) 1 m A4.33[GATE-EC-2015-IITK] (165) In MOS capacitor with an oxide layer thickness of 10 mm. The maximum depletion layer thickness is 100 mm. The primitivities of the semiconductor and the oxide layer are s and ox respectively. Assuming s / ox 3 the ratio of the maximum capacitance to the minimum capacitance of this MOS capacitor is _____ . 5-1.65 [GATE-EC-2016-IISc] (166) Figures I and II show two MOS capacitors of unit area. The capacitor in Figure I has insulator materials X (of thickness t1 = 1 nm and dielectric constant 1 4 ) and Y (of thickness t2 = 3 nm and dielectric constant 2 20 ). The capacitor in Figure II has only insulator material X of thickness tEq. If the capacitors are of equal capacitance, then the value of tEq (in nm) is ________ AB[GATE-EC-2007-IITK] (162) The maximum depletion layer width in silicon is (A) 0.143 m (B) 0.857 m (C) (D) 1 m 1 .1 4 3 m AC[GATE-EC-2007-IITK] (163) Consider the following statements about the C-V characteristics plot : Page 106 TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET AB [GATE-EC-2016-IISc] (167) A voltage VG is applied across a MOS capacitor with metal gate and p-type silicon substrate at T=300 K. The inversion carrier density (in number of carriers per unit area) for VG = 0.8 V is 2 1 0 1 1 c m 2 . For VG = 1.3 V, the inversion carrier density is 4 1 0 1 1 c m 2 . What is the value of the inversion carrier density for VG = 1.8 V? AB [GATE-EC-2012-IITD] (170) The source-body junction capacitance is approximately (A) 2 fF (B) 7 fF (C) 2 pF (D) 7 pF AA [GATE-EC-2012-IITD] (171) The gate-source overlap capacitance is approximately (A) 4.5 × 1011 cm−2 (A) 0.7 fF (B) 0.7 pF (B) 6.0 × 1011 cm−2 (C) 0.35 fF (D) 0.24 Pf (C) 7.2 × 1011 cm−2 (D) 8.4 × 1011 cm−2 A2.3to2.5 [GATE-EC-2014-IITKGP] (168) An ideal MOS capacitor has boron doping concentration of 10 15 cm -3 in the substrate. When a gate voltage is applied a depletion region of width 0.5 µm is formed with a surface (channel) potential of 0.2 V. Given 14 0 8.854 10 F / cm and the that relative pemittivities of silicon and silicon dioxide are 12 and 4, respectively, the peak electric field (in V / µm) in the oxide region is _______. AD[GATE-EC-2012-IITD] (169) The source of a silicon (ni 1010 / cm3 ) per n-channel MOS transistor has an area of 1 sq µm and a depth of 1 µm . If the dopant density in the source is 1019 / cm3, the number of holes in the source region with the above volume is approximately Common Data Questions (for Next Two Questions) Consider a p-type silicon semiconductor of an MOS structure. Let T = 300K and assume N a 1016 cm 3 . Assume Ni (for Si) = 1.5 1010 cm3 and VT 25.9mV correspondingly at 300K AA (172) The maximum space charge width, xdT is (A) 0.30 m (B) 3 10 12 cm (C) 0.18 m (D) 1.88 10 12 cm (173) The maximum QSD max is space (A) 107 (B) 100 (A) 2.19 10 4 C / cm 2 (C) 10 (D) 0 (B) 1.6 107 C / cm 2 Common Data Questions (for Next Two Questions) In the three dimensional view of a silicon nchannel MOS transistor shown below, 20 nm. The transistor is of width 1 µm. The depletion width formed at every p-n junction is 10 nm. The relative permittivities of Si and SiO2, respectively, are 11.7 and 3.9, and ε0 8.9 1012 F/m. charge AD density (C) 4 10 3 C / cm 2 (D) 4.8 108 C / cm 2 Common Data Questions (for Next Two Questions) An ideal MOS capacitor with an aluminium gate o has a silicon dioxide thickness of t ox 400 A on a p-type silicon substrate doped with an acceptor concentration of N a 1016 cm 3 . www.targate.org Page 107 Electronic Devices & Circuit Assume kT 0 8.854 1014 F / cm, q 1.6 1019 C, 25.9mV q AA (178) What is the equivalent trapped oxide charge density (electronic charge per cm2 ) ? (A) 1.875 1011 cm 2 r ox 3.9 & r s 11.7 (B) 3 108 cm2 AA (174) The oxide capacitance, Cox will be : (C) 5 1011 cm 2 (D) 4.8 10 27 cm 2 (A) 8.63 10 8 F / cm 2 AD (B) 5.67 10 9 F / cm 2 (179) The flat-band capacitance is (A) 7.82 10 8 F / cm 2 (B) 78 pF (C) 3.45 10 5 F / cm 2 (C) 3.91 10 5 F / cm 2 (D) 2.21 10 8 F / cm 2 AB (175) The flat-band capacitance, CFB will be (A) 2.51 10 7 F / cm 2 (B) 6.43 10 8 F / cm 2 (C) 4.23 10 9 F / cm 2 (D) 1.65 10 8 F / cm 2 Common Data Questions (for Next Four Questions) The high-frequency C-V characteristic curve of an MOS capacitor is shown in figure. (D) 156 pF A6.85-6.95 [GATE-EC-2017-IITR] (180) A MOS capacitor is fabricated on p-type Si (Silicon) where the metal work function is 4.1 eV and electron affinity of Si is 4.0 eV. E C E F 0.9 eV , where E C and E F are the conduction band minimum and the Fermi energy levels of Si respectively. Oxide 14 F/cm, oxide r 3.9 , 0 8.85 10 thickness tox 0.1m and electronic charge q 1.6 1019 C . If the measured flat band voltage of this capacitor is –1 V, then the magnitude of the fixed charge at the oxidesemiconductor interface, in nC/cm2 is _____. AA [GATE-EC-2019-IITM] (181) The figure shows the high-frequency C-V curve of a MOS capacitor (at T = 300K) with ms 0 V and no oxide charges. The flat-band, inversion, and accumulation conditions are represented, respectively, by the points The area of the device is 2 10 3 cm 2 . The metal-semiconductor work function difference is Qms 0.50V, the oxide is SiO 2 , the semiconductor is silicon, and the semiconductor doping concentration is 2 1016 cm 3 . AA (176) The semiconductor is (A) n-type (B) p-type (A) Q, R, P (C) R, P, Q (C) intrinsic (D) can’t be determined AB (177) What is the oxide thickness? o o (A) 22.7 A (B) 345 A o o (C) 1345.5 A (D) 88.5 A Page 108 (B) Q, P, R (D) P, Q, R AA[ESE-EE-2002] (182) The modified work function of an n-channel MOSFET is -0.85 V. If the interface charge is 3 104 C/m 2 and the oxide capacitance is 300F/m 2 , the flat band voltage is (A) -1.85 V (C) +0.15V TARGATE EDUCATION GATE-(EC / EE) (B) -0.15 V (D) +1.85 V TOPIC 4 : E-MOSFET B & B A86 to 87 (183) Consider a MOS structure with the following specifications : circular cross section of diameter 0.5 mm, SiO2 layer of thickness 80 manometers, permittivity of SiO2 is 4 and Test AB (187) Select the correct C-V characteristics of a MOS capacitor with a p type substrate. 0 8.854 10 14 F/cm . The capacitance of MOS structure is ___pF. B & B A80 (184) Consider a MOS structure with the following specifications : circular cross section of diameter 0.5 mm, SiO2 layer of thickness 80 nanometers, permittivity of SiO2 is 4 and (A) 0 8.854 10 14 F/cm . If the dielectric strength of SiO2 film is (B) 7 10 V/cm, the breakdown voltage of the MOS capacitor is ____ Volts. B & B AA (185) For a MOS capacitor fabricated on a p-type semiconductor, strong inversion occurs when (C) (A) Surface potential is positive and equal to twice the Fermi potential (D) (B) Surface potential is zero (C) Surface potential is negative and equal to Fermi potential (D) All of the above Test AB (186) For MOS capacitor fabricated on n-type substrate, the capacitance versus voltage plot at low frequency is as shown in figure Test A13.00 to 15.00 (188) In a MOS capacitor, the gate voltage exceeds the threshold voltage by 1 V. If the oxide thickness is 25 nm, then the inversion charge density of the hannel is _____ 108 C/cm 2 . (Assume ox 3.9 0 8.85 10 14 F/cm ) ----000000---- Point Region of operation A. 1 P. Depletion B. 2 Q. Inversion C. 3 R. Accumulation D. 4 S. Threshold Then which of the following option is correctly matched? A (A) R B P C Q D S (B) Q S P R (C) S R Q P (D) p Q S R www.targate.org Page 109 Electronic Devices & Circuit Answer : 52. 0.06 to 0.08 53. 499 to 501 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 54. Switching A B A D D D D C B A 55. 20 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 56. 28 to 29 C B B C * B B C C D 57. 25 KOhms 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 58. +1 Volts D C D D D B D A C C 59. 12.4 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. 60. 253 61. 0.395 62. 0mA (cutoff) 63. 0.5mA (sat) 64. 0.29mA(triode) 65. V D 2 .9 V 66. 2.35 mW 71. 1.4 to 1.6 B B C D B A D B C C 41. 42. 43. 44. 45. 46. 47. 48. 49. 50. C D D C C C B * D D 51. 52. 53. 54. 55. 56. 57. 58. 59. 60. * * * * * * * * * * 61. 62. 63. 64. 65. 66. 67. 68. 69. 70. * * * * * * B B C C 81. 2.5 71. 72. 73. 74. 75. 76. 77. 78. 79. 80. 82. 2.91 * B C A D 1 D A D B 90. 10.1 81. 82. 83. 84. 85. 86. 87. 88. 89. 90. 94. 5.9 to 6.1 * * C C B C 3 B C * 95. –905.0 to –895.0 OR 895.0 to 905.0 91. 92. 93. 94. 95. 96. 97. 98. 99. 100. 97. –63 C B D * * * C * * 99. 20 103. 104. 105. 106. 107. 108. 109. 110. 100. 0.45-0.55 45 C 102. 0.41-0.435 111. 112. 113. 114. 115. 116. 117. 118. 119. 120. 103. 25.40 to 25.60 * * * A 107. 7.2 to 7.3 121. 122. 123. 124. 125. 126. 127. 128. 129. 130. 109. 45 C B D D 111. 1.80 to 2.20 112. 3.00 to 3.50 131. 132. 133. 134. 135. 136. 137. 138. 139. 140. 113. 4.80 to 5.00 A * * * 114. 12.00 to 13.00 141. 142. 143. 144. 145. 146. 147. 148. 149. 150. 115. 78.00 to 78.50 * * D B 116. 0.5 151. 152. 153. 154. 155. 156. 157. 158. 159. 160. 117. 1.71 1016 cm 3 A D C # 118. –1.52 V 161. 162. 163. 164. 165. 166. 167. 168. 169. 170. 119. –0.764 V A C D B 133. 0.210 to 0.230 171. 172. 173. 174. 175. 176. 177. 178. 179. 180. 135. 0.90 A D * 101. 102. B * * * D C * B B A A * A A D C C A C * D * A C * B 4 B * B D D C @ A * * B A D A B B A * C * C B * A D 138. Depletion 181. 182. 183. 184. 185. 186. 187. 188. 139. weak inversion A A * 140. Accumulation 141. Strong inversion 15. False 142. Flat band 48. 0.018 - 0.026 143. threshold 51. A-2,B-3,C-1 165. 4.33 Page 110 * A B B * TARGATE EDUCATION GATE-(EC / EE) TOPIC 4 : E-MOSFET 166. 1.55 to 1.65 198. 2.3 to 2.5 180. 6.85 to 6.95 183. 86 to 87 184. 80 188. 13.00 to 15.00. www.targate.org Page 111 5 IC TECHNOLOGY MOS Transistor (5) (1) AB [GATE-EC-2003-IITM] If P is passivation, Q is n – well implant, R is metallization and S is source/drain diffusion, then the order in which they are carried out in a standard n – well CMOS fabrication process is (A) P – Q – R – S (B) Q – S – R – P (C) R – P – S – Q (D) S – R – Q – P (2) AA [ESE-EC-2009] Which one of the following statements is correct for MOSFETS? (A) p-channel MOS is easier to produce than n-channel MOS (6) (B) n-channel MOS must have twice the area of p-channel MOS for the same ON resistance (C) p-channel MOS has faster switching action than n-channel MOS (D) p-channel MOS has higher packing density than n-channel MOS (3) AD [GATE-EC-2014-IITKGP] In CMOS technology shallow p-well or nwell regions can be formed using (A) Low pressure deposition chemical AC [GATE-EC-2014-IITKGP] In MOSFET fabrication the channel length is defined during the process of (A) Isolation oxide growth (B) Channel stop implantation (C) Poly silicon gate patterning (D) Lithography step leading to the contact pads *********** Combined Problems (7) vapour (B) Low energy sputtering (C) Low temperature dry oxidation (D) Low energy ion-implantation (4) AB On an IC, the substrate terminal of an NMOS transistor is more frequently connected to ground, rather than to the source terminal, because (A) connecting to the source increases the threshold voltage of the transistor (B) connecting the substrate to the source requires a separate p-well for the transistor, which is very areaexpensive (C) the drain-substrate junction may get forward-biased in the latter case (D) this protects the gate oxide from electrostatic breakdown AC [GATE-EC-2015-IITK] Which one of the following process is preferred to form the gate dielectric (SiO2) of MOSFETs ? AA&C[GATE-EC-2005-IITB] The primary reason for the widespread use of silicon in semiconductor device technology is : (A) Abundance of silicon on the surface of the Earth. (B) Larger band gap of silicon in comparison to Germanium. (C) Favourable properties of Silicondioxide (SiO2) (D) Lower melting point (B) Molecular beam epitaxy (C) Wet oxidation AC Ultraviolet radiation is used in IC fabrication process for (A) Diffusion (B) Masking (D) Dry oxidation (C) Isolation (A) Sputtering Page 112 (8) TARGATE EDUCATION GATE-(EC / EE) (D) Metallization TOPIC 6 : IC TECHNOLOGY (9) AD[GATE-EC-2013-IITB] In IC technology, dry oxidation (using dry oxygen) as compared to wet oxidation (using steam or water vapour) produces (A) Superior quality oxide with a higher growth rate (B) Inferior quality oxide with a higher growth rate (C) Inferior quality oxide with a lower growth rate (D) Superior quality oxide with a lower growth rate eE2 / T6 / K1 / L1 / V / RE / AC (10) Diffusion of impurities in a semiconductor is carried out in a furnace through which a steady stream of impurity atoms is passed during the entire diffusion process. What would be the type of profile of the impurity atoms inside the semiconductor? (A) Linear (B) Gaussian (C) Complementary error function (D) Expnential eE2 / T6 / K1 / L1 / V / RE / AC (11) In integrated circuits, the design of electronic circuits is based on the approach of use of (A) maximum number of resistors in the circuit. (B) large sized capacitor. (C) Minimum chip area irrespective of the type of components in the design. (D) Use of only bipolar transistors. AA (12) Compared to junction isolation, oxide isolation is (A) better because it eliminates parasitic junction capacitances (B) worse because it eliminates conducting paths needed for current flow into the substrate. (C) better because it causes less disruption in the silicon crystalline structure (D) worse because junctions have higher breakdown voltages. AD (13) While diffusing an impurity into silicon, if the concentration of the impurity atoms is maintained constant at the surface of the water, then the diffused impurity profile is a (A) Gaussian (B) exponential (C) quadratic (D) complementary error function AB (14) It is important that the temperature in diffusion furnaces be accurately controlled because (A) inaccurate temperature can lead to excessive oxidation of the surface (B) diffusion coefficients of impurity elements are extremely sensitive functions of temperature (C) the intrinsic carrier density of the substrate semiconductor is an extremely sensitive function of temperature (D) inaccurate temperatures lead to excessive defect generation AB (15) Boron diffusion in silicon is enhanced in the presence of oxidation because (A) boron dissolves in oxygen and therefore has greater mobility (B) boron diffusion occurs with the participation of interstitials in the lattice, whose concentration is increased during oxidation. (C) boron has a higher diffusivity in SiO2. (D) oxidation increases vacancies, which enhance boron diffusion. AC (16) For creating doped regions in the silicon substrate, ion implantation is preferred over diffusion, because ion implantation (A) causes more lattice damage, which aids in dopant activation. (B) causes the peak of the doping profile to be at the wafer surface (C) allows a much more precise control over dopant profiles and dopant densities. (D) causes much less lattice damage compared to diffusion. AB (17) The typical number of diffusions used in making epitaxial-diffused silicon integrated circuits is : (A) 1 (B) 2 (C) 3 (D) 4 AC (18) Silicon dioxide (SiO2) is used in ICs (A) because it facilitates the penetration of diffusants. (B) because of its high heat conduction. (C) to control the location of diffusion and to protect and insulate the silicon surface. (D) To control the concentration of diffusants. www.targate.org Page 113 Electronic Devices & Circuit AC (19) The p-type substrate in a monolithic circuit should be connected to (A) the most positive voltage available in the circuit. (B) the most negative voltage available in the circuit. (C) any dc ground point. (D) nowhere, i.e., be left floating. AA (20) Monolithic integrated circuit systems offer greater reliability than discrete-component systems because (A) there are fewer interconnections (B) high-temperature metalizing is used (C) electric voltages are low (D) electric elements are closely matched AD (21) Isolation in ICs is required. (A) to make it simpler to test circuits. (B) to protect the components from mechani-cal damage. (C) to protect the transistor from possible “thermal runaway.” (D) to minimize electrical interaction between circuit components. AC (22) Almost all resistors are made in a monolithic IC (A) during the emitter diffusion. (B) while growing the epitaxial layer. (C) during the base diffusion. (D) during the collector diffusion. AA (23) The main purpose of the metalization process is (A) to interconnect the various circuit elements. (B) to protect the chip from oxidation. (B) The base of an npn transistor (C) The emitter of a pnp transistor (D) The collector contact for a transistor pnp AD [ESE-EC-2008] (26) Why is the term ‘planar technology’ for fabrication of devices in ICs used? (A) The variety of manufacturing processes by which devices are fabricated, takes place through a single plane (B) The aluminium contacts to the collector, base and emitter regions of the transistors in the ICs are laid in the same plane (C) The collector, base and emitter regions of the transistors in ICs are laid in the same plane (D) The device looks like a thin plane wafer AAC [ESE-EC-2000] (27) Almost all resistors are made in a monolithic integrated circuit (A) during the emitter diffusion (B) while growing the epitaxial layer (C) during the base diffusion (D) during the collector diffusion (28) In an integrated circuit, the SiO2 provides AC layer (A) Electrical connection to external circuit (B) Physical strength (C) Isolation (C) to act as a heat sink. (D) to supply a bonding surface for mounting the chip AD (24) The p-type substrate in a conventional p-n junction isolated integrated circuit should be connected to (A) no where i.e. left floating (B) a.d.c ground potential (C) the most positive potential available in the circuit (D) the most negative potential available in the circuiteE2 / T5 / K / L2 / V Page 114 AB [ESE-EC-2011] (25) The p-type epitaxial layer grown over an ntype substrate for fabricating a bipolar transistor will function as (A) The collector of p n p transistor (D) Conducting path AD [GATE-EC-2008-IISC] (29) A silicon wafer has 100mm of oxide on it and is inserted in a furnace at temperature above 1 0 0 0 0 C for further oxidation in dry oxygen. The oxidation rate (A) Is independent of current thickness and temperature oxide (B) Is independent of current oxide thickness but depends on temperature (C) Slows down as the oxide grows. (D) Is zero as the existing oxide prevents further oxidation. TARGATE EDUCATION GATE-(EC / EE) TOPIC 6 : IC TECHNOLOGY Codes : A B C D (A) 1 2 3 4 (B) 3 4 1 2 (C) 1 4 3 2 (D) 3 2 1 4 (C) A0.47-0.51 [GATE-EC-2018-IITG] (30) There are two photolithography systems: one with light source of wavelength 1 156 nm (System 1) and another with light source of wavelength 2 325 nm (System 2). Both photolithography systems are otherwise identical. If the minimum feature sizes that can be realized using System1 and System2 are Lmin1 and Lmin 2 respectively, the ratio Lmin1 / Lmin 2 (correct to two decimal places) is__________. (D) ----000000---- AA [GATE-EC-2019-IITM] (31) The correct circuit representation of the structure shown in the figure is : (A) (B) www.targate.org Page 115 Electronic Devices & Circuit Answer : 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. B A D C B C AC C D C 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. C A D B B C B C C A 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. D C A D B D AC C D * 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. A 30. 0.47 to 0.51 Page 116 TARGATE EDUCATION GATE-(EC / EE) 06 Special Purpose Diode Other special purpose diodes, like Zener, varactor & LED is already covered in topic 1 & 2. (A) light intensity and depletion region width (B) depletion region width and excess carrier life time (C) excess carrier life time and forward bias current (D) forward bias current and light intensity Photo Detector (1) (2) (3) (4) (5) AA In a reverse biased photo diode with increase in incident light intensity, the diode current (A) increases (B) remains constant (C) decreases (D) remaining constant, the voltage drop across the diode increases (6) AD[ESE-EC-2013] which is the diode used for measuring light intensity ? (A) Junction diode (B) Varactor diode (C) Tunnel diode (D) Photo diode AA When light falls on a reverse biased photodiode, the current through it increases because of (A) optical generation of electron-hole pairs near, and within, the space charge layer (B) increased diffusion of minority carriers due to the light (C) tunnelling (D) optical generation of electron-hole pairs far away from the space charge layer AC The electrical power output of a photodiode is maximum when a (A) small reverse bias exists across it (B) large reverse bias exists across it (C) small forward bias exists across it (D) small forward current flows through it, irrespective of the bias. AA The sensitivity of a photodiode depends upon (7) (8) AD [ESE-EC-2011] Consider the following statements: 1. The radiation falling on a photodiode is primarily carrier injector. 2. The short-circuit current of a reverse biased photodiode under illumination varies exponentially with light intensity. 3. The photovoltaic emf of an opencircuited photodiode varies logarithmically with the lightgenerated short-circuit current. 4. The spectral response of a photodiode does not depend upon the frequency of the incident light. Which of these statements are correct? (A) 1, 2, 3 and 4 (B) 3 and 4 only (C) 1 and 2 only (D)1 and 3 only 01 [GATE-EC-2014-IITKGP] When the optical power incident on a photodiode is 10 micro-wand the responsevity is 0.8 A/W, the photocurrent generated (in µA) ---------B & B AA 8 10 photons are incidented on an In Ga As PIN photo detector which has a quantum effeciency of 86% and energy band gap of 1.47 eV. Find maximum wavelength (that can generate current) and number of EHP's generated. 6 (A) 0.844 m,6.9 106 EHP 's (B) 0.844 A o , 6.9 106 EHP 's (C) 1.185 m,1.1106 EHP 's (D) 1.185 A o ,1.1 106 EHP 's www.targate.org Page 117 ANSWERS (9) AD Photons of energy 1 . 5 3 1 0 1 9 Joule are incident on a photodiode which has a responsivity of 0.65 A/W. If the optical power level is 10 µ W , what is the photo current generated? (A) 64 µ A (B) 1.5 µ A (C) 2.1 µ A (D) 6.5 µ A AD[ESE-EE-2002] (10) Consider the following statements in connection with the biasing of semiconductor diodes: 1. LEDs are used under forward-bias condition 2. Photodiodes are used under forwardbias condition 3. Zener diodes are used under reversebias condition 4. Variable capacitance diodes are used under reverse-bias condition SOLAR CELL B [GATE-EC-2020-IITD] (13) A pn junction solar cell of area 1.0 cm 2 , illuminated uniformly with 100mWcm2 , has the following parameters: Efficiency = 15%, open circuit voltage = 0.7 V, fill factor = 0.8, and thickness = 200 m . The charge of an electron is 1.6 1019 C . The average optical generation rate (in cm–3s–1) is (A) 5.57 1019 (B) 0.84 1019 (C) 1.04 1019 (D) 83.60 1019 A20.5 – 21.5 [GATE-EC-2016-IISc] (14) The figure shows the I-V characteristics of a solar cell illuminated uniformly with solar light of power 100 mW/cm2. The solar cell has an area of 3 cm2 and a fill factor of 0.7. The maximum efficiency (in %) of the device is __________ Which of these statements are correct? (A) 1, 2 and 3 (B) 1, 2 and 4 (C) 2, 3 and 4 (D) 1, 3 and 4 B & B AC (11) Match the following and choose the correct combination Operating point P: I quadrant Q: II quarant R: III quadrant S: IV quadrant Devices 1. Solar cell 2. Photodetector with high sensitivity 3. Photodetector with low sensitivity 4. Rectifier diode (A) (B) (C) (D) P-2 P-3 P-4 P-1 Q-3 Q-4 Q-3 Q-2 R-4 R-1 R-2 R-3 S-1 S-2 S-1 S-4 AC [GATE-EC-2003-IITM] (12) Choose Proper substitutes for X and Y to make the following statements current Tunnel diode and Avalanche photodiode are operated in X bias and Y bias respectively. (A) X : reverse, Y : reverse A0.51-0.62 [GATE-EC-2017-IITR] (15) For a particular intensity of incident light on a silicon pn junction solar cell, the photocurrent density ( J L ) is 2.5 mA/cm2 and the open-circuit voltage (V O C ) is 0.451 V. Consider thermal voltage ( V T ) to be 25 mV. If the intensity of the incident light is increased by 20 times, assuming that the temperature remains unchanged, VOC (in volts) will be _____. A0.59-0.63 [GATE-EC-2018-IITG] (16) A solar cell of area 1.0 cm 2 , operating at 1.0 sun intensity, has a short circuit current of 20 mA, and an open circuit voltage of 0.65 V. Assuming room temperature operation and thermal equivalent voltage of 26mV, the open circuit voltage (in volts, correct to two decimal places) at 0.2 sun intensity is _______. ----000000---- (B) X : reverse, Y : forward (C) X: forward, Y: reverse (D) X: forward, Y: forward Page 118 TARGATE EDUCATION GATE-(EC / EE) Electronic Devices & Ckt Answer : 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. A D A C A D @ A D D 11. 12. 13. 14. 15. 16. C C B * * 14. 20.5 to 21.5 15. 0.51 to 0.62 * . www.targate.org Page 119
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