IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 56, NO. 2, FEBRUARY 2009
337
Maximum Junction Temperatures
of SiC Power Devices
Kuang Sheng, Senior Member, IEEE
Abstract—This paper presents a detailed physical analysis on
the junction temperatures, thermal stabilities, and thermal runaway effects of self-heating unipolar SiC power devices. Results
reveal that the risk of thermal runaway could limit the usable
junction temperature of these SiC devices to substantially lower
than 200 ◦ C, regardless of the device size and the cooling method
used.
Index Terms—BJT, high temperature, JFET, MOSFET, power
device, Schottky barrier diodes (SBD), SiC.
I. INTRODUCTION
M
ANY PAPERS have reported the operation of nonpower
SiC devices at temperatures as high as 600 ◦ C and
pulsed testing of power SiC devices at 300 ◦ C−400 ◦ C, demonstrating the ability of SiC material and the physical junctions to
withstand high temperatures [1]–[4]. However, detailed analysis and investigation have not been available on the capability of
SiC power devices in a realistic power electronic circuit where
they need to dissipate a significant amount of heat. In such a
circuit, due to the self-heating effect, the junction temperature
of a power device is significantly higher than the ambient
temperature. The maximum current and power ratings of a
power device are typically limited by the maximum junction
temperature of the device. Such self-heating imposed limit can
have the following two different physical mechanisms.
1) Switching and conduction losses of the power device
cause its junction temperature to increase beyond the
material temperature limit (> 800 ◦ C for SiC). At those
high temperatures, excessive and exponentially increasing leakage current quickly damages the integrity of the
semiconductor or other materials used to fabricate the
power device.
2) Device switching and conduction losses cause its junction
temperature to rise. An increasing junction temperature
leads to more device losses and hence sets up a positive
feedback mechanism. A thermal runaway can be triggered at a temperature that is much lower than critical
temperatures of the materials.
Most silicon power devices fail with mechanism “1)”
described earlier, and their current/power ratings are set
Manuscript received October 2, 2008. Current version published January 28,
2009. The review of this paper was arranged by Editor M. A. Shibib.
The author is with the Department of Electrical and Computer Engineering, Rutgers University, Piscataway, NJ 08854 USA (e-mail: ksheng@ece.
rutgers.edu).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TED.2008.2010605
accordingly. For SiC power devices, however, mechanism “1)”
is unlikely going to be the reason that is limiting their current-/
power-handling capability due to its high intrinsic temperature.
They will more likely be limited by the following: i) ohmic/
Schottky contact metal temperature limit; ii) passivation/
packaging materials used; or iii) mechanism “2).”
In this paper, the effect of mechanism “2)” described previously on the current-/power-handling capability and maximum
junction temperature of SiC power devices will be analyzed and
discussed in detail. It will be shown that this mechanism can,
in some cases, seriously limit our ability in fully realizing the
SiC material potential on power devices. Possible approaches
that can be taken to alleviate such limitation will also be
discussed.
II. THERMAL STABILITY OF A SELF-HEATING
POWER DEVICE
A typical cross-sectional view of a packaged SiC power
device mounted on a heat sink is shown in Fig. 1(a). Its steadystate thermal equivalent circuit is included in Fig. 1(b). For the
thermal circuit to stabilize, the following equation has to be
satisfied:
TJ − Tamb = Ploss (TJ ) ∗ θJ−A
(1)
where TJ is the device junction temperature, Tamb is the
ambient temperature, Ploss (TJ ) is the junction temperaturedependent device power loss, and θJ−A is the total junction-toambient thermal resistance. While detailed discussion may lead
to some variations, θJ−A is taken as temperature independent
in this paper.
A. Temperature Dependence of Device Loss
The total power device loss under a given circuit load condition [Ploss (TJ ) in Fig. 1(b)] comprises the current conduction
loss and switching loss. The conduction loss of a power device
can be written as
2
RON (TJ )D = ILOAD VON (TJ )D
PCON (TJ ) = ILOAD
(2)
where ILOAD is the current going through the device, RON (TJ )
is the effective device resistance, VON (TJ ) is the ON-state
voltage, and D is the current conduction duty cycle. The device
resistance (or ON-state voltage) usually increases quickly with
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IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 56, NO. 2, FEBRUARY 2009
Fig. 1. (a) Cross-sectional view of a typical thermal system for a SiC power device and (b) its steady-state equivalent thermal circuit.
Fig. 2. Amount of power generated by a 4H-SiC epitaxial resistor (0.17 Ω at
300 K) versus junction temperature at different current levels. Also shown in
the figure is the power dissipation line with θJ _A = 20 K/W.
Fig. 3. Steady-state temperature versus current for a 4H-SiC epitaxial resistor
(0.17 Ω at 300 K).
junction temperature. As an example, resistance of a uniformly
doped N-type 4H-SiC epitaxial layer is given by [5]
power dissipation line and the power generating curves are the
steady-state operating points for those current levels. It is seen
that when the current increases to above a certain level, an
intersection point between the curve and the linear line cannot
be found, indicating a thermal runaway condition. As shown in
Fig. 2, the highest current that the considered epitaxial resistor
can conduct is 4.15 A, corresponding to a junction temperature
of 238 ◦ C.
A better illustration is shown in Fig. 3 where the steadystate device junction temperature is plotted against its current level for the resistor described earlier. The steady-state
device junction temperature increases at an accelerated rate
with increasing current. While 4.15 A and 238 ◦ C are the
theoretical maximum device current and junction temperature,
respectively, one cannot use the device at this level in a
practical application, as safety margins will be needed. If a
10% current safety margin is applied (I = 90% ∗ 4.15 A), the
device junction temperature drops sharply to 110 ◦ C. This is
much lower than the temperature potential of SiC material
which promises to remain reliable at temperatures as high
as 600 ◦ C.
The thermal runaway temperature of this device can also
be calculated by substituting (2) and (3) into (1) and set
RON (TJ ) = RON_300 K
T
300
2.4
(3)
where RON_300 K is the resistance at room temperature. An
epitaxial resistor is used in the following example, as it provides
the intrinsic structure for all unipolar SiC power devices.
B. Junction Temperatures of a Self-Heating Power Device
With (1)–(3), the junction temperature of an intrinsic 4H-SiC
unipolar power device can be calculated for a given set of device
structural parameters and application conditions. In Fig. 2, the
amount of power generated by an epitaxial resistor (R = 0.17 Ω
at 300 K) is plotted against junction temperature when conducting different current levels. Clearly, due to electron mobility
degradation, the resistor generates more power with increasing
junction temperature. Also plotted in the same figure is a linear
line depicting the amount of power that can be continuously
dissipated by the cooling system with a total thermal resistance
(θJ−A ) of 20 K/W. The intersecting points between this linear
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SHENG: MAXIMUM JUNCTION TEMPERATURES OF SiC POWER DEVICES
339
Fig. 4. Steady-state temperature versus current with different junction-to-case
thermal resistances and ambient temperatures for a 4H-SiC epitaxial resistor
(0.17 Ω at 300 K).
∂ILOAD /∂TJ = 0. Simple mathematical derivation will lead to
the following thermal runaway condition:
TJ _ max =
Pmax =
α
Tamb
α−1
(α − 1)α−1 Tamb
αα
θJ−A
(4)
where α = 2.4 is the exponent used in (3), TJ _ max is the
thermal runaway temperature in kelvins, Tamb is the ambient temperature in kelvins, and Pmax is the maximum power
that can be dissipated continuously. This result is surprisingly
simple and indicates that the thermal runaway temperature is
independent of the device resistance and cooling method. It is
only related to the ambient temperature.
To verify (4) and study the effect to a fuller extent, the
maximum junction temperatures of the SiC epitaxial resistor
under other packaging and ambient conditions have also been
studied by evaluating junction temperature against current with
different θJ−A values (20, 10, and 5 K/W) and at ambient
temperatures (−50 ◦ C, 27 ◦ C, and 100 ◦ C). The results are
shown in Fig. 4, from which a few interesting observations can
be made.
First, as predicted, as in (4), the maximum junction temperature (TJ _ max ) remains constant for a given ambient temperature, regardless of how the device is cooled (θJ−A ). Better
cooling only increases the device current capability but not its
TJ _ max . The TJ _ max values are 108 ◦ C, 238 ◦ C, and 365 ◦ C
for ambient temperatures of −50 ◦ C, 27 ◦ C, and 100 ◦ C, respectively. This is in good agreement with (4). With a similar 10%
current safety margin, the maximum usable device junction
temperature for these three ambient temperatures will drop to
15 ◦ C, 110 ◦ C, and 209 ◦ C, respectively. This is surprisingly
low for SiC devices.
Fig. 5. Maximum junction temperature and current for a 4H-SiC epitaxial
resistor (0.17 Ω at 300 K) at different ambient temperatures. A 10% margin for
maximum current is also considered. θJ _A = 5 K/W.
Second, the maximum junction temperature rise above
ambient (ΔT = TJ − Tamb ) is higher at a higher ambient
temperature. This indicates that thermal runaway is less likely
in a hotter environment and that the device can dissipate more
power in those ambient temperatures.
In Fig. 5, the maximum junction temperatures and currents
at thermal runaway are plotted against ambient temperature.
Also included in the figure are the maximum temperatures and
currents when a 10% margin is considered for the current in a
practical application. The big gap between device temperatures
at Imax and 90% ∗ Imax , as explained previously, is clearly
evident.
III. THERMAL STABILITY OF SiC POWER DEVICES
The temperature dependences of losses from SiC switching devices (MOSFET, BJT, and JFET) in a practical power
electronics application can differ from that of a resistor. The
switching losses of these devices can be generally considered to
be temperature independent due to a lack of conductivity modulation. This even includes BJT [3] since no reliable evidence
of significant conductivity modulation has been reported in the
literature (despite a few such claims). On the other hand, the
conduction losses of conductivity-modulation-free devices are
mainly determined by the carrier (most likely electron) mobility
and hence increase significantly with junction temperature.
Due to the unique structure of each device, their temperature
dependence differs from each other and will be discussed in
detail hereinafter.
A. Junction Temperatures of SiC Power Devices in
Conduction-Loss Dominant Mode
In many power electronic circuits, power device losses
are dominated by their conduction loss. The following paragraphs discuss the maximum junction temperatures for 4H-SiC
Schottky barrier diodes (SBDs), JFETs, BJTs, and MOSFETs.
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Fig. 6. Steady-state temperature versus current with different junction-tocase thermal resistances and ambient temperature for a 4H-SiC SBD (1.2 kV
and 10 A).
1) 4H-SiC SBDs: The forward-voltage drop of an SBD
comprises an offset voltage related to Schottky barrier (VB ) and
a resistive component proportional to the current, as described
in the following:
VON = VB (TJ ) + ILOAD ∗ RON (TJ ).
(5)
The differential resistance RON arises from the drift region
and it increases with temperature in the same way as the epitaxial resistor discussed in Section II. VB decreases somewhat with
temperature, and its temperature dependence can be empirically
fitted based on [6]
VB (TJ ) = VB0 + C1 TJ + C2 TJ2
(6)
where VB0 , C1 , and C2 are fitting constants. Based on (3), (5),
and (6), the SBD junction temperature can be analyzed based on
(1) for various ambient temperatures and θJ−A . The results are
shown in Fig. 6. While the figure is similar to Fig. 6, there are
a few key differences. First, the thermal runaway takes place at
a higher temperature, particularly when the thermal resistance
θJ−A is high. Second, TJ _ max is dependent on θJ−A . With a
10% current margin considered, the maximum usable junction
temperatures that such a 1.2-kV 10-A device can operate with
θJ−A = 5 K/W are 226 ◦ C (8.8 A), 143 ◦ C (10.3 A), and
71 ◦ C (12.5 A) for ambient temperatures of 100 ◦ C, 27 ◦ C, and
−50 ◦ C, respectively. This is somewhat higher than a pure SiC
resistor analyzed in Section II but still significantly lower than
the SiC material potential.
The differences between the SiC SBD and epitaxial resistor
can be attributed to the offset voltage (VB ) that decreases at
higher temperature. It helps to slow down the increase of device
loss with temperature, and hence, it makes the SBD less prone
to thermal runaway.
2) 4H-SiC JFETs and BJTs: Due to the lack of conductivity
modulation and other nonresistive voltage-drop contributor,
the forward I–V curves of 4H-SiC JFETs and BJTs under
typical operating current densities behave just like a resistor.
The voltage-drop temperature dependences of these devices
also follow the 2.4 power law shown in (3) [7]–[9]. As a
result, the thermal runaway temperatures of these two devices
can be expected to be the same as what have been shown in
Figs. 3–5. (It is assumed that the SiC JFET and BJT considered also have a 0.17-Ω resistance at 300 K. However, the
thermal runaway temperatures would remain the same for other
device sizes.)
3) 4H-SiC MOSFETs: As the most favored transistors in
SiC, 4H-SiC MOSFETs have experienced great difficulty in
perfecting their MOS interface for high channel electron mobility and good device reliability and stability. On the other hand,
the imperfect MOS interface has also given rise to a channel
electron mobility that increases with increasing temperature,
which is exactly the opposite of the trend for that in other devices (e.g., Si MOSFET, SiC JFET, etc.). Since MOSFET channels reported by different groups have different imperfections,
the temperature coefficients of the overall device resistance
can be positive or negative, depending on the manufacturer
and the temperature range considered [7], [10]. Nevertheless,
resistances of all of these MOSFETs do not increase as quickly
as those of the epi-resistance discussed previously. As a result,
they are significantly less prone to the thermal runaway problem
highlighted earlier. Quantified analysis on their maximum junction temperatures is not included here due to the large variation
of MOSFET performances among different groups and their
fast-changing nature at this point.
B. Junction Temperatures of SiC Power Devices
in Switching Mode
In power electronics applications other than those mentioned
in Section III-A, SiC device switching losses cannot be ignored.
As discussed in the beginning of Section III, switching losses
for the devices considered can be treated as independent of
junction temperature. As a result, thermal runaway conditions
for these applications will be different from the conductionloss-dominated case presented in Section III-A. If the total device loss is dominated by the temperature-independent
switching losses, then the positive feedback described in mechanism “2)” in the introduction of this paper will not take place,
and thermal runaway will not happen.
Therefore, the maximum device junction temperature and
thermal runaway analysis will depend on the relative percentages of conduction and switching losses, which can differ
greatly from application to application. However, there have
been reports in the literature that conduction loss and switching
loss should be the same if an optimum device size is chosen
[11]. Based on this assumption, the thermal stability analysis of
various SiC power devices presented in Section III-A will be
reexamined in this section.
1) 4H-SiC SBDs: During transient operation, SBDs operate
in much the same way as a nonlinear parallel-plane capacitor.
With only displacement current involved, no energy loss can be
resulted in this device during such transients (note that the same
is not true for p-i-n diodes).
As a result, the power loss of a SiC SBD is always conduction
loss dominated (neglecting leakage loss). The thermal stability
and maximum junction temperature of the SiC SBDs in switching circuit are the same as that presented in Section III-A.
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SHENG: MAXIMUM JUNCTION TEMPERATURES OF SiC POWER DEVICES
341
excursions above TJ _ max predicted in this analysis without
causing thermal runaway.
IV. INTERPRETATION AND DISCUSSION OF RESULTS
Fig. 7. Steady-state temperature versus current with different junction-to-case
thermal resistances and ambient temperatures for 4H-SiC JFETs and BJTs. The
on-resistance at 300 K is set to 0.17 Ω, and the device switching loss is assumed
to be the same as the conduction loss at 300 K.
2) 4H-SiC JFETs and BJTs: As explained before, temperature dependences of the conduction loss and switching loss of
SiC JFETs and BJTs are virtually the same. The two devices
are discussed together in this paper on the thermal stability
aspect. The steady-state junction temperatures of a SiC JFET
(or BJT) are recalculated in the same approach as that in
Section II by including switching losses. To make it comparable
to the analysis based on SiC epitaxial resistor, the JFET/BJT
analyzed here is also assumed to have a resistance of 0.17 Ω at
300 K. Based on the optimum assumption cited earlier, the device switching loss is assumed to be the same as the conduction
loss at 300 K.
The junction temperature versus current curves are shown in
Fig. 7 with different junction-to-case thermal resistances and
ambient temperatures. With 10% current margin, SiC JFETs
and BJTs can be used safely up to temperatures of 243 ◦ C,
157 ◦ C, and 72 ◦ C for the three ambient temperatures considered. This is substantially higher than the corresponding
TJ _ max (209 ◦ C, 110 ◦ C, and 15 ◦ C) when switching loss was
not considered. It is clear that SiC JFETs and BJTs can be used
for higher junction temperatures when switching loss is present.
The thermal stability of these devices will be even better if
the switching loss accounts for a higher percentage of the total
losses.
3) 4H-SiC MOSFETs: The thermal stability of MOSFETs
with switching losses considered is also expected to be better
than the conduction-loss-dominated case. For the same reason
as in Section III-A, quantified analysis for MOSFETs is not
included here.
It is worth noting that the discussion here assumes highfrequency repetitive device switching and that the junction
temperature fluctuation within a switching cycle is neglected.
For applications with low duty-cycle current pulses and large
junction temperature fluctuation, dynamic thermal impedance
will need to be considered. The junction temperature can have
The analysis in Section III shows that, depending on the
device type and whether switching loss is significant in the
circuit, the SiC power devices analyzed in this paper could have
substantially different thermal runaway effect.
SiC JFETs and BJTs are predicted to encounter this problem at surprisingly low temperatures (e.g., TJ _ max = 238 ◦ C
when Tamb = 27 ◦ C) when their switching losses are negligible
compared to conduction losses. This happens for all device
sizes, packages, and cooling methods as long as the junctionto-ambient thermal resistance (θJ−A ) is constant (true for
most practical cases). The picture becomes drastically bleaker
for a designer when a 10% (or more) margin is considered
when choosing the maximum device current to avoid thermal
runaway. The usable device junction temperature has to be
limited to 110 ◦ C (Tamb = 27 ◦ C), a level far below what
is expected from a SiC device. Such constraints on device
junction temperature may be relieved when device switching
losses account for a significant portion of the total device loss.
For a given application where the load current and device gate
driver are fixed, thermal stability can be improved by adopting
a larger device die size which will decrease conduction loss and
increase switching loss.
SiC SBDs are less prone to the thermal runaway problem
due to the negative temperature coefficient on its forward I–V
curve offset voltage. It encounters the thermal runaway problem
at temperatures around 200 ◦ C–300 ◦ C, depending on the total
thermal resistance (θJ−A ). The usable junction temperature
with 10% current margin is typically around 150 ◦ C and becomes worse when θJ−A is lower. One disadvantage of SiC
SBD on this aspect is that the thermal stability issue cannot be
relieved by introducing more frequent switching action because
its switching loss is always negligible.
Among these devices, SiC MOSFETs are projected to be
much less prone to the thermal stability problem, thanks to
the negative temperature coefficient of the imperfect channel
resistance.
It should be noted that the limitation on SiC device TJ _ max
does not prevent them from handling high power density by
simply adopting better cooling methods (a smaller θJ−A ). It
should also be noted that all analyses in this paper are carried out by assuming a temperature-independent θJ−A . The
situation can be even worse if θJ−A is dominated by thermal
conduction and hence increases with the amount of power being
dissipated.
V. SUMMARY AND CONCLUSION
In this paper, the thermal stability and thermal runaway problems of SiC power devices including SBDs, JFETs, BJTs, and
MOSFETs have been analyzed in detail. Based on fundamental
physical models and experimental data, steady-state junction
temperatures of these devices have been calculated at different
device currents, switching losses, junction-to-ambient thermal
resistances, and ambient temperatures.
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The results reveal that, with the exception of MOSFETs,
these devices may become thermally unstable (runaway)
at junction temperatures as low as < 200 ◦ C, which are
substantially lower than the superior capability of SiC material
itself (> 800 ◦ C). Such limitation is particularly serious when
conduction loss is dominant over switching loss and/or ambient
temperature is low, regardless of the device size, packaging,
and cooling methods used. The issue investigated in this paper
warrants careful consideration and attention from researchers
and engineers designing and using SiC power devices.
The analysis carried out suggests that the maximum junction
temperature of these devices can be improved by the following
ways: 1) increasing the percentage of switching loss in the total
losses; and/or 2) operating at a higher ambient temperature;
and/or 3) using heat sinks whose thermal resistances decrease
with increasing power dissipation and minimizing thermal resistance attributed to thermal conduction.
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R EFERENCES
Kuang Sheng (M’99–SM’08) received the B.Sc.
degree in electrical engineering from Zhejiang University, Hangzhou, China, in 1995 and the Ph.D.
degree in electrical engineering from Heriot–Watt
University, Edinburgh, U.K., in 1999.
He was a Researcher with Cambridge University,
Cambridge, U.K., for three years and is currently an
Assistant Professor with the Department of Electrical and Computer Engineering, Rutgers University,
Piscataway, NJ. His research areas include various
aspects of power semiconductor devices and ICs on
SiC, Si, and SOI. He has authored or coauthored around 80 technical papers in
international journals and conferences, and he is the holder of a patent.
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Electron., vol. 50, no. 6, pp. 1073–1079, Jun. 2006.
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