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IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 57, NO. 4, JULY/AUGUST 2021
A New Control for Synchronous Rectifier of
Phase-Shifted Full-Bridge Converter to Improve
Efficiency in Light-Load Condition
Sunho Lee , Student Member, IEEE, and Jung-Wook Park , Senior Member, IEEE
Abstract—This article proposes a new control method for the
synchronous rectifier (SR) of phase-shifted full-bridge (PSFB) converter to improve its efficiency in light-load condition. In general,
the PSFB converter operates in the discontinuous conduction mode
(DCM) in light-load condition to reduce the effective duty-ratio and
core loss. However, the conventional control methods in the DCM
cause undesirable conduction loss in SR because the output inductor current flows through the body-diode instead of the channel
of SR. To figure it out, the proposed control method modulates
the turn-ON time of SR to eliminate the body-diode conduction.
Moreover, it can be easily implemented without any auxiliary circuits. Therefore, it can improve the efficiency in light-load condition
while keeping the advantages of DCM. The operating principle
of PSFB converter in the DCM is first described. Thereafter, the
proposed control method for SR is theoretically analyzed. Finally,
its practical effectiveness is verified by experimental tests on the
hardware implementation.
Fig. 1.
80 PLUS efficiency level certification.
Fig. 2.
Circuit diagram of PSFB converter with the SR.
Index
Terms—Body-diode
conduction,
discontinuous
conduction mode (DCM), efficiency, light-load condition,
phase-shifted full-bridge (PSFB) converter, synchronous rectifier
(SR).
I. INTRODUCTION
HE power consumption in industrial applications has been
being globally discussed. In particular, the efficiency of
power converters in light-load conditions as well as heavy-load
has become a critical issue. For example, the 80 PLUS incentive
program and Climate Saver Computing Initiative, which are the
efficiency certification programs of power supply unit (PSU)
[1]–[3], have established the new certification level requiring
the high efficiency even in the light-load condition of 10%, as
shown in Fig. 1. Moreover, the efficiency in light-load conditions
is becoming more important for server power supplies because
T
Manuscript received October 13, 2020; revised January 26, 2021; accepted
March 28, 2021. Date of publication April 6, 2021; date of current version
July 16, 2021. Paper 2020-IPCC-1546.R1, presented at the 2019 IEEE Energy
Conversion Congress and Exposition, Baltimore, MA, USA, Sep. 29 to Oct. 3,
and approved for publication in the IEEE TRANSACTIONS ON INDUSTRY
by the Electric Machines Committee of the IEEE Industry Applications Society.
This work was supported by the National Research Foundation of Korea (NRF)
grant funded by the Ministry of Science and ICT (MSIT), Korea government
under Grant 2020R1A3B2079407. (Corresponding author: Jung-Wook Park.)
The authors are with the School of Electrical and Electronic Engineering,
Yonsei University, Seoul 03722, South Korea (e-mail: vpam@yonsei.ac.kr;
jungpark@yonsei.ac.kr).
Color versions of one or more figures in this article are available at https:
//doi.org/10.1109/TIA.2021.3071106.
Digital Object Identifier 10.1109/TIA.2021.3071106
they usually operate in light-load conditions [4], [5]. In addition,
among many research works for the PSUs, the study of their
dc/dc stage has been widely carried out because it’s switching
and core losses mainly deteriorate the light-load efficiency of
PSUs [5].
The phase-shifted full-bridge (PSFB) converters [6]–[17] are
widely used in the dc/dc stage for medium and high power system such as server power supply and battery charger applications
due to its high efficiency, high power density, and zero-voltage
switching (ZVS) characteristics, etc.
In particular, the synchronous rectifier (SR) is applied to the
secondary side of PSFB converter to reduce the conduction
loss under the condition with low output voltage and high
output current, as shown in Fig. 2. However, it has several
drawbacks such as the circulating loss, narrow ZVS ranges,
and low efficiency in light-load conditions. To solve these
problems, the auxiliary circuits have been added [9]–[12]. That
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LEE AND PARK: NEW CONTROL FOR SYNCHRONOUS RECTIFIER OF PSFB CONVERTER TO IMPROVE EFFICIENCY
Fig. 3. Output inductor current in light-load conditions. (a) With the negative
current. (b) Without the negative current.
is, the additional switches and snubber circuits were applied
to achieve the wide range of ZVS and reduce the circulating
loss. Nevertheless, they still increase the complexity of system,
current stress of switching devices, and power loss. Therefore,
to avoid these auxiliary circuits, several pulsewidth-modulation
(PWM) control methods [13]–[17] were proposed. For example,
the asymmetrical PWM method [13]–[15] was applied to have
the wide range of ZVS and zero circulating current without any
auxiliary circuits. However, it increases the dc offset current
in transformer while causing the high value of current in the
primary side of PSFB converter.
To figure this out, the zero-voltage and zero-current switching
(ZVZCS) scheme [16], [17] was proposed to achieve the extensive ranges of ZVS turn-ON and ZCS turn-OFF with the small dc
offset current and circulating loss. It still causes the high voltage
stress and peak current on the secondary side while resulting
in the large conduction loss. On the other hand, several studies
[18]–[32] for the SR have been reported to improve the efficiency
in light-load condition. In general, it has the drawback in that
the negative current can occur in light-load conditions [18].
It consists of bidirectional metal–oxide–semiconductor fieldeffect transistor (MOSFET) switches so that the output inductor
current, iLo is able to flow in the opposite direction through the
switch, as shown in Fig. 3(a). This makes the converter to operate
in the continuous conduction mode (CCM) even in light-load
conditions. As the result, the conduction loss of switches and
core loss of transformer is increased [19], [20]. To solve this
problem, the operation in the discontinuous-conduction mode
(DCM) was proposed in [21], [22]. In other words, by turning
OFF the switches, the diode-like behavior can exhibit, and the
PSFB converter operates in the DCM accordingly. Therefore,
the negative current is prevented in light-load conditions, as
shown in Fig. 3(b). Thus, the decreased effective duty-ratio in
the DCM reduces the core loss. In addition, due to its simplicity
and improved performance, it is widely used in commercial
integrated chips (ICs) for the PSFB controller while improving
the efficiency in light-load condition. However, it causes an
undesirable conduction loss. This is because iLo flows through
the body-diode of switches, which have the high forward voltage
drop, rather than the channel. To figure it out, the active SR
control methods were proposed in [23]–[25], where the switches
are turned ON during the power transfer mode in the DCM. This
can decrease the conduction loss with the reduced conduction
ranges of body-diode. Nevertheless, it still has the limitation
in that iLo flows through the body-diode during the freewheeling mode. To eliminate the body-diode conduction in SR, the
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drain-source sensing method is typically used in flyback and
LLC, etc [26]–[28]. It is highly preferred because it is available
through commercial ICs. However, it is easily affected by noise,
which can cause a false-triggering of switch. Thus, it requires
noise filters, even careful printed circuit board (PCB) layout,
and blanking time for preventing false triggering. Moreover, it
is not effective for the applications with high output current
when the parallel-connected MOSFETS are commonly used in
SR. This is because their fixed turn-OFF threshold voltage and
lower ON-state resistance cause the late turn-OFF of SR switches
and more body-diode conduction time [29], [30]. Therefore,
the digital signal processor (DSP) is required to determine
the turn-OFF timing of SR switch properly. Then, the digital
SR timing control [31]–[34] has been developed. Based on
the preliminary analysis of converter, it modulates the turn-ON
time in operating conditions. Until now, the performance of
cost-effective DSP has been improved. As the result, the use
of DSP-based converters has been increased because they have
the advantages such as noise immunity, fast transient response,
and sophisticated control design, etc. Therefore, the SR timing
control is becoming more attractive solution with its obvious
benefit, which is the easy integration into the DSP of converter
without any auxiliary circuits or ICs. It is also robust from
noise and it is easy to tune in various conditions, and is also
effective for the applications with high output current based on
the high compatibility for parallel-connected MOSFETs in SR. In
particular, for the PSFB converter, the linear characteristic of
SR current makes it easy to analyze in the time-domain [32].
Thus, some problems in PSFB such as SR voltage overshoot
[33] and conduction loss in duty-cycle loss time [34] can be
improved with this SR timing method. Nevertheless, the determination of optimal turn-ON time in DCM, which eliminates the
body-diode conduction, has not been systematically investigated
so far.
This article proposes the new control method for SR by modulating the turn-ON time of switches to eliminate the conduction
ranges of body-diode. In particular, the proper modulation in
turn-ON time is determined by the time-domain analysis with
the voltage-second balance principle, and it is precisely applied
whenever the load is changed. Moreover, the requirements for
modulation are available from the closed-loop output voltage
control so that it can be easily implemented by the cost-effective
DSP without any auxiliary components while keeping the advantages of operation in the DCM. As a result, the efficiency of lightload condition is further improved compared with the previous
works. The characteristics of conventional control methods and
proposed control method are summarized in Table I. This article
is organized as follows. Section II describes the concept of
proposed control method for SR and the associated operation
analysis of PSFB converter in the DCM. Then, Section III
makes the mathematical analysis of proposed method and its
implementation in DSP. In particular, its dynamic behavior in
transient condition is also presented. Thereafter, the practical
effectiveness of proposed control method is verified with the
experimental results by hardware implementation in Section IV.
Finally, a conclusion is given in Section V.
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IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 57, NO. 4, JULY/AUGUST 2021
TABLE I
COMPARISON OF CONTROL METHODS FOR SR IN LIGHT-LOAD CONDITIONS
Fig. 4.
Operational waveforms of switches, QSR-1 and QSR-2 in the DCM.
II. OPERATION OF PSFB CONVERTER IN THE DCM
Fig. 5.
Key waveforms of PSFB converter in the DCM.
A. Concept of Proposed Control Method
Typically, the SR of PSFB converter uses the NAND control
method (see Fig. 4) [35] to reduce the high conduction loss
in its secondary side. However, it has the problem in that the
converter operates in the CCM regardless of load conditions.
In this case, iLo can flow in the opposite direction through
the switch particularly in light-load conditions. As the result,
the effective duty-ratio is increased with the high core loss of
transformer. To prevent this, the operation in the DCM is applied.
To do so, the SR switches are turned OFF because the negative
current does not occur in a diode rectifier. Then, the current flows
through the body-diode of switch instead of its channel so that
the negative current can be prevented. Even after this problem
is solved, the SR still suffers from the undesirable conduction
loss from body-diode, which has the high forward voltage drop.
To figure this out, the switches of SR are turned ON for more
time period to reduce the conduction ranges of body-diode
instead of turning OFF. For example, in the conventional control
method [21], both QSR-1 and QSR-2 in Fig. 2 are alternately
turned ON during tSR,conv according to the actions of primary
switches, as shown in Fig. 4. It makes iLo flow through the
channel instead of their body-diode during tSR,conv . Even though
it reduces the conduction loss of SR without auxiliary sensing
circuit, the turn-OFF instant of SR switches is always earlier than
the zero-crossing instant of iLo . This means the conduction of
body-diode in the freewheeling period still occurs wherein iLo
decreases. In particular, when the load increases in the DCM,
the conduction range of body-diode also increases while causing
more power loss. Therefore, to reduce it, the proposed control
method removes the body-diode conduction by extending the
turn-ON time of QSR-1 and QSR-2 from tSR,conv to tSR,prop , as
shown in Fig. 4. The detailed analysis and implementation of
proposed control method are discussed in Section III.
B. Operation Analysis of PSFB Converter
The key waveforms and corresponding circuit analysis of
PSFB converter in the DCM are shown in Figs. 5 and 6, respectively. Even though its overall operation is divided into ten
modes during a switching period, the modes 1–5 and 6–10 are
symmetrical. Thus, the modes 1–5 are analyzed in this section
based on three assumptions as follows.
1) All components are ideal, except for Coss and CSR , which
are the capacitors of primary and SR switches, respectively.
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LEE AND PARK: NEW CONTROL FOR SYNCHRONOUS RECTIFIER OF PSFB CONVERTER TO IMPROVE EFFICIENCY
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ip (t) and iLo (t) in this mode are formulated as
ip (t) = ip (t0 ) +
Vin
1
(t − t0 ) + iLo (t)
Lm
n
(1)
Vin /n − Vo
(t − t0 ).
Lo
(2)
iLo (t) = iLo (t0 ) +
Assume that the magnetizing inductance of transformer, Lm
is much higher than the leakage inductance, Llk . Therefore, Llk
is ignored in (1) and (2). In addition, iLo flows through QSR-2
because the only QSR-2 is turned ON in this mode.
• Mode 2 (t1 –t1 ): At t1 , Q1 is turned OFF. Then, ip charges and
discharges Coss of Q1 and Q2 , respectively, as shown in Fig. 6(b).
Note that ip flows through the body diode of Q2 . Thus, Q2 can
achieve the ZVS turn-ON with the energy stored in Llk .
• Mode 3 (t1 –t2 ): In this freewheeling mode, ip circulates
through Q2 and Q4 , as shown in Fig. 6(c). Because the transformer is clamped to zero, iLm is constant, and the energy is not
transferred to the secondary side. iLo decreases because Lo is
clamped to –Vo . Then, ip (t), iLo (t), and iLm (t) in this mode are
expressed as
1
iLo (t)
n
Vo
(t − t1 )
iLo (t) = iLo (t1 ) −
Lo
ip (t) = iLm (t1 ) +
iLm (t) =
Fig. 6. Circuit analysis of each operating mode. (a) Mode 1 (t0 –t1 ). (b) Mode
2 (t1 –t1 ). (c) Mode 3 (t1 –t2 ). (d) mode 4 (t2 –t3 ). (e) Mode 5 (t3 –t3 ).
DVin
2Lm fs
(4)
(5)
where D and fs are the duty-ratio and switching frequency of
PSFB converter, respectively.
• Mode 4 (t2 –t3 ): This mode begins when iLo becomes zero.
After that, it does not flow to any directions because both QSR-1
and QSR-2 are turned OFF, as shown in Fig. 6(d). Instead, the only
iLm flows through Q2 and Q4 . Furthermore, iLm is still constant,
and its value is the same as that of mode 3. Then, a resonance
occurs between Lo and CSR . Assume that the output capacitor,
Co is much larger than CSR such that Co can be ignored in the
resonance analysis. Thereafter, iSR-1 (t), iSR-2 (t), vDS,SR-1 (t),
and vDS,SR-2 (t), which are the current and drain-source voltage
of QSR-1 and QSR-2 , respectively, are given as
iSR−1 (t) = iSR−2 (t) = −
2) The SR switches, QSR-1 and QSR-2 operate like a diode
without a forward voltage drop.
3) There is no dc-offset in the current of transformer because
of symmetrical operation of primary and SR switches.
• Mode 1 (t0 –t1 ): In this power transfer mode, Q1 and Q4 are
turned ON, and the energy is transferred to the output, as shown
in Fig. 6(a). Both the primary current, ip and output inductor
current, iLo increase linearly as the transformer is clamped to Vin .
In addition, the output inductor, Lo , is clamped to (Vin /n)–Vo ,
where Vin , Vo , and n are the input voltage, output voltage, and
turns ratio of transformer, respectively. Then, ip is equal to the
sum of magnetizing current of transformer, iLm and iLo / n. Both
(3)
Vo
sin (ωo (t − t2 ))
Zo
(6)
vDS,SR−1 (t) = vDS,SR−2 (t) = Vo · {1 − cos (ωo (t − t2 ))}
(7)
√
where Zo = Lo / 2CSR and ωo = 1/ 2Lo CSR . Note that the
duty-cycle loss where iSR-1 and iSR-2 are overlapped does not
exist in the DCM unlike in CCM.
• Mode 5 (t3 –t3 ): At t3 , Q4 is turned OFF. Then, ip charges
and discharges Coss of Q4 and Q3 , respectively, as shown in
Fig. 6(e). Also, ip flows through the body diode of Q3 , and then
it achieves the ZVS turn-ON with the energy stored in Lm . The
resonance occurs between the Lm and Coss of the lagging-leg
switches, Q3 and Q4 . Finally, ip (t) and the drain-source voltages
of lagging-leg switches, vDS,Q3 (t), and vDS,Q4 (t), in this mode
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IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 57, NO. 4, JULY/AUGUST 2021
Fig. 7.
Voltage-second balance principle for Lo in the DCM.
are expressed as
ip (t) = ip (t3 ) · cos (ωLm (t − t3 ))
Fig. 8.
Voltage gains of PSFB converter in both CCM and DCM.
Fig. 9.
Waveforms of SR in the proposed control method.
(8)
vDS,Q3 (t) = Vin − ip (t3 ) · ZLm sin (ωLm (t − t3 ))
(9)
vDS,Q4 (t) = ip (t3 ) · ZLm sin (ωLm (t − t3 ))
√
where ZLm = Lm /2Coss and ωLm = 1/ 2Lm Coss .
(10)
C. Steady-State Analysis of DCM
The voltage gain of PSFB converter in the DCM, GDCM can
be obtained by using the voltage-second balance principle for
Lo , as shown in Fig. 7. Assume that the dead time between
the primary switches is ignored, and the average of vLo in the
resonance during t2 –t3 is zero. Then, the following equation is
derived.
Vin /n − Vo
Vo
· DTs =
· ΔDTs .
Lo
Lo
(11)
By rearranging (11), GDCM can be calculated as
GDCM =
Vo
2
= Vin
n 1 + 1 + (4L f I /D2 V )
o s o
(12)
o
where Io is the output current.
According to various duty-ratios with fs of 100 kHz, n of 25,
and Lo of 1.5 μH, GDCM and the voltage gain in the CCM,
GCCM [20] are compared in Fig. 8. Note that the GCCM of
red-dashed line presents that the negative current occurs in lightload conditions. It is shown that GDCM is greater than GCCM
in all value of D. In other words, for the same voltage gain, the
duty-ratio in DCM is smaller than that in CCM. This reduces
the core loss.
The boundary condition between CCM and DCM occurs
when the average value of iLo is equals to half of its peak
value, i
Lo . Then, the Io in the boundary condition, Io,boundary
is calculated as
Io,boundary =
Vo · (Vin − nVo )
· Ts .
4Vin Lo
(13)
When Io < Io,boundary , the PSFB converter operates in the
DCM. Otherwise, it operates in the CCM.
III. PROPOSED CONTROL METHOD
A. Analysis of Proposed Control Method
In this section, the detailed analysis of proposed method
is made based on the previous steady-state analysis of DCM.
First, to remove the conduction ranges of body-diode, tSR,prop
is computed by considering the conduction ranges of iSR-1 and
iSR-2 in the DCM, as shown in Fig. 9.
Note that tSR,prop becomes longer by ΔDTS when compared
to tSR,conv . Then, it can be calculated with DTs and ΔDTS . In
other words, they are obtained by rearranging (11) and (12) as
⎧
1
o Io
⎨ DTs = 4L
Vo Ts · {(2Vin /nVo )−1}2 −1 · Ts
.
(14)
√ 2
⎩
−D+ D +4(Lo Io /Vo Ts )
ΔDTs =
·
T
s
2
As the result, tSR,prop is determined as
tSR,prop = (D + ΔD) · Ts
=D 1+
Vin /n − Vo
Vo
· Ts =
Vin
· DTs .
nVo
(15)
From (15), it is known that tSR,prop does not require the
complex computation because there is no duty-cycle loss in the
DCM, differently from in the CCM. When fs is 100 kHz, the
value of tSR,prop in (15) is increased in the DCM as the load is
increased, as shown in Fig. 10. In particular, it has the largest
value in the boundary condition, which is 0.5Ts . Thereafter,
the operation of PSFB converter is changed to the CCM. The
proposed control method is also applicable in the CCM by fixing
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LEE AND PARK: NEW CONTROL FOR SYNCHRONOUS RECTIFIER OF PSFB CONVERTER TO IMPROVE EFFICIENCY
Fig. 10.
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Values of tSR,prop according to the variations of output current.
Fig. 12. Simulation result: power losses of SR by conventional and proposed
control method.
Fig. 11.
Control block diagram of proposed control method.
Fig. 13.
Hardware implementation of PSFB converter.
Fig. 14.
Interrupt timing diagram of proposed control method.
tSR,prop to 0.5Ts . Otherwise, it is changed to the NAND control
method. Then, QSR-1 and QSR-2 are turned ON for tSR,NAND (see
Fig. 4).
B. Implementation of Proposed Method in DSP
The control block diagram of proposed method is shown in
Fig. 11. First, the measurements of Vin , Vo , and Io are obtained
by the analog-to-digital converter (ADC) modules. In particular,
the value of Io determines whether the PSFB converter operates
in the DCM or CCM. In other words, the converter operates in
the DCM when Io < Io,boundary . Otherwise, it operates in the
CCM. Also, D is decided by the voltage mode control (VMC)
like the conventional method. That is, it regulates Vo by using
D as the phase-difference between primary switches. Therefore,
tSR,prop is easily calculated in DSP for the given Vin , Vo , and D
by (15). It is important to note that it can be modulated in every
sampling period of ADC.
When the operation of converter is changed from the CCM to
DCM or vice versa depending on load condition, Vo suddenly
increases or drops. This behavior in the transient state occurs
due to the difference of their voltage gains. The proposed control
method can also deal with this transient state with the updated
values of Vin , Vo , and D (see the experimental results in Figs. 17
and 18).
C. Power Loss Analysis of SR
The power loss is analyzed and compared when the PSFB
converter is controlled by the conventional and proposed control
DCM
methods. First, the conduction losses of SR in DCM, PSR,conv
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IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 57, NO. 4, JULY/AUGUST 2021
TABLE II
SPECIFICATIONS OF PARAMETERS OF PSFB CONVERTER
is clearly observed that the power loss of SR is significantly
reduced by the proposed control method in all ranges of DCM
and CCM.
IV. EXPERIMENTAL VERIFICATIONS
A. Hardware Implementation
Fig. 15. Experimental results when Io is 4 A (DCM). (a) By the conventional
control method. (b) By the proposed control method.
DCM
and PSR,prop
, by the conventional and proposed control methods, respectively, are calculated as
DCM
PSR,conv
=2·
D · i2SR,rms RDS,on(SR) /k + ΔD · (Vf,SR iSR,avg )
D + ΔD
(16)
i2SR,rms RDS,on(SR)
(17)
k
where iSR,rms = Io · 1 / 3(D + ΔD) and iSR,avg = Io / 2.
Also, RDS,on(SR) , Vf,SR , iSR,rms , iSR,avg , and k are the ON-state
resistance, forward voltage drop of body-diode, rms current,
average current of SR switches, and the number of MOSFETs,
which connected parallel to SR switches, respectively. Note that
two parallel-connected MOSFETs are applied to both QSR-1 and
QSR-2 , respectively, to reduce more conduction loss of SR. The
switching loss and reverse recovery loss of SR are assumed to be
zero because the body-diode conducts, and its forward voltage
is clamped to the switches during both turn-ON and turn-OFF
switching operations in DCM [36]. On the other hand, the proposed control method is also applicable in the CCM, according to
Fig. 10. The detailed loss analysis in CCM by conventional and
proposed control methods is given in Appendix. Then, the power
losses of SR by two control methods are compared in Fig. 12.
The specification of parameters of PSFB converter used in both
simulation and experimental tests is given in Table II. Then, it
DCM
PSR,prop
=2·
To verify the practical effectiveness of proposed control
method, the PSFB converter of 1 kW is implemented in hardware
with the DSP of TMS320F28377S, as shown in Fig. 13. The
Lo of 1.5 μH is chosen to set the ripple of iLo within 6% of
the maximum value of Io , which is 83 A. Io,boudnary of 5 A
is determined by (13), and it is 6% of the maximum load. Io is
measured by a shunt resistor at the load. The small turn-OFF dead
time of 100 ns (1.0% of Ts ) is applied for the SR switches by
considering the nonideal factors such as the turn-OFF switching
delay and parasitic inductance of MOSFETs.
When the PSFB converter operates in the CCM, the proposed
control method is changed to the NAND control method to
reduce conduction loss from duty-cycle loss in the CCM. This
transition point is determined with Io of 15 A, which is higher
than Io,boundary , by considering the safety operation of PSFB
converter for the change of load.
The interrupt of proposed control method with the VMC is implemented in every 100 kHz, which is the same as the switching
frequency of converter. Its execution time is 1.88 μs, which is the
only 18.8% of interrupt period, as shown in Fig. 14. Therefore,
it is clearly observed that the proposed control method has a
sufficient time margin with its implementation in the DSP.
B. Experimental Results
When the PSFB converter operates in the DCM with the
Io of 4 A, the experimental results by the conventional and
proposed control methods are given in Fig. 15. It is shown that
both QSR-1 and QSR-2 are turned ON during the power transfer
mode, where iSR-1 and iSR-2 start to increase. However, by
the conventional control method, the current flows through the
body-diode when iSR-1 and iSR-2 are decreasing. This is because
both QSR-1 and QSR-2 are turned OFF [see Fig. 15(a)]. As the
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LEE AND PARK: NEW CONTROL FOR SYNCHRONOUS RECTIFIER OF PSFB CONVERTER TO IMPROVE EFFICIENCY
Fig. 16.
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Experimental results when Io is 10 A (CCM). (a) By the conventional control method. (b) By the proposed control method.
Fig. 17. Experimental results when Io is changed from 4 to 44 A. (a) ΔVo ,
VGS-SR1 , iLo , and Io in time period with 4 ms/div. (b) ΔVo , VGS-SR1 , iLo ,
and Io in time period with 40 µs/div (transient state).
Fig. 18. Experimental results when Io is changed from 44 to 4 A. (a) ΔVo ,
VGS-SR1 , iLo , and Io in time period with 4 ms/div. (b) ΔVo , VGS-SR1 , iLo ,
and Io in time period with 40 µs/div (transient state).
result, a large conduction loss occurs when the conventional
control method is applied. In contrast, QSR-1 and QSR-2 are
still turned ON in the entire conduction ranges of iSR-1 and
iSR-2 by the proposed control method, as shown in Fig. 15(b).
Correspondingly, tSR,prop is 4.03 μs, which is much longer
than tSR,conv of 3.03 μs. Therefore, the conduction ranges of
body-diode are almost eliminated by the modulated tSR,prop .
This clearly proves that the proposed control method can reduce
the conduction loss of SR in light-load conditions.
When the PSFB converter operates in the CCM with the Io of
10 A, the experimental results by the conventional and proposed
control method are shown in Fig. 16(a) and (b), respectively. It
is clearly observed that the proposed control method is effective
in the CCM by reducing more conduction loss in the CCM than
the conventional control method. Also, the value of tSR,prop in
this experimental result has the good agreement with that by
theoretical analysis in Fig. 10.
In addition, to evaluate the transient performance of proposed
control method, Io is suddenly changed from 4 to 44 A, and vice
versa. Then, the practical responses of ΔVo , VGS-SR1 , iLo , and Io
are shown in Figs. 17 and 18. Note that NAND control method
is applied when Io > 15 A. It is observed that the converter
successfully operates without causing any voltage fluctuations
in the transient state [see the black-dashed boxes in Figs. 17(a)
and 18(a)] when it is changed from the DCM to CCM, and vice
versa depending on load conditions. Also, tSR,prop is properly
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IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 57, NO. 4, JULY/AUGUST 2021
Fig. 21. Key waveforms of PSFB converter in the CCM by the conventional
and proposed control methods.
Fig. 19.
Comparison of efficiency by the different control methods.
The practical effectiveness of proposed control method was
verified with the experimental hardware tests. The results
showed that it improves the efficiency of converter in light-load
conditions more significantly than conventional control method.
Moreover, it was confirmed that the PSFB operates well even in
the transient state from the CCM to DCM or vice versa. Therefore, it is expected that the proposed control method is a good
candidate for low output voltage and high output current system,
which requires the high efficiency in light-load conditions such
as server power supply.
APPENDIX
Fig. 20.
Analysis of each power loss when Io is 4 A.
modulated by the proposed control method in the transient state
[see VGS-SR1 in Figs. 17(b) and 18(b)].
Next, the efficiencies of PSFB converter by the proposed
and conventional control methods are compared in Fig. 19. It
is clearly shown that the proposed control method effectively
improves the efficiency of converter in all ranges where Io <
15 A. After that, the converter operates by the NAND control
method, as mentioned previously.
Finally, the results of each power loss are shown in Fig. 20
when the Io is 4 A. The switching loss of SR is still assumed
to be zero. It is observed that the only conduction loss of SR
is significantly reduced from 1.01 to 0.11 W (that is, with the
improvement of 89%). It does not increase any other power
losses because it has almost same primary side currents with the
conventional control method under the same conditions. Moreover, this result shows the good agreement with the simulation
result in Fig. 12.
V. CONCLUSION
This article proposed the new switching control method for
the SR of PSFB converter to improve the efficiency in light-load
conditions. It can reduce the conduction loss of SR by minimizing the conduction ranges of body-diode in the DCM. In
particular, it can be simply implemented by the DSP without
any auxiliary circuits.
The power loss analysis by conventional and proposed control
methods is made in this Appendix when they are applied in
the CCM. The additional loss occurs in secondary side due
to Dloss Ts , the duty-cycle loss, when iSR-1 and iSR-2 are overCCM
CCM
and PSR,prop
, which
lapped, as shown in Fig. 21. Then, PSR,conv
are the power losses of SR in the CCM by the conventional and
proposed control methods, respectively, can be calculated as
CCM
=2·
PSR,prop
(0.5 − Dloss ) i2SR,rms RDS,on(SR)
.
0.5
k
+ PSR,duty−loss
(A.1)
CCM
PSR,conv
= 2.
D · i2SR,rms RDS,on(SR) /k + ΔDCCM . (Vf,SR iSR,avg )
D + ΔDCCM
+ PSR,duty−loss
⎧
⎨ PSR,duty−loss = Dloss .vf,SR Io − Vo (1−D)
2Lo fs
⎩ Dloss = 2Llk fs . 2Io − Vo 1−2D
Vin
n
2nLo fs
(A.2)
(A.3)
where ΔDCCM = 0.5–D–Dloss , and PSR,duty-loss is the conduction loss of SR in duty-cycle loss.
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May 1998.
Sunho Lee (Student Member, IEEE) received the
B.S. degree in electrical engineering from the School
of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea, in 2016, where he is
currently working toward the Ph.D. degree in the
power electronics via the combined M.S. and Ph.D.
program in the School of Electrical and Electronic
Engineering.
His research interests include ac–dc converter, dc–
dc converter, digital control, and high-efficiency converter topologies.
Jung-Wook Park (Senior Member, IEEE) was born
in Seoul, South Korea. He received the B.S. degree
(summa cum laude) in electrical engineering from
Yonsei University, Seoul, South Korea, in 1999, and
the M.S.E.C.E. and Ph.D. degrees in the power system
from the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA in
2000 and 2003, respectively.
He was a Post-Doctoral Research Associate with
the Department of Electrical and Computer Engineering, University of Wisconsin, Madison, USA during
2003–2004. Since 2005, he has been with the School of Electrical and Electronic
Engineering, Yonsei University, Seoul, South Korea, where he is currently
a Professor. His current research interests include power system dynamics,
energy management system, renewable energies based distributed generation
system, operation and planning of microgrid, and hardware implementation of
power-electronic based inverters, etc.
Dr. Park was the recipient of Young Scientist Presidential Award from the
Korean Academy of Science and Technology, South Korea, in 2013. He is also
the Director of Yonsei-Power System Research Center of great energy transition
(Yonsei-PREFER) supported by the leading research program (with the $7.2M
USD grant for 9 years from 2020 to 2029) of National Research Foundation,
South Korea.
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