Department of Electronics and Communication Engineering
Acharya Institute of Technology
Acharya Dr. Sarvepalli Radhakrishnan Road, Acharya P.O., Soladevanahalli, Bangalore-560107, INDIA
www.acharya.ac.in, Email: hod-ece@acharya.ac.in
Question Bank for IA-01
Sub with Code: 8051 Microcontrollers (BEC405A)
Semester: IV
1. With a neat functional block diagram, explain the Architecture of 8051 microcontroller.
2. Identify the result in the accumulator register after each instruction step:
CLR A
CPL A
MOV R0,#0AAH
XRL A, R0
XRL A, #90H
CPL A
3. Explain PUSH and POP instructions with a help of example program.
4. Illustrate how the instructions work:
JMP @A+DPTR
XCHD A, @Ri
JBC BIT, LABLE
MOVC A, @A+PC
LCALL
5. Illustrate the following instructions set of 8051.
a) Arithmetic Instructions
b) Branch Instructions
6. Write an ALP/C Program to convert Binary Coded Decimal (BCD) to American Standard Code for
Information Interchange (ASCII).
7. Illustrate the following addressing modes of 8051
a) Immediate Addressing Mode
b) Direct addressing modes
8. Write an ALP/C Program to check for an even parity of one’s or an odd parity of one’s.
9. Write a program to multiply two 8-bit numbers stored at locations 40H and 41H and store the
result at memory locations 50H and 51H. Assume that the least significant byte of the result is
stored in a low address.
10. Write a program to add two 16-bit numbers stored at locations 51H-52H and 55H-56H and store
the result in locations 40H, 41H, and 42H. Assume that the least significant byte of data and the
result is stored in a low address and the most significant byte of data or the result is stored in a
high address.
11. With a neat diagram explain the internal memory structure (ROM & RAM) with the address
location of the 8051 microcontroller.
12. Design a µController system using 8051, 16k bytes of ROM & 32k bytes of RAM.
Department of Electrical and Electronics Engineering, Acharya Institute of Technology, Bangalore-107
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