Venable Vault I Venable Instruments
This content is shared with permission from Dr. R. David Middlebrook’s estate to further education and
research. This content may not be published or used commercially.
1. MOTIVATION AND BACKGROUND
The Design-Oriented Analysis (D-OA) Paradigm
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Premise:
Not much of what you learned in school has turned
out to be much use
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Premise:
Not much of what you learned in school has turned
out to be much use
So why are you here, listening to another professor?
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Premise:
Not much of what you learned in school has turned
out to be much use
So why are you here, listening to another professor?
Because you are going to see a completely different
approach, from the get‐go:
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Premise:
Not much of what you learned in school has turned
out to be much use
So why are you here, listening to another professor?
Because you are going to see a completely different
approach, from the get‐go:
You donʹt solve equations simultaneously; instead:
You solve them sequentially
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Premise:
Not much of what you learned in school has turned
out to be much use
So why are you here, listening to another professor?
Because you are going to see a completely different
approach, from the get‐go:
You donʹt solve equations simultaneously; instead:
You solve them sequentially
An Engineerʹs story
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Premise:
Not much of what you learned in school has turned
out to be much use
So why are you here, listening to another professor?
Because you are going to see a completely different
approach, from the get‐go:
You donʹt solve equations simultaneously; instead:
You solve them sequentially
An Engineerʹs story
Falling off a cliff
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Most of us ʺfall off a cliffʺ when we begin our first job
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The Design Process
Design iteration loops
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The Design Process
Design iteration loops
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The Design Process
Design iteration loops
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The design process consists of a succession of
iteration loops:
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ʺHow to present the resultsʺ is important:
1. If you are a design engineer writing a report or
appearing before a design review committee;
2. If you are a Test, Reliability, or System Integration
Engineer dealing with someone elseʹs design.
The D‐OA approach is valuable for all these engineers.
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Realization:
Design is the Reverse of Analysis,
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Realization:
Design is the Reverse of Analysis,
because:
The Starting Point of the Design Problem
(the Specification)
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Realization:
Design is the Reverse of Analysis,
because:
The Starting Point of the Design Problem
(the Specification) is the
Answer to the Analysis Problem
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Conventional problem‐solving approach:
1. Put everything into the model and simplify later.
2. Postpone approximation as long as possible, and donʹt even dare to
make an approximation unless you can justify it on the spot.
3. The ʺanswerʺ is acceptable in whatever form it emerges from
the algebra.
4. The more work you do, the more valuable the result.
5. Every problem is a brand‐new problem, and requires a brand‐new
strategy to solve it.
This is a recipe for failure!
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Syndromes of Technical Disability:
Algebraic diarrhoea, which leads to
Algebraic paralysis
Fear of approximation
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Syndromes of Technical Disability:
Algebraic diarrhoea, which leads to
Algebraic paralysis
Fear of approximation
The negative results of the conventional paradigm are
often masked while the student is in school.
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Why does the conventional approach fail?
Mathematicians tell us:
# of equations must
=
# of unknowns
Engineers face:
# of equations < < < # of unknowns
but have to solve the problem, anyway.
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How can we overcome the negative results of the
conventional approach?
1. Divide and Conquer:
Itʹs easier to solve many simpler problems than
one large one.
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2. We must make the equations we do have work harder
by expressing them in ʺLow Entropyʺ form.
A High Entropy Expression is one in which the
arrangement of terms and element symbols
conveys no information other that obtained by
substitution of numbers.
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2. We must make the equations we do have work harder
by expressing them in ʺLow Entropyʺ form.
A High Entropy Expression is one in which the
arrangement of terms and element symbols
conveys no information other that obtained by
substitution of numbers.
A Low Entropy Expression is one in which the
terms and element symbols are ordered and
grouped so that their physical origin and relative
importance are apparent. Only in this way can
one change the values in an informed manner
in order to change the analysis answer (that is, to
make it meet the Specification).
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Low Entropy Expressions are essential in order to
navigate the Design Iteration Loop:
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Low Entropy Expressions are essential in order to
navigate the Design Iteration Loop:
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Low Entropy Expressions are essential in order to
navigate the Design Iteration Loop:
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Design‐Oriented Analysis (D‐OA) keeps the entropy low
at every step along the way to a low entropy result.
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Design‐Oriented Analysis (D‐OA) keeps the entropy low
at every step along the way to a low entropy result.
The way to do this is:
Avoid solving simultaneous equations.
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Design‐Oriented Analysis (D‐OA) keeps the entropy low
at every step along the way to a low entropy result.
The way to do this is:
Avoid solving simultaneous equations.
Instead, follow the signal path from input to output
by Thevenin/Norton reduction and/or voltage/current
dividers.
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Design‐Oriented Analysis (D‐OA) keeps the entropy low
at every step along the way to a low entropy result.
The way to do this is:
Avoid solving simultaneous equations.
Instead, follow the signal path from input to output
by Thevenin/Norton reduction and/or voltage/current
dividers.
There may be many such paths (algorithms), each of
which gives a different Low Entropy Expression.
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1. Background & Motivation
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Design‐Oriented Analysis (D‐OA) keeps the entropy low
at every step along the way to a low entropy result.
The way to do this is:
Avoid solving simultaneous equations.
Instead, follow the signal path from input to output
by Thevenin/Norton reduction and/or voltage/current
dividers.
There may be many such paths (algorithms), each of
which gives a different Low Entropy Expression.
Avoid multiplying out the series/parallel combinations.
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How can we overcome the negative results of the
conventional approach?
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How can we overcome the negative results of the
conventional approach?
3. Recognize that we don ʹ t want an exact answer:
it would be too complicated to use, even if we could
get it.
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How can we overcome the negative results of the
conventional approach?
3. Recognize that we don ʹ t want an exact answer:
it would be too complicated to use, even if we could
get it.
Therefore, subsititute for the missing equations
with: inequalities, approximations, assumptions,
and tradeoffs.
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D‐OA problem‐solving approach: D‐OA Rules
1. Put only enough into the model to get the answer you need.
2. Make all the approximations you can, as soon as you can, justified
or not. Plow through the problem leaving behind you a wake of
assumptions and approximations. You can ʹ t lose by trying .
3. Figure out in advance as many of the quantities as you can that you
want to have in the answer, and put them into the statement of the
problem as soon as possible − even into the circuit model.
4. The less work you do, the more valuable the result. You control the
algebra. You make the algebra come out in low entropy form by
applying strategic mental energy before and during the math.
5. Every problem in not unique. There are problem solving strategies
that apply to almost all engineering problems.
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is
a recipe for success!
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The benefits of applying the D‐OA Rules are:
1. You can fend off algebraic paralysis.
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The benefits of applying the D‐OA Rules are:
1. You can fend off algebraic paralysis.
2. Approximations are good things, not an admission
of defeat.
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The benefits of applying the D‐OA Rules are:
1. You can fend off algebraic paralysis.
2. Approximations are good things, not an admission
of defeat.
3. Algebra is malleable ; you have choices.
You are empowered to exercise control: the math is
your slave , not your master.
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D‐OA is the only
kind of analysis worth doing!
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Getting Results:
TOPIC
STRUCTURE
Low Entropy Expressions
Ch 2
Presenting Results
Ch 3
Ch 4
Ch 5
Combining Results
Ch 6
Extending Results:
Input/Output Impedance Theorem
Ch 7
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Null Double Injection
Ch 8
NDI
Dissection Theorem
Ch 9
DT
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I/O IT
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Chain Theorem
CT
Ch 9
Extra Element
Theorem EET
Ch 8
General Feedback
Theorem GFT
Ch 10 Ch 11
Double Null Triple Injection DNTI
Ch 12
Ch 13
2CT
2EET
Ch 12
2GFT
Ch 13
NNull, N+1 Injection NN, ( N+1 ) I
Ch 12
NCT
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NEET
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Examples:
Chs 14 − 18
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NGFT
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2. LOW ENTROPY EXPRESSIONS
The Key to D-OA
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Conventional analysis
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This is a high entropy
expression
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Apply mental energy to:
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Reflection of impedances
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Thevenin/Norton
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Donʹt leave out the penultimate line, because
this is where the relative importance of the
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contributions is exposed!
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BOTTOM LINE:
AVOID solving simultaneous equations.
Instead, follow the signal path from input to output
by Thevenin/Norton reduction, voltage/current
dividers, and reflection of impedances.
This automatically generates Low Entropy Expressions;
AVOID multiplying out the series/parallel expressions.
There may be many such paths (algorithms), each of
which gives a different Low Entropy Expression.
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3. NORMAL AND INVERTED POLES AND ZEROS
How to choose the gain at any frequency as the Reference Gain
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3. Norm & Inv Ps & Zs
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This format is commonly considered to be ʺthe answer.ʺ
However, it is much better to extract the constant term from
both the numerator and denominator polynomials in s:
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This normalizes the polynomials, and exposes a
zero‐frequency gain and a corner frequency.
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This is a special case of the general result as a ratio of
polynomials in complex frequency s:
b0 + b1s + b2s2 + b3s3 + ...
A=
a 0 + a1s + a 2s2 + a 3s3 + ...
Extraction of the constant term from numerator and
denominator defines the zero‐frequency reference
gain A ref and normalizes the polynomials :
b1
b2 2 b3 3
1 + b s + b s + b s + ...
0
0
0
A = A ref
a1
a2 2 a3 3
1 + a s + a s + a s + ...
0
0
0
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Factorization of the polynomials defines the poles and
zeros, and hence the final (preferred) ʺfactored
pole‐zeroʺ form:
A = A ref
(
1 + ωs
z1
)(
1 + ωs
z2
)(
1 + ωs
z3
) ...
⎛ 1 + s ⎞ ⎛ 1 + s ⎞ ⎛ 1 + s ⎞ ...
⎜
⎟
⎜
⎟
⎜
⎟
ω
ω
ω
p1 ⎠ ⎝
p2 ⎠ ⎝
p3 ⎠
⎝
The reference gain and the poles and zeros should,
of course, be low entropy expressions in terms of the
circuit elements.
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Return to the example:
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Exercise 3.1
Write factored pole‐zero forms from asymptotes
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Exercise 3.1 ‐ Solution
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Exercise 3.1 ‐ Solution
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Exercise 3.1 ‐ Solution
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Exercise 3.1 ‐ Solution
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Exercise 3.2
Write factored pole‐zero forms for different Reference Gains,
and write A2 and A3 in terms of A1.
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Exercise 3.2 ‐ Solution
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Exercise 3.2 ‐ Solution
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Exercise 3.2 ‐ Solution
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Exercise 3.2 ‐ Solution
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If you donʹt use inverted poles and zeros, you are stuck
with the zero‐frequency gain as the reference gain.
The principal benefit of using inverted poles and zeros
is that you can choose the gain at any frequency as the
reference gain.
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Exercise 3.3
Write input and output impedances Zi and Zo in factored pole‐zero forms.
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Exercise 3.3 ‐ Solution
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Exercise 3.3 ‐ Solution
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Exercise 3.3 ‐ Solution
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Exercise 3.3 ‐ Solution
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Exercise 3.3 ‐ Solution
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4. AN IMPROVED FORMULA FOR QUADRATIC ROOTS
The Conventional Formula suffers from two congenital defects
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You canʹt lose by trying!
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RL
1+sC1R 2
A=
R1+RL 1+s[C (R +(R R )]+s2 [C C R (R R )]
1 2
1 L
1 2 2 1 L
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High entropy
These are congenital defects!
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root ratio
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root ratio
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root ratio
Remember this graph!
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One more time!
Bad!
Good!
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One more time!
Bad!
Good!
Further information:
TT DVD Ch 3
Paper
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Return to the circuit example:
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A still better solution:
Apply the mental frequency sweep
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5. APPROXIMATIONS AND ASSUMPTIONS
How to build Low Entropy Expressions with minimum work
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1
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An even better choice is
1
ωi
= 10 2Q
ωo
because for Q = 0.5 (two equal real roots)
ωi
= 10
ωo
and the slope is − 90° / dec, the same as twice the
−45° / dec slope for a single pole.
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10
10
10
10
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Put the quantities you know you want in the answer into
the statement of the problem as soon as possible, even
into
the circuit diagram.
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26
Put the quantities you know you want in the answer into
the statement of the problem as soon as possible, even
into
the circuit diagram.
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Put the quantities you know you want in the answer into
the statement of the problem as soon as possible, even
into
the circuit diagram.
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Exercise 5.1
Sketch asymptotes for Zi and Zo for low Q.
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Exercise 5.1 ‐ Solution
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Exercise 5.1 ‐ Solution
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Exercise 5.1 ‐ Solution
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Exercise 5.1 ‐ Solution
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46
Since there are now two resistances, re‐name
R → Re , Q → Qe
RL
By analogy, define QL ≡
Ro
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47
Why is QL defined ʺupside downʺ relative to Qe ?
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Conventional result:
Reveals no insight
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Conventional result:
Reveals no insight
This high entropy result can be converted into the desired
low entropy version by application of mental energy, but it
takes quite an effort, and you have to know where youʹre
going!
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51
Conventional result:
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52
H=
1
1+1/QeQL
1
1
1
+
2
⎞ ⎛
⎞
Qe QL ⎛
s
s
1+
⎜⎜
⎟⎟ + ⎜⎜
⎟
1+1/QeQL ⎝ ωo 1+1/QeQL ⎠ ⎝ ωo 1+1/QeQL ⎟⎠
This is a good example of how a low entropy format can
allow one equation to disclose more than one useful
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53
H=
1
1+1/QeQL
1
1
1
+
2
⎞ ⎛
⎞
Qe QL ⎛
s
s
1+
⎜⎜
⎟⎟ + ⎜⎜
⎟
1+1/QeQL ⎝ ωo 1+1/QeQL ⎠ ⎝ ωo 1+1/QeQL ⎟⎠
second
order
second
order
first
order
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10
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Compare the Zi asymptotes with and without R L :
Without RL :
(QL = ∞ )
With RL :
(QL ≠ ∞ )
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61
The appearance of the new corner frequency ωo /QL
can be confirmed by a mental frequency sweep:
Without RL , Zi → ∞ as ω → 0 because of the capacitive
reactance.
With RL , Zi flattens, so a concave downwards corner is
introduced, which is an inverted pole.
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When an LC filter is loaded, a 4th effect needs to be
accounted for:
second
order
second
order
first
order
first
order
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4. New corner frequencies may appear in
some transfer functions
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A third damping resistance Rc may be present,
representing the capacitor esr:
Ro
By analogy with Qe , define Qc ≡
Rc
The analysis for H, Zi , and Zo could be re‐done in the
same way.
Instead, letʹs build the result by applying what we
already know about the two simpler cases.
The price we are willing to pay, in order to leap‐frog
directly to the result, is that the second‐order effects
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A third damping resistance Rc may be present,
representing the capacitor esr:
One first‐order effect of adding a second damping
resistance was to lower the total Qt to the parallel
combination
1
1
1
=
+
Qt Qe QL
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67
A third damping resistance Rc may be present,
representing the capacitor esr:
A good guess would be that adding a third damping
resistance would lower the total Qt to the triple parallel
combination
1
1
1
1
+
=
+
Qt Qe QL Qc
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Another possible first‐order effect of adding a third
damping resistance is the appearance of additional
corner frequencies.
A mental frequency sweep can be used to verify an
analytical result, but it can also be used ʺin reverseʺ
to expose new corner frequencies.
The strategy is to determine whether or not the addition
of the third damping resistance changes the asymptote
slope as frequency approaches either zero or infinity.
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For the voltage transfer function H:
ω → 0: no change of slope, so no new inverted
pole or zero;
ω → ∞: a concave upwards corner appears, so there
is a new normal zero.
Further, the value of the corner is where 1/ωC = R c ,
which is 1/RC=Qcωo .
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Assembled results:
triple parallel
combination:
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71
Assembled results:
triple parallel
combination:
A similar process leads to the assembled result for Zi :
(No new corners)
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6. PRODUCTS AND SUMS OF FACTORED POLE-ZERO
EXPRESSIONS
Doing the Algebra on the Graph
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6. Products & Sums
1
Functions expressed in factored pole‐zero form often need
to be combined, either by multiplication or addition.
Multiplication is straightforward:
A1
A1 = A1 ref
(
1+ ω s
z11
)(
1+ ω s
z12
)
...
A2 = A2 ref
⎛
s ⎞⎛
s ⎞
⎜ 1 + ω p 11 ⎟⎜ 1 + ω p 12 ⎟...
⎝
⎠⎝
⎠
A = A1 ref A2 ref
A = A1 A2
A2
( 1+ ω )( 1+ ω )...
s
z 21
s
z 22
⎛
s ⎞⎛
s ⎞
⎜ 1 + ω p 21 ⎟⎜ 1 + ω p 22 ⎟...
⎝
⎠⎝
⎠
( 1+ ω )( 1+ ω )...( 1+ ω )( 1+ ω )...
s
z11
s
z12
s
z 21
s
z 22
⎛
s ⎞⎛
s ⎞ ⎛
s ⎞⎛
s ⎞
⎜ 1 + ω p 11 ⎟⎜ 1 + ω p 12 ⎟...⎜ 1 + ω p 21 ⎟⎜ 1 + ω p 22 ⎟...
⎝
⎠⎝
⎠ ⎝
⎠⎝
⎠
The
product contains the poles
and zeros of both functions.
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7
Addition is more complicated:
A2
+
A1
A = A1 ref
A=
(
A1 ref 1 + ω s
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z11
s
z12
⎛
s ⎞⎛
s ⎞
⎜ 1 + ω p 11 ⎟⎜ 1 + ω p 12 ⎟...
⎝
⎠⎝
⎠
)( 1+ ω )...⎛⎜⎝ 1+ ω
s
z12
+
( 1+ ω )( 1+ ω )... + A
s
z11
A = A1 + A2
( 1+ ω )( 1+ ω )...
s
z 21
s
z 22
2 ref ⎛
s ⎞⎛
s ⎞
⎜ 1 + ω p 21 ⎟⎜ 1 + ω p 22 ⎟...
⎝
⎠⎝
⎠
s ⎞⎛ 1 + s ⎞ ... + A
⎟⎜ ω p 22 ⎟
2 ref
p 21 ⎠⎝
⎠
( 1+ ω )( 1+ ω )...⎛⎜⎝ 1+ ω
s
z 21
s
z 22
s ⎞⎛ 1 + s ⎞ ...
⎟⎜ ω p 22 ⎟
p 11 ⎠⎝
⎠
⎛
s ⎞⎛
s ⎞ ⎛
s ⎞⎛
s ⎞
⎜ 1 + ω p 11 ⎟⎜ 1 + ω p 22 ⎟ ...⎜ 1 + ω p 21 ⎟⎜ 1 + ω p 22 ⎟ ...
⎝
⎠⎝
⎠ ⎝
⎠⎝
⎠
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8
Addition is more complicated:
A2
A1
A=
(
A1 ref 1 + ω s
z11
)( 1+ ω )...⎛⎜⎝ 1+ ω
s
z12
+
A = A1 + A2
+
s ⎞⎛ 1 + s ⎞ ... + A
⎟⎜ ω p 22 ⎟
2 ref
p 21 ⎠⎝
⎠
( 1+ ω )( 1+ ω )...⎛⎜⎝ 1+ ω
s
z 21
s
z 22
s ⎞⎛ 1 + s ⎞ ...
⎟⎜ ω p 22 ⎟
p 11 ⎠⎝
⎠
⎛
s ⎞⎛
s ⎞ ⎛
s ⎞⎛
s ⎞
⎜ 1 + ω p 11 ⎟⎜ 1 + ω p 22 ⎟ ...⎜ 1 + ω p 21 ⎟⎜ 1 + ω p 22 ⎟ ...
⎝
⎠⎝
⎠ ⎝
⎠⎝
⎠
The sum contains the poles of both functions, but the
numerator consists of the sums of cross‐products of poles
and zeros, and is a new polynomial that has to be
renormalized and refactored.
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This can be very tedious, and requires approximations
if the numerator is higher than a quadratic in s.
ʺDoing the algebra on the graphʺ makes suitable
approximations obvious.
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10
0db
A1 = 1
ωo
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ω
A2 = o
s
11
A guess is that the sum follows the larger:
0db
A1 = 1
ωo
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ω
A2 = o
s
12
A guess is that the sum follows the larger:
0db
A1 = 1
ωo
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ω
A2 = o
s
13
A guess is that the sum follows the larger:
0db
A1 = 1
ω
A = A1 + A2 = 1 + o
s
ωo
ω
A2 = o
s
This is confirmed algebraically:
A = A1 + A2 = 1 +
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14
A20
0db
ω1
A1 = 1
ωo = A20ω1
A2 = A20
1
1 + ωs
1
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15
If the sum follows the larger, the result is:
A20
0db
ω1
A1 = 1
ωo = A20ω1
A2 = A20
1
1 + ωs
1
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16
If the sum follows the larger, the result is:
A = A20
ω1
A20
20 1
1 + ωs
1
A1 = 1
0db
1 + A sω
ωo = A20ω1
A2 = A20
1
1 + ωs
1
However, the algebra shows that this is an approximation:
A = 1 + A20
1
=
s
1+ω
1 + A20 + ωs
1
1 + ωs
1
= (1 + A20 )
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1 + (1 + As )ω
20
1
1 + ωs
1
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17
1 + A20
A20
0db
ω1
A = (1 + A20 )
1 + (1 + As )ω
20
1
1 + ωs
1
( 1 + A20 ) ω1
A1 = 1
ωo = A20ω1
A2 = A20
1
1 + ωs
1
This is the exact answer.
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18
1 + A20
A20
0db
ω1
A = (1 + A20 )
1 + (1 + As )ω
20
1
1 + ωs
1
( 1 + A20 ) ω1
A1 = 1
ωo = A20ω1
A2 = A20
1
1 + ωs
1
This is the exact answer.
Itʹs your decision as to whether the approximate answer
is good enough.
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Exercise 6.1
Guess an exact sum
Guess the exact sum A = A1 +A2 on the graph, then find it
algebraically.
0db
A1 = 1
ωo
A2
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6. Products & Sums
20
Exercise 6.1 ‐ Solution
Guess the exact sum A = A1 +A2 on the graph, then find it
algebraically.
0db
A1 = 1
ωo ω 2
ω
1+ o =
ω2
ωo
A2
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ωo
ωo ω 2
ω2
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6. Products & Sums
21
Exercise 6.1 ‐ Solution
ωo ω 2
A1 = 1
0db
ω
1+ o =
ω2
ωo
ωo ω 2
ωo
A2
ω2
ωo ⎛
ωo ωo
s ⎞
1+
A = 1+
= 1+
+
s ⎜⎝
ω2 ⎟⎠
ω2 s
⎛
ω ⎞⎛ ω ω ⎞
= ⎜1 + o ⎟⎜1 + o 2 ⎟
s ⎠
ω2 ⎠ ⎝
⎝
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6. Products & Sums
22
Guidelines:
In ranges where both functions have the same slope, the
combination has the same slope and is the sum of the
separate values.
The poles of the sum are the poles of the two functions.
The ʺgain‐bandwidth tradeoffʺ relates the corner
frequencies to the flat values.
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6. Products & Sums
23
Exercise 6.2
Find an exact sum graphically
Use the Guidelines to construct the exact sum of the two functions,
without doing any algebra:
0db
A1 = 1
ω1
ωo
A2
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ω2
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6. Products & Sums
24
Exercise 6.2 ‐ Solution
0db
A20 = ωo / ω1
A1 = 1
ω1
ωo
A2
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ω2
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6. Products & Sums
ωo
ω2
25
Exercise 6.2 ‐ Solution
ω
1 + ωo
0db
A20 = ωo / ω1
A1 = 1
1
ω1
ωo
ωo + ω1 A2
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ω2
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6. Products & Sums
ωo
ω2
26
Exercise 6.2 ‐ Solution
ω
1 + ωo
0db
A20 = ωo / ω1
A1 = 1
1
ω1
ω
2
ωo
ωo + ω1 A2
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1 + ωo
ω2
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6. Products & Sums
ωo
ω2
27
Exercise 6.2 ‐ Solution
ω
ω
1 + ωo
0db
A20 = ωo / ω1
A1 = 1
ω1
1
ω1
1
1 + ω1
1+ ω
2
1 + ωo
= ωo
ωo
ω
o
2
ω
1 + ωo
2
ωo
ωo + ω1 A2
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ω
1 + ωo
ω2
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6. Products & Sums
ωo
ω2
28
Difference of two functions:
− A2
A1
A10
A20
+
+
A = A1 − A2
ω1
A10
ωo =
ω1
A20
A1 = A10
1
1 + ωs
1
v.0.2 10/07
http://www.RDMiddlebrook.com
6. Products & Sums
29
Difference of two functions:
− A2
A1
A10
A20
0°
+
+
A = A1 − A2
ω1
A10
ωo =
ω1
A20
A1 = A10
1
1 + ωs
1
−45° / dec
− 90°
v.0.2
10/07
− 180
°
http://www.RDMiddlebrook.com
6. Products & Sums
30
Difference of two functions:
− A2
A1
A10
+
+
A = A1 − A2
ω1
A0 = A10 − A20
A20
0°
ωo =
A10
ω1
A20
A1 = A10
1
1 + ωs
1
−45° / dec
− 90°
v.0.2
10/07
− 180
°
http://www.RDMiddlebrook.com
6. Products & Sums
31
Difference of two functions:
− A2
A1
A10
0°
+
A = A1 − A2
ω1
A0 = A10 − A20
A20
+
ω2 =
A10 − A20
ω1
A20
A10
ωo =
ω1
A20
A1 = A10
1
1 + ωs
1
−45° / dec
− 90°
v.0.2
10/07
− 180
°
http://www.RDMiddlebrook.com
6. Products & Sums
32
Difference of two functions:
− A2
A1
A10
0°
+
A = A1 − A2
ω1
A0 = A10 − A20
A20
+
ω2 =
A10 − A20
ω1
A20
A10
ωo =
ω1
A20
A1 = A10
1
1 + ωs
1
−45° / dec
− 90°
v.0.2
10/07
− 180
°
http://www.RDMiddlebrook.com
6. Products & Sums
33
Difference of two functions:
− A2
A1
+
+
A = A1 − A2
The result is
A = A0
1 − ωs
2
1 + ωs
1
The corner ω2 is a right half plane (rhp) zero:
it has a concave upward magnitude response,
but a phase lag, not a phase lead.
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6. Products & Sums
34
Difference of two functions:
− A2
A1
A10
0°
+
A = A1 − A2
A = A0
ω1
A0 = A10 − A20
A20
+
1 − ωs
2
1 + ωs
1
ω2 =
A10 − A20
ω1
A20
A10
ωo =
ω1
A20
A1 = A10
1
1 + ωs
1
−45° / dec
− 90°
v.0.2
10/07
− 180
°
http://www.RDMiddlebrook.com
6. Products & Sums
35
Difference of two functions:
− A2
A1
+
+
A = A1 − A2
A rhp zero occurs when a signal can go from input to
output by two paths, one inverting and one not, with
one path dominating at low frequencies, and the other
dominating at high frequencies.
Every common‐emitter or common‐source amplifier
stage potentially exhibits a rhp zero.
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6. Products & Sums
36
Consider sums of functions that result in quadratics in s
Ro
Z1 = Ro
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s
ωo
ωo
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6. Products & Sums
ω
Z2 = Ro o
s
37
Consider sums of functions that result in quadratics in s
Z
Ro
Z1 = Ro
s
ωo
ω
Z2 = Ro o
s
ωo
( )
2⎤
⎡
s
⎢ 1 + ωo ⎥
⎛ s ωo ⎞
⎣
⎦
+
=
Z = Z1 + Z2 = Ro ⎜
R
o
⎟
s
s
ω
⎝ o
⎠
ωo
The numerator is a quadratic pair of zeros with infinite Q
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6. Products & Sums
38
Consider sums of functions that result in quadratics in s
In any realistic case, there will be at least one additional
corner:
Ro
ωo / Q ⎞
s ⎛
Z1 = Ro
⎜1+
⎟
ωo ⎝
s ⎠
ωo
Q
v.0.2 10/07
ω
Z2 = Ro o
s
ωo
http://www.RDMiddlebrook.com
6. Products & Sums
39
Consider sums of functions that result in quadratics in s
In any realistic case, there will be at least one additional
corner:
Z
Ro
ωo / Q ⎞
s ⎛
Z1 = Ro
⎜1+
⎟
ωo ⎝
s ⎠
ωo
ωo
Q
Ro
Q
ω
Z2 = Ro o
s
( ) ( )
2⎤
⎡
s
s
1
⎢ 1 + Q ωo + ωo ⎥
⎡ ωo 1
s ⎤
⎣
⎦
= Ro ⎢
+ +
Z = Ro
⎥
s
ω
s
Q
⎣
o⎦
ωo
The second version exposes the symmetry.
v.0.2 10/07
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6. Products & Sums
40
Consider sums of functions that result in quadratics in s
In any realistic case, there will be at least one additional
corner:
Z
Ro
ωo / Q ⎞
s ⎛
Z1 = Ro
⎜1+
⎟
ωo ⎝
s ⎠
ωo
ωo
Q
Ro
Q
ω
Z2 = Ro o
s
( ) ( )
2⎤
⎡
s
s
1
⎢ 1 + Q ωo + ωo ⎥
⎦
Z = Ro ⎣
s
ωo
Conclusion: The Q of a quadratic corner is affected by a
v.0.2 10/07
nearby
corner.
http://www.RDMiddlebrook.com
6. Products & Sums
41
Short cut to find the quadratic Q‐factor:
Evaluate Z1 and Z2 separately at s = jωo :
ωo / Q ⎞
s ⎛
Z1 = Ro
⎜1+
⎟
ωo ⎝
s ⎠
⎛
⎛1
⎞
1 ⎞
Z1 ( jωo ) = Ro j ⎜ 1 +
=
R
+
j
o⎜
⎟
⎟
jQ
Q
⎝
⎠
⎝
⎠
ω
Z2 = Ro o
s
Z2 ( jωo ) = Ro
1
j
= Ro (
− j)
When the two are added, the
imaginary parts cancel, and
the real part is the sum of the
separate real parts :
v.0.2 10/07
Z ( jωo ) =
http://www.RDMiddlebrook.com
6. Products & Sums
Ro
Q
42
In the above example, Z1 and Z2 are the series and
parallel branches of the single‐damped LC low‐pass
filter, and Z is the input impedance Zi :
Z1
Zi
Ro
Q
Ro
Z2
ωo ≡
s
ωo
ω
Ro o
s
1
LC
Ro ≡
L
C
Ro
Q≡
R
Z
Ro
ωo / Q ⎞
s ⎛
Z1 = Ro
⎜1+
⎟
ωo ⎝
s ⎠
ωo
v.0.2 10/07
Q
ωo
Ro
Q
http://www.RDMiddlebrook.com
6. Products & Sums
ω
Z2 = Ro o
s
43
Doing the algebra on the graph can be extended to the
double‐ and triple‐damped filters.
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6. Products & Sums
44
Exercise 6.3
Find Zi for the double‐damped LC filter. Draw the asymptotes for Z1
and Z2 . Construct the asymptotes for the input impedance Zi =Z1 +Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Zi
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Ro
Qe
Ro
Z2
s
ωo
Ro
Qc
ω
Ro o
s
ωo ≡
Ro
Qe ≡
Re
http://www.RDMiddlebrook.com
6. Products & Sums
1
LC
Ro ≡
L
C
Ro
Qc ≡
Rc
45
Exercise 6.3 ‐ Solution
Find Zi for the double‐damped LC filter. Draw the asymptotes for Z1
and Z2 . Construct the asymptotes for the input impedance Zi =Z1 +Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Zi
Ro
Qe
Ro
Z2
s
ωo
ωo ≡
Ro
Qc
ω
Ro o
s
Ro
Qe ≡
Re
1
LC
Ro ≡
L
C
Ro
Qc ≡
Rc
Ro
Z1 = Ro
ωo / Qe ⎞
s ⎛
1
+
⎜
⎟
ωo ⎝
s ⎠
ωo
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Qe
ωo
ωo ⎛
s ⎞
1
Z
R
=
+
o
Qcωo 2
s ⎜⎝
Qc ωo ⎟⎠
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6. Products & Sums
46
Exercise 6.3 ‐ Solution
Find Zi for the double‐damped LC filter. Draw the asymptotes for Z1
and Z2 . Construct the asymptotes for the input impedance Zi =Z1 +Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Zi
Ro
Qe
Ro
Z2
s
ωo
ωo ≡
Ro
Qc
ω
Ro o
s
Ro
Qe ≡
Re
1
LC
Ro ≡
L
C
Ro
Qc ≡
Rc
Zi
Ro
Z1 = Ro
ωo / Qe ⎞
s ⎛
1
+
⎜
⎟
ωo ⎝
s ⎠
ωo
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Qe
ωo
ωo ⎛
s ⎞
1
Z
R
=
+
o
Qcωo 2
s ⎜⎝
Qc ωo ⎟⎠
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6. Products & Sums
47
Exercise 6.3 ‐ Solution
To find the quadratic Q‐factor, evaluate Z1 and Z2 separately at s = jωo :
⎛
1 ⎞
Z1 ( jωo ) = Ro j ⎜ 1 +
jQe ⎟⎠
⎝
⎛ 1
⎞
= Ro ⎜
+ j⎟
⎝ Qe
⎠
⎛
⎛ 1
⎞
1 ⎞
Z2 ( jωo ) = Ro ( − j ) ⎜ 1 + j
⎟ = Ro ⎜ Q − j ⎟
Q
⎝ c
⎠
⎝
c⎠
⎛ 1
1 ⎞
Hence Zi ( jωo ) = Z1 ( jωo ) + Z2 ( jωo ) = Ro ⎜
+
⎟
Q
Q
⎝ e
c⎠
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6. Products & Sums
48
Exercise 6.3 ‐ Solution
Find Zi for the double‐damped LC filter. Draw the asymptotes for Z1
and Z2 . Construct the asymptotes for the input impedance Zi =Z1 +Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Zi
Ro
Qe
Ro
Z2
s
ωo
ωo ≡
Ro
Qc
ω
Ro o
s
Ro
Qe ≡
Re
Zi
Ro
Z1 = Ro
ωo / Qe ⎞
s ⎛
1
+
⎜
⎟
ωo ⎝
s ⎠
ωo
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Qe
..
Ro / Qc
Ro / Qe
ωo
1
LC
Ro ≡
L
C
Ro
Qc ≡
Rc
Ro Ro Ro
=
+
Qt Qe Qc
ωo ⎛
s ⎞
1
Z
R
=
+
o
Qcωo 2
s ⎜⎝
Qc ωo ⎟⎠
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6. Products & Sums
49
Exercise 6.4
Find Zi for the triple‐damped LC filter. Draw the asymptotes for Z1
and Z2 . Construct the asymptotes for the input impedance Zi =Z1 +Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Zi
Ro
Qe
Ro
Z2
Ro
Qc
s
ωo
Ro
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ωo
s
ωo ≡
QL Ro
Ro
Qe ≡
Re
http://www.RDMiddlebrook.com
6. Products & Sums
1
LC
Ro ≡
Ro
Qc ≡
Rc
L
C
RL
QL ≡
Ro
50
Exercise 6.4 ‐ Solution
Find Zi for the triple‐damped LC filter. Draw the asymptotes for Z1
and Z2 . Construct the asymptotes for the input impedance Zi =Z1 +Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Zi
Ro
Qe
Ro
Z2
Ro
Qc
s
ωo
Ro
Z1 = Ro
ωo
s
ωo / Qe ⎞
s ⎛
1
+
⎜
⎟
ωo ⎝
s ⎠
ωo ≡
QL Ro
Ro
Qe ≡
Re
1
LC
Ro ≡
Ro
Qc ≡
Rc
L
C
RL
QL ≡
Ro
ω
s
QL ⎛⎜ Q1 + o ⎞⎟
+
1
ω
Qcωo
s ⎠
⎝ c
≈ Ro o
Z2 = Ro
ωo ⎞
s 1 + ωo / QL
⎛
1
QL + ⎜ Q +
⎟
s
c
s
⎝
⎠
Ro
=
+ RoQL ≈ RoQL
Zi (0) = Z1 (0) + Z2 (0)
Qe
With neglect of the second‐order effects, Zi follows the higher asymptote:
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6. Products & Sums
51
Exercise 6.4 ‐ Solution
Find Zi for the triple‐damped LC filter. Draw the asymptotes for Z1
and Z2 . Construct the asymptotes for the input impedance Zi =Z1 +Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Zi
Ro
Qe
Ro
Z2
Ro
Qc
s
ωo
Ro
ωo
ωo ≡
QL Ro
s
Ro
Qe ≡
Re
1
LC
Ro ≡
Ro
Qc ≡
Rc
L
C
RL
QL ≡
Ro
ωo
Zi
QL
Ro
Z1 = Ro
ωo / Qe ⎞
s ⎛
+
1
⎜
⎟
s ⎠
ωo ⎝
ωo
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Qe
1 + Q sω
ωo
ω
c o
Z2 = Ro o
Qcωo
s 1 + ωo / QL
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6. Products & Sums
s
52
Exercise 6.4 ‐ Solution
To find the quadratic Q‐factor, evaluate Z1 and Z2 separately at s = jωo :
⎛ 1
= Ro ⎜
⎝ Qe
⎛
1 ⎞
Z1 ( jωo ) = Ro j ⎜ 1 +
jQe ⎟⎠
⎝
Z2 ( jωo ) = Ro ( − j )
1 + j Q1
c
1 − j Q1
− j + ) (1 + j )
(
=R
o
L
1
Qc
1
QL
1 + 12
⎡ 1
⎛
1
1 ⎞⎤
≈ Ro ⎢
+
− j⎜1 −
⎟⎥
Q
Q
Q
Q
⎝
L
c L ⎠⎦
⎣ c
QL
Hence Zi ( jωo ) = Z1 ( jωo ) + Z2 ( jωo )
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⎞
+ j⎟
⎠
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6. Products & Sums
⎛ 1
⎞
1
≈ Ro ⎜
+
− j⎟
Q
Q
⎝ c
⎠
L
⎛ 1
1
1 ⎞
= Ro ⎜
+
+
⎟
⎝ Qe Qc QL ⎠
53
Exercise 6.4 ‐ Solution
Find Zi for the triple‐damped LC filter. Draw the asymptotes for Z1
and Z2 . Construct the asymptotes for the input impedance Zi =Z1 +Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Zi
Ro
Qe
Ro
Z2
Ro
Qc
s
ωo
Ro
ωo
ωo ≡
QL Ro
Ro
Qe ≡
Re
s
1
LC
L
C
Ro ≡
Ro
Qc ≡
Rc
RL
QL ≡
Ro
ωo
Zi
QL
Ro
Z1 = Ro
ωo / Qe ⎞
s ⎛
+
1
⎜
⎟
s ⎠
ωo ⎝
ωo
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Qe
..
Ro / Qc
Ro / Qe
Ro / QL
ωo
Ro Ro Ro Ro
=
+
+
Qt Qe Qc QL
1 + Q sω
ω
c o
Z2 = Ro o
Qcωo
s 1 + ωo / QL
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6. Products & Sums
s
54
Exercise 6.5
Construct A = A1 + A2 in both magnitude and phase asymptotes,
starting from A1 and A2 in suitable factored pole‐zero forms.
ωo
Q
0db
A1 =
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ωo
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6. Products & Sums
A2 =
55
Exercise 6.5 ‐ Solution
Construct A = A1 + A2 in both magnitude and phase asymptotes,
starting from A1 and A2 in suitable factored pole‐zero forms.
ωo
Q
0db
A1 =
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s
ωo
ωo
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6. Products & Sums
ω ⎛ ω /Q⎞
A2 = o ⎜ 1 + o
⎟
s ⎝
s ⎠
56
Exercise 6.5 ‐ Solution
With neglect of second‐order effects, the sum will follow the
higher function:
ωo
Q
0db
A1 =
s
ωo
ωo
ω ⎛ ω /Q⎞
A2 = o ⎜ 1 + o
⎟
s ⎝
s ⎠
The form is:
2⎤
⎡
⎛
⎞
⎛
⎞
ω ⎛ ω /Q⎞
1
s
s
⎢
⎥
A = o ⎜1+ o
1
+
+
⎟
⎜
⎟
⎜
⎟
s ⎝
s ⎠ ⎢ Qt ⎝ ωo ⎠ ⎝ ωo ⎠ ⎥
⎣
⎦
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6. Products & Sums
57
Exercise 6.5 ‐ Solution
Find the quadratic Q‐factor Qt :
A=
ω ⎛ ω /Q⎞
+ o ⎜1+ o
⎟
ωo s ⎝
s ⎠
s
⎛
1⎛
1 ⎞
1⎞
1
1
A( jωo ) = j + ⎜ 1 +
=
j
−
j
−
j
=
−
⎜
j⎝
jQ ⎟⎠
Q ⎟⎠
Q
⎝
So Qt = −Q and the final form is
A=
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ωo ⎛
⎜1+
s ⎝
ωo / Q ⎞ ⎡
s
2
1⎛ s ⎞ ⎛ s ⎞ ⎤
⎥
+⎜
⎟ ⎢1 − ⎜
⎟
⎟
⎠ ⎢⎣ Q ⎝ ωo ⎠ ⎝ ωo ⎠ ⎥⎦
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6. Products & Sums
58
Exercise 6.5 ‐ Solution
ωo
1
1
=−
Qt
Q
Q
0db
A1 =
s
ωo
ωo
ω ⎛ ω /Q⎞
A2 = o ⎜ 1 + o
⎟
s ⎝
s ⎠
The negative Qt means that the quadratic is two rhp zeros, so the
magnitude asymptotes have a concave upwards corner at ωo , and the
phase is a 180° lag, not a lead.
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6. Products & Sums
59
Exercise 6.5 ‐ Solution
ωo
Q
0db
A1 =
− 90°
1
1
=−
Qt
Q
s
ωo
ωo
ω ⎛ ω /Q⎞
A2 = o ⎜ 1 + o
⎟
s ⎝
s ⎠
+ 45° / dec
− 180°
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− 270°
60
Exercise 6.5 ‐ Solution
ωo
Q
0db
A1 =
− 90°
1
1
=−
Qt
Q
ω ⎛ ω /Q⎞
A2 = o ⎜ 1 + o
⎟
s ⎝
s ⎠
s
ωo
ωo
+ 45° / dec
− 180°
10
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− 270°
1
2Q
ωo
61
Exercise 6.5 ‐ Solution
ωo
Q
0db
A1 =
− 90°
1
1
=−
Qt
Q
ω ⎛ ω /Q⎞
A2 = o ⎜ 1 + o
⎟
s ⎝
s ⎠
s
ωo
ωo
+ 45° / dec
− 180°
10
v.0.2 10/07
− 270°
1
2Q
ωo
62
Exercise 6.5 ‐ Solution
By doing the algebra on the graph to set up
A=
ωo ⎛
⎜1+
s ⎝
ωo / Q ⎞ ⎡
s
2
1⎛ s ⎞ ⎛ s ⎞ ⎤
⎥
+⎜
⎟ ⎢1 − ⎜
⎟
⎟
⎠ ⎢⎣ Q ⎝ ωo ⎠ ⎝ ωo ⎠ ⎥⎦
you have effectively found the symbolic roots of a
cubic equation!
Algebraically,
A=
s
ωo
+
ωo ⎛
⎜1+
s ⎝
ωo / Q ⎞
s
⎟
⎠
1 ⎛ ωo ⎞ 2 ωo
s
= ⎜
+
+
⎟
Q⎝ s ⎠
s ωo
which is a cubic in (s/ωo ).
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6. Products & Sums
63
Extensions of the graphical method
1. In the sum of two functions, any one can be extracted
to reduce the sum to the form 1 + T :
⎛
Z ⎞
Z = Z1 + Z2 = Z1 ⎜ 1 + 2 ⎟ etc.
Z1 ⎠
⎝
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6. Products & Sums
64
Extensions of the graphical method
1. In the sum of two functions, any one can be extracted
to reduce the sum to the form 1 + T :
⎛
Z ⎞
Z = Z1 + Z2 = Z1 ⎜ 1 + 2 ⎟ etc.
Z1 ⎠
⎝
2. The sum of any number of impedances in series can
be found graphically:
Z = Z1 + Z2 + Z3 + ...
The result follows whichever contribution is the largest.
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6. Products & Sums
65
Extensions of the graphical method
1. In the sum of two functions, any one can be extracted
to reduce the sum to the form 1 + T :
⎛
Z ⎞
Z = Z1 + Z2 = Z1 ⎜ 1 + 2 ⎟ etc.
Z1 ⎠
⎝
2. The sum of any number of impedances in series can
be found graphically:
Z = Z1 + Z2 + Z3 + ...
The result follows whichever contribution is the largest.
3. Similarly, the sum of any number of impedances in
parallel can be found graphically:
1
1
1
1
=
+
+
+ ...
Z Z1 Z 2 Z 3
The
result
contribution is the smallest.
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6. Products & Sums
66
For the triple‐damped LC filter, draw the asymptotes for Z1 and Z2 .
Construct the asymptotes for the output impedance Zo =Z1 Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Z2
1
L
Ro
ωo ≡
Ro
s
R
≡
o
Zi Q Ro ω
Z
LC
C
o
Qc
e
o
QL Ro
ωo
Ro
Ro
RL
Ro
Q
≡
Q
≡
Q
≡
e
c
L
s
Re
Rc
Ro
Z i = Z1 + Z 2
1
1
1
=
+
Zo Z1 Z2
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6. Products & Sums
67
For the triple‐damped LC filter, draw the asymptotes for Z1 and Z2 .
Construct the asymptotes for the output impedance Zo =Z1 Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Z2
1
L
Ro
ωo ≡
Ro
s
R
≡
o
Zi Q Ro ω
Z
LC
C
o
Qc
e
o
QL Ro
ωo
Ro
Ro
RL
Ro
Q
Q
Q
≡
≡
≡
L
e
c
s
Re
Rc
Ro
ωo
Zi
QL
Ro
Qt
Ro
Z1 = Ro
ωo / Qe ⎞
s ⎛
+
1
⎜
⎟
s ⎠
ωo ⎝
ωo
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ωo 1 + Qcωo
s
Qcωo
ω
o
Qe http://www.RDMiddlebrook.com
6. Products & Sums
Z2 = Ro
s 1 + ωo / QL
s
68
For the triple‐damped LC filter, draw the asymptotes for Z1 and Z2 .
Construct the asymptotes for the output impedance Zo =Z1 Z2 ,
and find the Qt of the quadratic in s. Neglect second‐order effects.
Z1
Z2
1
L
Ro
ωo ≡
Ro
s
R
≡
o
Zi Q Ro ω
Z
LC
C
o
Qc
e
o
QL Ro
ωo
Ro
Ro
RL
Ro
Q
Q
Q
≡
≡
≡
L
e
c
s
Re
Rc
Ro
ωo
Qt Ro
QL
Ro
Z1 = Ro
ωo / Qe ⎞
s ⎛
+
1
⎜
⎟
s ⎠
ωo ⎝
ωo
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ωo 1 + Qcωo
s
Zo
Qcωo
ω
o
Qe http://www.RDMiddlebrook.com
6. Products & Sums
Z2 = Ro
s 1 + ωo / QL
s
69
ʺDoing the algebra on the graphʺ applies to any transfer
functions, whether they be voltage gains, current gains,
impedances, or admittances.
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6. Products & Sums
70
ʺDoing the algebra on the graphʺ applies to any transfer
functions, whether they be voltage gains, current gains,
impedances, or admittances.
In particular, the last example of impedances in parallel
also applies to reciprocal sums of voltage gains or current
gains, which will be valuable in the later applications of
the Dissection Theorem.
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6. Products & Sums
71
7. THE I/O IT:
The Input/Output Impedance Theorem
How to find them directly from the Gain, thereby saving
almost two-thirds of the work
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7. The I/O IT
1
Why do we need to deal with input and
output impedances?
1. They may be part of the specifications.
2. They describe the interaction between two system blocks, and are
therefore components of the Divide and Conquer approach,
specifically incorporated in the Chain Theorem.
Definitions of ʺinputʺ and ʺoutput:ʺ
Input and output impedances are transfer functions (TFs), just as
is the gain.
A TF is a ratio of one signal in a circuit to another, so the most general
definition of ʺinputʺ and ʺoutputʺ is that the ʺinputʺ is the signal in the
denominator, and the ʺoutputʺ is the signal in the numerator:
ʺoutputʺ
= transfer function TF
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ʺinputʺ
7. The I/O IT
2
If numerator and denominator are both voltages or currents, the TF is
a voltage gain or a current gain; if the numerator is a voltage and the
denominator is a current, the TF is a transimpedance (and vice versa for
a transadmittance).
If the numerator is the voltage across the same port into which the
denominator current flows, the TF is a self‐impedance.
The denominator of a TF is not necessarily an independent excitation; the
independent excitation may be elsewhere.
Thus, there are three kinds of ʺinputʺ:
1. A signal at a port designated as ʺinputʺ
2. An independent excitation
3. The denominator of a TF
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7. The I/O IT
3
Driving Point Impedance
The port at which a circuit is driven is the driving point.
One of the many TFs of interest is the driving point impedance, which is
the self‐impedance ʺseenʺ at the driving point:
indep.
ac
id
+
vd vd driving
point
Zdp ≡
id
id
−
A system usually has designated signal ʺinputʺ and ʺoutputʺ ports:
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7. The I/O IT
4
Input Impedance
indep.
ac
ii
v
Zi ≡ i
ii
ii
+
signal
vi input
port
−
vi
Zdp ≡
= Zi ≡ input impedance
ii
at the signal input port
Note: the ʺinputʺ signal for the input impedance TF is ii , although the
input signal for the gain TF may be vi or ii , depending upon the
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definition
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7. The I/O IT
5
Output Impedance
+
io
indep.
signal
vo
output vo
Z
≡
dp
port
io ac
io
−
vo
Zdp ≡
= Zo ≡ output impedance
io
at the signal output port
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7. The I/O IT
6
Conventional Approach
Calculate the gain H
Calculate the output impedance Zo
Calculate the input impedance Zi
Usually these are done separately, each starting from scratch, and they may
be equally lengthy analyses (especially if there is feedback present).
However, much of the analysis is the same in each case, so there is
motivation to find a short cut that avoids the repetitions.
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7. The I/O IT
7
Consider the simple voltage divider:
ei
+
vo = Hei
Z1
Z2
Zi
Zo
The three analyses lead to:
H=
Z2
Z1 + Z 2
Z i = Z1 + Z 2
Zo = Z1 Z 2
The ʺhard partʺ in each case is calculation of Z1 + Z2 .
However, Zi and Zo can be written in terms of H :
Zi =
Z2
H
Zo = Z1 H
Thus, the sum Z1 + Z2 need be calculated only once to find H , and then
Zi and Zo can be found as products or quotients of H .
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7. The I/O IT
8
This trick doesnʹt work for more complex circuits, but there is still
motivation to find a way to calculate Zi and Zo from H instead of
starting from scratch.
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7. The I/O IT
9
Inner and Outer Input and Output Impedances
v
Forward voltage gain Av = L
eS
v
iL = L
ZL
iS
eS
+
ZS
+
Zi
ZL
vi
Z i*
vL = Av eS
Z o*
−
Zo
There are two kinds of input and output impedances, depending on
whether the system is defined to include the source and load
impedances or not.
outer input impedance ≡ Zi
inner input impedance ≡ Zi*
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outer output impedance ≡ Zo
inner output impedance ≡ Zo*
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7. The I/O IT
10
Output Impedance Theorem
v
Forward voltage gain Av = L
eS
iS
eS
ZS
+
Zi
+
v
iL = L
ZL
vL = Av eS
ZL
vi
Zo
−
A
i
v
Forward transadmittance gain Yt = L = L = v
eS ZL eS ZL
A
Short‐circuit forward transadmittance gain Ytsc = v
ZL Z →0
L
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7. The I/O IT
11
Output Impedance Theorem
v
Forward voltage gain Av = L
eS
eS
+
Av eS +
Zi
Zo =
Zo
oc output voltage
Av eS
for the same eS = sc
sc output current
Yt eS
fwd voltage gain
Av
Zo = sc
=
sc fwd transadmittance
Yt
Zo =
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Av
Av
ZL Z → 0
L
This is the Output Impedance Theorem
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7. The I/O IT
12
Input Impedance Theorem
Convert the Thevenin independent source eS ,ZS to a Norton equivalent:
e
jS = S
ZS
iS
+
ZS
vi
−
v
iL = L
ZL
vL = Av eS
ZL
Z o*
Zo
Forward transimpedance gain
v
vL
Zt = L =
iS
jS Z →∞
S
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7. The I/O IT
13
Input Impedance Theorem
eS
ZS Z →∞ iS
vL = Av eS
S
Zo
Forward transimpedance gain
v
vL
vL
Zt = L =
=
eS
iS
jS Z →∞
S
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ZS Z →∞
S
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7. The I/O IT
14
Input Impedance Theorem
v
Forward voltage gain Av = L
eS
vL = Av eS
iS
eS
+
Zi
Zo
Forward transimpedance gain
v
vL
vL
Zt = L =
=
eS
iS
jS Z →∞
S
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ZS Z →∞
S
=
vL
vL / Av
ZS
= ZS Av Z →∞
S
ZS →∞
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7. The I/O IT
15
Input Impedance Theorem
v
Forward voltage gain Av = L
eS
vL = Av eS
iS
eS
+
Zi
Zo
vL
Zi =
input voltage
A
=v v
for the same vL
L
input current
Zt
fwd transimpedance
Z
Zi = t
=
Av
fwd voltage gain
ZS Av Z →∞
S
Zi =
This is the Input Impedance Theorem
Av
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7. The I/O IT
16
Inner and Outer Input and Output Impedances
iS
eS
+
ZS
+
Zi
Z i*
vi
−
v
iL = L
ZL
vL = Av eS
ZL
Z o*
Zo
The value of the formulas is that once the gain is known, only a simple
limit with respect to either ZL or ZS need be calculated to find the outer
output or input impedances Zo or Zi .
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7. The I/O IT
17
Inner Input and Output Impedances
v
iL = L
ZL
iS
eS
+
ZS
+
Zi
ZL
vi
Z i*
vL = Av eS
Z o*
−
Zo
It is obvious that
*
Zo = Zo Z →∞ =
Av
L
Av
=
ZL Z → 0
L
*
Zi = Zi Z →0 =
S
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ZS Av Z
A
Av Z →∞
ZL →∞
S →∞
L
Av
ZL Z → 0
L
=
ZS Av Z
A
S →∞
v
v ZS → 0
http://www.RDMiddlebrook.com
ZS → 0
7. The I/O IT
18
Inner Input and Output Impedances
iS
eS
+
ZS
+
Zi
Z i*
vi
−
v
iL = L
ZL
vL = Av eS
ZL
Z o*
Zo
Thus, all four input and output impedances can be found
by taking simple limits upon the gain Av .
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7. The I/O IT
19
This has been treated already. The result for the gain A is:
v1
v2 = Av1
R1
47k
Zi
C1
0.1 µ F
R2
1k
RL
100k
C2
0.002 µ F
A = A0
1 + ωs
z
( 1 + ω )( 1 + ω )
s
s
1
2
A0 ≡
RL
R1 + RL
ω1 ≡
1
C1 ( R2 + R1 RL )
ωz ≡
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
The formula for the outer input impedance is
Zi =
ZS A Z →∞
S
A
Since R1 is a surrogate ZS ,
Zi =
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R1 A R →∞
1
A
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7. The I/O IT
20
v1
v2 = Av1
R1
47k
Zi
C1
0.1 µ F
R2
1k
C2
0.002 µ F
RL
100k
1 + ωs
A = A0
z
( 1 + ω )( 1 + ω )
s
s
1
2
A0 ≡
RL
R1 + RL
ω1 ≡
1
C1 ( R2 + R1 RL )
ωz ≡
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
The limit can be taken factor by factor:
s
1
+
s
s
1
1
+
+
ωz
R1 A R →∞ R1 A0 R →∞
ω1
ω2
R1 →∞
1
1
Zi =
=
A
A0
1 + ωs
1 + ωs
1 + ωs
z
1 R →∞
2 R →∞
(
v.0.1 3/07
(
)
) (
http://www.RDMiddlebrook.com
7. The I/O IT
(
)
)
1
(
(
)
)
1
21
v1
v2 = Av1
R1
47k
Zi
C1
0.1 µ F
R2
1k
C2
0.002 µ F
RL
100k
1 + ωs
A = A0
z
( 1 + ω )( 1 + ω )
s
s
1
2
A0 ≡
RL
R1 + RL
ω1 ≡
1
C1 ( R2 + R1 RL )
ωz ≡
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
The limit can be taken factor by factor:
s
1
+
s
s
1
1
+
+
ωz
R1 A R →∞ R1 A0 R →∞
ω1
ω2
R1 →∞
1
1
Zi =
=
A
A0
1 + ωs
1 + ωs
1 + ωs
z
1 R →∞
2 R →∞
(
(
)
) (
(
)
)
1
(
(
)
)
1
A huge simplification emerges: any factor in A that does not contain R1
is unaffected by the limit and therefore cancels.
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7. The I/O IT
22
v1
v2 = Av1
R1
47k
Zi
C1
0.1 µ F
R2
1k
C2
0.002 µ F
RL
100k
1 + ωs
A = A0
z
( 1 + ω )( 1 + ω )
s
s
1
2
A0 ≡
RL
R1 + RL
ω1 ≡
1
C1 ( R2 + R1 RL )
ωz ≡
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
The limit can be taken factor by factor:
s
1
+
s
s
1
1
+
+
ωz
R1 A R →∞ R1 A0 R →∞
ω1
ω2
R1 →∞
1
1
Zi =
=
A
A0
1 + ωs
1 + ωs
1 + ωs
z
1 R →∞
2 R →∞
(
(
)
) (
(
)
)
1
(
(
)
)
1
A huge simplification emerges: any factor in A that does not contain R1
is unaffected by the limit and therefore cancels.
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7. The I/O IT
23
v1
v2 = Av1
R1
47k
Zi
C1
0.1 µ F
R2
1k
A = A0
RL
100k
C2
0.002 µ F
Zi =
1
A
=
R1 A0 R →∞
1
A0
(
1 + ωs
1
( 1 + ω )( 1 + ω )
s
s
1
2
RL
R1 + RL
ω1 ≡
1
C1 ( R2 + R1 RL )
ωz ≡
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
)
(
1 + ωs
2
)
( 1 + ωs ) R →∞ ( 1 + ωs ) R →∞
1
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z
A0 ≡
The limit can be taken factor by factor:
R1 A R →∞
1 + ωs
1
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7. The I/O IT
2
1
24
v1
v2 = Av1
R1
47k
Zi
C1
0.1 µ F
R2
1k
A = A0
RL
100k
C2
0.002 µ F
Zi =
1
A
=
R1 A0 R →∞
1
A0
(
1 + ωs
1
z
( 1 + ω )( 1 + ω )
s
s
1
2
A0 ≡
RL
R1 + RL
ω1 ≡
1
C1 ( R2 + R1 RL )
ωz ≡
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
The limit can be taken factor by factor:
R1 A R →∞
1 + ωs
)
(
1 + ωs
2
)
( 1 + ωs ) R →∞ ( 1 + ωs ) R →∞
1
1
2
1
You can take advantage of this knowledge in advance, by highlighting R1
in the parameter definitions and omitting these factors when substituting
into the formula.
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7. The I/O IT
25
Rewrite the definitions highlighting R1 :
v1
v2 = Av1
R1
47k
Zi
C1
0.1 µ F
R2
1k
Zi = Ri0
RL
100k
C2
0.002 µ F
( 1 + ωs )
1
( 1 + ωs )
⎛
⎞⎛
⎞
s
s
⎜1+ ω
⎟ ⎜1+ ω
⎟
1
2
R
→∞
R
→∞
⎝
⎠⎝
⎠
1
1
1
C1 ( R2 + R1 RL )
ω2 R →∞ ≡
1
C2 ( R1 R2 RL )
1
1
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R1 →∞
=
( 1 + ω )( 1 + ω )
s
s
1
2
RL
R1 + RL
ω1 ≡
1
C1 ( R2 + R1 RL )
ωz ≡
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
Ri0 ≡
=
z
A0 ≡
where
2
ω1 R →∞ ≡
A = A0
1 + ωs
1
R1 R +1 R
C1 ( R2 + RL )
1
L R →∞
1
1
R1 + RL
< ω1
1
< ω2
C2 ( R2 RL )
R1 →∞
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7. The I/O IT
= R1 + RL
26
Exercise 7.1
Find the outer output impedance Zo
v1
v2 = Av1
R1
47k
C1
0.1 µ F
R2
1k
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C2
0.002 µ F
RL
100k
A = A0
1 + ωs
z
( 1 + ω )( 1 + ω )
s
s
1
2
A0 ≡
RL
R1 + RL
ω1 ≡
1
C1 ( R2 + R1 RL )
ωz ≡
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
Zo
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7. The I/O IT
27
Exercise 7.1 ‐ Solution
Rewrite the definitions highlighting RL :
v1
v2 = Av1
R1
47k
C1
0.1 µ F
R2
1k
Zo =
A
A
RL R → 0
C2
0.002 µ F
= Ro0
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L →0
=
( 1 + ω )( 1 + ω )
s
s
1
2
A0 ≡
RL
R1 + RL
ω1 ≡
1
C1 ( R2 + R1 RL )
ωz ≡
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
ω2
=∞
Zo
( 1 + ωs )( 1 + ωs )
1
2
RL
A0
R1 + RL
=
= R1 RL
A0
RL
1
RL R1 + RL R → 0
RL R → 0
L
ω1
z
⎞
⎛
⎞⎛
s
s
⎟
⎜1+ ω
⎟ ⎜⎜ 1 + ω
⎟
1
2
RL → 0 ⎠ ⎝
⎝
RL → 0 ⎠
L
where
Ro0 ≡
RL
100k
A = A0
1 + ωs
1
= ωz
C1 R2
L
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RL → 0
28
Exercise 7.2
Find the inner output impedance Zo*
v1
47k
s
o
C1
0.1 µ F
R2
1k
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1+ ω )
(
Z =R
( 1 + ω )( 1 + ω )
v2 = Av1
R1
C2
0.002 µ F
RL
100k
Z o*
o0
z
s
s
1
2
Ro0 ≡ R1 RL
ω1 ≡
1
C1 ( R2 + R1 RL )
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
ωz ≡
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29
Exercise 7.2 ‐ Solution
v1
47k
1+ ω )
(
Z =R
( 1 + ω )( 1 + ω )
v2 = Av1
R1
s
o0
o
C1
0.1 µ F
R2
1k
C2
0.002 µ F
RL
100k
Z o*
z
s
s
1
2
Ro0 ≡ R1 RL
ω1 ≡
1
C1 ( R2 + R1 RL )
1
C1 R2
ω2 ≡
1
C2 ( R1 R2 RL )
ωz ≡
(1 + ω )
s
Zo* = Zo R →∞ = Ro0*
z
⎛
⎞⎛
⎞
s
s
+
+
1
1
⎜
ω1 R →∞ ⎟ ⎜
ω2 R →∞ ⎟
⎝
⎠⎝
⎠
where
L
L
Ro0* ≡ Ro0 R →∞ = R1 RL R →∞ = R1
L
L
L
1
ω1 R →∞ ≡
L
C1 ( R2 + R1 RL )
ω2 R →∞ ≡
L
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=
RL →∞
1
C1 ( R2 + R1 )
< ω1
1
1
< ω2
=
C2 ( R1 R2 )
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L)
RL →∞
7. The I/O IT
30
Bottom Line
The Input/Output Impedance Theorem allows you to
find the input and output impedances of a circuit by
taking simple limits upon the already known gain.
This saves almost two‐thirds of the work required to
obtain the three results separately.
Taking one limit upon the gain gives the outer impedances;
Taking two limits upon the gain gives the inner impedances.
A huge simplification occurs by anticipating that factors in
the gain that do not contain the source or load impedance,
do
not appear in the result.
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31
8. NDI AND THE EET:
Null Double Injection and the Extra Element Theorem
How to find the contribution of a particular element to the
transfer function
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8. NDI & the EET
1
Null Double Injection (ndi)
Usually, a transfer function (TF) is calculated as a response to a single
independent excitation.
However, large analysis benefits accrue when certain constraints are
imposed on several excitations present simultaneously.
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8. NDI & the EET
2
signal
input
signal
output
uo = A1 ui
ui
The input is an independent signal, the output is a dependent signal.
The gain is A1 .
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3
Consider a second dependent signal, a voltage v at some internal port :
+
signal
input
v = B1 ui
ui
−
signal
output
uo = A1 ui
The gain from ui to v is B1 .
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4
Apply a second independent signal, a current i at the same internal port :
signal
input
ui = 0
i
Zdp
i
+
v=
0 + B2 i
−
signal
output
uo =
0 + A2 i
The ʺgainʺ from i to v is a driving point impedance B2 .
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5
Apply both independent signals simultaneously:
signal
input
ui
i
+
Zdp
v = B1 ui + B2 i
i
−
signal
output
uo = A1 ui + A2 i
For a linear system model, the two dependent signals are the superposition
of the values they would have for each independent signal separately.
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6
Apply both independent signals simultaneously:
signal
input
ui
i
+
Zdp
v = B1 ui + B2 i
i
−
signal
output
uo = A1 ui + A2 i
For a linear system model, the two dependent signals are the superposition
of the values they would have for each independent signal separately.
By adjustment of ui and i , uo can be made to have any value we like.
In particular:
uo can be made zero by adjustment of the relative values of ui and i ,
namely
A2
ui u = 0 = −
i
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o
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8. NDI & the EET
There is now a null double injection (ndi) condition:
signal
input
ui
i
+
Zdp
v = B1 ui u = 0 + B2 i
i
−
o
signal
output
uo = 0
(nulled)
The voltage at the internal port is
⎛
A ⎞
v = ⎜ B2 − B1 2 ⎟ i
A1 ⎠
⎝
so the driving point impedance is
Zdp
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⎛
A ⎞
= ⎜ B2 − B1 2 ⎟
uo = 0 ⎝
A1 ⎠
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8. NDI & the EET
8
Recap:
The driving point impedance (dpi) Zdp at the internal port can have two
different values, one when the input is zero, and another when the
input is not zero, but is adjusted to null the output:
Zdp
ui = 0
= B2
from i
Zdp
uo = 0
= B2 − B1
A2
A1
from ui
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9
Recap:
The driving point impedance (dpi) Zdp at the internal port can have two
different values, one when the input is zero, and another when the
input is not zero, but is adjusted to null the output:
Zdp
ui = 0
≡ Zd
= B2
from i
Zdp
uo = 0
= B2 − B1
A2
≡ Zn
A1
from ui
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10
The dpi Zd is calculated under single injection (si) conditions:
signal
input
ui = 0
(zero)
signal
output
Zd
uo = A1 ui
The dpi Z n is calculated under null double injection (ndi) conditions:
signal
input
ui u = 0
signal
output
Zn
o
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8. NDI & the EET
uo = 0
(nulled)
11
The Extra Element Theorem (EET)
Replace the current source by an impedance Z :
i
signal
input
v = B1 ui + B2 i
Z
ui
+
i
−
signal
output
uo = A1 ui + A2 i
The same linear superposition equations still apply to the rest of the circuit.
However, a relation between v and i is now enforced by Z , namely
v = − Zi
Substitute for v to find i in terms of ui :
v = B1 ui + B2 i = − Zi
so
i=−
B1
ui
B2 + Z
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12
The Extra Element Theorem (EET)
i
signal
input
v = B1 ui + B2 i
Z
ui
i
i=−
+
−
signal
output
uo = A1 ui + A2 i
B1
ui
B2 + Z
Now substitute for i in the equation for uo to find uo in terms of ui :
B1
uo = A1 ui + A2 i = A1 ui − A2
ui
B2 + Z
A2
⎛
B
−
B
A
2
1 A1 ⎞
⎛B −B 2 +Z⎞
⎜1+
⎟
2
1 A1
⎜
⎟
Z
= A1
ui = A1 ⎜
⎟ ui
B
⎜⎜
⎟
2
B2 + Z
⎟
1
+
⎜
⎟⎟
Z
⎜
⎝
⎠
⎝
⎠
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13
The Extra Element Theorem (EET)
signal
input
ui
Z
Zdp = Zd or Z n
signal
output
The two combinations of the linear circuit parameters are precisely what
have just been defined as Zd and Z n , so
⎛ 1 + Zn ⎞
Z ⎟u
uo = A1 ⎜
i
⎜ 1 + Zd ⎟
⎝
Z ⎠
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14
The Extra Element Theorem (EET)
signal
input
ui
Z
Zdp = Zd or Z n
signal
output
The two combinations of the linear circuit parameters are precisely what
have just been defined as Zd and Z n , so
⎛ 1 + Zn ⎞
Z ⎟u
uo = A1 ⎜
i
⎜ 1 + Zd ⎟
⎝
Z ⎠
However,
uo
u i = gain in presence of Z
A
gain when Z = ∞
1 =3/07
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15
The Extra Element Theorem (EET)
signal
input
ui
Z
Zdp = Zd or Z n
signal
output
The two combinations of the linear circuit parameters are precisely what
have just been defined as Zd and Z n , so
⎛ 1 + Zn ⎞
Z ⎟u
uo = A1 ⎜
i
⎜ 1 + Zd ⎟
⎝
Z ⎠
However,
uo
u i = gain in presence of Z
A
gain when Z = ∞
1 =3/07
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≡H
≡H
∞
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16
The Extra Element Theorem (EET)
signal
input
Z
ui
signal
output
Zdp = Zd or Z n
uo = Hui
Hence, the Extra Element Theorem (EET) is:
⎛ 1 + Zn ⎞
Z ⎟
H = H∞ ⎜
⎜ 1 + Zd ⎟
⎝
Z ⎠
H = gain in presence of Z
H ∞ = gain when Z = ∞
Zd = Zdp
Z n = Zdp
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ui = 0
ui = zero
uo = 0
u i ≠ zero, uo nulled
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17
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37
Dual forms of the EET
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44
The Parallel and Series forms of the EET
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45
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46
Exercise 8.1
Insert C1 by the EET
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47
Exercise 8.1 ‐ Solution
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48
Exercise 8.1 ‐ Solution
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49
Exercise 8.1 ‐ Solution
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Exercise 8.1 ‐ Solution
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Exercise 8.1 ‐ Solution
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Exercise 8.1 ‐ Solution
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55
Exercise 8.2
Lag‐lead network: Find A by designating C1 as an extra element.
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56
Exercise 8.2 ‐ Solution
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Exercise 8.2 ‐ Solution
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Exercise 8.2 ‐ Solution
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Exercise 8.2 ‐ Solution
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60
Special case: The EET for a self‐impedance
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Exercise 8.3
Lag‐lead network: Find Zi by designating C1 as an extra element.
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Exercise 8.3 ‐ Solution
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Exercise 8.3 ‐ Solution
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Exercise 8.3 ‐ Solution
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Exercise 8.4
Lag‐lead network: Find Zo by designating C1 as an extra element.
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Exercise 8.4 ‐ Solution
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Exercise 8.4 ‐ Solution
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Exercise 8.4 ‐ Solution
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1CE: The basic Common‐Emitter amplifier stage
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Note that the Z n calculation is much shorter and easier
than the Zd calculation!
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Common‐emitter (1CE) amplifier stage
Use the EET to find the outer and inner input impedances Zi and Zi*
− Av vS
Previous results:
β = 120
s / 2π
iE
1 + β Ct
5p
vS RS
Rdp
10k
jS
Zi
Zi*
RB
8.6k
α iE
RL
iE
*
rm Zo
36
1 − 880 MHz
1 − s / ωz
Av = Avm
= 36dB
1 + s / ωp
1 + s / 2π
51kHz
10k
Zo
RB
α RL
= 62 ⇒ 36dB
RS + RB r + RS RB
m
1+ β
Rd = mRL = 620k
Rn = rE / α = 36Ω
Avm ≡
ωz ≡
1
Ct R n
ωp ≡
1
Ct Rd
m≡
RS RB (1 + β )rm
RS RB rm RL
Outer input impedance Zi :
Use the parallel EET with reference value Z ≡ 1 / sCt infinite:
= 62
v
1 + sCt Rni
Zi ≡ S = Rim
1 + sCt Rdi
jS
Rim ≡ RS + RB (1 + β )rm = 13k ⇒ 82dB ref 1Ω
Rni = Rdp with output vS nulled
= Rdp with input jS shorted
= Rdp for the voltage
gain A
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Use the EET to find the outer and inner input impedances Zi and Zi*
− Av vS
Previous results:
β = 120
s / 2π
iE
1 + β Ct
5p
vS RS
Rdp
10k
jS
Zi
Zi*
RB
8.6k
α iE
RL
1 − 880 MHz
1 − s / ωz
Av = Avm
= 36dB
1 + s / ωp
1 + s / 2π
51kHz
10k
iE
*
rm Zo
36
Zo
Outer input impedance Zi :
v
1 + sCt Rni
Z i ≡ S = Rim
1 + sCt Rdi
jS
RB
α RL
= 62 ⇒ 36dB
RS + RB r + RS RB
m
1+ β
Rd = mRL = 620k
Rn = rE / α = 36Ω
Avm ≡
ωz ≡
1
Ct R n
ωp ≡
1
Ct Rd
m≡
RS RB (1 + β )rm
RS RB rm RL
= 62
Rim ≡ RS + RB (1 + β )rm = 13k ⇒ 82dB ref 1Ω
Rni = mRL ≡
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RS RB (1 + β )rm
RS RB rm RL
RL = 620k
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100
Use the EET to find the outer and inner input impedances Zi and Zi*
− Av vS
Previous results:
β = 120
s / 2π
iE
1 + β Ct
5p
vS RS
Rdp
10k
jS
Zi
Zi*
RB
8.6k
α iE
RL
1 − 880 MHz
1 − s / ωz
Av = Avm
= 36dB
1 + s / ωp
1 + s / 2π
51kHz
10k
iE
*
rm Zo
36
Zo
Outer input impedance Zi :
v
1 + sCt Rni
Zi ≡ S = Rim
1 + sCt Rdi
jS
RB
α RL
= 62 ⇒ 36dB
RS + RB r + RS RB
m
1+ β
Rd = mRL = 620k
Rn = rE / α = 36Ω
Avm ≡
ωz ≡
1
Ct R n
ωp ≡
1
Ct Rd
m≡
RS RB (1 + β )rm
RS RB rm RL
= 62
Rim ≡ RS + RB (1 + β )rm = 13k ⇒ 82dB ref 1Ω
Rni = mRL ≡
RS RB (1 + β )rm
RS RB rm RL
RL = 620k
Rdi = Rdp with input jS open
v.0.1 3/07
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8. NDI & the EET
101
Use the EET to find the outer and inner input impedances Zi and Zi*
− Av vS
Previous results:
β = 120
s / 2π
iE
1 + β Ct
5p
vS RS
Rdp
10k
jS
Zi
Zi*
RB
8.6k
α iE
RL
1 − 880 MHz
1 − s / ωz
Av = Avm
= 36dB
1 + s / ωp
1 + s / 2π
51kHz
10k
iE
*
rm Zo
36
Zo
RB
α RL
= 62 ⇒ 36dB
RS + RB r + RS RB
m
1+ β
Rd = mRL = 620k
Rn = rE / α = 36Ω
Avm ≡
ωz ≡
Outer input impedance Zi :
v
1 + sCt Rni
Zi ≡ S = Rim
1 + sCt Rdi
jS
1
Ct R n
ωp ≡
1
Ct Rd
m≡
RS RB (1 + β )rm
RS RB rm RL
= 62
Rim ≡ RS + RB (1 + β )rm = 13k ⇒ 82dB ref 1Ω
Rni = mRL ≡
RS RB (1 + β )rm
RS RB rm RL
RL = 620k
Rdi = Rdp with input jS open
RB (1 + β )rm
RL = 820k
=R
=
v.0.1 3/07 ni RS →∞
http://www.RDMiddlebrook.com
RB rm RL
8. NDI & the EET
102
Use the EET to find the outer and inner input impedances Zi and Zi*
− Av vS
Previous results:
β = 120
s / 2π
iE
1 + β Ct
5p
vS RS
Rdp
10k
jS
Zi
Zi*
RB
8.6k
α iE
RL
1 − 880 MHz
1 − s / ωz
Av = Avm
= 36dB
1 + s / ωp
1 + s / 2π
51kHz
10k
iE
*
rm Zo
36
Zo
RB
α RL
= 62 ⇒ 36dB
RS + RB r + RS RB
m
1+ β
Rd = mRL = 620k
Rn = rE / α = 36Ω
Avm ≡
ωz ≡
1
Ct R n
Outer input impedance Zi :
s / 2π
1 + 51
vS
1 + sCt Rni
kHz
Zi ≡
= Rim
= 82dB
1 + sCt Rdi
jS
1 + s / 2π
ωp ≡
1
Ct Rd
m≡
RS RB (1 + β )rm
RS RB rm RL
= 62
39kHz
82dB
Rim
39kHz
51kHz
Zi
Check:
By GB trade‐off: Ri∞ = Rim
By inspection:
v.0.1
3/07
Ri∞
80dB
Rn
620k
= 13k
= 10k ⇒ 80dB
Rd
820k
Ri∞ = http://www.RDMiddlebrook.com
RS + RB rm RL
= 10k ⇒ 80dB
8. NDI & the EET
103
Use the EET to find the outer and inner input impedances Zi and Zi*
− Av vS
Previous results:
β = 120
s / 2π
iE
1 + β Ct
5p
vS RS
Rdp
10k
jS
Zi
Zi*
RB
8.6k
α iE
RL
1 − 880 MHz
1 − s / ωz
Av = Avm
= 36dB
1 + s / ωp
1 + s / 2π
51kHz
10k
iE
*
rm Zo
36
Zo
Inner input impedance Zi* :
RB
α RL
= 62 ⇒ 36dB
RS + RB r + RS RB
m
1+ β
Rd = mRL = 620k
Rn = rE / α = 36Ω
Avm ≡
ωz ≡
1
Ct R n
ωp ≡
1
Ct Rd
m≡
RS RB (1 + β )rm
RS RB rm RL
= 62
*
1 + sCt Rni
*
* 1 + sCt Rni
Zi = Zi R → 0 = Rim
= Rim
S
1 + sCt Rdi R → 0
1 + sCt Rdi
S
*
Rim = Rim R → 0 = RS + RB (1 + β )rm R → 0 = RB (1 + β )rm = 2.9k ⇒ 69dB
S
S
RS RB (1 + β )rm
*
Rni = Rni R → 0 =
RL
= RL = 10k ⇒ 80dB
S
RS RB rm RL
R →0
S
v.0.1 3/07
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8. NDI & the EET
104
Use the EET to find the outer and inner input impedances Zi and Zi*
iE
1+ β
vS
Ct
5p
RS
Rdp
10k
jS
Zi
− Av vS
β = 120
Zi*
RB
8.6k
Check:
RL
iE
*
rm Zo
36
Zo
Zi
80dB
3.2MHz
31dB
Zi*
*
R
*
ni
By GB trade‐off: Ri*∞ = Rim
Rdi
39kHz
= 2.9k
= 35Ω ⇒ 31dB
3.2 MHz
By v.0.1
inspection:
3/07
s / 2π
1 + 3.2
*
MHz
Zi = 69dB
s / 2π
1 + 39
kHz
10k
39kHz
51kHz
82dB
69dB
α iE
Ri*∞ = RBhttp://www.RDMiddlebrook.com
rm RL = 35Ω ⇒ 31dB
8. NDI & the EET
105
Exercise 8.5
Use the EET to find Zo and Zo* for the 1CE amplifier stage
iE
1+ β
vS
Ct
5p
RS
Rdp
10k
jS
Zi
− Av vS
β = 120
Zi*
RB
8.6k
α iE
RL
Previous results:
s / 2π
1 − 880
1 − s / ωz
MHz
Av = Avm
= 36dB
s
/
1 + s / ωp
1 + 2π
51kHz
10k
iE
*
rm Zo
36
Zo
RB
α RL
= 62 ⇒ 36dB
RS + RB r + RS RB
m
1+ β
Rd = mRL = 620k
Rn = rE / α = 36Ω
Avm ≡
ωz ≡
1
Ct R n
ωp ≡
1
Ct Rd
m≡
RS RB (1 + β )rm
RS RB rm RL
Outer output impedance Zo :
Use the parallel EET with reference value Z ≡ 1 / sCt infinite:
v
1 + sCt Rno
Zo ≡ o = Rom
1 + sCt Rdo
jS
= 62
Rom ≡ RL = 10k ⇒ 80dB ref 1Ω
Rno = Rdp with output vo nulled = Rdp with input jS shorted
= RS RB (1 + β )rm = 2.2k
Rdo = Rdp with input jS open
= Rd for the voltage gain A
v.0.1=3/07
http://www.RDMiddlebrook.com
620k
8. NDI & the EET
106
Exercise 8.5: ‐ Solution
Use the EET to find Zo and Zo* for the 1CE amplifier stage
iE
1+ β
vS
Ct
5p
RS
Rdp
10k
jS
Zi
− Av vS
β = 120
Zi*
RB
8.6k
Check:
RL
10k
iE
*
rm Zo
36
Zo
Zo
s / 2π
1 + 51
kHz
Zi
80dB
3.2MHz
31dB
Zi*
R
By GB trade‐off: Ro∞ = Rom no
Rdo
51kHz
= 2.9k
= 36Ω ⇒ 31dB
14 MHz
By v.0.1
inspection:
3/07
Zo = 80dB
/ 2π
1 + 14s MHz
39kHz
51kHz
82dB
80dB
69dB
α iE
14MHz
Ro∞ = RShttp://www.RDMiddlebrook.com
RB rm RL = 36Ω ⇒ 31dB
8. NDI & the EET
107
Exercise 8.5: ‐ Solution
Use the EET to find Zo and Zo* for the 1CE amplifier stage
iE
1+ β
vS
Ct
5p
RS
Rdp
10k
jS
Zi
− Av vS
β = 120
Zi*
RB
8.6k
α iE
RL
Rom ≡ RL = 10k ⇒ 80dB ref 1Ω
10k
iE
*
rm Zo
36
Rno = RS RB (1 + β )rm = 2.2k
Zo
Rdo ≡
Inner output impedance Zo* :
Zo* = Zo R →∞ = Rom
L
RS RB (1 + β )rm
RS RB rm RL
RL = 620k
1 + sCt Rno
* 1 + sCt Rno
= Rom
*
1 + sCt Rdo R →∞
1 + sCt Rdo
L
*
Rom
= Rom R →∞ = RL
L
*
Rdo
= Rdo R →∞ =
L
v.0.1 3/07
RL →∞
=∞
RS RB (1 + β )rm
RS RB rm RL
=∞
RL
RL →∞
http://www.RDMiddlebrook.com
8. NDI & the EET
108
Exercise 8.5: ‐ Solution
Use the EET to find Zo and Zo* for the 1CE amplifier stage
iE
1+ β
vS
Ct
5p
RS
α iE
Rdp
RL
10k
jS
Zi
− Av vS
β = 120
Zi*
RB
8.6k
Rom ≡ RL = 10k ⇒ 80dB ref 1Ω
10k
iE
*
rm Zo
36
Rno = RS RB (1 + β )rm = 2.2k
Zo
Rdo ≡
Inner output impedance Zo* :
RS RB (1 + β )rm
RS RB rm RL
RL = 620k
*
*
Because Rom
and Rdo
both are infinite, change the Zo reference value
from Rom to Ro∞ . Then:
Zo* = Zo R →∞ = Rom
L
1 + sCt Rno
1 + 1 / sCt Rno
= Ro∞
1 + sCt Rdo R →∞
1 + 1 / sCt Rdo R → ∞
L
L
= Ro*∞ ( 1 + 1 / sCt Rno )
*
Rv.0.1
Rom
o∞ =3/07
Rno
dB
= Rhttp://www.RDMiddlebrook.com
109
S RB rm RL R →∞ = RS RB rm = 36Ω ⇒ 31
Rdo R →∞
L
8. NDI & the EET
L
Exercise 8.5: ‐ Solution
Use the EET to find Zo and Zo* for the 1CE amplifier stage
iE
1+ β
vS
Ct
5p
RS
Rdp
10k
jS
Zi*
Zi
82dB
80dB
69dB
v.0.1 3/07
− Av vS
β = 120
RB
8.6k
Zo*
Zo
α iE
RL
10k
iE
*
rm Zo
36
(
Zo* = 31dB 1 + 14s MHz
/ 2π
Zo
)
39kHz
51kHz
Zi
80dB
3.2MHz
31dB
Zi*
14MHz
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8. NDI & the EET
110
9. THE DT AND THE CT:
The Dissection Theorem and the Chain Theorem
How to find the gain of a multistage amplifier as the product
of separately calculated low entropy factors
v.0.1 3/07
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9. The DT & the CT
1
Null Double Injection (ndi)
Usually, a transfer function (TF) is calculated as a response to a single
independent excitation.
However, large analysis benefits accrue when certain constraints are
imposed on several excitations present simultaneously.
v.0.1 3/07
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9. The DT & the CT
2
For any linear system model:
signal
input
signal
output
uo = A1 ui
ui
The input is an independent signal, the output is a proportional
dependent signal.
v.0.1 3/07
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9. The DT & the CT
3
Consider a second input, an injected ʺtest signalʺ uz :
signal
input
signal
output
ui
test signal
uz
uo = A1 ui + A2 uz
Since the model is linear, the output is now a linear sum of the values it
would have with each input alone.
v.0.1 3/07
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9. The DT & the CT
4
There are now two more dependent signals, u x and uy , where u x + uy = uz :
signal
input
uy
ux
ui
test signal
v.0.1 3/07
uz = u x + uy
http://www.RDMiddlebrook.com
9. The DT & the CT
signal
output
uo = A1 ui + A2 uz
5
There are now two more dependent signals, u x and uy , where u x + uy = uz :
signal
input
uy
ux
uy = B1 ui + B2 uz
ui
test signal
uz = u x + uy
signal
output
uo = A1 ui + A2 uz
The dependent signal uy is also a linear sum of the values it
would have with each input alone.
v.0.1 3/07
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9. The DT & the CT
6
There are now two more dependent signals, u x and uy , where u x + uy = uz :
signal
input
uy
ux
uy = B1 ui + B2 uz
ui
test signal
u x = − B1 ui + (1 − B2 )uz
uz = u x + uy
signal
output
uo = A1 ui + A2 uz
The dependent signal uy is also a linear sum of the values it
would have with each input alone.
By virtue of uz = u x + uy , the independent signal u x can also be expressed
in terms of B1 and B2 .
v.0.1 3/07
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9. The DT & the CT
7
Several transfer functions (TFs) can be defined:
Special case 1: uz = 0
signal
input
ui
ui
uy = B1 ui + B2 uz
uy = B1 ui
test signal
u x = − B1 ui + (1 − B2 )uz
u x = − B1 ui
uz = 0
signal
output
uo = A1 ui + A2 uz
uo = A1 ui
u
H≡ o
= A1
ui u = 0
z
v.0.1 3/07
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9. The DT & the CT
8
Several transfer functions (TFs) can be defined:
Special case 2: ui = 0
signal
input
uy = B1 ui + B2 uz
uy = B2 uz
ui
ui = 0
test signal
u x = − B1 ui + (1 − B2 )uz
u x = (1 − B2 )uz
uz
signal
output
uo = A1 ui + A2 uz
uo = A2 uz
u
= A1
H≡ o
ui u = 0
z
T≡
uy
ux u = 0
i
=
B2
1 − B2
These are single injection (si) TFs
v.0.1 3/07
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9. The DT & the CT
9
Several transfer functions (TFs) can be defined:
Special case 3: uy = 0
The two independent signals ui and uz can be mutually adjusted to null uy
signal
input
ui
ui
uy = B1 ui + B2 uz
0 = B1 ui + B2 uz
test signal
u x = − B1 ui + (1 − B2 )uz
signal
output
uo = A1 ui + A2 uz
uz
B
uo = A1 ui − A2 B1 ui
2
u
B
u
H y ≡ o
= A1 − A2 1
ui u = 0
B2
y
component of uo from ui
component of uo from uz
adjusted to null uy
v.0.1 3/07
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9. The DT & the CT
10
Several transfer functions (TFs) can be defined:
Special case 4: u x = 0
The two independent signals ui and uz can be mutually adjusted to null u x
signal
input
uy = B1 ui + B2 uz
ui
ui
test signal
u x = − B1 ui + (1 − B2 )uz
0 = − B1 ui + (1 − B2 )uz
uz
signal
output
uo = A1 ui + A2 uz
B
1
uo = A1 ui + A2 1 − B
ui
2
u
B
u
H y ≡ o
= A1 − A2 1
ui u = 0
B2
y
uo
B1
ux
H ≡
= A1 + A2
ui u = 0
1 − B2
x
component of uo from ui
component of uo from uz
adjusted to null u x
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
11
Several transfer functions (TFs) can be defined:
Special case 5: uo = 0
The two independent signals ui and uz can be mutually adjusted to null uo
signal
input
uy = B1 ui + B2 uz
A2
u
=
−
B
ui y
1 A1 uz + B2 uz
ui
test signal
u x = − B1 ui + (1 − B2 )uz
A
u x = B1 A2 uz + (1 − B2 )uz
1
uz
signal
output
uo = A1 ui + A2 uz
0 = A1 ui + A2 uz
u
B
u
H y ≡ o
= A1 − A2 1
ui u = 0
B2
y
uo
B1
ux
H ≡
= A1 + A2
ui u = 0
1 − B2
x
Tn ≡
uy
ux u =0
o
=
A1 B2 − A2 B1
A1 − ( A1 B2 − A2 B1 )
These are null double injection (ndi) TFs
v.0.1 3/07
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9. The DT & the CT
12
Assembled results, so far:
uo
H≡
= A1
ui u = 0
First level TF:
(si)
z
uy
signal
input
ux
ui
test signal
signal
output
uo
uz
Second level TFs:
H
uy
u
B
≡ o
= A1 − A2 1
ui u = 0
B2
(ndi) Tn ≡
y
H
ux
u
B1
(ndi)
≡ o
= A1 + A2
ui u = 0
1 − B2
x
uy
ux u =0
uy
o
=
A1 B2 − A2 B1
(ndi)
A1 − ( A1 B2 − A2 B1 )
B2
T≡
=
u x u = 0 1 − B2
(si)
i
Note that A2 and B1 occur only as a product A2 B1 .
v.0.1 3/07
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9. The DT & the CT
13
The benefit to be gained from these definitions is that there are useful
relations between these several TFs that do not involve the Aʹs and Bʹs.
signal
input
uy
ux
ui
test signal
v.0.1 3/07
uz
http://www.RDMiddlebrook.com
9. The DT & the CT
signal
output
uo
14
The benefit to be gained from these definitions is that there are useful
relations between these several TFs that do not involve the Aʹs and Bʹs.
signal
input
uy
ux
ui
test signal
signal
output
uo
uz
The 4 second level TFs are defined in terms of the 4 original parameters
A1 , A2 , B1 , B2 . Since A2 and B1 occur only as a product A2 B1 , there are
actually only 3 parameters and there must be a relation between the 4
second level TFs, which is
Redundancy Relation:
v.0.1 3/07
u
H y
Tn
=
ux
T
H
http://www.RDMiddlebrook.com
9. The DT & the CT
15
The benefit to be gained from these definitions is that there are useful
relations between these several TFs that do not involve the Aʹs and Bʹs.
signal
input
uy
ux
signal
output
u
H y
ui
test signal
uz
Tn
=
T
H ux
uo
A consequence of the Redundancy Relation is that the first level TF H
can be expressed in terms of any three of the four second level TFs
H
uy
, H ux , Tn , T .
Two useful versions are:
1
1+
Tn
u
H=H y
1
1+
T
v.0.1 3/07
H=H
uy
T
ux 1
+H
1+T
1+T
http://www.RDMiddlebrook.com
9. The DT & the CT
16
These two versions, and the redundancy relation, can easily be verified
by substitution of the definitions. After this, the Aʹs and Bʹs are no longer
required, and will not appear again.
v.0.1 3/07
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9. The DT & the CT
17
Dissection Theorem (DT)
uy
signal
input
ux
ui
test signal
signal
output
uo
uz
ndi
u
H≡ o
ui u = 0
z
1
1
+
u
Tn
H=H y
1 + T1
first level TF
Notation:
Superscript signal is
signal being nulled
Redundancy Relation:
u
H y Tn
=
ux
T
H
v.0.1 3/07
ndi
ndi
u
T
1
=H y
+ H ux
1+T
1+T
si
second level TFs
H
uy
u
≡ o
ui u = 0
Tn ≡
H
uo
≡
ui u = 0
http://www.RDMiddlebrook.comx
9. The DT & the CT
ux u =0
o
y
ux
uy
T≡
uy
ux u =0
i
18
These results constitute the Dissection Theorem (DT), so named because
it shows that a first level TF can be ʺdissectedʺ into three second level TFs
established in terms of an injected test signal.
The DT is completely general, and applies to any TF
of a linear system model.
For example, H could be a voltage gain, current gain, or an input or output
impedance.
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
19
There are many reasons why the Dissection Theorem is useful.
The minimum benefit of the DT is that it embodies the
ʺDivide and Conquerʺ approach, because one complicated
calculation is replaced by three calculations, two of which
are ndi calculations and are therefore simpler and easier than
si calculations.
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
20
There are many reasons why the Dissection Theorem is useful.
The minimum benefit of the DT is that it embodies the
ʺDivide and Conquerʺ approach, because one complicated
calculation is replaced by three calculations, two of which
are ndi calculations and are therefore simpler and easier than
si calculations.
Why are ndi calculations always simpler and easier than si calculations?
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
21
There are many reasons why the Dissection Theorem is useful.
The minimum benefit of the DT is that it embodies the
ʺDivide and Conquerʺ approach, because one complicated
calculation is replaced by three calculations, two of which
are ndi calculations and are therefore simpler and easier than
si calculations.
Why are ndi calculations always simpler and easier than si calculations?
Because any element that supports a null signal does not contribute to
the result, and because if one signal is nulled, often other signals are
automatically nulled as well, and therefore several elements may be
absent from the result.
v.0.1 3/07
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9. The DT & the CT
22
The Dissection Theorem can be represented by the block diagram
H ux
Tn
ui
+
−
H
uy
+
T
+
uo = Hui
T
1
H
uy
Important: The individual blocks do not necessarily represent
identifiable parts of the actual circuit!
v.0.1 3/07
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9. The DT & the CT
23
Check:
H ux
ε
ui
+
−
+
u
H yT
1
u
Tn
+
Tn = H y T
uo = Hui
uy
H ux
Tn
=
T
H ux
H
T
1
u
H y
ε = ui −
1
H
uo = H
u
uy o
uo = H
uy
T ε + H ux ui
⎛
⎞
1
T ⎜ ui − u uo ⎟ + H ux ui
⎝
⎠
H y
uy
)
(
u
H=H
uy
( 1 + T ) uo = H y T + H ux ui
v.0.1 3/07
T
ux 1
+H
1+T
1+T
http://www.RDMiddlebrook.com
9. The DT & the CT
24
So far, nothing has been said about where in the system model the
test signal is injected.
Different test signal injection points define different sets of
second level TFs. Nevertheless, when a mutually consistent set is
substituted into the DT, the same H results:
H=H
uy 1
1 + T1
=H
1
1+ T
n1
1
v.0.1 3/07
uy 2
1 + T1
n2
1 + T1
2
= ...
http://www.RDMiddlebrook.com
9. The DT & the CT
25
This means that the blocks in the block diagram have different values
for different test signal injection points:
H ux 1
Tn1
ui
+
−
H
uy 1
+
T1
+
uo = Hui
T1
1
H
uy 1
Important: The individual blocks do not necessarily represent
identifiable parts of the actual circuit!
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
26
This means that the blocks in the block diagram have different values
for different test signal injection points:
H ux 2
Tn 2
ui
+
−
H
uy 2
+
T2
+
uo = Hui
T2
1
H
uy 2
Important: The individual blocks do not necessarily represent
identifiable parts of the actual circuit!
v.0.1 3/07
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9. The DT & the CT
27
Not only does the DT implement the Design & Conquer objective, but
the DT is itself a Low Entropy Expression, and much greater benefits
accrue if the second level TFs have useful physical interpretations.
Thus, the second level TFs themselves contain the useful design‐oriented
information and you may never need to actually substitute them into the
theorem.
u
For example, if T , Tn >> 1, H ≈ H y
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
28
How to determine the physical interpretations of the second level TFs?
What kind of signal (voltage or current) is injected, and where it is
injected, defines an ʺinjection configuration.ʺ
Therefore, the key decision in applying the DT is choosing a test signal
injection point so that at least one of the second level TFs has the physical
interpretation you want it to have.
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
29
Specific injection configurations for the DT lead to the:
Extra Element Theorem (EET)
Chain Theorem (CT)
General Feedback Theorem (GFT)
As usual, dual forms of the theorem emerge depending upon whether
the injected signal uz is a voltage or a current.
v.0.1 3/07
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9. The DT & the CT
30
The Extra Element Theorem
Inject a test voltage ez in series with an element Z such that vy appears
across Z :
−
signal
input
vy
+
ez
vx
signal
output
Z
ui
+
uo
−
The DT is:
1
vy 1 + Tnv
H=H
1 + T1
v
where:
H
vy
uo
≡
ui v = 0
y
v.0.1 3/07
Tv ≡
vy
vx u = 0
i
http://www.RDMiddlebrook.com
9. The DT & the CT
Tnv ≡
vy
vx u =0
o
31
The Extra Element Theorem
To find H
vy
, assume that ez and ui have been mutually adjusted to null vy :
−
signal
input
ez
vy = 0
i= 0 +
vx
Z
ui
+
−
signal
output
v
uo = H y ui
If vy = 0, there is no current through Z , and so the current
i into the test port is also zero, which is the condition that would exist
if there were no injected test signal and Z were open. Therefore,
H Z =∞ = H
vy
uo
≡
ui v = 0
y
where H Z =∞ is the first level TF H when Z =∞.
v.0.1 3/07
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9. The DT & the CT
32
The Extra Element Theorem
To find Tv , set ui = 0 :
−
signal
input
vy
ui = 0
Z
+
ez
+
i
vx
Zd
−
signal
output
uo
The si driving point impedance Zd looking into the test port is
vx
Zd ≡
i ui = 0
Since Z and Zd are in series with the same current i ,
Tv =
v.0.1 3/07
vy
vx u =0
i
=
Z
Zd
http://www.RDMiddlebrook.com
9. The DT & the CT
33
The Extra Element Theorem
To find Tnv , assume that ez and ui have been mutually adjusted to null uo :
−
signal
input
vy
Z
ui
+
ez
+
i
vx
Zn
−
signal
output
uo = 0
The ndi driving point impedance Z n looking into the test port is
v
Zn ≡ x
i uo = 0
Since Z and Z n are in series with the same current i ,
vy
Z
=
Tnv =
vx u =0 Z n
o
v.0.1 3/07
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9. The DT & the CT
34
With the second level TFs replaced by the new definitions, the DT morphs
into the Extra Element Theorem (EET):
Z
H = H Z =∞
v.0.1 3/07
1 + Zn
Z
1 + Zd
http://www.RDMiddlebrook.com
9. The DT & the CT
35
Dissection Theorem (DT)
uy
signal
input
ux
ui
test signal
signal
output
uo
uz
ndi
u
H≡ o
ui u = 0
z
1
1
+
u
Tn
H=H y
1 + T1
first level TF
Notation:
Superscript signal is
signal being nulled
Redundancy Relation:
u
H y Tn
=
ux
T
H
v.0.1 3/07
ndi
ndi
u
T
1
=H y
+ H ux
1+T
1+T
si
second level TFs
H
uy
u
≡ o
ui u = 0
Tn ≡
H
uo
≡
ui u = 0
http://www.RDMiddlebrook.comx
9. The DT & the CT
ux u =0
o
y
ux
uy
T≡
uy
ux u =0
i
36
There are many reasons why the Dissection Theorem is useful.
The minimum benefit of the DT is that it embodies the
ʺDivide and Conquerʺ approach, because one complicated
calculation is replaced by three calculations, two of which
are ndi calculations and are therefore simpler and easier than
si calculations.
v.0.1 3/07
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9. The DT & the CT
37
There are many reasons why the Dissection Theorem is useful.
The minimum benefit of the DT is that it embodies the
ʺDivide and Conquerʺ approach, because one complicated
calculation is replaced by three calculations, two of which
are ndi calculations and are therefore simpler and easier than
si calculations.
Why are ndi calculations always simpler and easier than si calculations?
v.0.1 3/07
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9. The DT & the CT
38
There are many reasons why the Dissection Theorem is useful.
The minimum benefit of the DT is that it embodies the
ʺDivide and Conquerʺ approach, because one complicated
calculation is replaced by three calculations, two of which
are ndi calculations and are therefore simpler and easier than
si calculations.
Why are ndi calculations always simpler and easier than si calculations?
Because any element that supports a null signal does not contribute to
the result, and because if one signal is nulled, often other signals are
automatically nulled as well, and therefore several elements may be
absent from the result.
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
39
Not only does the DT implement the Design & Conquer objective, but
the DT is itself a Low Entropy Expression, and much greater benefits
accrue if the second level TFs have useful physical interpretations.
Thus, the second level TFs themselves contain the useful design‐oriented
information and you may never need to actually substitute them into the
theorem.
u
For example, if T , Tn >> 1, H ≈ H y
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
40
How to determine the physical interpretations of the second level TFs?
What kind of signal (voltage or current) is injected, and where it is
injected, defines an ʺinjection configuration.ʺ
Therefore, the key decision in applying the DT is choosing a test signal
injection point so that at least one of the second level TFs has the physical
interpretation you want it to have.
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
41
Another special case of the DT leads to the Chain Theorem (CT).
The test signal injection configuration is such that the entire signal
from the input flows to the output (no bypass paths).
v.0.1 3/07
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9. The DT & the CT
42
The Chain Theorem (CT)
iy
signal
input
ei
Z o1
ix
Zi2
jz = 0
Av1
+
signal
output
v
−
Av 2
vo = Av12 ei
v
The gain Av12 ≡ o is given by the DT:
ei
1
iy 1 + Tni
Av12 = Av12
1 + T1
The TF Tni ≡ iy /ix
i
vo = 0
is an ndi calculation with the output vo nulled.
If vo is nulled, so is ix , so Tni = ∞.
This implies that Tni is infinite unless the signal can bypass
v.0.1injection
3/07
the
point.
http://www.RDMiddlebrook.com
9. The DT & the CT
43
The Chain Theorem (CT)
iy = 0
signal
input
ei
ix
+
signal
output
v
jz
Av1
−
Av 2
iy
vo = Av12 ei
Nulled iy means that the Av1 box is unloaded, so the input voltage to the
Av 2 box is the open‐circuit (oc) output voltage of the Av1 box.
+
signal
input
ei
Avoc1 ei
+
signal
output
v
Av1
−
Avoc1 ei
−
Av 2
iy
vo = Av12 ei
iy
Thus, Av12 = Avoc1 Av 2 is the voltage ‐ buffered gain of the two stages.
v.0.1 3/07
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9. The DT & the CT
44
iy
signal
input
Z o1
ei = 0
Also
ix
Zi2
jz
Av1
Ti ≡
iy
ix e = 0
i
=
+
signal
output
v
−
Av 2
v / Z o1
Z
= i2 ,
v / Z i 2 e = 0 Z o1
i
so the DT becomes
Av12 = Avoc1 Av 2
This can be interpreted as
Zi2
Z i 2 + Z o1
gain
⎡
⎤ ⎡ voltage buffered gain ⎤ ⎡ voltage loading factor ⎤
⎢of the two stages ⎥ = ⎢ of the two stages ⎥ X ⎢ between the two stages ⎥
⎣
⎦ ⎣
⎦ ⎣
⎦
v.0.1 3/07
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9. The DT & the CT
45
The Chain Theorem (CT)
This is exactly the result that would be obtained directly from the model:
signal
input
ei
+
Z o1
Avoc1 ei
Z o1
Av1
Av12 = Avoc1 Av 2
v.0.1 3/07
Zi2
v
−
Zi2
Av 2
signal
output
vo = Av12 ei
Zi2
Z i 2 + Z o1
http://www.RDMiddlebrook.com
9. The DT & the CT
46
The Chain Theorem (CT)
A useful application of the DT with Tni = ∞ is to assemble the properties
of a 2‐stage amplifier from the properties of each separate stage.
signal
input
ei
v.0.1 3/07
Z o1
Avoc1 ei
Av1
iy
Z o1
ix
Zi2
jz = 0
+
v
−
http://www.RDMiddlebrook.com
9. The DT & the CT
Zi2
Av 2
signal
output
vo = Av12 ei
47
The Chain Theorem (CT)
signal
input
ei
Z o1
Avoc1 ei
Av1
iy
Z o1
ix
Zi2
jz = 0
+
v
−
Zi2
Av 2
signal
output
vo = Av12 ei
This ʺDivide and Conquerʺ approach avoids analysis of both stages
simultaneously.
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
48
The Chain Theorem (CT)
signal
input
iy
Z o1
Avoc1 ei
ei
Av1
Av12 = Avoc1 Av 2
Ti ≡
Zi2
Z o1
Z o1
ix
Zi2
jz = 0
+
v
−
Zi2
Av 2
signal
output
vo = Av12 ei
1
oc
=
A
1 Av 2 Di
v
1
1+ T
i
Ti
1
Zi2
=
Di ≡
=
1 + T1 1 + Ti
Z i 2 + Z o1
i
where Avoc1 Av 2 is the ʺvoltage bufferedʺ gain that would occur if there were a
buffer between the two stages, and Di is a ʺdiscrepancy factorʺ that accounts
for the interaction between the two stages which results from the loading
of the first stage by the input of the second stage.
v.0.1 3/07
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9. The DT & the CT
49
The Chain Theorem (CT)
1
oc
oc
Av12 = Av1 Av 2
=
A
v1 Av 2 Di
1
1+ T
i
signal
input
ei
Z o1
Avoc1 ei
Av1
iy
Z o1
ix
Zi2
jz = 0
+
v
−
Zi2
Av 2
signal
output
vo = Av12 ei
Since all TFs will be in factored pole‐zero form, the only place where
additional approximation may be needed resides inside the Di , where the
sum of two TFs is required.
ʺDoing the algebra on the graphʺ can be conducted in two ways:
1 + Ti can be found as the sum of the TFs 1 and Ti , dominated by the larger;
1
1 1 1
as the reciprocal sum of 1 and Ti ,
Di can be found from
= 1+ = +
Di
Ti 1 Ti
dominated
by the smaller.http://www.RDMiddlebrook.com
v.0.1 3/07
50
9. The DT & the CT
Let each stage be the 1CE stage previously treated.
iE
1+ β
vS
Ct
5p
RS
Rdp
10k
jS
Zi*
Zi
− Av vS
β = 120
RB
8.6k
1 + sCt Rni
Zi = Rim
1 + sCt Rdi
α iE
RL
s / 2π
1 − 880
1 − s / ωz
MHz
Av = Avm
= 36dB
/
s
1 + s / ωp
1 + 2π
51kHz
10k
iE
*
rm Zo
36
Zo
RB
α RL
= 62 ⇒ 36dB
RS + RB r + RS RB
m
1+ β
Rd = mRL = 620k
Rn = rm = 36Ω
Avm ≡
ωz ≡
= 82dB
1
Ct R n
s / 2π
1 + 51
kHz
s / 2π
1 + 39
kHz
Rim ≡ RS + RB (1 + β )rm = 13k ⇒ 82dB ref 1Ω
Rni = mRL ≡
Rdi =
RS RB (1 + β )rm
RS RB rm RL
RB (1 + β )rm
RL = 820k
RB rm RL
v.0.1 3/07
RL = 620k
ωp ≡
1
Ct Rd
Zo = Rom
m≡
RS RB (1 + β )rm
RS RB rm RL
= 62
1 + sCt Rno
1 + sCt Rdo
Rom ≡ RL = 10k ⇒ 80dB ref 1Ω
Rno = RS RB (1 + β )rm = 2.2k
Rdo = mRL = 620k
http://www.RDMiddlebrook.com
9. The DT & the CT
51
However, to make the symbolic equations more compact, without loss of
generality, let RS → 0 and α → 1 (β → ∞ ).
*
To keep Rim
the same, also let RB (1 + β )rm = 2.9k → RB
v.0.1 3/07
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9. The DT & the CT
52
The new 1CE stage is:
α =1
Ct
5p
iE
vS
0
RB
2.9k
Zi
Zi = Rim
− Av vS
RL
iE
rm
36
s / 2π
1 − 880
1 − s / ωz
MHz
Av = Avm
= 49dB
/
2π
s
1 + s / ωp
1+
3.2 MHz
10k
Zo
Avm =
1 + sCt RL
RB
RB rm RL
= 69dB
Rd = RL = 10k
Rn = rm = 36Ω
ωz ≡
1 + sCt RL
RL
= 280 ⇒ 49dB
rm
1
Ct R n
2π
1 + 3.2s /MHz
s / 2π
1 + 39
kHz
ωp ≡
1
Ct Rd
Zo = Rom
m=1
1
1
= 80dB
1 + sCt RL
1 + s / 2π
3.2 MHz
Rim = RB = 2.9k ⇒ 69dB ref. 1Ω
Rom = RL = 10k ⇒ 80dB ref. 1Ω
Rni = mRL = 10k
Rno = 0
Rdi =
RB (1 + β )rm
RL = 820k
RB rm RL
v.0.1 3/07
Note that letting RS
Rdo = mRL = 10k
http://www.RDMiddlebrook.com
9. The DT
CT
→ 0 reduces
the& the
ʺmiller
multiplierʺ m to 1.
53
α =1
Ct
5p
vS
iE
0
Zi
RB
2.9k
RL
iE
rm
36
Rom = RL = 80dB
Rim = RB = 69dB
Avm = RL / rm = 49dB
0dB
v.0.1 3/07
39kHz
− Av vS
s / 2π
1 − 880
RL 1 − sCt rm
MHz
Av =
= 49dB
rm 1 + sCt RL
1 + s / 2π
3.2 MHz
10k
Zo
Zi = RB
Zo = RL
Zo
1 + sCt RL
RB
1 + sCt RL
RB rm RL
= 69dB
2π
1 + 3.2s /MHz
s / 2π
1 + 39
kHz
1
1
= 80dB
1 + sCt RL
1 + s / 2π
3.2 MHz
Av
Zi
3.2MHz
http://www.RDMiddlebrook.com
9. The DT & the CT
880MHz
54
α =1
Ct
5p
vS
iE
0
Zi
RB
2.9k
RL
− Av1 vS
α =1
Ct
5p
10k
iE
rm
36
iE
0
iy
ix
jz
Z o1
Zi2
RB
2.9k
iE
rm
36
RL
Av12 vS
10k
Zo
The DT gives
Av12 = Avoc1 Av 2 Di
(Tni = ∞ )
The buffered gain Avoc1 Av 2 is the product of the two separate gains,
where Av1 is already open‐circuit:
⎛ 1 − s / 2π ⎞
880 MHz ⎟
Avoc1 Av 2 = 98dB ⎜
⎜ 1 + s / 2π ⎟
⎝
3.2 MHz ⎠
v.0.1 3/07
2
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9. The DT & the CT
55
s / 2π 1 − s / 2π
1 − 880
oc
880 MHz
MHz
Av1 Av 2 = 98dB
2π 1 + s / 2π
1 + 3.2s /MHz
3.2 MHz
98dB
3.2MHz
− 40dB / dec
880MHz
v.0.1 3/07
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9. The DT & the CT
56
3.2MHz
39kHz
Zi2 = 69dB
v.0.1 3/07
Zo1 = 80dB
2π
1 + 3.2s /MHz
1
2π
1 + 3.2s /MHz
s / 2π
1 + 39
kHz
http://www.RDMiddlebrook.com
9. The DT & the CT
57
(
)
2
/
2
s
π
1 + 3.2 MHz
Z
Ti ≡ i2 = −11dB
s / 2π
Z o1
1 + 39
kHz
39kHz
Zi2 = 69dB
Zo1 = 80dB
2π
1 + 3.2s /MHz
1
2π
1 + 3.2s /MHz
s / 2π
1 + 39
kHz
39kHz
Ti
3.2MHz
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9. The DT & the CT
58
1
1 1 1
The discrepancy factor Di =
or
or Di = 1 Ti
= +
1
1
D
T
1+ T
i
i
i
is dominated by the smaller:
0dB
− 11dB
−13dB
39kHz 50kHz
3.2MHz
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9. The DT & the CT
59
1
1 1 1
The discrepancy factor Di =
or
or Di = 1 Ti
= +
1
1
D
T
1+ T
i
i
i
is dominated by the smaller:
0dB
−13dB
39kHz 50kHz D
i
3.2MHz
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9. The DT & the CT
60
1
1 1 1
The discrepancy factor Di =
or
or Di = 1 Ti
= +
1
1
D
T
1+ T
i
i
i
is dominated by the smaller:
880MHz
0dB
−13dB
39kHz 50kHz D
i
Di = −13dB
3.2MHz
2π 1 + s / 2π
1 + 3.2s /MHz
3.2 MHz
s / 2π 1 + s / 2π
1 + 50
880 MHz
kHz
All these graphical constructions can be conducted symbolically to
give the result for Di in low entropy factored pole‐zero form.
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9. The DT & the CT
61
Final step: assemble Av12 as the product of the buffered gain and the
discrepancy factor:
s / 2π 1 − s / 2π
1 − 880
oc
MHz
880 MHz
Av1 Av 2 = 98dB
π
s
/
2
2π
1 + 3.2 MHz 1 + 3.2s /MHz
98dB
Av12
85dB
3.2MHz
50kHz
Av12 = 85dB
0dB
Avoc1 Av 2
− 40dB / dec
s / 2π 1 − s / 2π
1 − 880
MHz
880 MHz
880MHz
s / 2π 1 + s / 2π
1 + 50
880 MHz
kHz
−13dB
50kHz
Di
Di = −13dB
3.2MHz
v.0.1 3/07
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9. The DT & the CT
2π 1 + s / 2π
1 + 3.2s /MHz
3.2 MHz
s / 2π 1 + s / 2π
1 + 50
880 MHz
kHz
62
The fact that Di is less than 1 over most of the frequency range indicates
that the second stage imposes heavy loading upon the first stage:
α =1
Ct
5p
vS
iE
0
Zi
RB
2.9k
iE
rm
36
− Av1 vS
Di =
RL
10k
iy
Z o1
Z i2
Z i 2 + Z o1
α =1
Ct
5p
0
ix
jz
iE
Zi2
RB
2.9k
iE
rm
36
Av12 vS
RL
10k
Zo
0dB
880MHz
−13dB
50kHz
Di
3.2MHz
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9. The DT & the CT
63
The fact that Di is less than 1 over most of the frequency range indicates
that the second stage imposes heavy loading upon the first stage:
α =1
Ct
5p
vS
iE
0
Zi
RB
2.9k
iE
rm
36
− Av1 vS
Di =
RL
10k
iy
Z o1
α =1
Z i2
Z i 2 + Z o1
Ct
5p
0
ix
jz
iE
Zi2
RB
2.9k
Av12 vS
RL
10k
iE
rm
36
Zo
0dB
880MHz
−13dB
50kHz
Di
3.2MHz
This suggests that the first stage behaves more like a current source than
a voltage source, and therefore that the analysis might be better
v.0.1 3/07
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undertaken
using the dual
form of the DT.
9. The DT & the CT
64
The Chain Theorem (CT)
−
vz = 0 +
Zi2 v x
v y Z o1
signal
input
ei
Av1
+
−
signal
output
Av 2
vo = Av12 ei
v
The gain Av12 ≡ o is given by the DT:
ei
1
1
+
vy
Tnv
Av12 = Av12
1 + T1
The TF Tnv ≡ vy /v x
v
vo = 0
is an ndi calculation with the output vo nulled.
If vo is nulled, so is v x , so Tnv = ∞.
This implies that Tnv is infinite unless the signal can bypass
v.0.1injection
3/07
the
point.
http://www.RDMiddlebrook.com
9. The DT & the CT
65
The Chain Theorem (CT)
−
signal
input
ei
vy = 0
Av1
+
vz
+
signal
output
vx
Av 2
−
vy
vo = Av12 ei
Nulled vy means that the Av1 box is shorted, so the input current to the
Av 2 box is the short‐circuit (sc) output current of the Av1 box.
signal
input
ei
Ytsc
1 =
Av1
Z o1
= forward
transadmittance
gain
Ytsc
1 ei
Ytsc
1 ei
Zt 2 = Zi2 Av 2
= forward
transimpedance
gain
signal
output
vy
Thus, Av12 = Ytsc
1 Z t 2 is the current ‐ buffered gain of the two stages.
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
vy
vo = Av12 ei
66
−
signal
input
ei = 0
Also
Ytsc
1
Tv ≡
vy
vx e =0
i
=
+
vz i
Zi2
v y Z o1
vx
+
−
signal
output
Zt 2
iZo1
Z
= o1 ,
iZi2 e = 0 Zi2
i
so the DT becomes
Av12 = Ytsc
1 Zt 2
Z o1
Z i 2 + Z o1
This can be interpreted as
gain
⎡
⎤ ⎡current buffered gain ⎤ ⎡ current loading factor ⎤
⎢of the two stages ⎥ = ⎢ of the two stages ⎥ X ⎢ between the two stages ⎥
⎣
⎦ ⎣
⎦ ⎣
⎦
v.0.1 3/07
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9. The DT & the CT
67
The Chain Theorem (CT)
This is exactly the result that would be obtained directly from the model:
signal
input
ei
Z o1
Ytsc
1 ei
Ytsc
1
Av12 = Ytsc
1 Zt 2
v.0.1 3/07
i
Z o1
Zi2
Zi2
Zt 2
signal
output
vo = Av12 ei
Z o1
Z i 2 + Z o1
http://www.RDMiddlebrook.com
9. The DT & the CT
68
The Chain Theorem (CT)
A useful application of the DT with Tnv = ∞ is to assemble the properties
of a 2‐stage amplifier from the properties of each separate stage.
signal
input
ei
v.0.1 3/07
Z o1
Ytsc
1 ei
Ytsc
1
−
i
+
v y Z o1
Zi2
vx
+
−
http://www.RDMiddlebrook.com
9. The DT & the CT
Zi2
Zt 2
signal
output
vo = Av12 ei
69
The Chain Theorem (CT)
signal
input
ei
Z o1
Ytsc
1 ei
Ytsc
1
−
i
+
v y Z o1
Zi2
vx
+
−
Zi2
Zt 2
signal
output
vo = Av12 ei
This ʺDivide and Conquerʺ approach avoids analysis of both stages
simultaneously.
v.0.1 3/07
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9. The DT & the CT
70
The Chain Theorem (CT)
signal
input
ei
Z o1
Ytsc
1 ei
Ytsc
1
vz = 0
−
v y Z o1
+
i
+
Zi2
vx
−
Zi2
Zt 2
signal
output
vo = Av12 ei
1
sc
=
Y
t
1 Zt 2 Dv
1
1+ T
v
Tv
1
Z o1
Z o1
D
≡
=
=
Tv ≡
v
Z i 2 + Z o1
1 + T1 1 + Tv
Z i2
v
where Ytsc
1 Z t 2 is the ʺcurrent bufferedʺ gain that would occur if there were a
Av12 = Ytsc
1 Zt 2
buffer between the two stages, and Dv is a ʺdiscrepancy factorʺ that accounts
for the interaction between the two stages which results from the loading
of the first stage by the input of the second stage.
v.0.1 3/07
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9. The DT & the CT
71
The Chain Theorem (CT)
1
sc
Av12 = Ytsc
Z
=
Y
1 t2
1 Zt 2 Dv
t
1
1+ T
v
vz = 0
−
i
signal
Z o1
Zi2
input
v y Z o1
sc
Yt 1 ei
ei
Ytsc
1
+
+
vx
−
Zi2
Zt 2
signal
output
vo = Av12 ei
Since all TFs will be in factored pole‐zero form, the only place where
additional approximation may be needed resides inside the Dv , where the
sum of two TFs is required.
ʺDoing the algebra on the graphʺ can be conducted in two ways:
1 + Tv can be found as the sum of the TFs 1 and Tv , dominated by the larger;
1
1 1 1
as the reciprocal sum of 1 and Tv ,
= 1+
= +
Dv
Tv 1 Tv
dominated
by the smaller. http://www.RDMiddlebrook.com
v.0.1 3/07
72
Dv can be found from
9. The DT & the CT
α =1
Ct
5p
vS
iE
0
Zi
RB
2.9k
− 31dB
v.0.1 3/07
10k
iE
rm
36
Zo
Ytsc =
Av
1
=
( 1 − sCt rm )
Zo rm
s / 2π ⎞
⎛
= −31dB ⎜ 1 −
⎟
880 MHz ⎠
⎝
Zt = Zi Av =
Zt 2
118dB
0dB
RL
− Av vS
( 1 − sCt rm )
RB RL
rm ⎛
⎞
RB
⎜ 1 + sCt RL R r R ⎟
B m L⎠
⎝
s / 2π ⎞
⎛
⎜1 −
⎟
880 MHz ⎠
⎝
= 118dB
s / 2π ⎞
⎛
+
1
⎜
⎟
39kHz ⎠
⎝
880MHz
39kHz
Ytsc
1
http://www.RDMiddlebrook.com
9. The DT & the CT
73
α =1
Ct
5p
vS
iE
0
Zi
RB
2.9k
RL
− Av1 vS
10k
iE
rm
36
Z o1
Dv =
Z i 2 + Z o1
ez
Z o1
−
vy
+ i
vx
+
−
α =1
Ct
5p
Zi2
iE
0
RB
2.9k
RL
iE
rm
36
Av12 vS
10k
Zo
The DT gives
( Tnv = ∞ )
Av12 = Ytsc
1 Z t 2 Dv
The current buffered gain Ytsc
1 Z t 2 is the product of the two
separate gains:
(
)
)
2
/
2
s
π
1 − 880 MHz
sc
Yt 1 Zt 2 = 87dB
s / 2π
1 + 39
kHz
v.0.1 3/07
(
http://www.RDMiddlebrook.com
9. The DT & the CT
74
Zt 2
118dB
Ytsc
1 Z t 2 = 87dB
87dB
(
)
2π
( 1 + 39s /kHz
)
s / 2π
1 − 880
MHz
2
Ytsc
1 Zt 2
0dB
− 31dB
v.0.1 3/07
880MHz
39kHz
Ytsc
1
http://www.RDMiddlebrook.com
9. The DT & the CT
75
39kHz
Zo1 = 80dB
Zi2 = 69dB
2π
1 + 3.2s /MHz
1
2π
1 + 3.2s /MHz
s / 2π
1 + 39
kHz
3.2MHz
Z
Zo1 and Zi2 are the same, but note that Tv = o1 is the reciprocal
Zi2
Z
of Ti = i2 :
Z o1
v.0.1 3/07
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9. The DT & the CT
76
(
)
( 3.2 MHz )
s / 2π
1 + 39
Z o1
kHz
= 11dB
Tv =
2
Zi2
1 + s / 2π
11dB
Tv
3.2MHz
Z
Zo1 and Zi2 are the same, but note that Tv = o1 is the reciprocal
Zi2
Z
of Ti = i2 :
Z o1
v.0.1 3/07
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9. The DT & the CT
77
1
1
1 1
or
or Dv = 1 Tv
=
+
1
Dv 1 Tv
1+ T
v
is dominated by the smaller:
The discrepancy factor Dv =
0dB
11dB
3.2MHz
Tv
−2dB 39kHz
50kHz
Dv
s / 2π
1 + 39
(
kHz )
Dv = −11dB
2π
2π
( 1 + 50s /kHz
)( 1 + 880s /MHz
)
All these graphical constructions can be conducted symbolically to
give the result for Dv in low entropy factored pole‐zero form.
v.0.1 3/07
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9. The DT & the CT
78
Final step: assemble Av12 as the product of the buffered gain and the
discrepancy factor:
87dB
85dB
Av12
Av12 = 85dB
0dB
−2dB
v.0.1 3/07
s / 2π 1 − s / 2π
1 − 880
880 MHz
MHz
Ytsc
1 Zt 2
s / 2π 1 + s / 2π
1 + 50
880 MHz
kHz
39kHz
880MHz
Dv
50kHz
http://www.RDMiddlebrook.com
9. The DT & the CT
79
Final step: assemble Av12 as the product of the buffered gain and the
discrepancy factor:
87dB
85dB
Av12
Av12 = 85dB
0dB
−2dB
s / 2π 1 − s / 2π
1 − 880
880 MHz
MHz
Ytsc
1 Zt 2
s / 2π 1 + s / 2π
1 + 50
880 MHz
kHz
39kHz
880MHz
Dv
50kHz
The fact that Dv is close to 1 over most of the frequency range confirms
the expectation that the first stage behaves more like a current source
than a voltage source.
v.0.1 3/07
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9. The DT & the CT
80
Summary:
The DT allows assembly of the properties of a 2‐stage amplifier from
the properties of each separate stage.
This can be done by injection of either a test current jz or a
test voltage ez at the interface:
signal
input
ei
Z o1
Avoc1 ei
iy
Z o1
ix
Zi2
jz = 0
Av1
+
v
−
signal
output
Zi 2
Av 2
iy
Av12 = Av12 Di
iy
Av12 = Avoc1 Av 2
where
Z i2
Z i 2 + Z o1
ei
Z o1
Ytsc
1 ei
Ytsc
1
−
v y Z o1
+
i
Zi 2
+
vx
−
Zi2
Zt 2
signal
output
vo = Av12 ei
vy
Av12 = Av12 Dv
vy
Av12 = Ytsc
1 Zt 2
where
is the voltage buffered gain
and Di =
vo = Av12 ei
signal
input
is the current buffered gain
and Dv =
Z o1
Z i 2 + Z o1
are the discrepancy factors representing the interface loading.
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
81
In principle, this procedure can be extended to the addition of extra stages:
signal
input
ei
Z o1
Zi2
Zo2
Av12 ei
Zi3
signal
output
Av123 ei
In practice, this procedure becomes cumbersome because the discrepancy
factor for the first interface changes when a second interface is added.
v.0.1 3/07
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9. The DT & the CT
82
However, there is an alternative form for the gain of 2 stages that
circumvents this problem.
The DT results already obtained are:
iy
iy
Zi2
Av12 = Av12 Di = Av12
Z i 2 + Z o1
vy
vy
Z o1
Av12 = Av12 Dv = Av12
Z i 2 + Z o1
Rewrite:
Z o1
1
= v
Av12 Zi2 + Zo1 A y
1
Zi2
1
=
Av12 Zi2 + Zo1 Aiy
1
v12
v12
Add the two:
1
Av12
v.0.1 3/07
=
1
iy
Av12
+
1
vy
Av12
http://www.RDMiddlebrook.com
9. The DT & the CT
83
1
Av12
=
1
iy
Av12
+
1
vy
Av12
This simple and elegant result says that the interface discrepancy factors
Di and Dv are not needed, and the overall gain is a ʺparallel combinationʺ
of the two buffered gains:
iy
vy
Av12 = Av12 Av12
where
and
iy
Av12 = Avoc1 Av 2 = voltage buffered gain of the 2 stages
vy
Av12 = Ytsc
1 Z t 2 = current buffered gain of the 2 stages
This result is actually the Chain Theorem (CT), and Avoc1 , Av 2 , Ytsc
1 , Zt 2
are the (reciprocals of the) chain parameters (c parameters).
v.0.1 3/07
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9. The DT & the CT
84
Rework the previous example:
α =1
Ct
5p
vS
iE
0
Zi
v.0.1 3/07
RB
2.9k
iE
rm
36
RL
− Av1 vS
α =1
− vy
10k
iy
Z o1
+ vx
Ct
5p
iE
0
ix
Zi2
http://www.RDMiddlebrook.com
9. The DT & the CT
RB
2.9k
iE
rm
36
RL
Av12 vS
10k
Zo
85
Rework the previous example:
α =1
Ct
5p
vS
iE
0
Zi
RB
2.9k
98dB
iE
rm
36
RL
− Av1 vS
α =1
Ct
5p
10k
iE
0
iy
ix
Z o1
Zi2
RB
2.9k
RL
Av12 vS
10k
iE
rm
36
Zo
s / 2π 1 − s / 2π
1 − 880
oc
880 MHz
MHz
Av1 Av 2 = 98dB
/
2
2π
π
s
1 + 3.2 MHz 1 + 3.2s /MHz
3.2MHz
880MHz
v.0.1 3/07
http://www.RDMiddlebrook.com
9. The DT & the CT
86
Rework the previous example:
α =1
Ct
5p
vS
iE
0
Zi
RB
2.9k
iE
rm
36
98dB
RL
− Av1 vS
α =1
− vy
10k
+ vx
Z o1
Ct
5p
iE
0
Zi2
RB
2.9k
10k
iE
rm
36
Zo
s / 2π 1 − s / 2π
1 − 880
oc
880 MHz
MHz
Av1 Av 2 = 98dB
/
2
2π
π
s
1 + 3.2 MHz 1 + 3.2s /MHz
87dB
39kHz
RL
Av12 vS
3.2MHz
Ytsc
1 Z t 2 = 87dB
(
)
2π
( 1 + 39s /kHz
)
s / 2π
1 − 880
MHz
2
880MHz
v.0.1 3/07
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9. The DT & the CT
87
Rework the previous example:
− Av1 vS
α =1
Ct
5p
vS
iE
0
Zi
RB
2.9k
RL
iE
rm
36
α =1
− vy
10k
+ vx
iy
Ct
5p
0
ix
Z o1
iE
Zi2
RB
2.9k
iE
rm
36
87dB
39kHz
50kHz
Av12 = 85dB
v.0.1 3/07
10k
Zo
s / 2π 1 − s / 2π
1 − 880
oc
880 MHz
MHz
Av1 Av 2 = 98dB
/
2
2π
π
s
1 + 3.2 MHz 1 + 3.2s /MHz
98dB
85dB
RL
Av12 vS
3.2MHz
Ytsc
1 Z t 2 = 87dB
s / 2π 1 − s / 2π
1 − 880
880 MHz
MHz
(
)
2π
( 1 + 39s /kHz
)
s / 2π
1 − 880
MHz
2
880MHz
s / 2π 1 + s / 2π
1 + 50
880 MHz
kHz
http://www.RDMiddlebrook.com
9. The DT & the CT
88
The CT is the key to implementation of the ʺDivide and Conquerʺ
approach to D‐OA.
The procedure is:
signal
input
Avoc1
Ztoc2
Ytsc
1
Avoc2
ei
Avoc12 ei
oc
oc
Find Avoc1 and Ytsc
1 of stage 1, and Z t 2 and Av 2 of stage 2.
Combine them by the CT to find Avoc12 , as above,
v.0.1 3/07
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9. The DT & the CT
89
The CT is the key to implementation of the ʺDivide and Conquerʺ
approach to D‐OA.
The procedure is:
signal
input
Avoc1
Ztoc2
Ytsc
1
Avoc2
ei
Ytsc
12 ei
Avoc12 ei
oc
oc
Find Avoc1 and Ytsc
1 of stage 1, and Z t 2 and Av 2 of stage 2.
Combine them by the CT to find Avoc12 , as above, and hence find Ytsc
12 .
v.0.1 3/07
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9. The DT & the CT
90
The CT is the key to implementation of the ʺDivide and Conquerʺ
approach to D‐OA.
The procedure is:
signal
input
ei
Avoc1
Ztoc2
Ytsc
1
Avoc2
Ytsc
12 ei
Avoc12 ei
oc
oc
Find Avoc1 and Ytsc
1 of stage 1, and Z t 2 and Av 2 of stage 2.
Combine them by the CT to find Avoc12 , as above, and hence find Ytsc
12 .
signal
input
ei
Avoc12
Ztoc3
Ytsc
12
Avoc3
Find Ztoc3 and Avoc3 of stage 3.
Combine them by the CT to find Avoc123 .
v.0.1 3/07
http://www.RDMiddlebrook.com
and so on...
9. The DT & the CT
Avoc123 ei
91