Extended Syllabus
(2025 1st Semester)
Course Title
Digital Logic Circuit
Course
Number
EEE2135-02
Credit
3
Enrollment
Eligibility
Sophomore
Class Time
Tuesday/Thursday 09:00 ~ 10:15
Instructor's
Photo
Name: Yangmo Yoo
Homepage: cyber campus
E-mail: ymyoo@sogang.ac.kr
Telephone: 02-705-4731
Office: R711A
Office Hours: 10:30 ~ 12:00, 14:00 ~ 16:00
Ⅰ. Course Overview
1. Description
This subject, Digital logic design, is a basic course in most electrical and computer engineering
programs. The main goal of this course is to get the knowledge on (1) the basic concepts of the
digital circuit elements and (2) the design skill using the computer-aided-design (CAD) tools. By
designing the digital circuit systems using CAD tools, the students will have the deeper
understanding on the basic concepts and how digital circuits operate practically. The students will
learn how to use the CAD tool, and then how to design the digital circuits by using hardware
description language (HDL). The topics covered in this class are Boolean algebra, the basic logic
gates, arithmetic circuits, combinational circuit blocks, memory elements, synchronous sequential
circuit elements and some important implementation issues.
2. Prerequisites
No prerequisite.
3. Course Format (%)
Lecture
Discussion
90 %
Experiment
/Practicum
10 %
Field study
%
Presentations
%
%
Other
%
4. Evaluation (%)
Midterm
Exam
Final
exam
Quizzes
Presentations
Projects
Assignments
Participation
30 %
30 %
0%
%
20%
20 %
0%
1
Other
%
Ⅱ. Course Objectives
A student who successfully fulfills the course requirements will have several abilities as follows:
Knowledge
⚫ Digital circuit system
⚫ Optimized implementation of digital system
⚫ Design the combinational circuit
⚫ Synchronous sequential circuits
Attitude
⚫ Ability to apply the techniques learned in this course to various applications
Ⅲ. Course Format
(* In detail)
⚫ The students are recommended to preview the textbook before each class.
⚫ The students may ask any question before the class using the bulletin board.
⚫ The instructor will briefly cover the topics in each class, and then answer the question from the
students.
Ⅳ. Course Requirements and Grading Criteria
The grades are based on homework, quiz, midterm and final exams. The detailed information is as
follows:
Quiz
⚫ There will be a homework at each chapter (total 7 homeworks, it can be changed, TBA)
Project
⚫ There will be a term project
Participation
⚫ 0%
Ⅴ. Course Policies
⚫
2
Ⅵ. Materials and References
Main
⚫ S. Brown and Z. Vranesic, “Fundamentals of Digital Logic with VHDL Design,” 3rd Edition, McGraw
Hill, 2009
Supplementary
⚫ J. Hayes, 'Digital Logic Design', Addison-Wesley
⚫ John F. Wakerly, 'Digital Design: principles and practices', 4th edition, Prentice Hall, 2006.
⚫ M. Morris Mano, 'Digital Design', 4rd edition, Prentice Hall, 2007.
Ⅶ. Course Schedule
(* Subject to change)
Learning Objectives
Introduction and Design Concept
What will be learned in this classroom? Organization of textbook
Topics
Digital Hardware
Design Process
Week
Class Work
1
(Methods)
Materials
(Required Readings)
Assignments
Learning Objectives
Lecture
1
Introduction to logic circuits
Digital hardware components and design processes
Topics
Class Work
(Methods)
Materials
(Required Readings)
Assignments
Week
3
Synthesis: SOP & POS
Prove some Boolean identities
Week
2
Overview of IC technology
Learning Objectives
Lecture
2.1~2.7
Chapter 2 Problems
Implementation technology
3
Topics
Class Work
(Methods)
Materials
(Required Readings)
Assignments
Learning Objectives
Operation of transistor & FPGA How to use CAD tool, especially
Quartus II Introduction to hardware description language (HDL)
Lecture
3.1 ~ 3.7
Chapter 3 Problems
Optimized implementation of logic functions
Synthesis of logic functions
Analysis of logic circuits
Topics
4
Cubical representation of logic functions
Class Work
(Methods)
Materials
(Required Readings)
Assignments
Learning Objectives
Topics
Week
Class Work
5
(Methods)
Materials
(Required Readings)
Assignments
Learning Objectives
7
Graphical representation of logic function
Karnaugh maps
Week
Week
Techniques for deriving minimum-cost implementation
Topics
Class Work
(Methods)
Materials
(Required Readings)
Lecture
4.1 ~ 4.5
Chapter 2 Problems
Optimized implementation of logic functions
Multilevel Synthesis
Analysis of Multilevel Circuits
Lecture
4.6 ~ 4.8
Chapter 4 Problems
Number representation and arithmetic circuits
Representation of various numbers Circuits for arithmetic operations
Lecture
5.1 ~ 5.4
4
Assignments
Learning Objectives
Topics
Week
6
Class Work
(Methods)
Materials
(Required Readings)
Assignments
Week
8
Multiplexers
Decoders and Encoders
Lecture
6.1 ~ 6.5
-
No class
Topics
Week
Class Work
10
(Methods)
Materials
(Required Readings)
Assignments
Learning Objectives
Topics
Week
Class Work
11
(Methods)
Materials
(Required Readings)
Assignments
11
Combinational circuit building blocks
Midterm Examination Period
Learning Objectives
Week
Chapter 5 Problems
Learning Objectives
Topics
Combinational circuit building blocks
Code converters
Arithmetic comparison circuits
Lecture
6.1 ~ 6.5
Chapter 6 Problems
Flip-flops, registers, counters, and a simple processor
Basic latch, SR latch, gated SR latch, D latch
Lecture
7.1 ~ 7.16
Chapter 7 Problems
Flip-flops, registers, counters, and a simple processor
Register, Counters
5
Class Work
(Methods)
Materials
(Required Readings)
Assignments
Learning Objectives
Topics
Week
Class Work
12
(Methods)
Materials
(Required Readings)
Assignments
Learning Objectives
Topics
Week
Class Work
13
(Methods)
Materials
(Required Readings)
Assignments
Learning Objectives
Topics
Week
Class Work
14
(Methods)
Materials
(Required Readings)
Assignments
Week
15
Learning Objectives
Topics
Lecture
7.1 ~ 7.16
Chapter 7 Problems
Synchronous sequential circuits
Basic design steps
Lecture
8.1
Synchronous sequential circuits
Design of circuits with flip-flops Sequential behavior of digital circuits
Moore type sequential circuits
Lecture
8.1 ~ 8.4
Chapter 8 Problems
Synchronous sequential circuits
State minimization
Serial adder
Lecture
8.5 ~ 8.6
Chapter 8 Problems
Implementation issues, VLSI, ASIC, SoC
Digital system examples and their implementations
6
Class Work
(Methods)
Materials
(Required Readings)
Assignments
Week
16
Lecture
-
None
Final Examination Period
No class
Ⅷ. Special Accommodations
Class topics, exams, and assignments can be partially changeable according to the lecture progress.
Ⅸ. Aid for the Challenged Students
⚫ Preferential seating for challenged students.
⚫ Ensuring that challenged students have equal access to educational opportunities by providing
what the students need.
7