University of Nebraska-Lincoln
Department of Electrical and Computer Engineering
Spring 2024
Dr. Qing Hui
ECEN 216: Electronics and Circuits II
Exam 2
Solution
Problem Maximum Points
1
40
2
30
3
30
Total
100
Score
• Do all 3 problems.
• 75 min limit.
• Show all work.
• Closed-book, closed-notes.
• By signing your name on the examination paper you are bound by the UNL honor code: “I
hereby certify that I will follow the Code of Student Conduct as defined by the University of
Nebraska-Lincoln and the Electrical and Computer Engineering Department, that I will not
cheat nor will I condone cheating.”
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Problem 1. (40 points) The source in the figure below supplies 40 kW at a power factor of 0.9
lagging. The real and reactive power losses of the transmission-line feeders are 1.6 kW and 2.1
kvar, respectively.
i) (10 points) Find the phasor current for the circuit.
ii) (5 points) Find the value of R.
iii) (5 points) Find the value of X.
iv) (5 points) Find the phasor voltage for the load.
v) (5 points) Find the real power absorbed by the load.
vi) (5 points) Find the reactive power absorbed by the load.
vii) (5 points) Find the power factor for the load.
Solution:
i) First,
PS = VS I · pfS =⇒
PS
40K
I=
=
= 101Arms
VS · pfS 440 · 0.9
Next,
0◦
z}|{
pfS = cos( θVS −θI ) = 0.9
=⇒ −θI = ± cos−1 (0.9) = ±25.84◦
θI = ∓25.84◦ (lagging: θI < θVS = 0◦ )
∴ I˜ = 101∠(−25.84◦ )Arms
ii)
˜ + jX)
Ṽline = I˜ · Zline = I(R
S̃line = Ṽline · I˜∗ = I 2 (R + jX) = Pline + jQline
∴ I 2 R = Pline =⇒
1.6K
R=
= 0.157Ω
1012
iii)
I 2 X = Qline =⇒
2.1K
= 0.206Ω
X=
1012
iv)
ṼL = ṼS − I˜ · Zline
0.259∠52.69◦
z
}|
{
= 440∠0◦ − [101∠(−25.84◦ )] (0.157 + j0.206)
◦
= 440 − |26.16∠26.85
{z
}
23.34+ j11.82
= 416.66 − j11.82
= 416.83∠(−1.62◦ )Vrms
v)
S̃L = ṼL · I˜∗
= [416.83∠(−1.62◦ )](101∠25.84◦ )
= 42.1∠24.22◦ KVA
= 38.39 + j17.27KVA = PL + jQL
∴ PL = Re[S̃L ] = 38.39KW
vi)
QL = Im[S̃L ] = 17.27Kvar
vii)
pfL = cos(θVL − θI )
= cos(−1.62◦ − (−25.84◦ ))
= 0.91, lagging
Problem 2. (30 points) Consider an ideal transformer circuit given by the figure below.
i) (6 points) Determine I1 .
ii) (6 points) Determine I2 .
iii) (6 points) Determine V1 .
vi) (6 points) Determine V2 .
v) (6 points) Determine the equivalent impedance seen from the V1 side.
Solution:
The KVL equation for the primary side:
R1 I˜1 + Ṽ1 = ṼS
where R1 = 1Ω and ṼS = 12∠0◦ V.
The KVL equation for the secondary side:
−Ṽ2 + I˜2 (R2 + ZL ) = 0
where R2 = 3Ω and ZL = j1Ω.
The transformer equations:
N2
Ṽ1 = 2V˜1
N1
N2
I˜1 = I˜2 = 2I˜2
N1
Ṽ2 =
Putting these equations into the matrix form:


 

1 1 0
0
Ṽ1
12∠0◦
 0 0 −1 3 + j1   I˜1   0 


=

 −2 0 1
0   Ṽ2   0 
0 1 0
−2
0
I˜2
Then
 
−1 

Ṽ1
1 1 0
0
12∠0◦
 I˜1   0 0 −1 3 + j1   0 

 
 

 Ṽ2  =  −2 0 1
0   0 
I˜2
0 1 0
−2
0


5.37∠10.3◦
 6.79∠ − 8.13◦ 

=
 10.74∠10.3◦ 
3.4∠ − 8.13◦

Hence,
i) I˜1 = 6.79∠ − 8.13◦ A.
ii) I˜2 = 3.4∠ − 8.13◦ A.
iii) Ṽ1 = 5.37∠10.3◦ V.
iii) Ṽ2 = 10.74∠10.3◦ V.
iv)
n=
N2
= 2,
N1
n2 = 4
Then
Zeq =
3
1
1
(R2 + ZL ) = + j = 0.75 + j0.25Ω
2
n
4
4
Problem 3. (30 points) Consider a peak detector circuit given by the figure below. Assume that
the diode D is ideal and the capacitor C does not store any energy at t = 0, i.e., vO (0) = 0. The
power source is given by vI (t) = V0 sin(ωt), where V0 , ω > 0. Let T = 2π/ω.
i) (8 points) For 0 ≤ t < T /4, if we assume that the diode D is ON, is this correct? Justify your
answer.
ii) (8 points) For 0 ≤ t < T /4, if we assume that the diode D is OFF, is this correct? Justify
your answer.
iii) (4 points) For 0 ≤ t < T /4, determine the ON or OFF mode for the diode.
iv) (5 points) For 0 ≤ t < T /4, determine the current for the circuit.
v) (5 points) For 0 ≤ t < T /4, determine the voltage vO (t).
Solution:
i) Assume the diode D is ON (vD = 0 and iD > 0). Then replace it with a short circuit. In this
case, vD = 0.
KVL:
vD + vC − vI = 0
vO = vC = vI = V0 sin(ωt)
Note that
1
vC (t) = vC (0) +
C
Z t
i(τ)dτ
0
Taking the time-derivative on both sides yields
dvC (t) 1
= i(t)
dt
C
Hence,
i(t) = C
dvC (t)
= CV0 ω cos(ωt)
dt
For 0 ≤ t < T /4, 0 ≤ ωt < π/2. In this case, 0 < cos(ωt) ≤ 1. Therefore, iD (t) = i(t) =
CV0 ω cos(ωt) > 0. This implies that our assumption was correct.
ii) Assume the diode D is OFF (iD = 0 and vD < 0). Then replace it with an open circuit. In
this case, iD = 0 and i = iD = 0.
Note that
1
vC (t) = vC (0) +
C
Z t
i(τ)dτ
0
and vC (0) = 0. Then
vC (t) = 0 +
1
C
Z t
0dτ = 0
0
KVL:
vD + vC − vI = 0
vD = vI = V0 sin(ωt)
For 0 ≤ t < T /4, 0 ≤ ωt < π/2. In this case, 0 < sin(ωt) ≤ 1. Therefore, vD (t) = V0 sin(ωt) >
0. This implies that our assumption was not correct.
iii) The diode is ON.
iv) i(t) = CV0 ω cos(ωt).
v) vO (t) = V0 sin(ωt).