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Digital Design: Counters, Registers, and Serial Addition

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ECE/EEE/INSTR F215
DIGITAL DESIGN
Tushar Sakorikar
Synchronous Up-down counter
Count up
1
Count down
A3
A2
A1
A0
A3
A2
A1
A0
0
0
0
0
1
1
1
1
0
0
0
1
1
1
1
0
0
0
1
0
1
1
0
1
0
0
1
1
1
1
0
0
0
1
0
0
1
0
1
1
0
1
0
1
1
0
1
0
0
1
1
0
1
0
0
1
0
1
1
1
1
0
0
0
1
0
0
0
0
1
1
1
1
0
0
1
0
1
1
0
1
0
1
0
0
1
0
1
1
0
1
1
0
1
0
0
1
1
0
0
0
0
1
1
1
1
0
1
0
0
1
0
1
1
1
0
0
0
0
1
1
1
1
1
0
0
0
0
1
Synchronous BCD counter
Present State
Flip Flop inputs
Next State
o/p
Q8
Q4
Q2
Q1
Q8
Q4
Q2
Q1
T8
T4
T2
T1
Y
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0
1
0
0
0
1
1
0
0
0
1
0
0
0
1
1
0
0
0
1
0
0
0
1
1
0
1
0
0
0
1
1
1
0
0
1
0
0
0
1
0
1
0
0
0
1
0
0
1
0
1
0
1
1
0
0
0
1
1
0
0
1
1
0
0
1
1
1
0
0
0
1
0
0
1
1
1
1
0
0
0
1
1
1
1
0
1
0
0
0
1
0
0
1
0
0
0
1
0
1
0
0
1
0
0
0
0
1
0
0
1
1
Flip Flop I/P Equations
• T1 = 1
• Solve for K-maps and get these
equations.
• Minterms 10 to 15 are taken as
don’t‐care terms
• T2 = Q’8 Q1
• T4 = Q2 Q1
• T8 = Q8 Q1 + Q4 Q2 Q1
• Y = Q8 Q1
Registers
Register with parallel
load
2:1 Mux
Shift register
Shift register
Serial Transfer
Serial Addition
Serial Addition
e.g. Using Shift registers and J-K Flip Flop
Cin
Cout
Serial Addition
e.g. Using Shift registers and J-K Flip Flop
Universal Shift Register
4-bit binary counter with parallel load
4-bit binary counter with parallel load
• Load = 1:
Counter disabled and register enabled
• Count=1 and Load =0:
Counter is enabled and register disabled
• Load and Count = 0:
J and K are 0, Clk pulses do not change
the state of register
BCD counter using a counter with parallel load
Counter with Unused States
• To simplify the Flip Flop I/P equations, the unused states may be treated as
don’t‐care conditions or may be assigned specific next states.
• Care must be taken to ensure that in case the circuit goes into one of the
unused states, there is a way out to get it back into the valid states to resume
normal operation.
How to make sure?
After the circuit is designed, make sure to check the effect
of counter going in one of the unused states.
Counter with Unused States
It excludes: 111 and 011
Counter with Unused States
Ring Counter
Johnson Counter
DC
What happens if it goes into a unused state?
It keeps moving from 1 unused state to
other!
To correct this error:
DC= (A+C)B
(work it out to check if it solves the problem!)
Johnson Counter
Applications
1. Davies Generator
Generates stepped sinusoid O/P
2. Frequency Divider
3. Pattern Recognition
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