Electronic Devices
Additional questions and exercises
Diego Valsesia
Michele Penna
Wang Ruiyu
Marco Colangelo
Martina Fogliato
Matteo Alasio
Gerardo Castagno
Nicola Maronese
January 13, 2022
Politecnico di Torino
Contents
1 Semiconductors at thermal equilibrium
1.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1.1 Notes on units of measurement . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
3
5
5
7
2 Semiconductors out of thermal equilibrium
2.1 Mobility and conductivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.2 Notes on units of measurement . . . . . . . . . . . . . . . . . . . . . . . .
2.1.3 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Drift-diffusion model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.2 Notes on units of measurement . . . . . . . . . . . . . . . . . . . . . . . .
2.2.3 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.4 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Non-homogeneous materials and Poisson equation . . . . . . . . . . . . . . . . .
2.3.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.2 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
15
15
15
16
20
20
21
21
23
32
32
33
3 pn junctions
3.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
35
35
38
41
4 Bipolar junction transistors
4.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
61
61
63
65
5 MOS system and MOSFETs
5.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
81
81
84
86
6 Technology
99
6.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
6.2 Review questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
6.3 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
7 MS junctions and Schottky diodes
107
7.1 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
1
1 Semiconductors at thermal equilibrium
1.1 Summary
In semiconductors, at T = 0 K the valence band (VB) is filled with electrons and the conduction
band (CB) is empty. The width of the forbidden band, located between CB and VB, is called energy gap (Eg ). At temperatures above absolute zero, the CB is populated by some free electrons
and the VB by some free holes. In intrinsic (non-doped) semiconductors, the concentrations of
free electrons and holes are equal because electrons and holes are generated in pairs:
n = p = ni
where ni is the intrinsic carrier density.
In general, it is possible to demonstrate that the free carrier densities, in non-degenerate
semiconductors and at thermal equilibrium, are:
Ec − EF
n = Nc exp −
(1.1.1)
kB T
EF − Ev
p = Nv exp −
(1.1.2)
kB T
where EF is the Fermi level, Ec the bottom of the CB, Ev the top of the VB, and Nc , Nv are
the effective densities of states in the conduction and valence bands.
Although the concentrations of carriers depend on Fermi level EF , in a non-degenerate semiconductor at thermal equilibrium the product np does not depend on the position of the Fermi
level. This is the mass action law, typical of systems governed by Boltzmann statistics. Therefore, we have:
Eg
Ec − Ev
np = Nc Nv exp −
= Nc Nv exp −
kB T
kB T
When we have an intrinsic semiconductor, we know that n = p = ni ; this implies that:
np = n2i
(1.1.3)
This is the mathematical expression for the mass action law. Notice that the np product is
independent of any possible dopant concentration, making this law valid also in doped semiconductors.
The mass action law gives us an explicit expression for ni :
p
Eg
ni = Nv Nc exp −
(1.1.4)
2kB T
The position of the intrinsic Fermi level with respect to the valence band is
EFi − Ev =
Eg
kB T
Nc
−
log
2
2
Nv
(1.1.5)
Semiconductors can be doped using donors (e.g. P, As) or acceptors (e.g. B, Al). Donors
belong to the group V of the periodic table and, therefore, own an electron more than Si (or
any group-IV atom). They are used to increase the free electron concentration: when a group-V
3
1 Semiconductors at thermal equilibrium
atom replaces one of the group-IV in the lattice, four electrons form covalent bonds with the
neighboring atoms. The fifth electron, weakly bonded to the atom, is easily released (at 300 K)
as the thermal energy is higher than the bond energy. This process results in a free electron in
the conduction band and in a fixed positively ionized impurity (P+ , As+ ). Instead, acceptors
belong to the group III, owning an electron less than Si (or any group-IV atom). They are
used to increase the hole concentration. When a group-III atom replaces a group-IV atom in
the lattice an additional electron is needed to complete the four covalent bonds. This electron
is extracted from the valence band, where a free hole is created; a negatively ionized impurity
(B− ,Al− ) is also created.
In doped semiconductors, n and p can be computed by solving the system formed by the mass
action law and the electroneutrality equation:
(
np = n2i
(1.1.6)
+
p + ND
= n + NA−
+
where ND
and NA− are respectively the ionized donors and acceptors. The solutions of the
system are:
2
q +
+
ND − NA− + 4n2i
ND
− NA− +
n2
+
, p = i if ND
> NA−
n=
(1.1.7)
2
n
q
+ 2
+
+ 4n2i
NA− − ND
+
NA− − ND
n2
+
, n = i if NA− > ND
(1.1.8)
p=
2
p
These results are always valid, but should be used when the semiconductor is partially com+
− NA− ni , we can
pensated or when the ionization incomplete. Notice that if |N + | = ND
use these approximated formulas, which provide satisfactory results:
n2i
+
(1.1.9)
> NA−
if ND
n
n2
+
p ≈ N + , n = i if NA− > ND
(1.1.10)
p
Instead, when N + = 0, the semiconductor is said to be compensated and the concentrations
of carriers are equal to ni . Recall that the more abundant charge carriers are called majority
carriers, while the others are called minority carriers.
Shockley’s equations are alternative expressions for n and p:
EF − EFi
n = ni exp
(1.1.11)
kB T
EFi − EF
p = ni exp
(1.1.12)
kB T
These equations are very useful, as they allow a direct evaluation of the energetic difference
between the Fermi level and the intrinsic Fermi level:
n
(1.1.13)
EF − EF i = kB T log
ni
p
EF i − EF = kB T log
(1.1.14)
ni
If we sum these two equation and we rearrange the terms, we can get another expression of
EF − EF i as function of both n and p:
kB T
n
log
(1.1.15)
EF − EF i =
2
p
n ≈ N+ , p =
Recall that if a semiconductor is of type n (n-doped, n p), the Fermi level is above the
intrinsic Fermi level (EF − EF i > 0). If a semiconductor is of type p (p-doped, p n), the
Fermi level is below the intrinsic Fermi level (EF − EF i < 0).
4
1.2 Review questions
1.1.1 Notes on units of measurement
Carrier densities (n, p and ni ), effective densities of states (NC and NV ) and dopant concentrations (ND and NA ) are generally expressed in cm−3 .
The Fermi level EF , the intrinsic Fermi level EF i , the top of the valence band EV , the bottom of
the conduction band EC and the gap Eg are usually expressed in eV, where 1eV = 1.6 × 10−19 J
and it is defined as the amount of energy acquired by one electron while moving across an electric
potential difference of 1 V.
Recall that kB T |T =300 K ≃ 26 meV and for intrinsic semiconductors EF = EF i .
1.2 Review questions
Question 1.1
In a semiconductor material doped with acceptor impurities, the ionization of a doping atom
corresponds to:
(a) the capture of an electron from the valence band
(b) the generation of a hole in the conduction band
(c) the generation of a fixed positive charge
(d) the generation of an electron in the conduction band.
Solution
The correct answer is letter (a): when an acceptor (group-III atom) substitutes a group-IV
atom, to complete the four covalent bonds it needs an electron more that is extracted from the
valence band.
Question 1.2
Germanium (which belongs to the IV group of the periodic table) can be n-doped with:
(a) atoms of the V group of the periodic table, which capture electrons from the valence band
(b) atoms of the III group of the periodic table, which capture electrons from the valence band
(c) atoms of the V group of the periodic table, which release electrons in the conduction band
(d) atoms of the III group of the periodic table, which release electrons in the conduction
band.
Solution
The correct answer is letter (c): when an donor (group-V atom) substitutes a group-IV atom,
it completes the four covalent bonds and, due to thermal energy, it releases the fifth electron,
weakly bonded.
Question 1.3
The distance between the intrinsic Fermi level E F i and the Fermi E F level in a semiconductor
sample
(a) is a function of the doping densities
(b) is a function of the temperature
(c) is a function of the applied voltage.
5
1 Semiconductors at thermal equilibrium
Solution
The correct answers are letter (a) and letter (b): as we can see from the result (1.1.15) the
EF − EF i is function of both temperature and doping densities.
Question 1.4
The energy gap of Si and Ge is 1.2 eV and 0.6 eV, respectively, while their effective densities of
states are approximately the same. At the temperature T = 77 K, the intrinsic carrier density:
(a) is the same in both semiconductors
(b) is larger in silicon
(c) is larger in germanium
(d) is a function of the doping level.
Solution
h
i
−E
The correct answer is letter (c): the intrinsic carrier density is proportional to exp 2kB gT .
Therefore, as in germanium the energy gap is smaller than in silicon, the intrinsic carrier density
in Ge is higher than in Si.
Question 1.5
In a uniform, p-doped semiconductor sample at thermal equilibrium, the product of the electron
concentration in the conduction band and of the hole concentration in the valence band
(a) is a function of the doping density only
(b) is a function of doping density and energy gap
(c) is a function of doping density and temperature
(d) is independent of the concentration of dopant impurities.
Solution
The correct answer is letter (d): at thermal equilibrium the product np = n2i is constant and
therefore independent of the electron and hole concentrations.
Question 1.6
The doping level of n-type silicon is ND = 1016 cm−3 :
1. List the type of charges that exist in this sample and determine their concentration.
2. What is the net charge concentration?
Solution
Inside a doped semiconductor we can generally find free carriers (electrons and holes) and ionized
dopants. The concentration of carriers can be determined as follows:
+
n ≈ ND
= 1016 cm−3
p=
n2i
1020
= 16 cm−3 = 104 cm−3
n
10
The net charge concentation is zero: at thermal equilibrium electroneutrality equation holds
+
p + ND
− (n + NA− ) = 0
6
1.3 Exercises
Question 1.7
There are two types of current carriers in semiconductors (free electrons and holes) and only
one type in metals, yet metals are much better conductors of electric current. Is this because
electrons and holes oppose each other? If no, what is the reason?
Solution
No, the contributions from holes and electrons sum up but metals are better conductors thanks
to the metallic bond where the outer electrons form a gas of nearly free particles, available as
current carriers. In semiconductors only the free electrons in the conduction band and the holes
in the valence band are available as carriers.
Question 1.8
Describe the band structure of semiconductors and insulators: which is the main difference
between them?
Solution
The profile of band structure is the same for both semiconductors and insulators. We have a
valence band populated by free holes and a conduction band populated by free electrons. What
distinguishes them is basically the energy gap Eg : given temperature, densities of states and intrinsic concentration, the energy gap of an insulator is much wider than the one of semiconductor
(e.g. at 302 K the Eg of GaAs is 1.42 eV while the Eg of diamond is 5.5 eV).
Question 1.9
In the carrier-gas model, what is the kinetic energy of an electron at the bottom of the conduction
band? What is the kinetic energy of a hole at the top of the valence band?
Solution
In both cases the kinetic energy is zero. The energy of electrons increases as they move above
Ec inside the conduction band, while the energy of holes increases as they move below Ev inside
the valence band.
Question 1.10
What is the difference between the density of electron states Ne (E) and the electron concentration n?
Solution
R +∞
We can recall the relationship n = Ec Ne (E) · f (E)dE where f (E) is the Fermi-Dirac distribution. So, the density of states Ne indicates how many states are available for electrons (occupied
or not), while the electron concentration n gives the density of occupied states.
1.3 Exercises
Exercise 1.1
A semiconductor (Nc = Nv = 1 × 1019 cm−3 ) has an energy gap Eg = 1.5 eV. Compute the
intrinsic carrier density ni at T = 300 K.
Solution
The intrinsic carrier density can be computed by using formula 1.1.4.
p
Eg
ni = NC NV exp −
= 2.967 × 106 cm−3
2kB T
Notice that, since Eg is given in eV, also kB T must be expressed in eV. Recall that 1 eV =
1.602 × 10−19 J and kB T = 26 meV at room temperature (T = 300 K).
7
1 Semiconductors at thermal equilibrium
Exercise 1.2
Compute the intrinsic carrier density in a semiconductor with the following band gaps: a) 1 eV,
b) 5 eV. Suppose that T = 300 K and that the effective density of states of the conduction and
valence bands are Nc ≈ Nv = 1018 cm−3 .
Solution
To solve this exercise we simply apply the intrinsic carrier density results obtained in 1.1.4:
p
Eg
.
ni = NC NV exp −
2kB T
Solving for the 2 cases,
a) ni = 4.4482 × 109 cm−3 ,
b) ni = 1.7415 × 10−24 cm−3 .
A quick analysis of the results shows the strict dependence of the intrinsic concentration on the
energy gap.
Exercise 1.3
A semiconductor is p-doped with acceptor concentration NA = 1 × 1017 cm−3 and has an
intrinsic carrier density ni = 1 × 108 cm−3 . Assuming that the energy gap is Eg = 1.5 eV ,
the effective densities of states of the valence and conduction bands equal (Nc = Nv ) and the
acceptor atoms completely ionized, compute the free electron and hole densities and the Fermi
level at T = 300 K.
Solution
In general, the majority carrier density can be approximated with the concentration of dopants
if and only if:
• complete ionization holds, i.e. all the donors/acceptors are completely ionized;
• the net concentration of doping atoms is much greater than the intrinsic concentration,
i.e. |ND − NA | ni .
In this case the semiconductor is positively doped, the dopants are completely ionized and so
NA− = NA ni . Therefore, we can approximate the concentration of holes with the concentration of dopants: p = NA− . Then, we apply the mass action law 1.1.3 and we compute the
minority carrier concentration (in this case electrons):
n=
n2i
= 1 × 10−1 cm−3
p
Since NC = NV , we know that the intrinsic Fermi level is in the middle of the gap and so we
can use the equation 1.1.15 in order to determine the position of the Fermi level with respect to
the intrinsic Fermi level:
EF − EF i =
n
kB T
log = −0.539 eV
2
p
Notice that this result is consistent, as the difference EF − EF i is negative. This implies that
the Fermi level is located below the intrinsic Fermi level, in accordance with the fact that the
semiconductor is positively doped.
8
1.3 Exercises
Exercise 1.4
A semiconductor has NA = 1 × 1014 cm−3 , ni = 1 × 1012 cm−3 , Eg = 1.1 eV, Nc = Nv .
Find the distance between the intrinsic Fermi level and the Fermi level at thermal equilibrium
(T = 300 K).
Solution
The solution technique is the same described in the problem 1.6: assuming complete ionisation,
n2
because |ND − NA | ni , so NA = NA− = p = 1014 cm−3 and n = i = 1010 cm−3 .
p
Using then result 1.1.15 we get the position of the Fermi level: EF − EF i = kB2T ln np =
−0.119 eV.
Exercise 1.5
A semiconductor is doped with NA = 5 × 1017 cm−3 and has an intrinsic carrier density ni =
1010 cm−3 . Compute the electron and hole densities at thermal equilibrium and the position of
the Fermi level at 300 K, assuming an energy gap Eg = 1.2 eV and that the effective densities
of states of the valence and conduction bands are approximately equal (Nc ≈ Nv ).
Solution
The procedure is exactly the same as in the previous exercise.
p ≈ NA
n2i
= 2 × 102 cm−3
p
EF i − Ev = Eg /2 = 0.6 eV
EF − EF i
kB T
n
n = ni exp
→ EF − EF i =
ln
kB T
2
p
EF − EF i = −0.4609 eV
n=
In general, we can notice that the result obtained (EF −EF i negative) is absolutely in accordance
with the data given.
Exercise 1.6
Compute the electron and hole densities at thermal equilibrium and the position of the Fermi
level in a GaAs sample (Eg = 1.41 eV) at 300 K, uniformly doped with NA = 1 × 1015 cm−3 ,
ND = 1 × 1017 cm−3 , knowing that the intrinsic carrier density is ni = 1.5 × 108 cm−3 . Suppose
that the effective densities of states of the valence and conduction bands are approximately equal
(Nc ≈ Nv ).
Solution
In this case the sample is doped with both donors and acceptors, and therefore we would say
that it is partially compensated. Actually the density of donors ND is two order of magnitude
bigger than the density of acceptors NA , and thanks to this particular condition we can apply
the result 1.1.7 making an approximation (given the temperature of T=300 K, we can suppose
complete ionization of the dopants):
n=
+
ND
− NA−
+
q
+
ND
− NA−
2
p=
2
+ 4n2i
+
≈ ND
− NA− = 9.9 × 1016 cm−3
n2i
= 0.2273 cm−3
n
9
1 Semiconductors at thermal equilibrium
Using then result 1.1.15 we get the position of the Fermi level:
n
kB T
= 0.5288 eV
ln
EF − EF i =
2
p
Again we can see it’s located at a higher position than the intrinsic Fermi level in accordance
to the doping densities.
Exercise 1.7
Given a partially compensated silicon sample with NA = 1 × 1016 cm−3 , ND = 1 × 1015 cm−3
and Eg = 1.12 eV, find the electron and hole densities and the position of the Fermi level. Then,
draw the energy band diagram. Suppose that T = 300 K, ni = 1.5 × 1010 cm−3 , and that the
effective densities of states of the valence and conduction bands are approximately equal.
Solution
In this case the sample is partially compensated (doped with both donors and acceptors in
relevant concentrations). Therefore, we can use the result 1.1.8 obtained by solving the system
of the mass action law and the electroneutrality equation. In our case NA > ND :
q
(NA − ND ) + (NA − ND )2 + 4n2i
p=
≈ NA − ND = 9 × 1015 cm−3
2
n = n2i /p = 2.5 × 104 cm−3
Finally, we can use equation 1.1.15 to find:
kB T
ln
EF − EF i =
2
n
= −0.35 eV
p
where the intrinsic Fermi level EF i is located at the midgap, as Nc ≈ Nv . Notice that the Fermi
level is shifted downward with respect to the intrinsic Fermi level, meaning that the sample is
positively doped.
0 .5 6 e V
1 .2 e V
E C
0 .3 5 e V
E Fi
E F
E V
Figure 1.1: Band diagram at thermal equilibrium (Exercise 1.7)
Exercise 1.8
Consider a sample of HgCdTe alloy at T = 77 K (Eg = 0.3 eV, Nc = 1017 cm−3 , Nv = 1019 cm−3 )
uniformly doped with ND = 5 × 1016 cm−3 .
10
1.3 Exercises
1. Compute the intrinsic carrier density ni at T = 77 K and T = 300 K (consider the
dependence on T of Eg , Nc , Nv negligible).
2. Compute the carrier densities n0 , p0 at thermal equilibrium at T = 77 K, assuming the
complete ionization of dopants.
3. Draw the energy band diagram at T = 77 K, reporting the distance between the Fermi
level EF and the bottom of the conduction band, the top of the valence band and the
intrinsic Fermi level.
Solution
To compute the intrinsic carrier density ni we can use the result 1.1.4. The exercise asks to
compute ni in two different cases: when T = 300 K and when when T = 77 K. First of all, recall
that kB T at T = 300 K is approximately equal to 26 meV. We can use a simple proportion:
kB T |300 K : 300 K = kB T |77 K : 77 K
26 meV : 300 K = kB T |77 K : 77 K
26 meV × 77 K
kB T |77 K =
= 6.67 meV
300 K
Now we can use result 1.1.4 and compute
ni |300 K = 3.12 × 1015 cm−3
ni |77 K = 1.73 × 108 cm−3
Using the mass action law, remembering ND = 5 × 1016 cm−3 is equal to n0 as the ionization is
complete:
p0 |77 K =
ni |277 K
= 0.59 cm−3
ND
As Nc and Nv are different we cannot say the the intrinsic Fermi level EF i is located at midgap.
We can calculate using 1.1.5 the position of the instrinsic Fermi level with respect to the valence
band:
EF i − Ev = Eg /2 −
kB T
Nc
ln
= 0.165 eV
2
Nv
Now we can use result 1.1.15 to compute EF − EF i :
EF − EF i =
kB T
n
ln = 0.130 eV
2
p
Using this result we can compute:
EF − Ev = (EF − EF i ) + (EF i − Ev ) =
= (0.130 + 0.165) eV = 0.295 eV
Ec − EF = Eg − (EF − Ev ) =
= (0.3 − 0.295) eV = 0.005 eV
11
1 Semiconductors at thermal equilibrium
E C
0 .1 3 0 e V
0 .2 9 5 e V
0 .3 e V
E F
0 .1 6 5 e V
E Fi
E V
Figure 1.2: Band diagram at thermal equilibrium (Exercise 1.8)
Exercise 1.9
Compute the electron and hole densities at thermal equilibrium and the position of the Fermi
level in a Si sample (Eg = 1.12 eV) at 300 K, uniformly doped with NA = 1 × 1015 cm−3 ,
ND = 1 × 1017 cm−3 , knowing that the intrinsic carrier densiy is ni = 1.5 × 1010 cm−3 . Suppose
that the effective densities of states of the valence and conduction bands are approximately equal
(Nc ≈ Nv ).
Solution
As we can notice, the sample is doped with both donors and acceptors, and therefore we would
say that it is partially compensated. Actually, the density of donors ND is two orders of magnitude bigger than the density of acceptors NA and, due to this particular condition, we can
apply the result 1.1.7 making an approximation:
n=
q +
2
+
− NA− +
ND
ND − NA− + 4n2i
2
p=
+
≈ ND
− NA− = 9.9 × 1016 cm−3
n2i
= 2.273 × 103 cm−3
n
Then, using the result 1.1.15 we get the position of the Fermi level:
kB T
n
EF − EF i =
ln
= 0.408 eV
2
p
Again we can see that it is located at a higher position than the intrinsic Fermi level, in accordance with the doping densities.
Exercise 1.10
A sample of HgCdTe alloy at T = 300 K (band gap Eg = 0.3 eV, effective density of states of the
conduction and valence bands Nc = 1017 cm−3 , Nv = 1019 cm−3 ) is uniformly doped with donor
density ND = 5 × 1015 cm−3 and acceptor density NA = 1 × 1015 cm−3 (partially compensated
semiconductor).
1. Compute the intrinsic carrier density ni at T = 300 K.
12
1.3 Exercises
2. Compute the electron and hole densities n0 , p0 at thermal equilibrium at T = 300 K,
assuming complete ionization.
3. Draw the band diagram at thermal equilibrium at T = 300 K, reporting the distance
between the Fermi level EF and the intrinsic Fermi level.
Solution
1. The intrinsic carrier density can be computed by using the result 1.1.4:
p
Eg
= 3.122 × 1015 cm−3
ni = Nc Nv exp −
2kB T
2. In this case the sample is doped with both donors and acceptors, so the carrier densities
+
can be found using the result 1.1.8. In our case NA− < ND
:
q
+
+
(ND
− NA− ) + (ND
− NA− )2 + 4n2i
n=
= 5.708 × 1015 cm−3
2
p = n2i /n = 1.708 × 1015 cm−3
3. The distance between the intrisic Fermi level and the Fermi level can be found using result
1.1.15:
kB T
n
EF − EF i =
ln
= 0.016 eV
2
p
and we can calculate the distance between intrinsic Fermi level EF i and valence band using
1.1.5
EF i − Ev =
Eg
kb T
Nc
−
ln
= 0.21 eV
2
2
Nv
4. The band diagram is shown in Figure 1.3 notice that the Fermi level is shifted UPward
with respect to the intrinsic Fermi level, meaning that the sample is negatively doped.
0 .0 9 e V
0 .3 e V
E C
E F
0 .0 1 6 e V
E Fi
E V
Figure 1.3: Band diagram at thermal equilibrium (Exercise 1.10)
13
2 Semiconductors out of thermal equilibrium
2.1 Mobility and conductivity
2.1.1 Summary
An applied electric field E induces a drift current. The carrier velocity is constant when a
constant field is applied, and it is proportional to E in low-field conditions through the mobility
µ: in particular vn,drift = −µn E and vp,drift = µp E (with µp ,µn > 0). It instead tends to saturate
for high values of E. By simple computations we may get to the following result:
Jdrift = Jn,drift + Jp,drift
= −qnvn,drift + qpvp,drift
= qnµn E + qpµp E
(2.1.1)
= (σn + σp )E
= σE
where σ is called conductivity:
σ = σp + σn
and σp and σn are the conductivity of holes and electrons respectively, and are defined as:
σp = qµp p
σn = qµn n
A carrier concentration gradient causes instead a diffusion current:
Jdiffusion = Jn,diff + Jp,diff
(2.1.2)
∂n
∂p
= qDn
− qDp
∂x
∂x
where D is the diffusion coefficient, which is related to the mobility by the Einstein relation
D=
kB T
µ
q
(2.1.3)
2.1.2 Notes on units of measurement
In the exercises section the following units of measurement will be commonly used:
• mobility µ,
cm2
= cm2 (Vs)−1
S
• conductivity σ, cm
= S cm−1
• resistivity ρ, Ω cm
−1
• electric field E, kV
=
kV
cm
cm
Vs
• diffusion Jdiff and drift Jdrift current densities ,
2
• diffusion coefficient D, cms = cm2 s−1
• drift velocity vdrift , cm
s
A
cm2
= A cm−2
15
2 Semiconductors out of thermal equilibrium
2.1.3 Exercises
Exercise 2.1.1
A sample of GaAs at T = 300K (Eg = 1.42eV; effective density of states Nc = 4.7 × 1017 cm−3 ,
Nv = 9.0 × 1018 cm−3 ; diffusion coefficients Dn = 200 cm2 /s, Dp = 10 cm2 /s) is doped with
NA = 1017 cm−3
1. Compute the carrier densities n0 , p0 at thermal equilibrium.
2. Compute the conductivity of the sample at thermal equilibrium.
Solution
First of all, we have to compute the intrinsic carrier density ni using result (1.1.4):
Eg
2
= 8.076 × 1012 cm−6
ni = Nc Nv exp −
kB T
Notice that NA ni ; moreover, assuming the complete ionization of the acceptor, we can make
the following approximation
p0 ≈ NA = 1 × 1017 cm−3
Since we are at thermal equilibrium, we can apply the mass action law and evaluate the free
electron density:
n0 = n2i /p0 = 8.076 × 10−5 cm−3
Using the Einstein relation we can relate the diffusion coefficient to the mobility and compute
it:
kB T0
µn0 = VT µn0
q
kB T0
µp0 = VT µp0
Dp =
q
Dn =
→
µn0 = 7692.3 cm2 /(Vs)
→
µp0 = 384.62 cm2 /(Vs)
Recall that, at 300K, VT = 26mV. We can then compute the values of the conductivity:
σn = nqµn0 = 9.95 × 10−20 Scm−1
σp = pqµp0 = 6.16 Scm−1
The total conductivity can be expressed as σ = σn + σp , but in this case we notice that σn σp ;
this is due to the fact that the density of majority carriers (holes) is much greater than the one
of minority carriers (electrons),and therefore we can approximate the conductivity to σ ≈ σp =
6.15 Scm−1
Exercise 2.1.2
Intrinsic germanium has the following resistivity ρI = 57Ωcm at room temperature, while ndoped germanium with ND = 1.0 × 1014 cm−3 has resistivity ρE = 16Ωcm. Compute the
electron and hole mobility. (Material parameters at 300K: Eg = 0.661eV, Nc = 1.0 × 1019 cm−3 ,
Nv = 5.0 × 1018 cm−3 .)
Solution
We start computing the intrinsic carrier density:
Eg
2
= 4.548 × 1026 cm−6
ni = Nc Nv exp −
kB T
16
2.1 Mobility and conductivity
Since ND ≈ ni we cannot approximate n ≈ ND . We must instead solve this system of
equations:
(
+
p + ND
=n
2
ni = np
obtaining:
nE =
ND +
q
2 + 4n2
ND
i
= 1.04 × 1014 cm−3
2
n2
pE = i = 4.36 × 1012 cm−3
nE
Knowing that in an intrinsic sample of a semiconductor n = p = ni , we can solve the following
equations to find the mobility of electrons and holes:
σI = ρ−1
I = q(µn ni + µp ni )
σE = ρ−1
E = q(µn nE + µp pE )
They can also written in matrix form:
ni ni
µn
σI
q
=
nE p E
µp
σE
obtaining µp = 1457.1 cm2 /(Vs) and µn = 3677.1 cm2 /(Vs)
Exercise 2.1.3
Compute the conductivity σ of a uniform Si sample (Eg = 1.12eV), which is partially compensated with acceptors NA = 1 × 1016 cm−3 , and donors ND = 5 × 1015 cm−3 . Parameters:
300K, intrinsic carrier density ni = 1.5 × 1010 cm−3 , electron mobility µn = 1200cm2 /(Vs) hole
mobility µp = 600cm2 /(Vs). Assume that the effective densities of states in the valence and
conduction band are approximately equal.
Solution
Having both acceptors and donors, in order to find n and p we have to solve the system of
electroneutrality equation and mass action law (1.1.6). In general we can apply formula (1.1.8):
q
+ 2
+
) + 4n2i
(NA− − ND
) + (NA− − ND
+
≈ NA− − ND
= 5 × 1015 cm−3
p=
2
n2
n = i = 4.5 × 104 cm−3
p
The conductivity results to be mainly due to holes σ ≈ σp = qpµp = 0.48Scm−1
Exercise 2.1.4
Consider a sample of GaAs at T = 300K (parameters: band gap Eg = 1.424eV, effective
density of states Nc = 4.7 × 1017 cm−3 , Nv = 9.0 × 1019 cm−3 , electron and hole mobility
µn = 8500cm2 /(Vs), µp = 400cm2 /(Vs)).
1. Compute the intrinsic carrier density ni at T = 300K.
17
2 Semiconductors out of thermal equilibrium
2. Compute the conductivity and resistivity of the intrinsic sample at T = 300K.
3. Doping the sample with a uniform distribution of acceptors NA = 1.0 × 1016 cm−3 , determine the electron and hole density n0 , p0 at thermal equilibrium at T = 300K (assume
complete ionization).
4. Compute the conductivity and resistivity of the doped sample at T = 300K.
5. Draw the band diagram of the intrinsic sample and of the doped sample at thermal equilibrium at T = 300K, reporting the position of the Fermi level.
Solution
1 .4 2 4 e V
E C
E g /2 = 0 .7 1 2 e V
0 .7 8 0 e V
E Fi
E F
0 .2 3 7 e V
E V
Figure 2.1: Band diagram at thermal equilibrium (Exercise 2.1.4)
1. We start computing the intrinsic carrier density using result (1.1.4):
p
Eg
ni = Nc Nv exp −
= 8.321 × 106 cm−3
2kB T
2. In an intrinsic sample n = p = ni , so σ = σn + σp = qni µn + qni µp = qni (µn + µp ) =
1.186 × 10−8 Scm−1 . Clearly ρ = σ −1 = 8.428 × 107 Ωcm
3. The sample is p-doped, with NA ni , hence the majority carrier density is:
p0 = NA
n0 =
n2i
p
= 6.924 × 10−3 cm−3
4. Being the sample p-doped with NA ni we have:
σ ≈ σp = qpµp = 0.641 Scm−1
1
ρp =
= 1.560 Ωcm
σp
18
2.1 Mobility and conductivity
5. The position of the intrinsic Fermi level is not in the middle of the forbidden band because
Nc 6= Nv . Therefore we must compute it using the formula (1.1.5):
Eg
Eg
kB T
Nc
=
−
ln
+ 0.068 = 0.780 eV
EF i − EV =
2
2
Nv
2
We now compute the position of the Fermi level inverting the formula for the computation
of the concentration of free holes:
EF − Ev
p
p = Nv exp −
⇒ EF − Ev = −kB T ln
= 0.237 eV
kB T
Nv
The band diagram of intrinsic and doped hole is shown in the Figure 2.1.
Exercise 2.1.5
A photoconductor is made of a thin layer of GaAs (Eg = 1.42eV, ni = 2.1 × 106 cm−3 at
T = 300K) with electron and hole mobility µn = 8500cm2 /(Vs) and µp = 400cm2 /(Vs), n-doped
with ND = 1016 cm−3 and it has the following geometry: length L = 3cm, width W = 0.5mm,
thickness T = 10µm.
1. Compute the resistance of the device with no light source shining on it.
2. When the device is illuminated with a monochromatic light with photons having an energy
greater than the energy gap, the resistance is R = 1 kΩ. In such conditions, assuming
that the density of the excess carriers generated by the process of illumination is uniform
throughout the device, discuss whether the hypothesis of low-level injecton holds.
Solution
1. The sample is n-doped with ND ni so the majority carrier density is n ≃ ND . We use
the mass action law to find the minority carrier density:
p0 =
n2i
n2
= i = 4.41 × 10−4 cm−3
n0
ND
The conductivity is mainly due to electrons (low concentration of holes), so:
σo ≈ σn = qn0 µn = 13.6 Scm−1
Therefore, the resistance under no illumination is:
Ro =
1 L
= 4.4 kΩ
σo W T
2. When the light shines we have the value of the resistance and so we can compute the
conductivity as:
RI =
1 L
σI W T
⇒
σI =
1 L
= 60 Scm−1
RI W T
In non-equilibrium conditions the carrier densities are expressed by the following relationships:
n = n0 + n0
p = p0 + p0
19
2 Semiconductors out of thermal equilibrium
where n0 and p0 are the excess carriers generated due to the incident light; these are roughly
in the same measure: n0 ≈ p0 (quasi-neutrality condition).
The conductivity can be obtained as:
σI = q(nµn + pµp ) = q[(n0 + n0 )µn + (p0 + p0 )µp ] ≈ qn0 (µn + µp ) + σo
from which we can solve for n0 :
n0 =
σI − σo
= 3.25 × 1016 cm−3
q(µn + µp )
Since n0 > n0 , we have high-level injection.
2.2 Drift-diffusion model
2.2.1 Summary
We have already introduced drift and diffusion currents in the previous section; let’s just remind
that:
J = Jn + Jp
∂n
∂x
∂p
Jp = Jp,drift + Jp,diffusion = σp E − qDp
∂x
Jn = Jn,drift + Jn,diffusion = σn E + qDn
Out of equilibrium, the carrier concentrations may be expressed as:
n(x, t) = n0 (x) + n0 (x, t)
0
p(x, t) = p0 (x) + p (x, t)
(2.2.1)
(2.2.2)
where n0 , p0 are the concentrations at equilibrium and n0 , p0 are the excess carriers concentrations. If n0 , p0 > 0 we have injection, otherwise depletion. If excess concentrations are significant
only if compared to the minority carrier density at equilibrium, we have the so called low-level
injection. If n0 ≈ p0 we have quasi-neutrality.
The net recombination rate in case of direct generation/recombination is
U = R − G = αR (np − n2i )
(2.2.3)
where αR is the recombination coefficient.
Assuming we are in low-level injection condition, the net recombination coefficient can be expressed using the following expressions:
n0
τn
0
p
n-type doping ⇒ Up ≈ αR n0 p0 =
τp
p-type doping ⇒ Un ≈ αR p0 n0 =
(2.2.4)
(2.2.5)
where τ is the minority carrier lifetime.
Under the carrier lifetime approximation, the continuity equations for electron and hole densities are:
∂n
1 ∂Jn
=
− Un
(2.2.6)
∂t
q ∂x
∂p
1 ∂Jp
=−
− Up
(2.2.7)
∂t
q ∂x
(2.2.8)
20
2.2 Drift-diffusion model
which have to be solved exploiting Poisson’s equation:
q
∂2ϕ
+
= − (p − n + ND
− NA− )
∂x2
where ϕ is the electric potential.
In the simplest case (constant mobility and diffusivity) the two continuity equations become:
∂(nE)
∂ 2 n n − n0
∂n
= µn
+ Dn 2 −
∂t
∂x
∂x
τn
2
∂p
∂(pE)
∂ p p − p0
= −µp
+ Dp 2 −
∂t
∂x
∂x
τp
From the continuity equation, assuming steady-state conditions (parameters do not change
with time) and quasi-neutrality, it is possible to get the approximated solutions for the profile
of the excess minority carriers:
x
0
0
Long sample → L Ln ⇒ n (x) = n (0) · exp −
Ln
L
−
x
Short sample → Ln L ⇒ n0 (x) = n0 (0) ·
L
where the diffusion length is defined as
Ln =
p
Dn τn
We of course have a version also for holes:
x
Long sample → L Lp ⇒ p (x) = p (0) · exp −
Lp
L−x
Short sample → Lp L ⇒ p0 (x) = p0 (0) ·
L
0
0
where the diffusion length is defined as
Lp =
p
Dp τp
2.2.2 Notes on units of measurement
The diffusion lenghts (Ln and Lp ) are usually expressed in µm.
2.2.3 Review questions
Question 2.2.1
Is the linear relationship between the current density and the electric field (Ohm’s law) always
valid? What about the linear relationship between the current density and the drift velocity?
Solution
The linear relationship between current density and electric field is valid as far as the intensity
of the electric field is low (low-field approximation) and it is J = σE with constant mobility
µ. For high values of the electric field the velocity tends to saturate to vsat . The relationship
connecting the current density J and the electric field is J = σE = (qnµn + qpµp )E where
σ is the conductivity. For high electric fields the velocity saturates so that µ is no longer a
proportionality constant and we obtain J = qnvsat,n + qpvsat,p .
21
2 Semiconductors out of thermal equilibrium
Question 2.2.2
Is the Einstein relationship D = VT µ applicable to any electron-hole gas in semiconductors?
Solution
No, it cannot be applied to heavily doped semiconductors for which the electron-hole gas cannot
be approximated by the Maxwell-Boltzmann distribution.
Question 2.2.3
Can the total current density of electrons be zero if there is a nonzero gradient of electron
concentration?
Solution
Yes, it may happen that the drift current exactly compensates the diffusion current.
Question 2.2.4
Identify in case we have electrons:
(a) drift-current equation
(b) diffusion-current equation
(c) continuity equation
The list of options is:
1. J = qDn dn
dx
2. J = qnµn E
3. J = σ dn
dx
dn
4. dJ
dx = q dt
5. J = −qDn dϕ
dx
6. J = qDn nE
Solution
The correct matches are (a)-2 , (b)-1, (c)-4.
Question 2.2.5
An electric field E = 1Vµm−1 produces current density J = 0.8 × 109 Am−2 through an n-type
doped semiconductor (ND = 1017 cm−3 ). What will the current density be if the electric field
is increased five times, so that the electrons reach the saturation velocity vsat,n = 0.1µm/ps?
Choose among the following options:
1. 0
2. 0.8 × 109 Am−2
3. 1.6 × 109 Am−2
4. 4.0 × 109 Am−2
5. 3.2 × 109 Am−2
6. 8 × 109 Am−2
22
2.2 Drift-diffusion model
Solution
The correct answer is number 3. For high fields, and having an n-doped semiconductor:
J ≃ qND vsat,n
= 1.6 × 10−19 C · 1017 cm−3 · 0.1
10−4 cm
10−12 s
= 0.16 × 106 Acm−2
= 1.6 × 109 Am−2 .
Question 2.2.6
List the three most frequent pairs of generation and recombination mechanisms.
Solution
They are:
- Impact ionization (impact with electrons with enough kinetic energy)
- Phonon absorption/release (thermal ionization)
- Photon absorpion/release (EM ionization)
Question 2.2.7
Does the diffusion length depend on carrier recombination? If yes, how?
Solution
√
Yes, we can recall the following relationship: L = Dτ where τ is the minority carrier lifetime
which depends on the recombination coefficient αR
2.2.4 Exercises
Exercise 2.2.1
A uniform electric field E = 10Vm−1 directed towards positive x is applied to a homogeneous sample of a semiconductor (T = 300K, ni = 1 × 107 cm−3 , µn = 1000 cm2 (Vs)−1 ,
µp = 200 cm2 (Vs)−1 ), uniformly doped with donor density ND = 1 × 1017 cm−3 .
1. Compute the conductivity of the sample.
2. Compute the drift velocity and the corresponding current density J.
3. Compute the drift velocity and the current density J if the sample is p-doped instead of
n-doped, with acceptor density NA = 1 × 1017 cm−3 .
Solution
Let’s solve step by step all the requests of the exercise.
1. The sample is n-doped with ND ni , so n ≈ ND = 1 × 1017 cm−3 and, from the mass
action law we get p = n2i /n = 1 × 10−3 cm−3 . Therefore, the conductivity of the sample is
mainly due to electrons: σ ≈ σn = qnµn = 16 S/cm.
2. we can now compute the drift velocity and the current density:
vn (E) = −µn E = −100cm/s
Jn,drift = −qnvn (E) = σn E = 1.6A cm−2
23
2 Semiconductors out of thermal equilibrium
3. In the case of a p-doped sample with Na ni with p ≈ NA = 1 × 1017 cm−3 and
σ ≈ σp = qpµp , we can get:
vp (E) = µp E = 20 cm/s
Jp,drift = qpvp (E) = σp E = 0.32 A cm−2
Exercise 2.2.2
A homogeneous sample of a semiconductor (T = 300K, Eg = 1.2eV, Nc ≈ Nv , ni = 1×107 cm−3 ,
µn = 1000 cm2 (Vs)−1 , µp = 200 cm2 (Vs)−1 ) has length L = 500µm and is uniformly doped with
acceptor density NA = 1 × 1016 cm−3 .
1. Find the minority and majority carrier density at thermal equilibrium, assuming complete
ionization.
2. Determine the conductivity of the sample.
3. Determine the current density in the sample when a voltage of 5V is applied.
4. Draw the band diagram at thermal equilibrium, reporting the distance between the intrinsic Fermi level EF i and the Fermi level EF .
Solution
0 .6 e V
1 .2 e V
E C
0 .5 3 9 e V
E Fi
E F
E V
Figure 2.2: Band diagram at thermal equilibrium (Exercise 2.2.2)
Let’s solve step by step all the requests of the exercise.
1. The sample is p-doped, so p ≈ NA = 1 × 1016 cm−3 and from the mass action law we can
get n = 1 × 10−2 cm−3 .
2. The conductivity of the sample is σ = σn + σp ≈ σp = qpµp = 0.32 S cm−1 .
3. A voltage ∆V is applied at the ends of the homogeneous sample, therefore we have a
uniform electric field E = ∆V /L; in numbers E = 100 V cm−1 and the current density is:
Jdrift = Jn,drift + Jp,drift ≈ Jp,drift = qpvp (E) = qpµp E = 32 A cm−2
24
2.2 Drift-diffusion model
4. Being Nc ≈ Nv , the intrinsic Fermi level is at midgap and the distance can be computed
as:
p
= 0.539 eV
EF i − EF = kB T ln
ni
The band diagram is shown in figure 2.2.
Exercise 2.2.3
A uniform electric field E = 10Vm−1 directed towards positive x is applied to a homogeneous sample of a semiconductor (T = 300K, ni = 1 × 107 cm−3 , µn = 1000 cm2 (Vs)−1 ,
µp = 200 cm2 (Vs)−1 ), uniformly doped with donor density ND = 1 × 1017 cm−3 .
1. Compute the drift velocity and the corresponding current density J.
2. Compute the drift velocity and the corresponding current density in the following cases:
a) the sample is p-doped with acceptor density NA = 1 × 1017 cm−3 ;
b) the electric field has opposite direction, i.e towards negative x;
c) both (a) and (b) are verified.
Solution
Let’s solve step by step all the requests of the exercise.
1. Being the sample n-doped, the electron drift velocity is vn (E) = −µn E = −100 cm/s and
the corresponding current density is Jn,drift = −qnvn (E) = 1.6 A cm−2 .
2.
a) In this case the drift velocity for the holes is vp = µp E = 20 cm/s and the corresponding current density is Jp,drift = 0.32 A cm−2
b) Jn,drift = −1.6 A cm−2
c) Jp,drift = −0.32 A cm−2
Exercise 2.2.4
Knowing that the electron and hole mobilities in indium phosphide (InP) at T = 300 K are
µn = 0.54 m2 (Vs)−1 , µp = 0.02 m2 (Vs)−1 and that the saturation velocities are vn,sat ≈ vp,sat ≈
107 cm/s, compute the electric fields Esat,n , Esat,p for which the electron and hole velocities
saturate. (Tip: approximate the velocity-field curve with a piecewise linear function.)
Solution
Let’s consider absolute values of all quantities. Approximating vn (E) as:
(
µn E
for E ≤ Esat,n
vn (E) =
vn,sat for E ≥ Esat,n
we can obtain Esat,n as the value of the electric field where the linear relationship for the velocity
equals the saturation velocity:
µn Esat,n = vn,sat
⇒
Esat,n =
vn,sat
= 1.85 kV/cm
µn
⇒
Esat,p =
vp,sat
= 50 kV/cm
µp
In a similar way, for holes we have:
µp Esat,p = vp,sat
25
2 Semiconductors out of thermal equilibrium
Exercise 2.2.5
A silicon sample (ni = 1.5 × 1010 cm−3 , Eg = 1.14eV, Nc = Nv , µn = 1000 cm2 (Vs)−1 ) with
cross section 10µm2 and length 10µm is uniformly doped with donor density ND = 1017 cm−3
and acceptor density NA = 1016 cm−3 .
1. Determine the electron and hole density and the position of the Fermi level, assuming
complete ionization and thermal equilibrium.
2. Determine the value of the current flowing through the sample when a voltage of 1V is
applied to its ends.
3. Supposing that the saturation velocity for electrons is 107 cms−1 , compute the threshold
electric field Eth and the corresponding voltage that must be applied to reach the saturation
velocity.
4. Compute the concentration gradient needed to make the diffusion current compensate the
drift current at T = 400K (i.e. Jdrift = Jdiff at T = 400K).
Solution
Let’s solve step by step all the requests of the exercise.
1. In order to compute concentrations in case of partially compensated sample we can use
the result (1.1.7):
q
(ND − NA ) + (ND − NA )2 + 4n2i
n=
≈ ND − NA = 9 × 1016 cm−3
2
n2
p = i = 2.5 × 103 cm−3
n
Then, the position of the Fermi level can be computed through 1.1.15.
kB T
n
EF − EF i =
ln
= 0.406 eV
2
p
2. The current flowing through the sample can be computed approximating Jdrift ≈ Jn,drift
(actually the dominant contribution to conductivity is the one of the electrons). Since we
know the cross section, the length and the applied voltage, we can write:
I = Jdrift A = Aqnµn
V
= 1.44 mA
L
3. Setting vsat = µn Eth , we can get the threshold field Eth = 10 kV/cm.
4. To compute the concentration gradient we set the two current densities equal and solve
for the gradient:
|Jn,drift (Eth )| = qnvsat ≡ |Jn,diff (Eth )| = qDn
∂n
∂x
⇒
∂n
= 2.61 × 1022 cm−4
∂x
(recall that Dn = kBq T µn by the Einstein relation).
Exercise 2.2.6
An electric field E = 5kVcm−1 is applied to a sample of GaAs at T = 300K
26
2.2 Drift-diffusion model
1. Assuming a uniform electron concentration, equal to n = 2 × 1016 cm−3 , and that their
velocity is the saturation one vsat = 1.2 × 107 cms−1 , compute the drift current density.
2. Compute the concentration gradient ∂n
∂x (constant) needed to make the diffusion current
compensate the drift current previously computed. Use the diffusion coefficient corresponding to the low field electron mobility (µn0 = 8500 cm2 (Vs)−1 ).
Solution
Let’s solve step by step all the requests of the exercise.
1. Jn,drift = qnvsat = 3.845 × 104 A cm−2 .
2. |Jn,drift | ≡ |Jn,diff | = qDn ∂n/∂x. Using the Einstein relationship Dn = VT µn0 = 221 cm2 s−1 ,
we eventually get ∂n/∂x = 1.086 × 1021 cm−4 .
Exercise 2.2.7
A homogeneous sample of a semiconductor (T = 300K, Eg = 1.2eV, Nc ≈ Nv , ni = 1 ×
107 cm−3 , µn = 1000 cm2 (Vs)−1 , µp = 200 cm2 (Vs)−1 ) has length L = 200µm and it is uniformly
doped with donor density ND = 1×1016 cm−3 and acceptor density NA = 1×1017 cm−3 (partially
compensated semiconductor ).
1. Determine the electron and hole density assuming complete ionization and thermal equilibrium.
2. Determine the position of the Fermi level and draw the band diagram reporting the distance
between the Fermi level and the intrinsic Fermi level.
3. Determine the conductivity of the sample.
4. Determine the current density when a voltage of 5V is applied to the sample.
Solution
Let’s solve step by step all the requests of the exercise.
1. In order to compute concentrations in case of partially compensated samples we can use
the result (1.1.8):
q
(NA − ND ) + (NA − ND )2 + 4n2i
p=
≈ NA − ND = 9 × 1016 cm−3
2
n = 1/9 × 10−2 cm−3
2. The distance between the Fermi level and the intrinsic Fermi level is given by result
(1.1.14):
n
EF − EF i = kB T ln
= −0.596 eV
ni
and the band diagram is shown in figure 2.3.
3. σ ≈ σp = 2.88 S/cm
4. Jp,drift = σp V /L = 721 A cm−2
27
2 Semiconductors out of thermal equilibrium
1 .2 e V
E C
0 .6 e V
0 .5 9 6 e V
E Fi
E F
E V
Figure 2.3: Band diagram at thermal equilibrium (Exercise 2.2.7)
Exercise 2.2.8
A homogeneous silicon sample (T = 300K, Eg = 1.2eV, Nc ≈ Nv , ni = 1 × 1010 cm−3 , µn =
1000 cm2 (Vs)−1 , µp = 300 cm2 (Vs)−1 ) has length L = 10µm and it has been uniformly doped
with a donor density such that the resistivity at room temperature is ρ = 0.1Ωcm. Due to the
partial compensation caused by undesired acceptor impurities, the sample, albeit still n-doped
as expected, has a higher resistivity ρ0 = 0.2Ωcm.
1. Determine the donor density ND to have a resistivity equal to ρ if the silicon sample was
ideally intrinsic before doping.
2. Determine the density of undesired acceptors NA that brings about a resistivity ρ0 > ρ
after doping.
3. Draw the band diagram before and after doping.
4. Determine the current density when a voltage of 5V is applied to the doped sample.
5. Determine the electron and hole drift velocities assuming that the same voltage is applied.
Show, for each point, the assumptions made and the approximations used in the computations;
in particular, suppose the complete ionization of all the impurities in the sample.
Solution
Let’s solve step by step all the requests of the exercise.
1. Since we are assuming complete ionization, and ND ni , we can approximate the majority
carrier density with the net density of the dopants, i.e. the sample is n-doped with n = ND .
Therefore we can write:
σn =
1
= ND qµn
ρn
obtaining:
ND =
28
1
= 6.24 × 1016 cm−3
ρn qµn
2.2 Drift-diffusion model
2. Introducing acceptor atoms with density NA , we no longer have a majority carrier density
equal to ND , but the new density is n0 ≈ ND − NA . We therefore get:
n0 =
1
ρ0n qµn
= 3.12 × 1016 cm−3
obtaining:
NA = ND − n0 = 3.12 × 1016 cm−3
3. Before doping, the sample is unintentionally doped with acceptor density NA . Being
NA ni , we can approximate the majority carrier density with the dopants density
p = NA ; the position of Fermi level is obtained using result (1.1.13)
p
EF i − EF = kB T ln
= 0.389 eV
ni
The band diagram before doping is shown in figure 2.4.
1 .2 e V
0 .6 e V
E C
0 .3 8 9 e V
E Fi
E F
E V
Figure 2.4: Band diagram at thermal equilibrium of exercise 2.2.8 before doping
After doping, the sample is n-doped , and the position of the Fermi level with respect to
the intrinsic Fermi level is:
0
n
EF − EF i = kB T ln
= 0.389 eV
ni
The band diagram after doping is shown in figure 2.5
4. Since the sample is homogeneous, the electric field is constant inside and we can compute
it from the voltage as:
E=
V
= 5 kV cm−1
L
then getting the drift current as:
Jn,drift = −qn0 vn (E) = qn0 µn E = σn0 E =
E
= 25 × 103 A cm−2
ρ0n
5. We can now compute the velocities of carriers:
vn (E) = −µn E = −5 × 106 cm s−1
vp (E) = µp E = 1.5 × 106 cm s−1
29
2 Semiconductors out of thermal equilibrium
E C
E Fi
0 .6 e V
1 .2 e V
0 .3 8 9 e V
E F
E V
Figure 2.5: Band diagram at thermal equilibrium of exercise 2.2.8 after doping
Exercise 2.2.9
In a sample of a p-doped semiconductor, the expected lifetime and the mobility of the minority
carriers are 1 ns and 1500 cm2 (Vs)−1 . In x = 0 there are excess carriers densities n0 = p0 =
2 × 1016 cm−3 . Assuming low-level injection and infinite length W of the sample, compute
and draw the distribution of excess minority carriers. Assume zero concentration of the excess
minority carriers at the other end of the sample.
Solution
The sample is p-doped and, since we have low-level injection, we can make the following approximations:
n = n0 + n0 ≈ n0
p = p0 + p0 ≈ p0
Knowing that the sample has infinite length, we can describe the distribution of excess minority
carriers as a simple decreasing exponential function (see figure 2.6):
p
p
n0 (x) = n0 (0) exp(−x/Ln ) where Ln = Dn τn = VT µn τn = 1.97 µm
2
×1016
1.8
1.6
1.4
n'(x) [cm-3]
1.2
1
0.8
0.6
0.4
0.2
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
x[cm]
Figure 2.6: Excess minority carriers as function of length (Exercise 2.2.9)
30
2
×10-3
2.2 Drift-diffusion model
Exercise 2.2.10
A sample of GaAs at T = 300 K (Nc = 4.7 × 1017 cm−3 , Nv = 7.0 × 1018 cm−3 , Eg = 1.439 eV,
µn0 = 8500 cm2 (Vs)−1 , µp0 = 400 cm2 (Vs)−1 ) is doped with donor density ND = 5 × 1017 cm−3 .
Knowing that the length is L = 0.1 mm, that the minority carrier lifetime is τp = 500 ns, and
that on the surface of the semiconductor an excess carrier density p0 (0) = n0 (0) = 1 × 1016 cm−3
is injected, compute the distribution of the excess minority carriers inside the sample and the
corresponding diffusion current.
Repeat the calculation of p0 (x) and Jdiff,p (x) for L = 1 µm.
Solution
First of all, we must check whether the sample is long orp
short compared to the diffusion length
of the minority carriers (holes in this case). Since Lp = Dp τp = 22.8 µm, we can say that the
sample is long and use the decreasing exponential approximation:
p0 (x) = p0 (0) exp(−x/Lp )
Given Dp = µp kbqT = 10.4 cm2 s−1 , the current density can be computed as:
Jdiff,p = −qDp
exp(−x/Lp )
∂
(p0 + p0 (x)) = qDp p0 (0)
= 7.31 exp(−x/Lp ) A/cm2
∂x
Lp
For L << Lp
p0 (x) = p0 (0)
Jdiff,p = q
L−x
L
Dp p0 (0)
= 166.6 A/cm2
L
Exercise 2.2.11
A sample of GaAs (T = 300K, r = 12.9, Eg = 1.42eV, ni = 2×106 cm−3 , µn = 8500 cm2 (Vs)−1 ,
µp = 400 cm2 (Vs)−1 ) is doped with donor density ND = 1×1016 cm−3 ; the cross section is 1 mm2 .
Suppose that the sample is illuminated with a flow of photons such that it generates an excess
surface concentration p0 (0) = n0 (0) = 1 × 1014 cm−3 .
1. Compute the profile p0 (x) of the excess minority carrier density, assuming that the carrier
lifetime is τp = 1 ns and that the length of the sample is much greater than the diffusion
length of minority carriers.
2. Compute the diffusion current of minority carrier corresponding to p0 (x)
3. What is the electric field at x = 0 needed to produce a drift current that makes the total
current zero? (Neglect the drift current of the minority carriers compared to the one of
majority carriers).
Solution
Let’s solve step by step all the requests of the exercise.
1. We start by computing the diffusion coefficients:
Dp = VT µp = 10.4 cm2 s−1
and the corresponding diffusion length:
p
Lp = Dp τp = 1.02 µm
31
2 Semiconductors out of thermal equilibrium
Assuming that the sample is longer than the diffusion length, we can use the exponential
approximation for the distribution of the excess minority carriers:1
p0 (x) = p0 (0) exp(−x/Lp )
2. We compute then the diffusion current of minority carriers. We know from result (2.1.2):
Jdiff,p = −qDp
∂
(p0 + p0 (x)) = qDp p0 (0) exp(−x/Lp )/Lp
∂x
Notice that, since electrons and holes diffuse in the same direction, the resulting current
densities are in opposite directions.
3. First, we evaluate the diffusion current at x = 0 cm using the formula we have just found:
Jdiff,p (0) = 1.63 A cm−2 . Then, to find the electric field we can set the drift current equal
to the diffusion current with the opposite sign, in order to have their sum equal to zero
(recall that we can neglect drift current of minority carriers):
Jdiff (0) = −Jdrift,n (0)
Jdiff,p (0) = −Jdrift,n (0)
Jdiff,p (0) = −µn ND qE(0)
Jdiff,p (0)
E(0) = −
= −0.120 V/cm
µn ND q
2.3 Non-homogeneous materials and Poisson equation
2.3.1 Summary
In this section we concentrate on the study of material where we do not have a constant field
applied. The equations we should use are the classical ones coming from Electromagnetism. In
particular:
dφ(x)
(2.3.1)
E(x) = −
dx
that relates the electric field to the applied potential. Then we have the Gauss equation:
dE(x)
ρ
=
dx
(2.3.2)
Combining these two equations together we can obtain the well known Poisson equation:
d2 φ(x)
ρ
=−
2
dx
(2.3.3)
+
Remember that in general in semiconductors ρ = (p − n + ND
− NA− )
1
The decay of excess majority carriers (electrons in this case) is generally much faster, both in time and in
space. The spatial distribution of majority carriers could be approximated with an exponential profile where
the diffusion length Lp is replaced by the Debye length LD , obtaining:
s
kB T
= 43 nm
LD =
q 2 ND
n0 (x) = n0 (0) exp(−x/LD )
32
2.3 Non-homogeneous materials and Poisson equation
2.3.2 Exercises
Exercise 2.3.1
In a sample of a semiconductor (r = 12) the charge density is:

0
x < −L



π x
−L < x < L
ρ(x) = qN0 sin

L


0
x>L
where q is the electron charge, N0 = 1015 cm−3 , and L = 10µm.
1. Compute and draw the electric field as function of x (E(x)), knowing that it is identically
zero outside the space charge region [−L, L].
2. Compute the potential difference φ(L)−φ(−L) inside the interval where we have the space
charge region.
Solution
Let’s solve step by step all the requests of the exercise.
1. Using Gauss law we can compute the electric field as:
dE(x)
ρ(x)
=
dx
obtaining:
Z x
E(x) =
c
ρ(x)
dx =
Z x
c
qN0 sin(πx/L)
qN0 L
dx = −
[(cos(πx/L))] + E0
π
The term E0 can be computed from the continuity condition in x = L (or in x = −L):
−
qN0 L
cos(πx/L) + E0 = 0
π
⇒
E0 = −
qN0 L
π
Finally the electric field is (see figure 2.7):


0
x < −L



π i
qN0 L h
E(x) = −
cos
x + 1 −L < x < L

π
L


0
x>L
2. As concerns the potential difference we can recall the relationship between field and potential:
dφ(x)
E(x) = −
dx
that, combined with the Gauss law, leads to the Poisson equation:
d2 φ(x)
ρ(x)
=−
2
dx
Therefore we can write:
Z x
Z x
π i qN L h
π i
qN0 L h
0
φ(x) = −
E(x)dx =
cos
x +1 =
x + L/π sin
x + φ0
π
L
π
L
c
c
thus the potential difference is:
φ(L) − φ(−L) =
qN0 L
qN0 L
qN0 2L2
[L + L/π sin(π)] −
[−L + L/π sin(π)] =
= 96 V
π
π
π
33
2 Semiconductors out of thermal equilibrium
0
−1
−2
−3
−4
−5
ε(x) [V/m]
−6
−7
−8
−9
−10
−1.5
X: 0
−1
−0.5
0 Y: −9.592
0.5
x [m]
Figure 2.7: Electric field E0 in exercise 2.3.1
34
1
−5
x 10
3 pn junctions
3.1 Summary
A pn junction is an interface between two types of semiconductor materials, one p-doped and
the other one n-doped, inside a simple crystal of semiconductor. When we make a junction,
a depletion region [−xp , xn ] is created around the junction itself. At thermal equilibrium the
Fermi level is constant throughout the device, so the energy bands have a certain bending in
the region corresponding to the depletion layer. The built-in voltage of the junction Vbi is the
potential difference between the n-side and the p-side. In case of constant doping profiles, it can
be computed as:
kB T
NA ND
Vbi =
(3.1.1)
log
q
n2i
An example of pn junction diagram is shown in Figure 3.1. In order to satisfy the overall
neutrality condition the net charge must be zero. This implies that in the spatial charge region
the negative charge must be equal to the positive charge:
xn ND = xp NA
(3.1.2)
An example of a representation of the charge distribution in the depletion region is shown in
Figure 3.2. The electric field has a piecewise linear profile and peaks exactly at the junction
coordinate
qNA xp
qND xn
Emax =
=
(3.1.3)
An example of profile of the electric field in a junction is shown in Figure 3.3.
E c
n s id e
p s id e
q V bi
E F
E Fi
E v
x n
-x p
x = 0
Figure 3.1: Band diagram of a symmetrical pn junction
When a voltage VD < 0 is applied, the junction is said to be reverse biased. The energy barrier
between the two sides is increased in height and, as a consequence, fewer majority carriers are
able to cross the junction. Only a small leakage current Is due to minority carriers is observed.
35
3 pn junctions
r (x )
q N
D
-x p
x n
-q N
x
A
Figure 3.2: Charge distribution profile in a pn junction: the doping of the n-side is higher than
the doping of the p-side
E (x )
-x p
x n
x
E M A X
Figure 3.3: Profile of the electric field in a junction with a highly doped n-side
The width of the depletion layer is increased and can be computed as:
s
2Neq
xn =
2 (Vbi − VD )
qND
s
2Neq
ND
=
xp = xn
(Vbi − VD )
NA
qNA2
(3.1.4)
(3.1.5)
If |VD | becomes too high we can observe the breakdown of the junction due to either:
- avalanche (multiplication of carriers by impact ionization);
- quantum tunneling;
- punch-through.
Before dealing with the last case of applied bias, it is convenient to introduce these definitions,
which are useful when deriving the following results.
- A diode is said to be long when the neutral side lengths are much greater than the minority
carrier diffusion lengths, i.e.: Wp Ln and Wn Lp .
- A diode is said to be short when the lengths of the neutral sides are much smaller than
the minority carrier diffusion length, i.e.: Wp Ln and Wn Lp ,
36
3.1 Summary
Having introduced these, it is possible to proceed to the next results.
When a voltage VD > 0 is applied, the junction is said to be forward biased. The height of
the energy barrier between the two sides is reduced and, as a consequence, carriers can cross the
junction. At the same time, the width of the depletion layer is decreased and can be computed
using Formula 3.1.4 and 3.1.5. The current-voltage characteristics is:
VD
−1
(3.1.6)
I = Is exp
ηVT
where
 2
2
D
D
n
n
p
n

i
i
qA
+

Ln NA
Lp ND
Is =
2
D
n
Dn n2i

p
i

qA
+
wn − xn ND
wp − xp NA
long diode
(3.1.7)
short diode
is the reverse saturation current and η is the diode ideality factor that, for Si, varies between in
the range [1; 2].
In general, when the junction is biased, the electric field maintains its piecewise linear behavior
but its intensity is changed because of the change of the potential barrier:
r
Emax =
2qNeq (Vbi − VD )
(3.1.8)
Another version of the formula is the following one:
Emax =
2(Vbi − VD )
xn + xp
(3.1.9)
Remember that in 3.1.9, as well as in 3.1.3, xn and xp are computed using formulas 3.1.4 and
3.1.5 to take into account the effects of the applied bias.
A pn junction behaves in static conditions like a nonlinear resistor, but it presents also important capacitive effects. Actually we may define a diffusion capacitance Cs , related to the
excess carriers injected in the neutral regions, and a depletion capacitance Cd , related to the
fixed charges in the depletion layer.
The diffusion capacitance can be computed as:

Ln
VD
qA 2 Lp


n
+
exp
long diode

VT i ND
NA
VT (3.1.10)
Cs =
qA
wn − x n wp − x p
VD


+
exp
short diode
 n2i
VT
2ND
2NA
VT
The depletion capacitance (sometimes called junction capacitance) can be computed instead
using the following expression:
s
qNeq
(3.1.11)
Cd = A
2(Vbi − VD )
We can define a small-signal equivalent circuit (shown in Figure 3.4) by introducing the differential conductance gm :
∂I
Is
VD
gm =
=
exp
(3.1.12)
∂VD
ηVT
ηVT
and by including the capacitances we have just defined.
37
3 pn junctions
is s( t)
is s ( t)
g d0
C
S 0
C
d 0
v ss(t)
v ss(t)
Figure 3.4: Small signal model of a pn junction (diode)
3.2 Review questions
Question 3.1
Does the leakage current of a reverse-biased pn junction depend significantly on the value of the
reverse bias voltage?
Solution
No, it doesn’t, unless the applied voltage is so high to cause breakdown.
Question 3.2
What is the effect of the forward bias on the energy barrier at the pn junction?
Solution
When the junction is forward biased the energy barrier is reduced in height, so that the number
of carriers able to cross the junction increases exponentially.
Question 3.3
Is it possible to exploit the built-in voltage as an electromotive force? Justify your answer.
Solution
In order to exploit the built-in voltage we would need to connect the junction to an external
circuit. In thermodynamic equilibrium the sum of all the energy exchanges is equal to zero,
therefore the built-in voltage of the junction is compensated by other built-in voltages (e.g
built-in voltages at metal-semiconductor contacts). Therefore, the built-in voltage cannot be
neither measured externally nor exploited.
Question 3.4
Why is the increase in the number of electrons able to overcome the energy barrier at the pn
junction exponentially dependent on the applied forward bias voltage?
Solution
Because the distribution of free electrons is the Fermi-Dirac one:
f=
1
F
1 + exp − E−E
kT
that, when the Fermi level falls inside the energy gap, can be approximated to the Boltzmann
distribution:
E − EF
f ∝ exp −
kT
38
3.2 Review questions
Question 3.5
In a long p+ n diode the current:
a) It’s approximately equal the the diffusion current of holes injected in the n side evaluated
at the limit of the spatial charge region
b) It’s mainly equal the the diffusion current of electrons injected in the p side
c) It’s a diffusion current of holes in the n side
Solution
Solution: a)
The Shockley theory of the junction diode states that the total current can be evaluated summing
the diffusion currents of minority carriers in the two sides of the junction at the limit of the
spatial charge region. In particular:
Dh
Dn
2
+
.
I = In,diff (−xp ) + Ih,diff (xn ) = qAni
NA Ln,p ND Lh,n
Having a p+ n junction means NA ND , therefore:
I ≈ qAn2i
Dh
ND Lh,n
This means that the only relevant contribution to the diode current is given by the diffusion
current of the positive carriers injected in the n side, evaluated at xn .
Question 3.6
How does the avalanche breakdown voltage depend on temperature? Why?
Solution
Avalanche breakdown occurs when the applied electric field is too high and carriers acquire high
kinetic energies. As they impact they transfer enough energy to cause the generation of new
carriers, which in turn will be accelerated and will cause the generation of further carriers. If
the temperature raises, the scattering events are more frequent, so it is harder for carriers to be
accelerated up to critical velocities, so the avalanche breakdown voltage increases.
Question 3.7
Energy barriers of sufficient height can block the electron motion. Is the barrier width important
as well? Can the energy barrier be so narrow that it lets some electrons through? If yes, how is
this effect called?
Solution
Yes, the barrier width can be important, especially when the semiconductor is heavily doped.
In this case the tunneling probability increases and the number of electrons tunneling through
the barrier can reach significant levels, enough to cause breakdown. This is called tunnel effect.
Question 3.8
Assign each of the band diagrams shown in Figure 3.5 to a statement describing the biasing
condition.
1. Zero bias
2. Reverse bias
39
3 pn junctions
Figure 3.5: Band Diagrams of Question 3.6
3. Forward bias
4. Practically impossible
Solution
Solution: (a)-3, (b)-2, (c)-4, (d)-1 , (e)-4, (f)-4.
Question 3.9
Assign each of the concentration diagrams shown in Figure 3.6 to a statement describing the
biasing condition. Electron concentrations are presented with solid lines, and the hole concentrations are presented with dashed lines.
Figure 3.6: Concentration Diagrams of Question 3.7
1. Zero bias
2. Reverse bias
3. Forward bias
4. None
Solution
Solution: (a)-3, (b)-2, (c)-4, (d)-4, (e)-3, (f)-1.
Question 3.10
In a reverse biased pn junction (VA < 0):
a) The junction capacitance increase with |VA |
b) The junction capacitance decreases with |VA |
40
3.3 Exercises
c) The junction capacitance does not depend on |VA |
Solution
Solution: b)
In an abrupt pn junction we have the following relations:
q
Qj = A 2q(Vbi − VA )Neq
s
qNeq
Cj = A
2(Vbi − VA )
con Neq = NA k ND . As we can see, the dependence on the bias is at the denominator of
the junction capacitance. In case of reverse bias, as |VA | increases, the junction capacitance
decreases.
Question 3.11
In a short pn the diffusion capacitance is:
a) Higher than the diffusion capacitance of a long diode with the same doping densities
b) Lower than the diffusion capacitance of a long diode with the same doping densities
c) Equal to the diffusion capacitance of a long diode with the same doping densities
Solution
Solution: b)
The diffusion capacitance is due to the presence of excess minority carriers along the junction.
In stationary conditions the charge accumulation con be directly computed and according to the
length of the diode we can make some approximations. As reported in the summary, for long
diode:
qAn2i Lh,n Ln,p
Cs =
+
eVA /VT .
VT
ND
NA
while for short diodes:
qAn2i
Cs =
2VT
Wp
Wn
+
ND
NA
eVA /VT .
In case we have the same doping densities, the diffusion capacitance of a long diode, being
proportional to the diffusion lengths, is far grater than the one related to the short diodes,
which is instead proportional the the width of the diode: (Li Wi ).
3.3 Exercises
Exercise 3.1
A sample of a semiconductor at T = 300 K (Eg = 1.2 eV, Nc = Nv = 5 × 1018 cm−3 , r = 12) is
doped with acceptor density NA = 5 × 1016 cm−3 for x < 0 and ND = 5 × 1016 cm−3 for x > 0.
1. Compute the position, with respect to the top of the valence band, of the intrisic Fermi
level and of the Fermi level at thermal equilibrium in the p and n regions far from the
junction, assuming complete ionization.
41
3 pn junctions
2. Draw the band diagram of the semiconductor, representing qualitatively the profile of the
bands near the junction (x = 0).
Solution
Due to the fact that Nc = Nv , the intrinsic Fermi level is located at midgap for both n and p
side. Assuming the complete ionization of the dopants we can compute the Fermi level with
respect to the top of the valence band (p side) or the bottom of the conduction band (n side)
as:
p
= −0.1197 eV
p side: → Ev − EF = kB T ln
Nv
n
n side: → EF − Ec = kB T ln
= −0.1197 eV
Nc
We can also report the width of depletion layer on the x axis by computing xp and xn . First,
we need the intrinsic carrier density and the built-in voltage of the junction:
n2i = Nc Nv exp(−Eg /kB T ) = 2.26 × 1017 cm−6
ND NA
Vbi = VT ln
= 0.96 V
n2i
and recalling Neq = NA ||ND = 2.5 × 1016 cm−3 , we get:
s
2Neq Vbi
xp = xn =
= 112.8 nm
2
qND
The band diagram is shown in figure 3.7.
x p= - 1 1 2 .8 n m
x n= 1 1 2 .8 n m
E C
1 .2 e V
E Fi
E F
E V
0 .9 6 e V
0 .1 1 9 7 e V
1 .0 8 e V
Figure 3.7: Band diagram of Exercise 3.1 junction
Exercise 3.2
Consider an abrupt pn junction made of germanium (Ge) at T = 300 K (Band gap Eg =
0.66 eV, effective density of states Nc = 1 × 1019 cm−3 , Nv = 5 × 1018 cm−3 , electron and hole
mobility µn = 3500 cm2 (Vs)−1 , µp = 1500 cm2 (Vs)−1 , relative dielectric constant r = 16.2,
minority carrier lifetime τn = τp = 1 µs). The p and n side are doped with acceptor density
NA = 1017 cm−3 and donor density ND = 2 × 1018 cm−3 , respectively, and have physical length
Wp = Wn = 50 µm and cross section A = 100 µm2 .
1. Compute the intrinsic carrier density ni of germanium at T = 300 K.
42
3.3 Exercises
2. Compute the distance between the intrinsic Fermi level and the top of the valence band
(EF i − Ev ) for germanium at T = 300 K and T = 400 K
3. Compute the electron and hole density in the neutral regions of the diode (i.e. in the n
and p side far from the junction where we can assume thermal equilibrium and flat band
diagram). Assume complete ionization of the dopants.
4. Compute the corresponding conductivity and resistivity of the neutral regions of the diode.
5. Compute the built-in voltage Vbi of the pn junction.
6. Assuming complete depletion, draw the profile of the net charge density ρ(x) inside the
diode and compute the width of the depletion region at thermal equilibrium.
7. Using the results from the previous points, compute the series resistance of the diode at
thermal equilibrium.
8. Draw the profile of the electric field E(x) inside the diode and compute its maximum value
at thermal equilibrium.
9. Draw the band diagram of the pn junction at thermal equilibrium, reporting the distance
between the Fermi level and the top of the valence band (EF − Ev ) in the neutral regions p
and n and highlighting the potential barrier qVbi in correspondence of the depletion region.
10. Compute the depletion capacitance of the diode at thermal equilibrium.
Solution
Let’s solve step by step all the requests of the exercise
1. The intrinsic carrier density is:
p
Eg
ni = Nc Nv exp −
= 2.17 × 1013 cm−3
2kB T
2. At T = 300 K, kB T = 26 meV so:
EF i − Ev =
Eg
Eg
kB T
Nc
−
ln
− 9 meV = 0.321 eV
=
2
2
Nv
2
At T = 400 K, kB T = 34.7 meV so:
EF i − Ev =
Eg
− 12 meV = 0.318 eV
2
3. Assuming complete ionization of the dopants, the majority carrier density equals the concentration of dopants:
p side:
→
pp = NA
n side:
→
nn = ND
n2i
= 4.73 × 109 cm−3
pp
n2
pn = i = 2.36 × 108 cm−3
nn
np =
4. The conductivity of each side is mainly due to the majority carriers, hence:
p side:
→
σ ≈ σp = qpp µp = 24 S cm−1
n side:
→
σ ≈ σn = qnn µn = 1122 S cm−1
43
3 pn junctions
5. Let’s compute the built-in voltage
Vbi = VT ln
ND NA
= 0.516 V
n2i
6. Knowing that Neq = ND ||NA = 9.52 × 1016 cm−3 , we get:
s
2Neq Vbi
xp =
= 9.38 × 10−6 cm = 93.8 nm
qNA2
s
2Neq Vbi
xn =
= 4.69 × 10−7 cm = 4.69 nm
2
qND
The profile of ρ(x) is shown in figure 3.8.
r (x )
q N
D
-x p
x n
-q N
x
A
Figure 3.8: Charge density profile of exercise 3.2
7. Let’s compute the series resistances of the diode:
1 Wn − xn
= 4.46 Ω
σn
A
1 Wp − xp
Rp =
= 208 Ω
σp
A
Rn =
R = Rn + Rp = 212.1 Ω
8. The maximum electric field is:
EM =
qNA xp
= 104.8 kV/cm.
The profile of the electric field is shown in figure 3.9.
9. Let’s compute the Fermi level distances to Valence band in both sides of the junction.
p side:
→
n side:
→
pp
= 0.102 eV
Nv
pn
EF − Ev = −kB T ln
= 0.618 eV
Nv
EF − Ev = −kB T ln
The band diagram is shown in figure 3.10
44
3.3 Exercises
E (x )
-x p
x n
x
E M A X
Figure 3.9: Electric field profile of exercise 3.2
x n
x p
E C
q V b i
E Fi
0 .1 0 2 e V
0 .6 1 8 e V
E F
E V
Figure 3.10: Band diagram at thermal equilibrium of Exercise 3.2
10. Let’s compute the depletion capacitance of the diode.
s
qNeq
Cd = A
= 1.46 × 10−13 F.
2(Vbi − VA )
Exercise 3.3
Consider a pn junction made of silicon (ni = 1.45 × 1010 cm−3 , r = 11.7) doped with NA =
1 × 1015 cm−3 , ND = 2 × 1017 cm−3 :
1. Determine the built-in voltage at 300 K
2. Assuming complete depletion approximation evaluate the width of the spatial charge region
(xn + xp ) and the maximum electric field Emax in case of 0 V and VD = −10 V applied
bias.
Solution
Using Formula 3.1.1 it’s possible to compute the built-in voltage:
Vbi = VT ln
NA ND
= 0.72 V
n2i
45
3 pn junctions
Assuming VA = 0 V, using Formula 3.1.4 and 3.1.5 we have:
xd = xn + xp
s
2Neq (Vbi − VD ) 1
1
+
)
=
(
q
NA ND
s
2(Vbi − VD )
=
qNeq
= 0.97 µm
Using formula 3.1.8 we can compute the maximum electric field Emax :
r
2qNeq (Vbi − VD )
Emax =
= 14.9 kV/cm
Repeating the same computations with VD = −10 V we have:
xd = 3.73 µm
Emax = 57.4 kV/cm
Exercise 3.4
Consider a pn junction made of Si (T = 300 K, ni = 1010 cm−3 , τn = τh = 15 µs, µn =
4000 cm2 (Vs)−1 , µh = 500 cm2 (Vs)−1 , A = 1 mm2 , r = 12) doped with NA = 1015 cm−3 ,
ND = 1017 cm−3 :
1. Compute the width of the depletion layers as a function of the applied bias VA (xn and
xp )
2. Compute the maximum value of electric field in the junction, as a function of the applied
bias VA (Emax )
Solution
First of all let’s compute the built-in voltage Vbi using Formula 3.1.1:
Vbi = 0.718 V
Now using Formula 3.1.4 and 3.1.5 let’s compute depletion layer width in function of the applied
bias VA :
s
p
2Neq
xn =
(Vbi − VA ) = 1.146 × 10−6 0.718 V − VA cm
2
qND
s
p
2Neq
−4
xp =
(V
−
V
)
=
1.146
×
10
0.718 V − VA cm
A
bi
qNA2
Let’s compute the maximum electric field inside the junction using Formula 3.1.3:
Emax =
46
p
qNA xp
= 1.728 × 104 0.718 V − VA V cm−1
3.3 Exercises
Exercise 3.5
Consider a Si abrupt symmetric pn junction (T = 300 K, ni = 1 × 1010 cm−3 , τn = τh = 1 µs,
µn = 1000 cm2 (Vs)−1 , µh = 400 cm2 (Vs)−1 ), doped with NA = ND = 1 × 1017 cm−3 ; the area of
the diode is A = 0.5 mm2 . Evaluate:
1. Wn and Wp such that they are 10 times the respective diffusion lengths; in this condition
(long diode) evaluate the inverse saturation current Is and the V I characteristic at 300 K
assuming negligible recombination process in the spatial charge region
2. Wn and Wp such that they are 1/10 times the respective diffusion lengths; in this condition
(short diode) evaluate the inverse saturation current Is and the V I characteristic at 300 K
assuming negligible recombination process in the spatial charge region
Solution
Let’s compute, first of all, the diffusion length of holes in the n-region and the diffusion length
of electrons in the p-region; they are respectively:
s
p
kB T
Lh,n = Dh τh =
µh τh = 32.25 µm
q
s
p
kB T
Ln,p = Dn τn =
µn τn = 51 µm
q
Now let’s compute the Wp and Wn in the first condition:
Wn = 10Lh,n = 0.03 cm
Wp = 10Ln,p = 0.05 cm
In this case (long diode) one may apply Formula (3.1.7):
Dn
Dh
2
Is = Aqni
+
= 6.67 × 10−15 A
NA Ln,p ND Lh,n
and the corresponding I(V ) characteristic is:
−15
I = 6.67 × 10
exp
V
26 mV
−1 A
Now let’s compute the Wp and Wn in the second condition (short diode):
Lh,n
= 3.22 µm
10
Ln,p
Wp =
= 5.1 µm
10
Wn =
Using Formula (3.1.6) and neglecting the length of the depletion region, one has:
Dn
Dh
2
Is = Aqni
+
= 6.67 × 10−14 A
NA Wp ND Wn
and the corresponding I(V ) characteristic is:
−14
I = 6.67 × 10
exp
V
26 mV
−1 A
47
3 pn junctions
Exercise 3.6
Let’s consider an abrupt pn junction made with of a semiconductor (Si) with the following
material parameters:
• τn = τp = 2.5 µs;
• Nv = 1.04 × 1019 cm−3 , Nc = 2.8 × 1019 cm−3 ;
• ni = 1.45 × 1010 cm−3 ;
• r = 11.7;
• µp = 471 cm2 (Vs)−1 , µn = 1417 cm2 (Vs)−1 ;
The junction has the following device parameters at 300 K:
• p side: NA = 5 × 1016 cm−3 , wp = 10 µm;
• n side: ND = 3 × 1017 cm−3 , wn = 1000 µm;
1. Evaluate everything you need in order to draw the band diagram of this junction
2. Compute the reverse saturation current density Js
Solution
Knowing the doping densities and the densities of states in the conduction and valence band we
can compute:
Nv
= 0.138 eV
NA
Nc
Ec − EF = kB T ln
= 0.118 eV
ND
NA ND
qVbi = kB T ln
= 0.829 eV
n2i
EF − Ev = kB T ln
Now we can compute the length of the depletion region using Formula 3.1.4 and 3.1.5:
Neq = 4.286 × 1016 cm−3
xn = 22.6 nm
xp = 135.6 nm
Now let’s compute the diffusivities of electrons and holes using Einstein relation:
kB T
µp = 12.25 cm2 /s
q
kB T
Dn =
µn = 36.84 cm2 /s
q
Dp =
and the respective diffusion lengths:
p
Dp τp = 55.33 µm
p
Ln = Dn τn = 95.97 µm
Lp =
Now using the Formula 3.1.7 it’s possible to compute the reverse saturation current. Pay attention: looking at the width of the sides we have to mix the formula for long and short diode: the
n side long compared to the diffusion length while the p side is short:
Dn
1 Dp
1
2
+
Js = q ni
= 25.4 pA cm−2
NA wp − xp ND Lp
48
3.3 Exercises
I
RS
VA
+
Vj
Figure 3.11: Circuit diagram of Exercise 3.7
Plot V(I)
5
X: 0.1
Y: 5
4
Voltage (V)
3
Voltage drop on series resistance
2
1
X: 0.001
Y: 0.239
0
-0.02
X: 0.1
Y: 0.359
Voltage drop on the diode
X: 0.001
Y: 0.05
0
0.02
0.04
0.06
Current (A)
0.08
0.1
0.12
Figure 3.12: Voltage as function of current in Exercise 3.7
Exercise 3.7
Consider the circuit in Figure 3.11: let’s assume Is = 100 nA, Rs = 50 Ω.
1. Neglecting Rs (VA = Vj ), estimate Vj for I = I1 = 1 mA and I = I2 = 100 mA.
2. Determine the external bias VA needed to obtain I1 and I2 when taking into account the
voltage drop across Rs .
Solution
If we invert Formula 3.1.6 we are able to derive an expression for the voltage as a function of
the current:
Vj
I
I
I
VJ /VT
I = IS e
− 1 ⇒ ln
+1 =
⇒ Vj = VT ln
+ 1 ≈ VT ln
IS
VT
Is
Is
Now, neglecting the presence of Rs , we can compute Vj :
(
0.239 V = Vj,1 for I = I1 = 1 mA
Vj =
0.359 V = Vj,2 for I = I2 = 100 mA
(3.3.1)
49
3 pn junctions
SemiLog Plot V(I)
10
8
Voltage (V)
6
X: 0.1
Y: 5
4
2
0
X: 0.001
Y: 0.239
Voltage drop on series resistance
X: 0.001
Y: 0.05
Voltage drop on the diode
-2
10 -14
10 -12
10 -10
X: 0.1
Y: 0.359
10 -8
Current (A)
10 -6
10 -4
10 -2
10 0
Figure 3.13: Voltage as function of current in Exercise 3.7 (logarithmic scale)
With the given circuit topology, when we neglect the presence of Rs , the applied bias drops
entirely on the diode (assumed to be ideal): thanks to the exponential current law, we can see
how a very small variation of the applied voltage (in this case ∆V = 0.12 V) produces a very
large variation of the current (×100).
Now let’s put back Rs : this resistor may include the series resistance of the pn diode. The law
that describes the topology is:
VA = Vj + Rs I
Now we can compute the voltages VA,1 and VA,2 needed to have, respectively, a current I1 and
I2 in the circuit:
(
VA,1 = Vj,1 + Rs I1 = 0.289 V
(3.3.2)
VA,2 = Vj,2 + Rs I2 = 5.359 V
The plots reported in Figure 3.12 and Figure 3.13 show the voltage drop as a function of the
current flowing in the circuit (the second one is in logarithmic scale). When the current is
increased, the effect of the series resistance is evident: the voltage drop on the diode does not
change much (due to the logarithmic dependence of voltage on current), while the drop on
the resistance increases a lot due to the linear dependence. When I2 flows in the circuit the
voltage drops for the most part on the series resistance. In Figure 3.14 the corresponding I(V )
characteristics are reported.
Exercise 3.8
A pn diode made of a semiconductor with the following material parameters:
• Relative dielectric constant: r = 12;
• Intrinsic carrier density: ni = 1.45 × 1010 cm−3 ;
• Mobility: µn = 1000 cm2 (Vs)−1 , µp = 400 cm2 (Vs)−1 ;
• Minority carrier lifetime: τn = τp = 1 µs;
has the following device parameters at room temperature:
• ND = 8 × 1018 cm−3 ;
50
3.3 Exercises
IV Characteristic
0.05
0.045
Diode Law
0.04
Current (A)
0.035
0.03
0.025
0.02
0.015
Rs Current
0.01
Total Current
X: 0.239 X: 0.289
Y: 0.001 Y: 0.001
0.005
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Voltage (V)
IV Characteristic
0.5
0.45
0.4
Diode Law
Current (A)
0.35
0.3
0.25
0.2
0.15
X: 0.359
Y: 0.1
X: 5.359
Y: 0.1
0.1
Rs Current
Total Current
0.05
0.5
1
1.5
2
2.5
3
Voltage (V)
3.5
4
4.5
5
5.5
Figure 3.14: IV characteristic of Exercise 3.7
51
3 pn junctions
• NA = 2 × 1016 cm−3 ;
• Junction cross section: A = 1 mm2 ;
• Length of the n side: Wn = 500 µm;
• Threshold field for avalanche multiplication of carriers: Ec = 250 kV/cm.
1. Compute the minimum length of the p side (Wp ) that maximizes the breakdown voltage
Vbr
2. Draw the small-signal equivalent circuit and compute, using the previous value of Wp , the
differential conductance under the following bias voltage VA = Vbi /2.
Solution
Let’s solve the problem step by step.
1. We start by computing the built-in voltage:
kB T
ND NA
= 0.891 V
Vbi =
ln
q
n2i
The condition to have avalanche breakdown is:
Vbr
: Emax (Vbr ) = EC
r
2qNeq (Vbi − Vbr )
EC =
Being ND NA , we can make the following approximation:
NA ||ND ≈ NA
we obtain:
Vbi − Vbr =
Ec2 = 10.36 V
2qNA
→
Vbr = −9.47 V
and finally the minimum physical length of the p side is:
s
2(Vbi − Vbr )
Wpmin =
= 828.9 nm
qNA
2. The diffusion length for electrons in the p side is Lnp =
use the short diode approximation:
Is ≈ Aqn2i
√
τn Dn = 51 µm Wp so we can
Dn
= 5.28 pA
NA Wpmin
and finally the differential conductance is simply:
gd |(Vbi /2) =
Is
exp(Vbi /(2VT )) = 5.61 mS
VT
The small-signal equivalent circuit is shown in figure 3.4.
Exercise 3.9
A p+ n diode made of a semiconductor with the following material parameter:
52
3.3 Exercises
• relative dielectric constant: r = 12;
• mobility: µn = 1000 cm2 (Vs)−1 , µp = 500 cm2 (Vs)−1 ;
• minority carrier lifetime: τn = τp = 1µs;
• intrinsic carrier density: ni = 1010 cm−3 ;
• threshold field for avalanche multiplication of carriers: Ec = 100 kV/cm;
has the following device parameter at room temperature:
• acceptor and donor density: NA = 5 × 1018 cm−3 , ND = 1015 cm−3 ;
• length of the p side: Wp = 200 µm;
• cross section: A = 50 µm2 ;
1. Find, as function of the bias voltage VD , the depletion layer width on the n and p side xn ,
xp and the maximum electric field EM .
2. Write the expression for the series resistance of the neutral regions of the diode.
3. Determine the small-signal equivalent circuit of the diode when a bias voltage VD = 0.3 V
is applied, assuming that the n side has width Wn = Wp .
4. Repeat the previous point assuming that Wn = 5 µm.
5. Find the breakdown voltage when the diode is reverse biased, assuming Wn = 5 µm.
Solution
Let’s solve step by step all the requests of the exercise
1. We start by computing the built-in voltage:
kB T
ND NA
Vbi =
= 0.82 V
ln
q
n2i
Being NA ND we have NA ||ND ≈ ND and so:
s
p
2(Vbi − VD ) xn =
= 1.152 Vbi − VD µm
qND
p
ND
xp = xn
= 0.23 Vbi − VD nm
NA
The maximum electric field is:
r
p
2qNeq (Vbi − VD ) Emax =
= 17.36 Vbi − VD kV/cm
2. The series resistance of the neutral regions is the sum of the contributions of the two
neutral regions:
Wn − xn Wp − xp 1
Rs =
+
σn
σp
A
with σn = nqµn = ND qµn and σp = pqµp = NA qµp .
53
3 pn junctions
3. The small-signal equivalent circuit is shown in figure 3.4. The depletion capacitance is:
s
Cd = A
qNeq
≈A
2(Vbi − VD )
s
qND
= 6.4 × 10−15 F
2(Vbi − VD )
Being NA ND , the diffusion capacitance is mainly due to the holes injected into the n
side:
Cs = Cs,n + Cs,p ≈ Cs,p
The diffusion length of the holes in the n side is:
Lp =
p
Dp τp =
q
(kB T /q)µp τp = 36.06 µm
Notice that Lp Wn so we can use the long diode approximation for the diffusion capacitance:
Cs ≈ Cs,p =
qAn2i Lp
exp(VD /VT ) = 1.14 × 10−16 F
VT ND
The differential conductance is:
gd ≈ gd,p =
qAn2i Dp
exp(VD /VT )
VT ND Lp
However, a shortcut to compute it can be found by noticing that the ratio between the
diffusion capacitance and the differential conductance is:
L2p
Cs,p
Dp τp
Cs
≈
=
=
= τp
gd
gd,p
Dp
Dp
Therefore the differential conductance can be easily computed as:
gd =
Cs,p
= 1.14 × 10−10 S
τp
4. If we now use Wn = 5µm, the long diode approximation is no longer valid because Lp Wn . However, we can derive a short diode approximation:
W n Lp
→
Wn − x
Wn − x
= p0n0 (xn )(eVD /VT − 1)
=
Wn − xn
Wn − xn
n2
Wn − x
= i (eVD /VT − 1)
ND
Wn − xn
p0 (x) = p0 (xn )
thus obtaining the current density for the injected holes as:
Jp = Jp,diff (x) = −qDp
∂p0 (x)
1
= qDp p0 (xn )
=
∂x
Wn − xn
n2i Dp
(eVD /VT − 1)
ND (Wn − xn )
n2 Dp VD /VT
≈q i
(e
− 1)
ND Wn
=q
54
3.3 Exercises
which is the same expression appearing in the long diode approximation except for the
fact that the physical length of the n side replaces the diffusion length. The diffusion
capacitance is computed as:
Z Wn
d 0
d
p0 (x)dx =
Cs,p =
Qp =
qA
dV
dV
xn
Z Wn
Wn − x
d
Wn − xn
d
qA
p0 (xn )
dx =
qAp0 (xn )
=
=
dV
Wn − xn
dV
2
xn
Wn − xn d 0
Wn − xn d n2i VD /VT
(e
− 1) =
p (xn ) = qA
2
dV
2
dV ND
n2 (Wn − xn ) eVD /VT
= qA i
2ND
VT
n2i Wn VD /VT
e
= 7.9 × 10−18 F
≈ qA
2ND VT
= qA
The differential conductance is:
gd,p =
Aqn2i Dp VD /VT
d
e
AJp,diff =
dV
VT ND Wn
Using the previous trick of computing the ratio between the diffusion capacitance and the
differential conductance, we see that:
Cs,p
W2
= n
gd,p
2Dp
thus, the relationship gd = Cs /τp obtained in the case of the long diode approximation is
no longer valid. In this case we get:
gd,p =
2Dp Cs,p
= 8.218 × 10−10 S
Wn2
5. To find the breakdown voltage we must decide whether it is due to avalanche multiplication
of carriers or to punch-through (i.e. the depletion region reaches the ends of the diode).
We can do it by computing the threshold voltages needed by both the processes to take
place and compare them.
p
Ec = 17.36 Vbi − Vbr,a → Vbr,a = −32.36 V
p
Wn = 1.152 Vbi − Vbr,p → Vbr,p = −18.02 V
Therefore we see that the breakdown voltage is Vbr = −18.02 V and that the breakdown
is due to punch-through.
Exercise 3.10
A long silicon p+ n diode at T = 300 K (r = 12, ni = 1 × 1010 cm−3 , µn = 1000 cm2 (Vs)−1 ,
µp = 400 cm2 (Vs)−1 , τn = τp = 10 µs) has the p and n side uniformly doped with acceptor density
NA = 2 × 1018 cm−3 and donor density ND = 1 × 1016 cm−3 . The diode has identity factor η = 1
and differential conductance gd = 500 mS when forward biased with voltage VD = 0.4 V.
1. Draw the small-signal equivalent circuit of the diode.
2. Compute the differential conductance for VD = 0 V
3. Compute the saturation current Is in reverse bias.
55
3 pn junctions
4. Compute the diffusion capacitance Cs for VD = 0.4 V and VD = 0 V.
5. Repeat the calculations of the previous 2-5 point assuming now that the diode is short:
wn = 41 Lp
Solution
Let’s solve step by step all the requests of the exercise.
1. The small-signal equivalent circuit is shown in figure 3.4.
2. The differential conductance parameter for the small signal model can be computed as:
gd =
Is
VD
∂I
=
exp
∂VD
VT
ηVT
We can write the following equations:
(
Is /VT exp(0.4 V/VT )
Is /VT exp(0 V/VT )
= 500 mS
=x
and, solving for x:
x = gd |VD =0 V =
500 mS
= 1.04 nS
exp (0.4/0.026)
3. The saturation current can be computed as:
Is
Is
exp(0.4 V/(ηVT )) ≈
exp(0.4 V/VT ) = 500 mS
ηVT
VT
→
Is = 2.71 nA
4. Being NA ND , and using the long diode approximation we can write:
Is ≈ Aqn2i
Dp
ND Lnp
and gd ≈ A
qn2i Dp
exp(VD /VT )
VT ND Lnp
Therefore the diffusion capacitance is :
Cp,diff = A
L2np
qn2i Lnp
exp(VD /VT ) = gd
= gd τp
VT ND
Dp
If the bias voltage is VD = 0.4 V we get:
Cp,diff = gd |VD =0.4 V τp = 500mS 10µs = 5 µF
and for VD = 0 V:
Cp,diff = gd |VD =0 V τp = 0.1µS 10µs = 1 pF
5. If Lp wn , we should move to short diode approximation:
p0 (x) = p0 (xn )
Hence:
56
Wn − x
n2
Wn − x
Wn − x
= p0n0 (xn )(eVD /VT − 1)
= i (eVD /VT − 1)
Wn − xn
Wn − xn
ND
Wn − xn
3.3 Exercises
Jp = Jp,diff (x) = −qDp
n2i Dp
∂p0 (x)
1
= qDp p0 (xn )
=q
(eVD /VT − 1)
∂x
Wn − xn
ND (Wn − xn )
gd,p =
Cp,diff =
d
d
Q0p,diff =
qA
dVD
dVD
Z Wn
Aqn2i Dp
eVD /VT
VT ND (Wn − xn )
p0 (x)dx =
xn
d
Wn − xn
n2 (Wn − xn ) eVD /VT
qAp0 (xn )
= qA i
dVD
2
2ND
VT
and finally:
Cp,diff = gd
(wn − xn )2
2Dp
In our case (wn − xn ≃ Lp ):
Cp,diff = gd
L2p
τp
= gd
2 · 8Dp
16
Exercise 3.11
Compute the small-signal parameters (differential conductance, junction (depletion) capacitance, diffusion capacitance) for a silicon pn diode (r = 12, ni = 1.5 × 1010 cm−3 , Wp =
Wn = 200 µm, τn = τh = 1 µs, µn = 1000 cm2 (Vs)−1 , µh = 400 cm2 (Vs)−1 , A = 1.5 mm2 ) at
300 K with NA = 1 × 1015 cm−3 , ND = 1 × 1015 cm−3 , biased with VA = 0.6 V.
Solution
Let’s compute the built-in voltage using Formula 3.1.1:
ND NA
kB T
ln
Vbi =
q
n2i
= 0.578 V
Notice that the applied bias is higher than the built-in voltage; therefore, in order to get the real
voltage drop on the junction it’s necessary to take into account the voltage drop on the series
resistance:
VA = Vj + VRs = Vj + Rs ID (Vj )
If we assume the junction VI characteristic to be:
Vj
ID = I0 exp
−1
VT
the voltage drop on the junction will be (inverting the formula)
ID
Vj = VT ln
+1 .
I0
In order to compute the value of the reverse saturation current I0 , it’s first of all necessary to
compare the diffusion lengths of minority carriers with the device dimensions:
s
kB T
Ln,p =
µn τn
q
= 51.0 µm Wp
s
kB T
Lh,n =
µh τh
q
= 32.2 µm Wn
57
3 pn junctions
It is therefore possible to use the long diode approximation Formula 3.1.7:
Dh
Dn
2
+
I0 = Aqni
NA Ln NA Lh
= 4.5 pA
The diode series resistance is given by:
Rs =
Wp
Wn
+
Aσn Aσh
where the conductances are:
σn = qND µn = 0.16 S/cm
σh = qNA µh = 6.4 × 10−2 S/cm
from which we finally get Rs = 29.2 Ω. Substituting these values inside the previous formula we
get a non linear equation as a function of ID :
ID
+ 1 + Rs ID
VA = VT log
I0
We can solve this equation using the techniques of the numerical calculus. Actually it’s possible
to get ID = 2.58 mA which corresponds to a potential drop on the series resistance Rs ID =
75.58 mV and a potential drop on the junction equal to Vj = 0.5244 V < Vbi It is now possible
to compute the small-signal differential parameters. Using formula 3.1.12 we can compute the
differential conductance gd :
gd =
Vj
∂ID
I0
=
exp
∂Vj
VT
VT
= 99.5 mS.
Using formula 3.1.11 we can compute the junction capacitance Cj
s
Cj = A
qNeq
2(Vbi − Vj )
= 422.7 pF.
Finally the diffusion capacitance within the long diode approximation using Formula 3.1.10
CD = CDn + CDp
Vj
Vj
qA n2i
qA n2i
Lhn exp
+
Lnp exp
VT ND
VT
VT NA
VT
= 38.48 nF + 60.94 nF
=
= 99.42 nF
Exercise 3.12
Consider a silicon pn junction (T = 300 K, ni = 1.45 × 1010 cm−3 , r = 12, Eg = 1.12 eV) with:
• p-side: NA = 2 × 1017 cm−3 , µn = 1000 cm2 (Vs)−1 , τn = 1 µs
• n-side: ND = 1 × 1017 cm−3 , µp = 400 cm2 (Vs)−1 , τp = 500 ns
58
3.3 Exercises
The physical length of both sides of the junction is longer than the minority carrier diffusion
length.
1. Compute the extension of the depleted regions and the relevant energetic differences in
both sides.
2. Evaluate the reverse saturation current, assuming a junction cross-section A = 1 mm2 .
3. Demonstrate the analytic expression of the electric field profile across the junction and
estimate its peak value at thermodynamic equilibrium.
4. Compute the breakdown voltage of the junction, assuming a breakdown field Ec = 200 kV/cm.
Solution
First of all, let’s compute the built-in voltage:
Vbi = VT ln
NA ND
= 0.837 V
n2i
Now let’s consider the p-side and evaluate all the quantities required:
p = NA = 2 × 1017 cm−3
n2i
= 1051.2 cm−3
NA
kB T
n
EF − EF i =
ln = −0.427 eV
2
p
s
2Neq Vbi
= 4.30 × 10−6 cm
xp =
2
qNA
n=
Let’s now do the same for the n-side:
n = ND = 1 × 1017 cm−3
n2i
= 2102.5 cm−3
NA
kB T
n
EF − EF i =
ln = 0.409 eV
2
p
s
2Neq Vbi
NA
xn =
= xp
= 8.60 × 10−6 cm
2
ND
qND
n=
The reverse saturation current may be computed using the formula 3.1.7. We can compute
before the diffusion coefficients and the diffusion lengths:
Dn = VT µn = 26 cm2 /s
p
Lnp = Dn τn = 51 µm
Dp = VT µp = 10.4 cm2 /s
p
Lpn = Dp τp = 23 µm
Therefore in long diode condition, the reverse saturation current is:
Dp
Dn
2
Is = qAni
+
≈ 24 fA
Lnp NA Lpn ND
59
3 pn junctions
The analytic expression of the field across the junction may be derived by integrating the Gauss’
equation with the proper boundary conditions.
∂E
ρ
=
∂x
E(x ≤ −xp , x ≥ xn ) = 0
ρ(−xp < x < 0) = −qNA
ρ(0 < x < xn ) = qND
From this we have:
qNA
(x + xp ) (x < 0)
qND
E(x) =
(x − xn ) (x > 0)
E(x) = −
The electric field peak value at thermal equilibrium is:
Emax = −E(0) =
qND
xn ≈ 130kV/cm
The breakdown voltage for avalanche breakdown may be computed reverting the following expression:
r
2qNeq
Ec =
(Vbi − Vbr )
⇓
−Vbr =
60
Ec2 − Vbi = 1.15 V
2qNeq
4 Bipolar junction transistors
4.1 Summary
VBC
Reverse
active
Saturation
BE ON
BC ON
BE OFF
BC ON
VBE
Normal
active
Cutoff
BE OFF
BC OFF
BE ON
BC OFF
ON : forward bias
OFF : reverse bias
Figure 4.1: Operating modes of a BJT
The bipolar junction transistors (BJTs) are made essentially of two coupled pn junctions: a
base-emitter junction (BE) and a base-collector junction (BC). Depending on the biasing conditions, the transistor can operate as a voltage-controlled current source (for analog applications)
or a voltage-controlled switch (for digital applications). Figure 4.1 summarizes the operating
modes according to the bias of the junctions.
In normal active region (a.k.a forward active region) and in common emitter configuration
the current gain is β with
IC = βIB
(IC : collector current, IB : base current). α is the current gain in common base configuration.
The following relationship holds:
α
β=
(4.1.1)
1−α
It is also possible to use another expression for β:
β=
τ0
τt
where τ0 is the minority carrier lifetime in the base and τt is the transit time: the time needed
for minority carriers, which have been injected by the emitter into the base, to cross the base
neutral region and reach the limit of the depletion region of the base-collector junction.
61
4 Bipolar junction transistors
We have another important relation:
α = b · γe
(4.1.2)
where b is the transport factor, which is related to the ratio of the electrons that reach the
collector and the ones entering the base:
1 wB 2
(4.1.3)
b≈1−
2 LnB
the smaller the recombination process in the base, the higher the transport factor. γe is the
emitter efficiency and is related to the hole current flowing from the base B to the emitter E:
the smaller this hole current, the higher the emitter efficiency.
µpE NAB wB −1
γe = 1 +
(4.1.4)
µnB NDE wE
Notice that, in order to maximize the transport factor, a very narrow base is used, and to
maximize the emitter efficiency the emitter has an heavier doping than the base: these are some
of the most important considerations that have to be made when doing a BJT structural design
in order to have good performances. Remember that the γe formula can be used in case the
emitter is short if compared to the diffusion length of minority carriers.
The output characteristics (IC vs. VCE ) is shown in Figure 4.2. Notice that IC , in active
mode, is not exactly constant but has a little upward slope due to the Early effect, which
increases the transport factor since the base becomes actually narrower as the BC junction is
more reverse biased. Also notice that at high VCE the device may break down, either because
of base punch-through or carrier avalanche multiplication at the BC junction.
IC
IB
VCE
Figure 4.2: BJT output characteristics
It is possible to derive a mathematical model and circuital model for the static characteristics
of the bipolar transistor in case of arbitrary polarization: we report in Figure 4.3 the injection
Ebers-Moll equivalent circuit.
A small-signal equivalent circuit can be defined for the operation in forward active region: it
is shown in Figure 4.4, and its parameters can be computed as:
IC
VT
VT
β
rBE =
=
IB
gm
gm =
62
4.2 Review questions
a R IR
a FIF
IE
IC
IF = IE 0 [ e x p (V B E /V T) -1 ]
IR = IC 0 [ e x p (V B C /V T ) -1 ]
IB
Figure 4.3: Injection Ebers-Moll equivalent circuit
B
iB
rBE
^
C
g m v^ B E
v BE
iC
v^ C E
E
Figure 4.4: BJT small-signal equivalent circuit
The capacitors between B and C, B and E take into account the capacitive effects of the two
junctions. In particular the base-emitter capacitance in a first approximation can be seen as a
diffusion capacitance due to the stored charges in the base. The base-collector capacitance can
be considered as a junction capacitance due to the presence of an extended depletion region (in
particular in the collector side, less doped than the base). In general CBC < CBE .
4.2 Review questions
Question 4.1
Does the doping level in the base affect the emitter efficiency? If yes, why?
Solution
Yes, the emitter efficiency is affected by the doping level of the base. In fact we can recall
Formula 4.1.4 that is:
µpE NAB wB
γE ≈ 1 −
µnB NDE wE
Actually γE is related to the quantity of carrier injected by the emitter into the base; of course
if the doping of the base increases less carrier will be injected by the emitter.
Question 4.2
Does the relationship between α and β apply in saturation and cutoff?
Solution
No, the relationship 4.1.1:
β=
α
1−α
is valid only in normal active mode.
63
4 Bipolar junction transistors
Figure 4.5: Band diagrams and output characteristics
Figure 4.6: Band diagrams
Question 4.3
Figure 4.5 shows four energy band diagrams, drawn from the emitter to the collector. Identify how the energy band diagrams relate to each of the four points, labeled on the output
characteristics of the BJT.
Solution
The solutions are: (a)-(3), (b)-(1), (c)-(2), (d)-(4)
Question 4.4
Assign each of the energy-band diagrams from figure 4.6 to the proper description of the BJT
type and mode of operation.
1. NPN cutoff
2. NPN active
3. NPN saturation
4. PNP cutoff
5. PNP active
6. PNP saturation
7. Impossible
Solution
The solutions are: (a)-(1), (b)-(6), (c)-(5), (d)-7
64
4.3 Exercises
Question 4.5
Determine the modes of operation of a PNP BJT on the basis of the following set of measurements:
1. VEB = 0.7 V , VEC = 5.2 V
2. VEB = 0.7 V , VEC = 0.7 V
3. VEB = −0.7 V , VEC = 0.2 V
4. VEB = 0.7 V , VEC = 0.2 V
5. VEB = −5.2 V , VEC = −0.7 V
Solution
The solutions are:
1. Normal active (VCB = −4.5 V)
2. Normal active (VCB = 0 V)
3. Cutoff (VCB = −0.9 V)
4. Saturation (VCB = 0.5 V)
5. Breakdown (VCB = −4.5 V)
4.3 Exercises
Exercise 4.1
A npn bipolar transistor made of a semiconductor with the following material parameter at
300 K:
• electrons mobility: µn = 1200 cm2 (Vs)−1 ;
• holes mobility: µp = 600 cm2 (Vs)−1 ;
• minority carriers lifetimes: τnB = τhE = 10 µs
has the following characteristics:
• emitter length: WE = 2 µm;
• base length: WB = 0.5 µm;
• collector length: WC = 10 µm;
• acceptor density in the base: NAB = 2 × 1017 cm−3 ;
• donor density in the collector: NDC = 1 × 1016 cm−3 ;
• saturation current for the base-emitter junction: IEB0 = 2 pA.
1. Find the donor density in the emitter NDE to have a common-emitter gain βF = 100.
2. Draw the Ebers-Moll injection equivalent circuit for the transistor.
65
4 Bipolar junction transistors
a R IR
a FIF
IE
IC
IF = IE 0 [ e x p (V B E /V T) -1 ]
IR = IC 0 [ e x p (V B C /V T ) -1 ]
IB
Figure 4.7: Ebers-Moll injection equivalent circuit
Solution
Knowing the length of the base and the diffusion length of the minority carriers in the base we
can compute the transport factor:
b≈1−
WB2
2L2nB
WB2
2DnB τnB
WB2
=1−
= 0.999996
2(kB T /q)µn τnB
=1−
Using the given value of the gain we can compute the correspondent common-base gain:
βF =
αF
1 − αF
⇒
αF =
βF
= 0.990099
1 + βF
Since αF = γF b, we can find the emitter efficiency γF = αF /b = 0.990103. From γF , it is
possible to compute NDE by inverting this expression:
µp NAB WB −1
γF = 1 +
µn NDE WE
Recall that we can use this formula if the emitter is short with respect to the diffusion length
of minority carriers. Let’s check if we are in this case:
p
LhE = VT µh τhE = 124.89 µm
↓
LhE WE
so we can solve for the donor density in the emitter:
NDE = NAB
µp W B
γF
= 2.5 × 1018 cm−3
µn WE (1 − γF )
The Ebers-Moll equivalent circuit is shown in Figure 4.7.
Exercise 4.2
Dimension a npn bipolar transistor (determine NDE and NAB ) in order to have β = 70 knowing
that at 300 K the semiconductor used has the following material parameters:
• electrons mobility: µn = 1350 cm2 (Vs)−1 ;
• holes mobility: µp = 480 cm2 (Vs)−1 ;
66
4.3 Exercises
• minority carriers lifetime: τnB = τhE = 30 µs
and that the transistor has the following dimensions:
• emitter length: WE = 5 µm;
• base length: WB = 3 µm;
Solution
From the value of β we can get the value of α:
α=
β
= 0.985915
1+β
From the relation 4.1.3 we can get the value for the base transport factor:
b≈1−
WB2
WB 2
≈ 0.99996
=
1
−
2L2n
2VT µn τn
and using the relation 4.1.2 we can get the value of γ:
α
0.985915
=
≈ 0.985957
b
0.99996
α = γb ⇒ γ =
Let us check that this approximation of the transport factor is indeed valid:
p
DnB = VT µn = 35.1 cm2 s−1 , LnB = DnB τn = 324 µm ⇒ LnB WB
Now using the Formula 4.1.4 (remember that you should check if the emitter is short with respect
to the minority carrier diffusion length):
1
µp NAB WB
1+
µn NDE WE
µp NAB WB
≈1−
µn NDE WE
γ=
we can get the following ratio between the doping densities:
NDE
≈ 15.2
NAB
Once again we check that the approximation is valid:
p
LpE = VT µp τp = 193 µm WE
Exercise 4.3
Consider a npn bipolar transistor made with a semiconductor with the following material parameters:
• electrons mobility: µn = 1350 cm2 (Vs)−1 ;
• holes mobility: µp = 480 cm2 (Vs)−1 ;
• minority carriers lifetime: τnB = τhE = 30 µs;
• relative dielectric constant r = 12;
• intrinsic carrier density ni = 1.5 × 1010 cm−3 ;
67
4 Bipolar junction transistors
The transistor has the following device parameter:
• WE = 2.5 µm;
• WB = 5 µm;
• WC = 20 µm;
• NDE = 1 × 1018 cm−3 ;
• NAB = 1 × 1017 cm−3 ;
• NDC = 1 × 1016 cm−3 ;
Compute the values of αF , αR , βF , βR in forward and reverse active region. Knowing that the
maximum electric field for avalanche breakdown Eaval = 300 kV/cm, find the voltage drop that
causes avalanche breakdown and punch-through breakdown.
Solution
In forward active region we can use the Formula 4.1.4 and 4.1.3
1
γ=
= 0.9336
NAB WB
1 + µµnh N
DE WE
WB2
b≈1−
≈ 0.9999
2L2nB
(WB LnB ≈ 3 × 10−4 m)
from which we obtain:
αF = 0.9335
βF = 14.04
In the reverse active region the collector behaves like the emitter:
γ=
1
NAB WB
1 + µµnh N
DC WC
= 0.53
(LhC WC )
while b does not change:
αR = 0.53
βR = 1.127
The maximum field on the base-collector junction is given by the Formula 3.1.8:
r
2qNeq (Vbi − VBC )
Emax =
where
Vbi =
kB T
ln
q
NAB NDC
n2i
= 0.757 V
Neq = NAB ||NDC = 9.09 × 1015
By solving the following equation:
Emax (VBC ) = Eaval
68
4.3 Exercises
we can find the voltage drop at which we have the avalanche breakdown:
VBC = Vbi −
E2
2qNeq max
= −32.7 V
Punch-through breakdown happens when |VBC | is so high to make the depletion region extends
up to the base-emitter contact, so when xp,B = WB . We can impose the following relation using
Formula 3.1.5:
s
2Neq (Vbi − VBC )
WB =
2
qNAB
and we finally obtain:
VBC = Vbi −
2
WB2 qNAB
2Neq
= −2.074 × 104 V.
Exercise 4.4
Consider the bias network for a npn transistor shown in Figure 4.8, having the following parameters:
• VCC = 15 V, VBB = 12 V;
R=RC
• RBB = 10 kΩ, RC = 300 Ω, RE = 100 Ω;
R=RBB
VDC=VCC
R=RE
VDC=VBB
AGROUND
Figure 4.8: Bias network, Exercise 4.4
1. Find the gain β of the transistor needed to obtain a voltage drop across RE equal to ∼ 2 V
2. Draw the equivalent circuit of the transistor for the given operating point (neglect reactive
components, Early effect and the resistance between base and intrinsic base), and compute
the small-signal parameters.
3. Draw the output characteristics for the common emitter configuration, also representing
the load line.
69
4 Bipolar junction transistors
Solution
Supposing that the transistor operates in the forward active region, we have VBE ≈ 0.6 V, and
IC = βIB . We can recover the base current solving the input mesh with the following KVL:
VBB = VRE + VBE + IB RBB
⇒
IB =
VBB − VBE − VRE
= 0.94 mA
RBB
The current gain β can be obtained easily from the voltage drop on the RE resistance:
VRE = (IC + IB )RE = (β + 1)IB RE
⇒
β=
VRE
− 1 = 20.28
RE IB
The equivalent circuit is shown in figure 4.9, where:
βVT
= 27.66 Ω
IC
IC
gm ≈
= 0.733 S
VT
rBE ≈
The load line of the transistor can be obtained from the KVL on the output loop:
rBE
B
iB
^
C
g m v^ B E
v BE
iC
v^ C E
E
Figure 4.9: Simplified equivalent circuit
VCC = IB (1 + β)RE + IC RC + VCE
⇒
VCC − VCE ≈ IC (RE + RC )
The maximum current ICmax and the maximum voltage VCEmax allowed by the bias network
correspond to the points where the load line intersects the y and x axis respectively:
VCC
= 37.5 mA
RE + RC
VCEmax = VCC = 15 V
ICmax =
The operating point of the transistor falls roughly in the middle of the load line, therefore it
validates the hypothesis of working in forward active region (see figure 4.10):
IC0 = βIB = 19.1 mA
VCE0 = VCC − VRE − IC RC = 7.28 V
Exercise 4.5
A npn bipolar transistor (ni = 1.5 × 1010 cm−3 , r Si = 11.9) has the following characteristics at
300 K:
• emitter length: WE = 10 µm;
70
4.3 Exercises
IC
lo a d lin e
IC m ax
IB = IB 0
IC 0
V C E0
V C E m ax= V C C
V C E
Figure 4.10: Operating point on the output characteristic for the common emitter configuration
• collector length: WC = 10 µm;
• donor density in the emitter: NDE = 3 × 1018 cm−3 ;
• acceptor density in the base: NAB = 1.5 × 1017 cm−3 ;
• donor density in the collector: NDC = 2 × 1018 cm−3 ;
• electron mobility: µn = 1200 cm2 (Vs)−1 ;
• hole mobility: µp = 600 cm2 (Vs)−1 ;
• minority carriers lifetime: τnB = τhE ;
• diffusion length of electrons in the base: LnB = 2 µm.
1. Find the length of the base needed to have an emitter efficiency γF = 0.998.
2. Find the correspondent common-emitter current gain βF .
3. Compute the maximum reverse bias voltage that can be applied before causing the breakdown of the transistor due to base punch-through. What design mistake led to such a low
value?
4. Draw the equivalent circuit of the transistor neglecting the parasitic capacitances, and
evaluate the small-signal parameters when the collector current is IC = 100 mA.
Solution
The length of the base can be obtained from the Formula 4.1.4 expressing the emitter efficiency:
µp NAB WB −1
1
µn NDE WE
⇒ WB =
−1
γF = 1 +
µn NDE WE
γF
µp NAB
However, before applying it one should check if the underlying assumptions of the model are
satisfied. In this case we should check if WE LhE holds. Let’s compute the hole lifetime in
the emitter knowing that it is equal to the electron lifetime in the base:
τhE = τnB =
L2nB
= 1.282 ns
VT µ n
71
4 Bipolar junction transistors
Now, using this lifetime, let’s compute the hole diffusion length in the emitter LhE :
p
LhE = Vt µh τhE = 1.41 µm
As we can see, WE LhE . Therefore, the assumption WE LhE does not hold and we should
not use Formula 4.1.4. In the case WE LhE , the emitter efficiency can be written as 4.1.4 by
replacing WE with LnE .
µn NDE
1
−1
LhE = 0.113 µm = 113 nm
WB =
γF
µp NAB
From this results we can assess that the basic assumption of a short base with respect to the
diffusion length of minority carriers, i.e. WB LnB , is satisfied. Let’s continue by computing
the common-emitter current gain βF .
b≈1−
WB2
= 0.98588
2L2nB
αF = bγF = 0.98391 ⇒ βF = 61.2
The breakdown voltage due to base punch-through can be computed from the formula for the
width of the depletion region on the base side for the BC junction:
s
2Neq (VbiBC − VBC )
≡ WB
xB =
2
qNAB
where
kB T
ln
VbiBC =
q
NDC NAB
n2i
= 0.9055 V
Neq = NAB k NDC = 1.395 × 1017 cm−3
thus obtaining:
VBC = VbiBC −
2
WB2 qNAB
= −0.66 V
2Neq
As we can see, |VBC | is low considered it is the limit value for the breakdown. This issue is due
to the fact that the donor density in the collector is higher that the acceptor density in the base,
therefore the depletion region will extend for the major part in the base causing breakdown also
at low reverse bias. The equivalent circuit is shown in figure 4.11, where:
βVT
= 15.91 Ω
IC
IC
gm ≈
= 3.846 S
VT
rBE ≈
Exercise 4.6
A npn bipolar transistor made of a semiconductor has the following characteristics:
• WE = 3 µm, WB = 1.5 µm, WC = ∞;
• LpE = 10 µm, LnB = 10 µm, LpC = 10 µm;
72
4.3 Exercises
B
iB
rBE
^
C
g m v^ B E
v BE
iC
v^ C E
E
Figure 4.11: Simplified equivalent circuit
• NDE = 1018 cm−3 , NAB = 1015 cm−3 , NDC = 1014 cm−3 ;
• µn = 1500 cm2 (Vs)−1 , µp = 800 cm2 (Vs)−1 .
1. Compute the emitter efficiency γF and the transport factor b.
2. Compute the common-base current gain αF and the common-emitter current gain βF .
3. Compute the minority carrier lifetime in the base and the transit time at 300 K.
R=RC
4. For the circuit shown in Figure 4.12 dimension the base resistance RBB to get a collector
current IC = 10 mA and then evaluate the voltage gain of the circuit VL /Eg (Vcc = 15 V,
Rc = 1 kΩ, RE = 470 Ω, VBB = 10 V).
R=RBB
VDC=VCC
R=RE
VDC=VBB
AGROUND
Figure 4.12: Bias network, Exercise 4.6
Solution
The emitter efficiency and the transport factor can be directly obtained from:
µp NAB WB −1
γF = 1 +
= 0.99973
µn NDE WE
WB2
b≈1−
= 0.98875
2L2nB
73
4 Bipolar junction transistors
The common-base and common-emitter current gains can be easily computed as:
αF = γF b = 0.98849
αF
= 85.854
βF =
1 − αF
We can compute the minority carrier lifetime in the base from the correspondent diffusion length:
LnB =
p
DnB τnB
→
τnB =
L2nB
L2nB
=
= 25.64 ns
DnB
(kB T /q)µn
and then find the base transit time:
τ0
≈ βF
τt
→
τt ≈
τnB
= 0.3 ns
βF
In order to dimension RBB we just need the input KVL (assuming that the transistor is working
in the forward active region, so that VBE ≈ 0.6 V and IC = βIB ):
VBB = RE (1 + βF )IB + VBE + IB RBB
→
RBB =
VBB − VBE
− RE (1 + βF ) ≈ 40 kΩ
IB
We must check the position of the operating point on the output characteristics (Figure 4.13),
therefore we write the output KVL:
VCC = IB (1 + βF )RE + IC RC + VCE
→
VCC − VCE ≈ IC (RE + RC )
then the intersections of the load line with the axes yield the maximum values for the collector
current and the collector-emitter voltage:
VCC
= 10.2 mA
RE + RC
VCEmax = VCC = 15 V
ICmax =
The operating point is:
IC
lo a d lin e
IC m ax
IC 0
IB = IB 0
V C E0
V C Em ax V C E
Figure 4.13: Operating point on the output characteristic for the common-emitter configuration
74
4.3 Exercises
IC0 = 10 mA
VCE0 = VCC − IC (RE + RC ) = 0.3 V
This result is very close to the saturation region of the transistor, meaning that our hypothesis
of working in forward active region may be wrong. Considering the result anyway acceptable
we can build the small signal equivalent circuit (Figure 4.14) and write the following equations:
vL = −gm vBE RC = −gm rBE iB RC
Eg = vBE + RBB iB + RE (iB + gm vBE ) = iB [rBE + RBB + RE (1 + gm rBE )]
to find the small signal parameters:
βF VT
= 223.2 Ω
IC
IC
gm ≈
= 0.3846 S
VT
rBE ≈
and finally obtaining the voltage gain:
vL
gm rBE RC
=−
= −1.0609
Eg
RBB + rBE + RE (1 + gm rBE )
iB
R
rBE
B
iC
g m v^ B E
B B
^
v BE
C
v^ C E
R
C
E
E g
R
E
Figure 4.14: Small-signal equivalent circuit used to compute the voltage gain
Exercise 4.7
Consider the bias circuit shown in figure 4.15 for a npn bipolar transistor: Knowing that:
• VCC = 15 V, VBB = 10 V;
• RBB = 100 kΩ, RC = 1 kΩ;
• current gain βF = 100
compute the operating point of the transistor, represent it on the load line and check whether
the hypothesis of working in forward active region is valid in the following cases:
1. RE = 1 kΩ
75
R=RC
4 Bipolar junction transistors
R=RBB
VDC=VCC
R=RE
VDC=VBB
AGROUND
Figure 4.15: Bias network, Exercise 4.7
2. RE = 0
Solution
First, we need to compute IB , and this can be obtained writing the input KVL and assuming
that the transistor is working in forward active region so that VBE ≈ 0.6 V and IC = βIB :
VBB = RBB IB + VBE + RE (β + 1)IB
⇒
IB =
VBB − VBE
RBB + RE (β + 1)
Therefore, IB = 46.8 µA if RE = 1 kΩ, and IB = 94 µA if RE = 0. We can write the output
KVL to find the load line and the operating point:
VCC = RE (IB + IC ) + VCE + RC IC
⇒
VCC − VCE ≈ (RE + RC )IC .
VCEM AX is obtained with IC = 0, so for any value of RE :
VCEM AX = VCC = 15 V.
ICM AX is obtained with VCE = 0, so ICM AX = 7.5 mA if RE = 1 kΩ, and ICM AX = 15 mA if
RE = 0. The operating point is:
IC0 = βIB = 4.68 mA
VCE0 = VCC − IC (RE + RC ) = 5.44 V
if RE = 1 kΩ
IC0 = βIB = 9.4 mA
VCE0 = VCC − IC (RE + RC ) = 5.6 V
if RE = 0
Figure 4.16 shows that, in both cases, the operating point is well inside the forward active region
so our original hypothesis is verified.
Exercise 4.8
A npn silicon bipolar transistor with the following material parameter at T = 300 K:
• intrinsic carrier density: ni = 1010 cm−3 ;
• relative dielectric constant: r = 12;
76
4.3 Exercises
IC
lo a d lin e
IC m ax
IB = IB 0
IC 0
V C Em ax V C E
V C E0
Figure 4.16: Operating point on the output characteristics for the common-emitter configuration
• electron and hole mobility: µn = 1200 cm2 (Vs)−1 , µp = 400 cm2 (Vs)−1 ;
• diffusion length of minority carriers: Ln = Lp = 10 µm;
has the following characteristics:
• dopant density in the emitter, base, collector: NDE = 1018 cm−3 , NAB = 1016 cm−3 ,
NDC = 1015 cm−3 ;
• emitter, base, collector length: WE = 5 µm, WB = 1 µm, WC = 20 µm;
1. Compute the emitter efficiency γF and the transport factor b.
2. Compute the common-base and common-emitter current gains αF and βF .
3. Compute the base-collector voltage needed to have a depletion region on the collector side
which is 1 µm long.
4. Draw the small-signal equivalent circuit (neglect all the capacitive effects and the Early
effect) and compute its parameters for a collector current IC = 5 mA.
Solution
Let’s start by computing the emitter efficiency:
µp NAB WB −1
= 1.000667−1 = 0.9993338
γF = 1 +
µn NDE WE
The base transport factor can be computed as:
b≈1−
WB2
= 0.99500
2L2nB
Finally we can obtain the current gain in common base and common emitter:
αF = γF b = 0.99434
αF
= 175.59
βF =
1 − αF
77
4 Bipolar junction transistors
The width of the depletion layer corresponding to the base-collector junction on the collector
side is:
s
2Neq (VbiBC − VBC )
.
xc =
2
qNDC
Knowing that
VbiBC = VT ln
NDC NAB
= 0.659 V
n2i
Neq = NAB k NDC = 9.09 × 1014 cm−3
we can find:
VBC = VbiBC −
2
x2C qNDC
= −0.17 V.
2Neq
Let’s compute the small-signal parameters:
βF VT
= 913.06 Ω
IC
IC
gm =
= 0.192 S
VT
rBE =
The small-signal equivalent circuit is shown in Figure 4.17.
B
iB
rBE
^
v BE
C
g m v^ B E
iC
v^ C E
E
Figure 4.17: Simplified equivalent circuit
Exercise 4.9
A silicon npn bipolar transistor at T = 300 K (energy gap Eg = 1.1 eV, intrinsic density ni =
1.5 × 1010 cm−3 , relative dielectric constant r rmSi = 11.9, electron and hole mobilities µn =
1200 cm2 (Vs)−1 , µp = 600 cm2 (Vs)−1 , threshold electric field for avalanche multiplication Ec =
300 kV/cm) has:
• emitter length: WE = 2 µm;
• collector length: WC = 15 µm;
• donor density in the emitter: NDE = 7 × 1018 cm−3 ;
• acceptor density in the base: NAB = 1 × 1018 cm−3 ;
• donor density in the collector: NDC = 3 × 1017 cm−3 ;
• diffusion length of electrons in the base: LnB = 5 µm.
1. Assuming complete ionization of the dopant impurities, evaluate the conductivity of the
neutral region of the emitter.
78
4.3 Exercises
r (x )
q N
D
-x p
x n
-q N
x
A
E (x )
-x p
x n
x
E M A X
Figure 4.18: Net electric charge and electric field profiles at the BC junction
2. Draw the profiles of net electric charge and electric field across the base-collector junction
at thermal equilibrium, quoting the maximum electric field Emax,BC .
3. Estimate the maximum reverse bias voltage that can be applied to the base-collector
junction before inducing the avalanche breakdown of the transistor.
4. Evaluate the lifetime of minority carriers in the base (τn ).
5. Assuming the same lifetime for minority electrons and holes in all sections of the device
(τn = τp , where τn has been evaluated in the previous question), determine whether an
exponential or a linear profile is a better approximation of the excess hole distribution
p0 (x) in the emitter and in the collector.
6. Estimate the base length WB corresponding to an emitter efficiency γF = 0.95.
7. Evaluate the corresponding common-base and common-emitter current gains αF , βF .
Solution
The conductivity of the neutral region of the emitter may be computed as:
σ = q(µn n + µp p) ≈ qµn n = 1346 S/cm
The profiles of the electric charge and electric field are shown in figure 4.18. In particular:
Vbi = VT ln
s
xn =
NAB NDC
= 0.905 V
n2i
20 r Neq Vbi
= 55.3 nm
2
qND
xp = xn
Emax =
ND
= 16.6 nm
NA
qNDC xn
= 252 kV/cm
0 r
79
4 Bipolar junction transistors
The maximum reverse bias which can be applied is:
−Vbr =
Ec2 0 r
− Vbi = 0.38 V
2qNeq
The lifetime of the minority carriers in the base (electrons) is:
τn,B =
L2n,B
VT µn
= 8 ns
Let’s now compute the diffusion length for minority carriers on the emitter and collector (holes):
p
Lh,E = Lh,C = VT µp τp = 3.5 µm
Considering WE and WC , in the emitter we will use a linear approximation (WE Lh,E ) while
in the collector we will use an exponential approximation (WC Lh,C ). Now let’s estimate
WB :
µn,B NDE WE
1
WB =
−1
= 1.47 µm
γ
µp,E NAB
Finally, let’s compute all the other parameters:
b=1−
WB2
= 0.956782
2L2n,B
α = γb = 0.9089429
α
= 9.98
β=
1−α
80
5 MOS system and MOSFETs
5.1 Summary
The MOS capacitor is a double heterojunction made of a metal (or heavily-doped polysilicon)
layer, a SiO2 (or high-k dielectric) layer and a silicon substrate (either p-type or n-type doped).
At thermal equilibrium the bands are curved due to the requirement of a constant Fermi level
throughout the system: to compensate the Fermi level difference between metal and silicon some
charges are transferred so an electric field is present. The band diagram at thermal equilibrium
in the case of p-type substrate is shown in Figure 5.1.
A flat-band voltage VF B must be
M
O
S
q|Vfb|
U0
qf S
qf M
Ecox
Ec
EFi
qf p
Ev
EF
Evox
Figure 5.1: nMOS band diagram at thermal equilibrium
applied to reach a condition where the bands are flat and the electric field is zero everywhere
(see Figure 5.2).
Assuming a p-type substrate, different operating conditions can be observed depending on
the applied voltage Vg :
• Vg < VF B : accumulation (bands at silicon/oxide interface are bent upwards)
• Vg > VF B but Vg < VT H : depletion (thermal equilibrium usually falls in the depletion
case)
• Vg > VT H : inversion (a thin layer at the substrate/oxide interface presents electrons as
majority carriers because the bands are so bent that the intrinsic Fermi level falls below
the Fermi level. The electrons get trapped in this channel because on one side the oxide
bandgap is very high and on the other side the bands are sloped towards higher energies)
The threshold voltage (if there is no substrate bias) can be computed as:
√
p
VT H0 = VF B + 2φP + γ 2φP = VF B + 2φP +
4qNA φP
Cox
81
5 MOS system and MOSFETs
M
O
S
U0
qf M
Ecox
qf S
qc
Ec
EF
q|Vfb |
Egox
Eg
EF
Ev
Evox
Figure 5.2: nMOS band diagram in flat-band conditions
where γ is called body factor, and
ox
tox
NA
φP = VT log
ni
Cox =
In case a substrate bias VB is present, the threshold voltage becomes:
h
i
VT H = VT H0 + γ (2φP − VB )1/2 − (2φP )1/2
but generally, if the body factor is small, this contribution will be neglected. The flat band
voltage can be found from considerations on the band diagram as the difference between the
work functions of the metalllic gate and of the silicon substrate:
V F B = φW M − φW S .
Notice that a charge density Qox trapped in the oxide can modify the value of the flat-band
voltage as
Qox
∆VF B = −
Cox
The charge present in the channel can be computed as:
Qn = −Cox (Vg − VT H )
(5.1.1)
Assuming a n-type substrate, the different operating conditions that can be observed depending
on the applied voltage Vg become:
• Vg > VF B : accumulation (bands at silicon/oxide interface are bent downwards)
82
5.1 Summary
• Vg < VF B but Vg > VT H : depletion (electrons are depleted from the surface of semiconductor)
• Vg < VT H : inversion (a thin layer at the substrate/oxide interface presents holes as majority carriers because the bands are so bent that the intrinsic Fermi level lies above the
Fermi level)
The threshold voltage (if there is no substrate bias) can be computed as:
√
p
4qND φN
VT H0 = VF B − 2φN − γ 2φN = VF B − 2φN −
Cox
where
φN = VT log
ND
ni
In case a substrate bias VB is present, the threshold voltage becomes:
h
i
VT H = VT H0 − γ (2φN − VB )1/2 − (2φN )1/2
A MOSFET is a field-effect transistor that exploits the MOS system. Depending on the bias
conditions, it can be used as a voltage-controlled current source (for analog applications) or
a voltage-controlled switch (for digital applications). Its terminals are called gate, source and
drain. A large-signal model of its behavior is the following:
h
i
(
2
VDS
W
µ
C
(V
−
V
)
V
−
for VDS < VDSS (triode region)
n ox
GS
TH
DS
2
IDS = L
2
W
2L µn Cox (VGS − VT H ) [1 + λ (VDS − VDSS )] for VDS > VDSS (saturation)
with VDSS = VGS − VT H . There are normally-ON (depletion) and normally-OFF (enhancement)
MOSFETs:
normally-ON
normally-OFF
D
D
G
nMOS
G
S
VT H < 0
S
VT H > 0
S
S
G
G
pMOS
VT H > 0
D
VT H < 0
D
A small-signal equivalent circuit can be defined for operation in the saturation region; it is
shown in Figure 5.3 and its parameters are
g0 = λIDS
W
gm =
µn Cox (VGS − VT H )
L
83
5 MOS system and MOSFETs
G
RG
v^GS
CGD
CGS
D
gm^
vGS
1/g0
S
Figure 5.3: MOSFET small-signal equivalent circuit
5.2 Review questions
Question 5.1 Is there a net charge at MOS capacitor plates at VG = 0 V? If there is, there
must be an electric field at the semiconductor surface to keep that charge at the capacitor plates.
With no gate voltage applied, where can this electric field originate from?
Solution
Yes, there is a net charge at the capacitor plates when no gate voltage is applied. Since at thermal
equilibrium the Fermi level is constant through the device the energy bands must be bent. This
results in having an electric field for the depletion layer that is created at the substrate/oxide
interface. Also notice that we have a very narrow distribution of charges at metal/oxide interface
that come from the depleted layer.
Question 5.2
How is the condition of zero charge at MOS capacitor plates referred to? Is there any field in
the oxide or the substrate? Is there any potential difference between the surface and the bulk
of the silicon substrate?
Solution
It’s called flat-band condition. Since the bands are flat there is no electric field anywhere. In
general, in real cases, a voltage VF B must be applied to keep the bands flat.
Question 5.3
How is the corresponding mode referred to and what type of mobile and/or fixed charge appears
at the semiconductor surface of an MOS capacitor on p-type substrate when:
a) a negative effective voltage (VG − VF B < 0) is applied to the gate?
b) a small positive effective gate voltage (VF B < VG < Vth ) is applied to the gate?
c) a large positive effective gate voltage (VG > Vth ) is applied to the gate?
Solution
The condition of the MOS referred to the modes are:
a) Accumulation: holes
b) Depletion: ionized acceptors
c) Inversion: electrons
84
5.2 Review questions
Question 5.4
Can a single MOSFET be used as both a voltage-controlled switch (digital operation) and a
voltage-controlled current source (analog operation)?
Solution
Yes, according to the biasing conditions the MOSFET can operate in the triode or cutoff regions
(open/closed switch) or in the saturation region (voltage-controlled current source).
Question 5.5
Why does source-to-bulk reverse-bias voltage (VSB > 0) increase the threshold voltage? What
is this effect called?
Solution
It is called body effect and it increases the barrier between source and drain, so that a higher
voltage is needed to create the conductive channel.
Question 5.6
The flat-band voltage and the threshold voltage of an MOS capacitor are VF B = −3 V and
Vth = −1 V, respectively. The gate oxide capacitance is Cox = ox /tox = 3.45 × 10−7 F cm−2 .
1. Is this capacitor created on an n-type or p-type semiconductor? Explain your answer.
2. What is the density of minority carriers at the semiconductor surface when the voltage
applied between the metal and semiconductor electrodes is VG = −2V ?
3. What is the density of minority carriers at the semiconductor surface when no voltage is
applied across the capacitor (VG = 0)?
Solution
The answers are:
1. A p-type semiconductor is used because we notice that VF B < VT H < 0. As the applied
voltage increases for values > VT H the potential well at the semiconductor/oxide interface
gets deeper so this indicates a p-type semiconductor.
2. Qn = 0 , we’re below the threshold voltage
3. We can compute this value using Formula 5.1.1: Qn = −3.45 × 10−7 C/cm2
Question 5.7
Which of the following statements, related to MOSFETs are NOT correct?
1. n-type substrate is used to make normally-on p-channel MOSFETs
2. The net charge at the semiconductor surface is zero at VGS = Vth
3. If a MOSFET is in the linear region, it is also in the triode region
4. Existence of a significant drain current at VGS = 0V indicates a faulty MOSFET
5. For a MOSFET in saturation, the channel carriers reach the saturation drift velocity at
the pinch-off point
6. The threshold voltage of an enhancement-type p-channel MOSFET is negative
7. Positive gate voltage is needed to turn a normally-on p-channel MOSFET off
85
5 MOS system and MOSFETs
8. A MOSFET cannot be in both the triode and saturation region at the same time
9. The above-threshold current in the MOSFET channel is essentially due to diffusion
10. Both electrons and holes play significant roles in the flow of drain-to-source current
Solution
Statements 4, 5, 9, 10 are false for the following reasons:
4. A normally-on MOSFET displays exactly this behavior and it’s not faulty
5. The saturation drift velocity can be reached also in other points of the channel according
to the strength of the lateral electric field
9. It is essentially drift current
10. No, depending on the type of substrate the channel is of n-type (electrons) or of p-type
(holes)
5.3 Exercises
Exercise 5.1
A silicon MOSFET with n-type channel has the following characteristics at 300 K:
• Si band gap: Eg = 1.12 eV;
• intrinsic carrier density: ni = 1.5 × 1010 cm−3 ;
• Si dielectric constant: r,Si = 11.9;
• oxide dielectric constant: r,ox = 3.9;
• acceptor density in the substrate: NA = 5 × 1017 cm−3 ;
• oxide thickness: tox = 100 Å;
• channel length: L = 1 µm;
• channel width: W = 3 µm;
• Si electron affinity: qχ = 4.05 eV;
• metal work function: qφM = 4.8 eV;
• electron mobility: µn = 600 cm2 (Vs)−1 ;
• number of positive ions trapped in the oxide: No = 105 .
1. Draw the band diagram, reporting the values of the energy levels, assuming a gate voltage
VG equal to the flat-band voltage VF B .
2. Compute the threshold voltage Vth assuming a substrate bias voltage VB = 0.5 V.
3. Write the expression for the drain current neglecting the effect of the substrate, and draw
the V I characteristics of the MOSFET.
86
5.3 Exercises
O
M
S(p)
U0
U0
-qVG=-qVfb
EWS
EWM
Ecox
E’WM
EF
qDcOS
Ec
Efi
EFh=EFn
Ev
q|Vfb |
Evox
Figure 5.4: Flat-band condition band diagram, Exercise 5.1
Solution
The flat-band voltage VF B can be computed as:
VF B = (φM − φS ) −
Qo
Cox
with
ox
= 3.453 × 10−7 F cm−2
tox
and Qo being the charge density per unit surface in the oxide:
Cox =
Qo =
qNo
= 5.34 × 10−7 C cm−2
WL
⇒
Qo
= 1.5454 V
Cox
We can therefore compute the difference between the work function of the metal and the work
function of the semiconductor:
Eg
(qφM − qφS ) = qφM − qχ +
+ (EF i − EF )
2
Eg
= qφM − qχ +
+ kB T ln(NA /ni )
2
= −0.2604 eV
The flat-band voltage is VF B = −1.8058 V; the band diagram is shown in figure 5.4.
The threshold voltage can be expressed as:
h
i
Vth = Vth0 + γB (2φp − VB )1/2 − (2φp )1/2
where:
φp = VT ln(NA /ni ) = 0.4504 V
√
2qNA
= 1.1899 V1/2
γB =
Cox
Vth0 = 2φp + γB (2φp )1/2 + VF B = 0.224 V
87
5 MOS system and MOSFETs
IDS
VGS (V)
4
VT= -0.152 V
3
2
-0.152
1 V
DS
canale n, norm. ON
Figure 5.5: IV characteristics, Exercise 5.1
obtaining:
Vth = −0.152 V
The drain current is:

2 
 W µn Cox (VGS − Vth )VDS − VDS
VDS ≤ VDSS

L
2
ID =


 W µn Cox (VGS − Vth )2
VDS ≥ VDSS
2L
where VDSS = VGS − Vth and
W µn Cox
= 0.62 mA(V)−2
L
The IV characteristics are shown in figure 5.5
Exercise 5.2
Consider a silicon MOSFET with n channel at 300 K (Eg = 1.12 eV, ni = 1.5 × 1010 cm−3 ,
r,Si = 11.9, r,ox, = 3.9, qχ = 4.05 eV) with the following geometrical parameters:
• width: W = 10 µm;
• length: L = 2 µm;
• oxide thickness: tox = 10 nm.
1. Knowing that the drain current in the saturation region is:
• IDSs (VGS = 3 V) = 2 mA;
• IDSs (VGS = 4 V) = 7 mA;
compute the threshold voltage Vth of the device and the electron mobility in the channel
(use the quadratic model)
2. Evaluate the charge per unit surface in the oxide layer knowing that the substrate has
acceptor density NA = 5 × 1016 cm−3 and that the metal of the gate has work function
qφM = 4.5 eV.
3. Assuming an hole mobility µp0 = 600 cm2 (Vs)−1 , determine the ratio W/L for a complementary p-channel transistor, i.e. a transistor having the same current of the nMOS
considered in the data but with opposite direction, also assuming the same |VGS | and the
same tox and |Vth |.
88
5.3 Exercises
Solution
Using the quadratic model we can write the following system of equations:
1 W µn Cox
(3 − Vth )2 = 2 mA
2
L
1 W µn Cox
IDS (VGS = 4V) =
(4 − Vth )2 = 7 mA
2
L
IDS (VGS = 3V) =
Dividing the first equation by the second one we obtain an equation with Vth as the only unknown, thus finding Vth = 1.8517 V. The electron mobility can be easily computed by replacing
this value in the first equation:
µn =
2LIDS
2LIDS tox
=
= 1755 cm2 (Vs)−1
2
W Cox (VGS − Vth )
W ox (VGS − Vth )2
The charge per unit surface in the oxide layer can be computed from this formula:
VF B = (φM − φS ) −
Qo
Cox
We can compute (qφM − qφS ):
Eg
(qφM − qφS ) = qφM − qχ +
+ (EF i − EF )
2
Eg
= qφM − qχ +
+ kB T ln(NA /ni )
2
= −0.498 eV
and therefore φM − φS = −0.498 V. Substituting the expression of VF B in the expression for
the threshold voltage we obtain:
Vth = 2φp + γB (2φp )1/2 + VF B = 2φp + γB (2φp )1/2 + (φM − φS ) −
Qo
Cox
where:
√
2qNA
= 0.37588 V1/2
Cox
NA
φp = VT ln
= 0.3905 V
ni
γB =
Using the appropriate values of γB , φp and Vth we get:
Qo
Qo
=
= −1.239 V
Cox
ox /tox
→
Qo = −4.28 × 10−7 C cm−2
Using the hypothesis that tells that the saturation currents for the n-MOS and the p-MOS are
equal we obtain:
W
W
W
W
µn
µn =
µp →
=
= 14.625
L n
L p
L p
L n µp
Exercise 5.3
A silicon MOSFET with n-type channel (Eg = 1.12 eV, ni = 1.5 × 1010 cm−3 , r,Si = 11.9,
r,ox = 3.9, qχ = 4.05 eV, µn = 600 cm2 (Vs)−1 ) has the following characteristics at 300 K:
• an n-type heavily doped polysilicon gate ;
89
5 MOS system and MOSFETs
• acceptor density in the substrate: NA = 1016 cm−3 ;
• oxide thickness: tox = 200 Å;
• channel length: L = 1.5 µm;
• channel width: W = 6 µm;
Neglecting the effect of any charge trapped in the oxide layer:
1. draw the band diagram of the MOS system at thermal equilibrium;
2. compute the threshold voltage Vth obtained for a substrate voltage VB = −1 V;
3. draw the IDS (VDS ) characteristic of the MOSFET, reporting the curve obtained for VGS =
5 V;
4. draw the small-signal equivalent circuit of the MOSFET, and compute the transconductance for VGS = 2Vth .
Solution
The band diagram is shown in figure 5.1, where
qφp = EF i − EF = kB T ln(NA /ni ) = 0.3487 eV
Since the gate is made of n-type heavily doped polysilicon, the position of the Fermi level in the
gate almost coincides with the bottom of the conduction band, thus:
qφM ≈ qχ
Recalling the relation
qφS = qχ + Eg /2 + (EF i − EF )
it is possible to obtain the expression for the flat-band voltage:
qVF B = (qφM − qφS ) = − [Eg /2 + (EF i − EF )substrate ] = −0.9087 eV
The threshold voltage is:
i
h
Vth = Vth0 + γB (2φp − VB )1/2 − (2φp )1/2
with Vth0 = 2φp + γB (2φp )1/2 + VF B
where:
ox
= 1.727 × 10−7 F cm−2
tox
√
2qNA
γB =
= 0.3365 V1/2
Cox
φp = VT ln(NA /ni ) = 0.3487 V
Cox =
so, substituting the correct numerical values, we get: Vth = 0.2271 V. Using the quadratic model
we get:
W µn Cox
(VGS − Vth )2 = 4.72 mA
2L
VDSS = VGS − Vth = 4.7729 V
IDS =
for VGS = 5 V
The IDS (VDS ) characteristic is shown in figure 5.6. The small-signal equivalent circuit for the
MOSFET is shown in figure 5.7, where the transconductance gm is:
gm =
90
∂IDS
W µn Cox
=
(VGS − Vth )
∂VGS
L
⇒
gm |VGS =2Vth = 94 µS
5.3 Exercises
IDS
VGS (V)
4
4.72 mA
VT= 0.2267 V
3
2
1 V
DS
0.2267
n channel , norm. OFF
4.7733 V
Figure 5.6: IDS (VDS ) characteristic of the MOSFET, Exercise 5.3
G
CGD
RG
v^GS
CGS
D
gm^
vGS
1/gDS
S
Figure 5.7: Small-signal equivalent circuit of the MOSFET, Exercise 5.3
# ( (
" &
" !"
" (
$ &
" #$%
$ '
! !"
! #$%
" )
" '
# **
Figure 5.8: Exercise 5.4 circuit
91
5 MOS system and MOSFETs
!
$ $
# $
# " "
!
!
% & '
" "
Figure 5.9: Bias network for the MOSFET, Exercise 5.4
Exercise 5.4
The Figure 5.8 shows a common-source amplifier: Given the following information:
• C1 → ∞, C2 → ∞;
• RL = 6.8 kΩ, RD = 3.9 kΩ, R1 = 270 kΩ, R2 = 620 kΩ
• VDD = 15 V, VSS = 0 V
2
• n-channel MOSFET, Vth = 1.5 V, βn = µn Cox W
L = 8 mA/V and λ = 0
1. Write the imput and output KVLs
2. Find the operating point of the transistor
3. Draw the output characteristic of the MOSFET and the load line for the biasing network
shown in figure. Highlight the position of the operating point.
Solution
Let’s solve step by step all the requests of the exercise:
1. The bias network is shown in figure 5.9. It is convenient to find the Thevenin equivalent
circuit of the original one seen from gate and ground and that is what has been represented
in figure. The Thevenin-equivalent voltage source and resistance are:
VGG = VDD
R1
= 4.5506 V
R1 + R2
and RGG = R1 ||R2 = 188.0899 kΩ
The input KVL is:
VGG = RGG IG + VGS ≡ VGS
as IG = 0
while the output KVL is:
VDS + RD IDS = VDD
2. As regards finding the operating point of the transistor we must assume that it is working
in the saturation region, hence:
IDS =
92
βn
(VGS − Vth )2
2
5.3 Exercises
IDS
VGS (V)
IDSmax
4.5506
IDS0
VT=1.5 V
4
3
2
VDS0
VDD VDS
canale n, norm. OFF
Figure 5.10: Output characteristic of the MOSFET with the load line, Exercise 5.4
then we solve the output KVL, finding:
VDS = VDD − RD (βn /2)(VGG − Vth )2 = −130.1761 V
This solution cannot be accepted, therefore it is wrong to think that the transistor operates
in the saturation region; supposing that the MOSFET is working in the triode region
(VDS < VDSS ) the expression for the current is:
2 VDS
IDS = βn (VGG − Vth )VDS −
2
and we can substitute it the output KVL:
VDS = VDD − RD βn
V2
(VGG − Vth )VDS − DS
2
that can be seen as:
2
+ bVDS + c = 0
aVDS
where a = RD βn /2, b = −[1 + RD βn (VGG − Vth )] and c = VDD . Solving this equation we
get two solutions: VDS = 5.9012 V and VDS = 0.1629 V; the second result is the only one
acceptable because it is less than VDSS = VGS − Vth ≈ 3 V. Finally, the operating point is:
VDS0 = Vout = 0.1629 V
2
VDS0
IDS0 = βn (VGG − Vth )VDS0 −
= 3.8035 mA
2
The output characteristic and the load line are shown in figure 5.10, where IDS,max =
3.8462 mA.
Exercise 5.5
Consider an n-channel, silicon MOSFET at 300 K (Eg = 1.12 eV, ni = 1.5 × 1010 cm−3 , r,Si =
11.9, r,ox = 3.9, qχ = 4.05 eV) with the following geometry:
93
5 MOS system and MOSFETs
• width: W = 1.0 µm;
• length: L = 0.5 µm;
• oxide thickness: tox = 4 nm.
Knowing that the drain current (in saturation) is IDSs = 4 mA in correspondence of a gate
voltage VGS = 4V and that the transconductance is gm = 10 mS , compute (using the quadratic
model) the threshold voltage Vth of the device and the electron mobility in the channel.
Solution
Using the quadratic form of the saturation current:
IDSs =
W µn Cox
(VGS − Vth )2
2L
The transconductance is, instead, obtained from the formula:
gm =
W µn Cox
(VGS − Vth )
L
Working out VGS − Vth from the second equation and replacing it in the first one, it is possible
to obtain:
2
gm
W µn Cox
=
= 6.25 mA/V2
2L
4IDSs
Let’s compute the oxide capacitance:
Cox =
ox
= 8.63 × 10−7 F/cm2
tox
Now it’s possible to compute the mobility of electrons:
µn =
2
2L
gm
·
= 7242 cm2 (Vs)−1
4IDSs W Cox
Finally, substituting the values just obtained in the previously worked formula it is possible to
obtain:
VGS − Vth = 0.8 V
and using the known value of the gate voltage:
Vth = 3.2 V
Exercise 5.6
In a nMOS the threshold voltage is 1 V.
1. Knowing that the oxide thickness is 750 Å, and r,ox = 4, compute the kind of dopant
and the dose that must be implanted at the oxide-semiconductor interface to lower the
threshold voltage to 0 V.
2. For a threshold voltage of 0 V, and knowing that W = 3 µm, L = 1 µm, µn = 600 cm2 (Vs)−1 ,
compute the drain current in saturation for VGS = 5 V using the quadratic model.
Solution
Let’s solve step by step all the requests of the exercise:
94
5.3 Exercises
1. The threshold voltage Vth can be computed from:
p
Vth = 2φp + γB 2φp + VF B
with:
VF B = (φM − φS )
To lower the threshold voltage from 1 V to 0 V we need a charge Q0 and the new threshold
voltage is:
p
0
Vth
= 2φp + γB 2φp + VF0 B
with:
VF0 B = (φM − φS ) −
Q0
Cox
Therefore we get:
0
∆Vth = Vth
− Vth = VF0 B − VF B = −
Q0 = −∆Vth Cox = −∆Vth
Q0
= −1 V
Cox
ox
= 4.73 × 10−8 C cm−2
tox
The dose for the implantation process is:
donor atoms
Q0
= 2.95 × 1011
q
cm2
2. The drain current in saturation is given by:
IDSS =
W µn Cox
(VGS − Vth )2 = 1.06 mA
2L
Exercise 5.7
An n-channel, silicon MOSFET at 300 K (Eg = 1.12 eV, ni = 1.5 × 1010 cm−3 , r,Si = 11.9,
r,ox = 3.9, qχ = 4.05 eV, µn = 1200 cm2 (Vs)−1 , µp = 500 cm2 (Vs)−1 ) has a polysilicon gate
and the following characteristics:
• acceptor density in the substrate: NA = 3 × 1016 cm−3 ;
• oxide thickness: tox = 250 Å;
• aspect ratio: W/L = 4.
1. Knowing that the threshold voltage of the device is Vth = 0.5 V, compute the flat-band
voltage VF B and the density of dopants in the polysilicon gate. Neglect the effect of the
substrate bias and of any charge trapped in the oxide.
2. Compute the density of the dopants (determining whether acceptors or donors are needed)
that must be implanted in the channel to reach a threshold voltage of 0 V.
3. Write the expression of the saturation current according to the quadratic model and draw
the IDS (VDS , VGS ) output characteristic.
Solution
Let’s solve step by step all the request of the exercise:
95
5 MOS system and MOSFETs
1. In this case, even though the gate is made of polySi, it is not possible to use the approximation qφM ≈ qχ, because it is not known whether the gate is heavily n-doped or not.
Therefore, it is not possible to say if the Fermi level roughly coincides with the bottom of
the conduction band. We must compute the work function qφM of the polySi as:
qφM = qχ +
Eg
Eg
nG
− (EF − EF i ) = qχ +
− kB T ln
2
2
ni
where nG is the dopant density in the gate. The threshold voltage is:
p
Vth = 2φp + γB 2φp + VF B
with
φp = VT ln
NA
= 0.377 V
ni
ox
= 1.38 × 10−7 F/cm2
tox
√
2qS NA
γB =
= 0.729 V1/2
Cox
Cox =
so the flat-band voltage is:
VF B = Vth − 2φp − γB
p
2φp = −0.887 V
The flat-band voltage can be also obtained from:
V F B = φM − φS
with:
qφS = qχ +
Eg
Eg
NA
+ (EF i − EF ) = qχ +
+ kB T ln
2
2
ni
Hence, we get:
nG
NA
+ ln
qVF B = qφM − qφS = −kB T ln
ni
ni
so:
nG =
n2i − VVF B
e T = 4.9 × 1018 cm−3
NA
2. In this case, the dopants are implanted in the channel and not in the oxide layer. The
threshold voltage can be lowered from 0.5 V to 0 V by implanting donors in the channel.
The new threshold voltage is:
Qox
0
= Vth −
Vth
Cox
thus getting the donor density (per unit surface):
Qox
0 Cox
= (Vth − Vth
)
= 4.31 × 1011 cm−2
q
q
3. The drain current is:

2 VDS
W µn Cox


(VGS − Vth )VDS −
VDS ≤ VDSS

L
2
ID =


 W µn Cox (VGS − Vth )2
VDS ≥ VDSS
2L
where VDSS = VGS − Vth and (W µn Cox )/L = 0.662 mA V−2 . The IV characteristics are
shown in Figure 5.11.
96
5.3 Exercises
IDS
VGS (V)
4
VT= 0 V
3
2
0
1 V
DS
canale n, norm. ON
Figure 5.11: IV characteristic of the MOSFET in Exercise 5.7
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6 Technology
6.1 Summary
Silicon wafers can be produced starting from the raw material (SiO2 quartzite) passing through
the following steps:
1. Quartzite → metal grade polySi → triclorosilane → purified triclorosilane → electron grade
polySi
2. through the Czochralski process (see question 2 for details) we can grow single crystal
ingots. They can be further purified through the floating zone process (a coil is used to
locally melt the ingot and to segregate the impurities in liquid phase, then they are moved
to the top of the ingot)
3. ingots are subject to lathing and cutting to obtain wafers
4. further lapping and polishing
Epitaxial growth is used to grow single-crystal layers starting from a substrate. It can be
performed in several ways: VPE, LPE, MBE, MOCVD, etc.
The oxidation process is required to grow layers of silicon (or else) oxide on the top of the
substrate. It can be mainly performed in two ways: wet or dry oxidation. Wet oxidation is
typically faster but produces lower quality oxides; on the other hand dry oxidation is slower but
yields better quality oxides. The law of growth is:
A
x=
2
"s
t+τ
−1
1+ 2
A /4B
#
(6.1.1)
where the coefficients A, B can be read from empirical charts (see Figure 6.1 and 6.2) as functions
of temperature.
There are two main techniques to dope a substrate: thermal diffusion and ion implantation.
Thermal diffusion occurs significantly at relatively high temperatures and can be carried out
using a constant surface concentration of dopants or a constant total dose. In the former case
dopants are constantly supplied so that the surface concentration remains constant in time (and
consequently the total dose will increase):
C(x, t) = Cs erfc
x
√
2 Dt
(6.1.2)
In the latter case no new atoms are supplied and the surface concentration will tend to decrease,
as the dopants diffuse through the substrate: the total dose S is constant:
Z ∞
S=
C(x, t)dx = const
(6.1.3)
0
By ion implantation, instead, the dopants are shot by an ion accelerator into the substrate. This
allows to carefully control the profile of the implanted atoms but it often damages the structure
99
6 Technology
of the substrate so that annealing is needed to repair it. The profile will be Gaussian due to the
randomness in the collisions between the shot ions and the atoms in the substrate:
(x − Rp )2
S
(6.1.4)
N (x) = √
exp
2(∆Rp )2
2π∆Rp
where Rp and ∆Rp are called, respectively projected range and straggle.
Several techniques can be used to deposit materials (often metals or dielectrics) onto a substrate: chemical vapor deposition (CVD), physical deposition (evaporation or sputtering), spinning, etc. Photolithography is a way to write patterns on deposited thin films. See question 1
for more details.
h
Wet oxidation
Dry oxidation
Temperature
Figure 6.1: B/A coefficient as functions of temperature
6.2 Review questions
Question 6.1
List the main steps of the photolithographic process used in the production of silicon-based
integrated circuits.
Solution
The step of the photolithographic process are:
1. applying a photoresist by spin-on onto the substrate (a photoresist is a substance which is
sentitive to exposure to certain kinds of light (e.g. UV light; we define positive or negative
resists depending on their behavior once exposed);
2. superimposing a mask with the desired pattern to be transferred on the circuit; this mask
is transparent to UV light except in those parts where patterns are drawn, so that the
underlying resist is exposed only in certain parts. These exposed parts are then soluble to
the development solution (in case of a positive resist), so they can be stripped away;
100
6.3 Exercises
h
Wet oxidation
Dry oxidation
Temperature
Figure 6.2: B coefficients as functions of temperature
3. etching can be performed to remove the uppermost layer of the substrate (for example
to open a window, through the oxide layer, on the silicon substrate to dope it in a later
stage);
4. when the mask provided by the resist left after the development is no longer needed, it
can be removed through a stripping solution.
Question 6.2
What is the Czochralski process used for? Briefly describe it.
Solution
The Czochralski process is used to grow single-crystal semiconductor ingots. This is achieved
melting electron-grade poly-crystalline silicon in a crucible, which is RF heated to avoid any
contamination of the silicon. Dopants can be added to the molten silicon. A seed is then
inserted and slowly pulled upwards while rotating to form a single-crystal ingot. The process is
pretty slow and the extraction of the ingot can proceed at speeds around 0.2 ÷ 1.5 mm/h. The
machinery used to carry out the process is called puller and, inside it, a noble gas like argon is
used instead of oxygen to prevent silicon from oxidation.
6.3 Exercises
Exercise 6.1
A silicon substrate is subjected to an oxidation process along the (111) direction in O2 atmosphere at T1 = 1000 ◦ C with a duration t1 = 2 h. An additional wet oxidation process has
T2 = 900 ◦ C and duration t2 = 4 h. Determine the total thickness of SiO2 after the two processes.
Solution
From the charts reported in Figure 6.1 and 6.2 we can see that:
−1 µm2 /h
1
1. B1 ≃ 10−2 µm2 /h, B
A1 ≃ 10
=⇒
A1 = 10−1 µm
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6 Technology
2. B2 ≃ 2 · 10−1 µm2 /h, A2 ≃ 0.67 µm.
As regards the first process we can apply the general formula to compute the thickness of the
oxide layer formed by this process (notice that τ1 = 0 since there is no pre-existent oxide layer):
A1
x1 =
2
"s
#
t + τ1
− 1 = 0.1 µm.
1+ 2
A1 /4B1
After the second process the total thickness of the oxide layer is given by
A2
xTOT =
2
"s
t2 + τ2
−1
1+ 2
A2 /4B2
#
where τ2 is the time needed to grow x1 with the conditions of the second process, so it can be
computed as:
"
#
A22
2x1 2
τ2 =
1+
− 1 = 0.38 h
4B2
A2
And Finally: So finally:
xTOT = 0.66 µm
Exercise 6.2
A silicon substrate is implanted with:
• P, Eimp,1 = 200 keV
total dose (i.e. number of atoms per unit surface): S1 = CP = 1012 cm−2
• B, Eimp,2 = 30 keV
total dose: S2 = CB = 1012 cm−2
From the charts it is possible to obtain the following values for the projected range and the
straggle:
RP ≃ 0.3 µm
∆RP ≃ 0.07 µm
RB ≃ 0.1 µm
∆RB ≃ 0.03 µm
1. Compute the maximum value for the acceptor density and the donor density.
2. Compute the value of xP N , where NA = ND .
Solution
By taking a look at the implantation energies we can expect a profile for the doping density
that resembles the one shown in Figure 6.4. Notice that we are implanting both acceptors and
donors in the same substrate so we are basically realizing a p-n junction.
1. The maximum donor density can be easily computed by noticing that it is found at x = RP
and the same for the acceptor density x = RB . The projected range is in fact the mean
102
6.3 Exercises
Projected range
for
for
Straggle
Energy
Energy
Figure 6.3: Projected range and straggle
103
6 Technology
14
16
x 10
X: 0.1
Y: 1.33e+017
12
Nd
Na
−
Concentration [cm 3]
10
8
X: 0.3
Y: 5.7e+016
6
4
2
0
0
0.1
0.2
0.3
x [µm]
0.4
0.5
0.6
0.7
Figure 6.4: Profiles of the concentrations of implanted ions
value of the Gaussian distribution. So:
(
)
CP
1 RP − RP 2
CP
ND,max = √
exp −
=√
=
2
∆R
2π∆RP
2π∆RP
P
1012 cm−3
= 5.7 × 1016 cm−3
2π · 0.07 · 10−4
(
)
CB
1 RB − RB 2
CB
NA,max = √
=√
exp −
=
2
∆RB
2π∆RB
2π∆RB
=√
=√
1012 cm−3
= 1.33 × 1017 cm−3
2π · 0.03 · 10−4
2. We can now use the hypothesis NA = ND to set the following equality and solve for xP N :
(
(
)
)
CP
1 xP N − RP 2
CB
1 xP N − RB 2
√
exp −
=√
exp −
2
∆RP
2
∆RB
2π∆RP
2π∆RB
⇓
(
1
ND,max exp −
2
xP N − R P
∆RP
2 )
(
1
= NA,max exp −
2
xP N − RB
∆RB
2 )
⇓
( )
ND,max
1 xP N − RP 2 1 xP N − RB 2
−
= exp
NA,max
2
∆RP
2
∆RB
By some computations, it is possible to obtain:
xP N = 0.16 µm
Exercise 6.3
A silicon substrate, uniformly n-doped with ρ = 5 Ωcm, is implanted with boron ions (CB =
1012 cm−2 , Eimp = 100 keV) and then annealed at 1000 ◦ C for 2 h. Assume µn = 103 .
104
6.3 Exercises
1. What is the maximum acceptor density after implantation? How deep is the p-region?
2. What is the maximum acceptor density and the depth of the p-region after annealing?
Solution
The situation is represented in figure 6.5. A preliminary passage to be performed before answering the questions is finding the donor density from the given resistivity:
n2
1
= σ = σn + σp = qµn ND + qµp i ≃ qµn ND
ρ
ND
⇓
1
= 9 × 1014 cm−3
ND =
ρqµn
1. The maximum acceptor density is found at x = RB so, using the value of straggle found
in the chart:
CB
1012
NA,max = √
=√
cm−3 = 5.7 × 1016 cm−3
2π∆RB
2π · 70 · 10−7
with RB = 0.29 µm. The p-region is the region of the substrate where the acceptor density
exceeds the donor density (which is uniform throughout the substrate). So the depth of
the p-region can be obtained as a solution of the following equation:
(
)
1 xj − RB 2
NA,max · exp −
= ND
2
∆RB
⇓
ln
NA,max
ND
1
=
2
xj − RB
∆RB
2
Calling ∆x = xj − RB we get:
2
2
∆x = 2(∆RB ) ln
NA,max
ND
⇓
∆x = ±190 nm
2. Annealing is basically a diffusion process with constant total dose, so we can find the
maximum acceptor density after the process as:
NA,max = √
CB
2π∆RB (t)
The straggle is now a function of the duration of the annealing process:
q
∆RB (t) = (∆RB )2 + 2DB t.
From the charts we can get DB = 2 × 10−14 cm2 /s, so finally:
p
∆RB = 70 · 10−7 + 2 · 2 · 10−14 · 7200 cm = 1.84 × 10−5 cm = 0.18 µm
and consequently:
1012
NA,max = √
cm−3 = 2.17 × 1016 cm−3
2π · 1.84 · 10−5
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6 Technology
6
16
x 10
X: 0.29
Y: 5.7e+016
5
Na
−
Concentration [cm 3]
Nd
Na after
annealing
4
3
X: 0.29
Y: 2.2e+016
2
1
0
X: 0.091
Y: 9.0e+014
0
0.1
0.2
X: 0.49
Y: 9.6e+014
0.3
0.4
0.5
0.6
x [µm]
Figure 6.5: Profiles of concentrations
106
0.7
0.8
0.9
7 MS junctions and Schottky diodes
7.1 Exercises
Exercise 7.1
A Schottky diode made of Si (r = 11.9) has an area A = 0.5 mm2 . Knowing that the built-in
voltage is Vbi = 0.9 V and that the semiconductor is doped with ND = 1 × 1018 cm−3 , evaluate
the junction capacitance and the width of the space charge region at thermodynamic equilibrium.
Assuming the space charge region has to be thinner, xd = 10 Å, determine the required doping
density.
Solution
For a Schottky diode at thermal equilibrium the spatial charge region is expressed by the formula:
s
2Vbi
xd =
qND
= 3.46 × 10−2 µm
while the capacitance associated to the junction is:
r
qND
Cj = A
2Vbi
A
=
xd
= 1.536 nF.
Now, if xd has to be made thinner down to xd = 10 Å varying the doping density, it’s necessary
to find a direct expression for ND,new :
s
2Vbi
10−11 =
qND,new
where the dependence of Vbi from the doping density has been neglected. In this way it’ possible
to obtain:
ND,new = 1.19 × 1031 m−3
Exercise 7.2
For a Schottky diode at 300 K, the built-in voltage is Vbi = 0.5 V, the Richardson constant
A∗ = 3 × 10−6 AK−2 and the ideality factor η = 1.04. Determine the diode characteristic.
Solution
First of all it’s necessary to calculate the reverse current:
qφB
∗ 2
I0 ≈ A T exp −
= 1.20 nA
kB T
The V I characteristic is therefore:
VA
I = 1.20 nA exp
−1
1.04VT
107
7 MS junctions and Schottky diodes
Exercise 7.3
A Schottky diode made of GaAs (r = 12.9) with an area A = 1 mm2 , when reversed biased
with −5 V has a junction capacitance Cj = 50 nF and a built-in voltage Vbi = 1 V. Evaluate the
doping density of the semiconductor.
Solution
The junction capacitance Cj can be evalueated using the following Formula:
s
qND
Cj = A
2(Vbi − VA )
from which we are able to get and expression for ND and to evaluate it:
ND =
108
2Cj2 (Vbi − VA )
= 1.63 × 1021 m−3 .
A2 q