Digital System Design
Lecture 7 -Programmable logic device
architectures
Instructors:
Dr. Nguyen Tuan Khanh, postdoc, khanh.nt@vgu.edu.vn
M.Sc. Nguyen Vo That Thuyet, lab engineer, thuyet.nvt@vgu.edu.vn
Electrical and Computer Engineering (ECE)
Faculty of Engineering, Vietnamese-German University, Vietnam
Sep. 2024
1
Introduction
• Today, digital systems are not implemented with standard logic device chips with only simple
gates or MSI-type functions.
• Programmable logic device (PLD) is used.
• PLD is configured by electronically connecting and disconnecting points in the circuit.
• Functions can be provided obtained with only one
IC.
🡪Less board space, less power required, greater
reliability, less inventory, and overall lower cost in
manufacturing.
2
13-1 DIGITAL SYSTEMS FAMILY TREE
• Design engineering decisions consider
• Speed of operation,
• Cost of manufacturing,
• Power consumption,
• System size,
Most complex digital designs include a mix of
different hardware categories.
Many trade-offs between the various types of
hardware have to be weighed.
• Amount of time to design, …
3
13-1 DIGITAL SYSTEMS FAMILY TREE
4
13-1 DIGITAL SYSTEMS FAMILY TREE
Very
seldom
today.
Most
popular, low
power
consumption.
For higherspeed
designs.
Gates, flip-flops, decoders,
multiplexers, registers,
counters,…
SSI, MSI
5
13-1 DIGITAL SYSTEMS FAMILY TREE
Can be controlled electronically by an application program.
High flexibility.
Low speed (for digital-system solution, software is slower than hardware).
6
13-1 DIGITAL SYSTEMS FAMILY TREE
Sometimes referred to
as field programmable
logic devices (FPLDs).
Custom-configured to
create simple or
complex digital circuit.
Possible with a
relatively small capital
investment.
Must contract with an IC foundry
to fabricate the desired IC chip.
7
13-1 DIGITAL SYSTEMS FAMILY TREE
• PLDs
• PLD development
• Gate number increase (billions);
• Input/output number increase (hundreds);
• On-the-fly reconfiguration.
8
Digital-System Family Tree
• PLDs
– The difference among types are fuzzy
• Simple programmable logic devices (SPLDs);
• Complex programmable logic devices (CPLDs);
• Field programmable gate arrays (FPGAs).
– Especially, the last two, which are referred to high-capacity programmable logic devices
(HCPLDs).
– The manufacturers constantly design new, improved PLDs.
9
13-2 FUNDAMENTALS OF PLD CIRCUITRY
• Example of a programmable
logic device
• If we blow fuses 1 and 4 at
OR gate 1,
10
13-2 FUNDAMENTALS OF PLD CIRCUITRY
• Simplified PLD symbology
11
13-2 FUNDAMENTALS OF PLD CIRCUITRY
• Simplified PLD symbology
12
13-3 PLD ARCHITECTURES
• PROMs
Fuses are blown to program outputs for
given functions
PROM architecture makes
it suitable for PLDs
13
13-3 PLD ARCHITECTURES
14
13-3 PLD ARCHITECTURES
• PROMs
15
13-3 PLD ARCHITECTURES
PLD
PAL
16
13-3 PLD ARCHITECTURES
• Programmable Array Logic (PAL)
• Using PROMs as PLDs is not efficient in terms of circuitry
• Requires many fuses;
• Many product terms not used.
• PAL
• Inputs to the AND gates are programmable.
• Inputs to the OR gates are hard-wired.
• E.g., only to 4 AND outputs.
17
13-3 PLD ARCHITECTURES
• PAL
18
13-3 PLD ARCHITECTURES
• PAL
19