J750 Test System
J750 Programming
V3.40
Training Manual
Module 7
Patterns
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Patterns - 1
J750 Test System
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Module Overview
• This module covers the concepts and activities used to create and use
Patterns in a J750 test program.
• This module contains the following sections:
Pattern Overview
Pg 5
Pattern Files
Pg 9
Pattern Tools
Pg 35
Pattern Sets and Groups
Pg 47
Pattern Debug
Pg 57
Pattern Opcodes
Pg 97
Pattern - Review
Pg 139
Pattern - Lab
Pg 37 in Lab Section
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J750 Programming
V3.40
Training Manual
Module 7
Patterns
Pattern Execution - Overview
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Pattern Execution
• Pattern Execution is handled by the PatGen and Vector Memory blocks of the
Digital Subsystem.
• When a ‘start pattern’ step is reached in the Template body, a start signal and the
address of the first vector to execute is passed to the PatGen.
microcode
start
PatGen vector
address
Vector
timeset
Waveform
Memory
+ data
Formatter
Drive Hi/Lo
Drive On/Off
Compare On/Off
PE
expect data
Pass/Fail
HRAM
vector
results
DUT
high
Fail
Processing
low
Digital Channel 1/n
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Pattern Execution
• As a vector is accessed from Vector Memory,
− a Timeset address and channel data are passed to the Waveform Formatter
section.
− Microcode data is passed back to the PatGen.
• Microcode data may consist of an opcode and/or control bits:
• Opcode is used by the PatGen to determine what to do next.
• Control bits are used to enable or disable certain PatGen functions.
Microcodes
Tset Address
Channel Data
pin1…………………………………………pin 1024
(repeat, jump, etc.)
00000001
0100011110000XHLHLHL……………………….L
To
PatGen
To TimeSet
Memory
To Each Channel
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Pattern Execution
• Once the PatGen starts accessing vectors from Vector Memory, the process will
continue until one of the two following events occur:
− A ‘halt’ opcode is detected
− A vector failure is reported from the Fail Processing circuit
halt
PatGen
vector
address
Vector
timeset
Waveform
Memory
+ data
Formatter
Drive Hi/Lo
Drive On/Off
Compare On/Off
PE
expect data
Fail
HRAM
vector
results
high
Fail
Processing
low
Digital Channel 1/n
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J750 Programming
V3.40
Training Manual
Module 7
Patterns
Pattern Files
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Pattern Files
• Vectors are loaded from binary pattern files into Vector Memory as a result of a
successful Program Validation. The pattern files have an extension of ‘.pat’.
• The binary pattern files are typically generated by compiling pattern source files
(*.atp).
• Pattern files, source and binary, may be compressed
− *.pat.gz
− *.atp.gz
• Patterns are loaded into the tester Vector Memory from binary files at Program
Validation. IG-XL will look for *.pat.gz if *.pat does not exist.
*.atp
*.atp.gz
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Compile
*.pat
*.pat.gz
Program
Validation
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Vector
Memory
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Pattern Source File Statements
• The following statement types are commonly included in the source file:
− pinmap
– vector
– import
– Compiler Options
– C++ Preprocessor statements
ƒ #include, #define, #ifdef, etc
• Comments may be included in pattern file
– C++ comments
ƒ // comment (to end of line)
ƒ /* comment */
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Pattern Source File Statements
• A Pin Map must be assigned to a pattern in order to compile.
• The ‘pinmap’ statements may be included in the source file to locate and identify the
Pin Map to be used with the pattern:
− pinmap_workbook = “ filename “
ƒ Identifies the workbook where the Pin Map is located
− pinmap_sheet = “sheetname “
ƒ Identifies the PinMap sheet to use. Used only when there are multiple PinMap
sheets in the workbook.
• This information may be supplied at compile-time instead. See Pattern Compiler
discussion later in this section.
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Pattern Source File
• The following statements meet the minimum requirements for a pattern source file:
– import tset
ƒ A key ingredient in any vector is a timeset reference, i.e. tset name
ƒ All tset names used in the pattern must be imported
– vector
ƒ Defines the pattern and its data
import tset
time_fun, time_PHL, time_PLH;
vector ( $tset, g, dir, portA, portB
)
{
global time_start_glbv:
> time_fun
0 1
00000000 LLLLLLLL ;
> 0 1
00000000 LLLLLLLL ;
> time_PLH
0 1
11111111 HHHHHHHH ;
time_stop: halt
> time_PLH
0 1
11111111 HHHHHHHH ;
}
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Vector Statement
• The ‘vector’ statement is composed of
− Vector Pin List
− Vector Data
• Syntax
vector
// Vector Pin-List
( [$tset,] pin/group1[:radix][, pin/group2[:radix]][,..] )
// Vector Data
{
[label:] [opcode] > tset-name vector-data1[ vector-data2][..];
[ [label:] [opcode] > tset-name vector-data1[ vector-data2][..];
|
|
[label:] [opcode] > tset-name vector-data1[ vector-data2][..]; ]
}
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Vector Pin List
• Included in parentheses ‘( )’ after the ‘vector’ keyword is the Vector Pin List
( [$tset,] pin-item1[:radix][, pin-item2[:radix]][,..] )
• It contains a list of ‘pin-items’ that provides a map for the data portion of the vector
data lines that follow in the Vector Data section.
• The keyword ‘$tset’ is often included as the first entry in the Vector Pin List.
− It may appear in any position, but the first position is the most common.
− A tset name or tset number may used in the $tset position in the Vector Data line.
The use of tset names and tset numbers may not be combined in the same
pattern.
− Refer to IG-XL Help, Pattern Language Reference, Tset Data for an alternative
method to include the tset name in the vectors.
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Vector Pin List
• Pin-item is a pin name, a pin group name, or a list of pins enclosed in parentheses and
separated by commas.
– (a1,a2,a3,a4,a5,a6,a7,a8) is same as portA for the 7408
• Each pin-item has a radix associated with it
pin-item[:radix]
• Radix is the format of the data in vector-data for the pin-item.
− Symbolic (S) is the default format - portA is the same as portA:S
• Other formats must be explicitly stated for the pin-item
X or H – hexidecimal
O – Octal
B – Binary
D – Decimal
portA:X
portA:O
portA:B
portA:D
• Example - Symbolic radix
vector
( $tset
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g dir portA portB)
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Vector Data Line
• Included in braces ‘{ }’ after the Vector Pin List are the Vector Data lines.
• In a Vector Data line, the ‘right angle bracket’ character (>), also known as the ‘greater
than’ symbol, marks the beginning the vector data, as defined in the Vector Pin List.
• A semicolon (;) marks the end of a Vector Data line (one vector).
vector
{
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( $tset
g dir portA
portB)
> time_PLH 0 1 11111111 HHHHHHHH ;
> time_PHL 0 0 LLLLLLLL 00000000 ; }
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Vector Data Line
• There are two optional fields to the left of ‘>’ in a Vector Data Line:
− Label
− Microcode
• A label is a string of characters terminated by a colon (:) . If present, it is the first field
of a Vector Data line.
• The microcode field may contain an opcode and/or control bits. The last vector data
line of a pattern typically should contain a ‘halt’ or ‘end_module’ opcode.
vector
( $tset
g dir portA
portB)
{
> time_PLH 0 1 11111111 HHHHHHHH ;
time_stop: halt > time_PHL 0 0 LLLLLLLL 00000000 ; }
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Symbolic Vector Data Programming
• Pin-item Radix = S
• Uses the following set of characters:
– 0 Drive Data,
Driver Output = VDriveLow
– 1 Drive Data,
Driver Output = VDriveHigh
– 2 Drive Data,
Driver Output = Vph
– H Expect High,
VDUT >= VCompareHi
– L Expect Low,
VDUT <= VCompareLo
– M Expect Midband, VCompareLo <= VDUT <= VCompareHi
– V Expect Valid,
VDUT <= VCompareLo OR VDUT >= VCompareHi
– X Expect Mask
Do not test
• Channel Mode (Drive/Receive) determined by symbol choice:
– Numeric Character (0,1,2) = Drive
– Alpha Character(H,L,M,V,X) = Receive
• Example
> time_PLH 0 1 11111111 HHHHHHHH ;
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Numeric Vector Data Programming
• Pin-item Radix = X,H,O,B,D
− X ,H = Hexidecimal
− O = Octal
− B = Binary
− D = Decimal
• Uses only numeric characters
– 0 - 9, A - F
• Channel Mode (Drive/Receive) must be programmed
– .d = Drive
ƒ .d1010
– .r = Receive
ƒ .r1010
• Example
vector
( $tset
g dir portA:X
{
> time_PLH 0 1 .dFF
> time_PHL 0 0 .rFF
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portB:O)
.r377 ;
.r000 ; }
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J750 Test System
Pattern Source File - review
import tset
time_fun, time_PHL, time_PLH; // import tset names
vector
// Begin Vector Statement
( $tset, g, dir, portA, portB
)
// Vector Pin List
// Begin Vector Data
{
global time_start_glbv:
> time_fun
0 1
repeat
> 0 1
last
choice
> time_PLH
0 1
time_stop: halt
> time_PLH
0 1
} // End Vector Data
label
Vector-data portA
00000000
00000000
11111111
LLLLLLLL ;
LLLLLLLL ;
HHHHHHHH ;
Vector-data portB
opcode
11111111
HHHHHHHH ;
tset-name
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Normal Mode vs Extended Mode
• Shown below are vectors intended for an Extended Timing Mode Pattern:
> time_PHL
0 1
time_stop: halt
> time_PHL
0 0
00000000
LLLLLLLL ; // Vector n
LLLLLLLL
00000000 ; // Vector n+1
– Label , and opcode may appear on any vector line
• Shown below are vectors intended for a Normal Timing Mode Pattern:
time_stop:
> time_PHL
halt
> time_PHL
0 1
00000000
LLLLLLLL ; // VectorPair n
0 0
LLLLLLLL
00000000 ; // VectorPair n
– Vectors are paired. Must be even number of vectors in pattern.
– Label, if present, must be on first vector of pair
– Opcode, if present, must be on second vector. Applies to both vectors in pair
– Time set and channel data per vector line
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Compiling Pattern Files
• There are two methods for compiling source pattern files into binary:
− GUI Pattern Compiler Window
− Command statement in Command Prompt Window
• The following data is needed to compiler a source pattern file:
− Source file name
− Output file name (optional)
− Pin map workbook
− Pin map sheet name (if multiple pin maps in workbook)
− Compiler options
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Compiling Pattern Files
• IG-XL offers a GUI window for
compiling pattern files
• The key steps for using this
window are:
1. Open Compiler Window
2. Enter File Information
3. Select Compiler Options
4. Compile
5. Check Messages window
for error messages
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Open Compiler Window
• IG-XL provides a GUI interface
to the Pattern Compiler.
• Pattern Compiler may be
started from:
− Windows Start Menu
− Data Tool - IG-XL Toolbar
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Enter File Information
• The Files section is used for entering
input and output files information.
– By default, output filename =
“input filename.pat”
– Workbook = location of a pin
map.
– Sheet – needed if multiple pin
maps in the workbook
• This same information could be
provided by including the following
statements in the source file:
output_filename = “ “;
pin map_workbook = “ “;
pin map_sheet = “ “;
• If found in both places, compile-time
options override file statements.
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Compiler Options
• The Compiler Options settings are used
by the Pattern Compiler to provide
direction as to how to compile the
source file(s).
• Compiler Options may be set in the
Pattern Compiler GUI window or by
statements included in the source file.
• When compiler options are set in both
places, the Pattern Compiler window
settings will override the statement
settings.
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Compiler Options
• Radio buttons are used to set the
some of the compiler options:
− ‘Yes’ selects the option,
regardless of any statement in the
file.
− ‘No’ selects the opposite of the
option (the opposite is also the
default action), regardless of any
statement in the file.
− ‘Default’ uses whatever is
specified in the file. If the file has
no compiler control statement for
this option, the default is No.
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Compiler Options
• The following options are set by Radio
buttons:
− Extended Mode
ƒ Yes = Extended Mode
ƒ No = Normal Mode
− SVM Only
ƒ Yes = allocate all vectors to
SVM
ƒ No = split vectors between
LVM/SVM
− Scan Parallel
ƒ Yes = Expand scan vectors into
parallel vectors
ƒ No = compile scan vectors for
scan hardware
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Compiler Options
• The following options are also set by
Radio buttons:
− Import Undefineds
ƒ Yes = import any undefined
subroutines labels and tset
names without giving an error
or warning. Not recommended.
ƒ No = report an error if any label
or tset name is undefined at the
end of compilation.
− Compress
ƒ Yes = compress the compiled
pattern file (*.pat.gz).
ƒ No = do not compress the
compiled pattern file (*.pat).
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Compiler Options
• Additional Compiler Options include:
− Max Errors – maximum # of errors
to allow before aborting compile
(default = 200).
− LVM Size – maximum # of vectors
to allow in pattern (default = 16M).
− Min Period – minimum period to be
used.
− Run Preprocessor - select this
option when C++ preprocessor
statements are included in the
source file(s).
− Save Comments - select this option
to save C++ comments as part of
the binary file.
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Compiler Option Statements
• The pattern language supports compiler control statements for several Compiler
Options.
• If used, compiler control statements must appear in the pattern file before the vector
statement.
opcode_mode = normal | extended;
svm_only_file = no | yes;
scan_type = scan | parallel;
import_all_undefineds = no | yes;
min_period = double;
• When using the Pattern Compiler window, the statements take effect only if the
‘Default’ radio button has been selected for the respective options in the Pattern
Compiler window.
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Compiling from Command Prompt
• The Pattern Compiler may also be started using a Command Prompt.
1. Open Command Prompt Window
2. Execute compiler (apc.exe) with options
Compiler name = apc.exe
See Help, Pattern Compiler Overview, command-line interface
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Reverse Compiler
• The Pattern Reverse Compiler can be
used to convert binary files back to
source files:
− Input file = *.pat
− Output file = *.atp
• See Help for more details.
• May also be executed from command
line:
– start aprc.exe <pat file>
[-switches]
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J750 Programming
V3.40
Training Manual
Module 7
Patterns
Pattern Tool
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Pattern Tool – Editing Pattern Files
• This section focuses on using the Editor functions of Pattern Tool to edit
patterns from binary pattern files (*.pat) and to create new binary pattern
files.
• When editing an existing binary pattern file, the following steps are used:
1. Open Pattern Tool
2. Load Pattern File
3. Edit Vectors
4. Save File
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Open Pattern Tool
• Pattern Tool may be opened
independently of a test program by
using the Windows Start Menu.
• When debugging a test program,
Pattern Tool may be started using
an icon on the Data Tool – IG-XL
Tool bar.
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Load Pattern File
• Loading binary pattern file (*.pat)
1. File -- Open
2. Select File
3. Left-click Open button
1
2
3
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Editing Vectors
• The Vectors worksheet in Pattern
Tool provides access to the vector
fields:
• Vector fields
– label
– PatGen microcode
– tset
– pin data
• Each field, except tset, has a
separate editor window. See next
slide.
• The tset field has a drop-down menu
listing imported tsets.
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Editing the Label Field
1. Select label to edit by left-click in
cell.
2. Open Label Edit by left-click on
dialog box .
3. Enter Label name
4. Select Label type
– Global = label will be used
outside this file, i.e., Start and
Stop boxes in the Patterns Tab
of an Instances.
– Local = label used only in this
file.
– Start, subr, global subr. See
Help
• When using Label Edit to change a
label name, delete the old name
first. The compiler will accept
multiple labels on a single vector.
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Editing PatGen Microcode
• The PatGen Microcode Edit
window is opened the same
way as the Label Edit:
1. Left-click in desired cell
2. Left-click on dialog box
• Editing PatGen microcode is
discussed in more detail in
the Pattern Opcode section.
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Editing Pin Data Fields
• Pin Data Edit is opened the same
way as Label Edit and PatGen
Microcode Edit:
• When Format = Symbolic,
– Radix Options are disabled
– Symbolic States keyboard is
enabled
• When Format = Drive or Receive,
– Radix options are enabled
– Symbolic States keyboard is
disabled
• Pin Data arrows can be used to
select a specific data bit for
modification.
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Editing Tset
• A list of available tset names may
be displayed by:
1. Left-click in tset cell
2. Left-click in arrow box
• Names in list are tset names that
have been imported to this pattern
file. See ‘import tset’ statement.
• Adding tset names may be done
using the Imports worksheet in
Pattern Tool. See next slide.
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Imports Worksheet
•
•
To add access to another tset to the
pattern file, do the following:
1. Select Imports Tab to access
Imports worksheet.
From the Edit menu:
2. Select Edit Vector Structure
3. Insert a row into worksheet
4. Select Type = tset
5. Enter tset name in Symbol
column. Press Enter. This will
eliminate an error message.
6. Select Update Vector Structure
The new tset should now be
accessible through the drop-down list
in the Vectors worksheet.
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6
3
4
5
1
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Saving the File
• Using Save from the File Menu will
save the Pattern Tool data back to
the original binary file.
• Use Save As to:
– Copy Pattern Tool data to a file
other than the original file
– Save new pattern data when
creating a new pattern
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J750 Programming
V3.40
Training Manual
Module 7
Patterns
Pattern Sets & Pattern Groups
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Overview
• Pattern Sets and Pattern Groups offer alternative means of assigning
patterns to instances.
• A pattern group is a named collection of patterns that are loaded into
contiguous memory and executed as a single burst. Pattern groups are
defined on a Pattern Groups sheet.
• A pattern set is a named collection of patterns that are executed as
separate bursts. Pattern Sets may include Pattern Groups. Pattern sets
are defined on a Pattern Sets sheet.
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Pattern Groups
• A pattern group is a list of pattern files that will be loaded in contiguous
locations in vector memory.
• When used by an instance, the pattern group will execute as single
pattern burst.
• Programming considerations:
– A pattern file listed in multiple pattern groups will be loaded multiple
times.
– Use of halt or end_module
– The last pattern in pattern group should always end in ‘halt’.
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Pattern Group Worksheet
• There are two required fields in the Pattern Groups Worksheet:
– Group Name - name of group being created. This name cannot duplicate any
other pattern name or Pattern Set name.
– Pattern File - one or more files to be included in the group
• In this example, four pattern files are combined to create, in effect, a single pattern.
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FullFuncPat_7408
•
•
•
Shown here are the files used to
form the Pattern Group
FullFuncPat_7408.
The last vector in the group should
have an ‘halt’ opcode. In this case,
7408_Gate2 does not end with a
‘halt’ opcode.
Creating a generic one-vector
pattern with a ‘halt’ opcode and
adding it to the group is used to
satisfy the requirement.
// 7408_Warmup.pat
Start_warmup:
>
>
end_module >
//7408_Gate1.pat
Start_gate1:
// 7408_Gate2.pat
Start_gate2:
// Last_one.pat
Last_one:
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>
>
end_module >
>
>
end_module >
halt
>
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Pattern Sets
• The Pattern Sets sheet creates named lists of one or more pattern files
(.pat) and/or pattern groups to be executed by a test instance.
• The pattern loader uses the information in this sheet to identify all patterns
that are required for the test and to load them into tester memory.
• If the named pattern set refers to a number of separate .pat files, each is
loaded and treated as a separate burst. Any pattern group in the pattern
set is executed as a single burst.
• Pattern Sets may be used in any of four ways:
− Run a list of patterns
− Rename a pattern
− Run part of a pattern by using Start and Stop labels
− Declare a subroutine. Refer to Pattern Opcodes, External Subroutines
later in this module.
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Pattern Sets Worksheet
•
•
•
There are two required fields in the Pattern Sets Worksheet:
– Pattern Set - name of Pattern Set
– File/Group Name - name of file or group being included in Set
Start Label and Stop Label may be used to specify start and stop labels within
the specified pattern
This example uses four sets of vectors from a single pattern file to produce 4
separate test results.
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PatSet1
• This is the pattern file
referenced in PatSet1.
• All referenced labels are
global.
• In effect, PatSet1 is getting
four test patterns out of this
one pattern file.
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Using Pattern Sets and Groups
• After Pattern Sets and Groups have
been defined, they may be selected
by a functional instance.
– Left-click on Pattern Groups and
Sets button
• The Pattern Selection window
appears:
– The Available Patterns box
displays defined Pattern Sets and
Pattern Groups.
– Left-click on desired Set(s) and/or
Group(s) and move to Selected
Patterns. Then left-click OK
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J750 Programming
V3.40
Training Manual
Module 7
Patterns
Pattern Debug
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Trapping on a Functional Test
•
•
•
•
•
A key step in using the Functional
Debug Displays is choosing the correct
stopping point for the test flow.
It is important that the tester be setup
with the proper timing and levels.
Note: this is done in the Prebody of the
template.
It is also important that data be stored
in HRAM for use by the Debug
Displays. Note: this is done when the
pattern is executed in the Body of the
template.
If interpose functions are used, it is
also important that they are executed
Therefore, the best stopping point will
be after the Body of the Template.
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Pattern Control Display
•
•
The Pattern Control Display lets you control and debug patterns. You can
interactively load, unload, and run patterns, monitor hardware memory usage, and
set up PatGen and HRAM features.
The Display consists of an Execution Frame which is always visible and 3 Tabs:
− Patterns
− PatGen/HRAM Setup
− Mem Usage
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Execution Frame
•
•
•
The top of the Pattern Control Display (above the tabs) is the Execution frame,
which controls interactive pattern execution and displays execution status.
‘Last start:’ displays the name of the last pattern ran by the PatGen.
Three additional pieces of pattern status information are shown to the right of the
buttons:
– Current status of the pattern: Stopped, Running, or in Keepalive
– The pattern fail flag: Pass or Fail
– The current cycle count
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Execution Frame
•
•
The ‘Site Control’ box selects the site to be displayed. During initial debug, site 0
should be the site selected.
Next to ‘Site Control’ is the site status. It is important that the site be active during
debug. If not, a pattern cannot be rerun from here. Selecting the ‘DoAll’ Run option
will prevent the device from being removed from the active list.
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Execution Frame
• Four (4) buttons in the Execute Frame control interactive pattern execution.
• The Restart button will rerun the current pattern. See Last Start:
• The Loop button loop the pattern. This is a continuous restart.
• The Halt button will terminate the looping. However, repeated pressing of the Halt
button may be necessary. Holding down ALT + H will also stop looping and may take
effect sooner.
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Execution Frame
• The Start button is used to select a new pattern and then run it. A list of all loaded
patterns is displayed. Select the new pattern by a left-click. Then, left-click OK. The
new pattern will now run and it is now the ‘Last Start’ pattern.
• After test flow has been stepped to the Body of the functional instance, you will need
to select the pattern for the instance and start it. Then it will be the current pattern
and you can rerun it as needed with the Restart button.
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Patterns Tab
•
•
•
•
The Patterns tab has a window that displays the currently loaded patterns and a set
of buttons for loading, unloading, and starting patterns.
The window contains a tree control showing all the patterns and groups currently
loaded by the pattern drivers. You can use the plus and minus signs to open and
close tree elements:
You can open a group to show its member patterns.
You can open a pattern to show its exported labels.
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Patterns Tab
•
The buttons on this tab are used after you have selected an item in the tree display
window:
– Load New - load a new file into vector memory.
– Unload - unload selected pattern from vector memory, freeing up space.
– Unload All - unload all patterns from vector memory.
– Start the pattern selected in the tree display window.
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PatGen/HRAM Setup Tab
The PatGen (Pattern Generator)/HRAM tab includes a number of features that control
pattern execution, for the purpose of debugging or special testing needs. This tab
provides a way to view and change the setup of these features. The tab includes four
PatGen frames and two HRAM frames, described in the following slides.
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Setup of HRAM - Overview
• HRAM (History RAM) is used to capture results of cycle (vector) executions.
• HRAM stores 256 vector results.
• HRAM data is used to generate Functional Test failure data for datalogging and by the
Pattern-related Debug Displays, i.e. Digital Waveform Display.
• Two key parameters of HRAM Setup:
– Trigger - specifies the point in the pattern where capturing is to begin.
– Capture - specifies what cycle results to capture
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Trigger Frame
• Trigger is used to specify the point in
the pattern where capturing is to begin.
• The ‘On’ box is used to select the cycle
type on which to start capturing. There
are three (3) options in a drop-down
list:
– Cycle - start on first cycle of pattern
– Fail - start on first failing cycle
– STV - start on first cycle marked as
‘stv’
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Trigger Frame
• The ‘Arm On’ box specifies a delay for the
trigger (as defined in the ‘On’ box). There
are two options:
– First Cycle - do not delay. Trigger is
defined solely by Trigger frame.
– PatGen Event - trigger on first cycle,
that meets PatGen Event criteria after
the ‘On’ event, i.e., if On = Cycle, then
trigger on the first cycle after cycle 1
that meets PatGen Event criteria.
The trigger definition will be the
combined data from Trigger and
PatGen Event frames.
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Trigger Frame
• The Pretrigger box is used to specify
a number of cycles prior to the trigger
to be captured by HRAM. For
example, when triggering on first fail, it
might be desired to see the cycle(s)
prior to the failing vector.
• The checkbox ‘Stop on full’ is used to
inhibit overwriting of HRAM when it
fills up and more vectors are still being
executed. Checking this box is
usually a good idea.
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Capture Frame
•
•
The Capture frame is used to
specify what to capture after the
trigger event occurs.
Capture What box - four (4) options:
– Capture All - capture all
vectors, from trigger point
– Fails - capture only failing
vectors, from trigger
– STV - capture only vectors
marked as ‘stv,’ from trigger
– Fails + STV - capture failing
vectors and vectors marked at
‘stv’, from trigger
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Capture Frame
• Size - may be used to limit number of
vectors stored in HRAM. Can reduce
run time when only a limited number
of vector results are needed. Size =
0, in effect, means use all locations.
• Compress repeats:
– If checked, the results from only
the last cycle in a repeat will be
stored in HRAM. If not checked,
all vectors in the repeat will be
stored.
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Capture Frame
• Capture keepalive - capture keepalive
vectors. See Help for more details.
• Loop Select – Four choices - Repeat, LoopA,
LoopB, LoopC.
– Only one loop counter or the repeat
counter can be used in PatGen
Event. See following slides.
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PatGen Event Frame
• The PatGen Event is used to define
cycles to be used to trigger HRAM
capture or to generate Sync Pulses.
This discussion focuses on triggering
HRAM. See Help for details on Sync
generation.
• With On = Cycle, Arm On = PatGen
Event, there are three (3) ways to
define the triggering cycles:
D Cycle Number
D Vector Label
D Loop/Repeat Count
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PatGen Event Frame
• With On = Cycle, Arm On = PatGen
Event,
− D Cycle Number
• Cycle Number = 4
– HRAM will trigger on Cycle
Number 4
• With On = Cycle, Arm On = PatGen
Event,
− D Vector Label
• Vector Label = Fred, Pattern =
ti245_time.pat, Offset = 2
– HRAM will trigger on
second cycle after Fred in
ti245_time.pat
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PatGen Event Frame
• With On = Cycle, Arm On = PatGen
Event,
− D Loop/Repeat Count
• Loop/Repeat = 9, Loop Select
= Repeat
– HRAM will trigger when
Repeat counter = 9
• Loop/Repeat = 9, Loop Select
= LoopA
– HRAM will trigger when
LoopA counter = 9
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Pattern Control Frame
• The Pattern Control frame of
PatGen/HRAM Setup has features that
directly affect pattern execution:
• Halt/Continue On Fail - this item
selects the condition on which pattern
execution will halt.
• Timeout - number of seconds to wait
for a ‘halt’.
• Cond Call - used to set the ‘ccall’
parameter.
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Pattern Control Frame
• Halt/Continue On Fail - this item
selects the condition on which pattern
execution will halt. There are three (3)
options.
– Halt on Fail - halt on first failure.
This is normal.
– Continue on Fail - ignore failure,
and force execution until a ‘halt’
opcode. This allows HRAM to
collect more data.
– Halt on Fail After Cycle Event unconditionally halt on the cycle
number specified in the Cycle
Number item in the Event frame of
this tab. If you select this option,
the halt-on-cycle occurs even if you
haven't checked the Cycle Number
checkbox.
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Pattern Control Frame
• Timeout - number of seconds to wait
for a ‘halt’. Pattern execution will abort
and a runtime error message will be
generated, if the timeout value is
reached before a halt is executed.
• Cond Call - this box can be used to
interactively set the ‘ccall’ parameter.
There are two options:
– Ccall is Nop
– Ccall is Call
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Pattern Control Frame
• If Halt on Cycle is checked, an
unconditional halt will be generated
when the pattern reaches the cycle
specified in Cycle Number in PatGen
Event.
• If Mask Til Cycle is checked, all
vectors are masked until the cycle
specified in Cycle Number of PatGen
Event. This option may be used to
force the pattern to run past failing
cycles.
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Pattern Control Frame
• If Mask Invert is checked, the sense
of the mask pattern control bit is
inverted. Cycles that would normally
be masked are not, and vice versa.
• Global Label: This item sets the
global label to be the specified label
and pattern. The selected point is
available to pattern microcode as an
argument to the set_glo, jump_glo,
and call_glo opcodes. Note that the
label must be declared "global" or
"global subr."
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CPU Flags Frame
• This frame displays and sets the CPU
flags that are used for communication
with the pattern
• The state of the flags may set or reset
interactively by clicking on the
respective boxes
− D = set
– blank = reset
• Changes take place immediately. The
‘Apply’ button need not be clicked.
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CPU Flags Frame
• A call to the PatFlagFunc interpose
function, specified in the Functional
Instance, may be initiated interactively
from this frame.
− D Match Enable - ‘Match True’,
‘Match False’ and ‘No Match’
boxes are enabled
− Define condition for call by
selecting any combination of the
Match boxes. At least one ‘Match
True’ or ‘Match False’ box must be
selected.
− Run Pattern
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Sync Frame
• This frame lets you enable a sync
pulse on a specified digital channel. It
is best to select an unused channel.
• The sync pulse is a drive-high signal
synchronized with a pattern. It is
typically used during debug to provide
a reference point when examining
waveforms.
• Sync pulse generation is enabled by
Sync on Patgen Event D. The
specified channel will then be
programmed to generate the sync
pulse.
• Run the pattern. The sync pulse will
be generated whenever the event
defined in the PatGen Event Frame
occurs.
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Mem Usage Tab
• A table displays usage for the
• The Mem Usage Tab displays the
contents of the physical vector memory
(LVM or SVM). Which memory is
displayed may be selected by using the
Select Memory button. This example
is displaying LVM memory.
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currently selected memory. It has
these columns:
– Start
– Size
– Name
– What
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Mem Usage Table
• Start - Absolute starting address of the block.
• Size - Size of the block, in tester memory locations.
• Name - the name of the pattern or group using the memory; or “(free)” for unused blocks.
• What - The type of data loaded. See next slide.
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Mem Usage Table - What Column
•
•
If the currently selected memory is SVM, this value is “svm”.
If the currently selected memory is LVM, the possible values are:
– lvm
LVM pattern data
– lvmsvm
SVM data loaded in LVM for possible later download to SVM
– lvmscan
Scan data
– lvmsets
Timing or levels information stored in LVM for later download
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Digital Waveform Display
• Displays digital waveform for patterns. The waveform display shows the
effect of timing and format, and assists in determining why failures
occurred.
• Displays two kinds of waveforms:
– Programmed Waveforms: Waveforms are based on HRAM data
obtained from a pattern burst, plus timing and levels data obtained
from the tester.
– Actual Mode: Actual tester waveforms are generated by repeatedly
rebursting the pattern while altering the timing and levels for the
channels being measured, and examining HRAM to get results.
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Displaying Programmed Waveforms
• The following steps are used when displaying programmed waveforms
with the Digital Waveform Display:
1. Trap on a Functional Test
2. Open Digital Waveform Display
3. Select Pins to display
4. Draw Waveforms
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Open Digital Waveform Display
• Display the IG-XL Display Manager
window
• Left-click ‘Digital Waveform Display’ in
the Display List
• Left-click Start/Show button
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Selecting Pins - Programmed Mode
• Left-click ‘Select Pins…’ in the
Programmed Waveforms Tab
• Move pins from ‘Available Pins’ box
to ‘Pins in use’ box
– Left-click on pin name to select
individual pin
• Ctrl + Left-click and Shift +
Left-click can be used to
select multiple pins before
move
– Left-click on ‘>’ Button. Selected
pin(s) will be moved to ‘Pins in
use’.
• Left-Click OK to close Select Pins
Window
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Draw Programmed Waveforms
•
Prior to drawing the
programmed waveforms for
the selected pins, the number
of cycles to be displayed needs
to selected. The number may
entered directly or from a dropdown list.
•
The Start Offset value
determines where the Display
will start displaying cycles relative to the HRAM data.
•
Left-click on the Refresh button
to display the waveforms.
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In this example, the HRAM began collecting data
beginning with cycle 1. An Offset = 1 and Cycles = 7
means that the waveforms are displayed starting with
cycle 2 and ending with cycle 8.
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Displaying Actual Waveforms
• The following steps are used when displaying actual DUT pin output waveforms
with the Digital Waveform Display:
1. Select Actual Mode Tab
2. Select Pins.
3. Set Start Cycle and End Cycle
4. Draw Waveforms
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Select Pins - Actual Mode
• By default, the pins selected for
Programmed Waveforms will be
selected for the Actual Mode.
• To modify the selection,
1. Left-click Select Pins button
(Actual Mode Tab)
2. Move unwanted pins from
‘Pins in use’ box to ‘Available
Pins’ box.
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Draw Actual Waveforms
• Prior to drawing actual waveforms, it is
important to select the cycles to
display:
– Start Cycle
– Stop Cycle
• The numbers entered in these boxes
are limited to the currently displayed
cycles.
• In this example, actual waveforms are
drawn in cycles 3 - 7.
• Actual waveforms may be drawn for
input pins as well as output pins.
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J750 Programming
V3.40
Training Manual
Module 7
Patterns
Pattern Opcodes
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Pattern Microcode
• PatGen microcode is a field in every vector stored in vector memory.
• PatGen microcode is directed to the PatGen as a vector is being processed.
• Microcode = opcodes and control bits:
– Opcode controls the flow of execution within the pattern file
– Control bits modify the execution of the specific vector on which they appear: for
example, mask failure on this vector, or inhibit fail count on this vector.
microcode
PatGen
LVM
Vector
Memory
Timeset +
data
SVM
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LVM and SVM
• Vector Memory is divided into two sections:
− LVM (Large Vector Memory)
• Stores up to 16 Million Vectors (Licensable)
− SVM (Subroutine Vector Memory)
• Stores 1024 vectors
microcode
PatGen
LVM
Timeset +
data
16M
(max)
SVM
1K
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LVM and SVM
• Pattern compiler automatically optimizes the LVM/SVM split.
• Vectors stored in LVM will have a limited set of opcodes, i.e., flow control is
sequential.
• Vectors stored in SVM may use all pattern opcodes and control bits.
• At times, there may issues with this optimization, i.e. large pattern files. Guidelines
for minimizing SVM usage are discussed later in this section.
microcode
PatGen
LVM
Timeset +
data
16M
(max)
SVM
1K
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Opcodes and Control Bits
• A complete list of opcodes and control bits is available through IG-XL
Help, Pattern Language Reference.
• This section will focus on the common opcodes and control bits.
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NOP / halt / end_module
• Any vector with a blank opcode is
Start_here:
selecting the NOP opcode:
– NOP = increment PC (program
counter) to next vector
• The halt opcode will stop the PatGen.
No more vectors will be accessed until
another pattern is started.
• The end_module opcode acts like the
halt opcode if this pattern is a standalone pattern, i.e., not part of a pattern
group. If this pattern is part of a
pattern group, then this opcode acts
like a NOP opcode. See Pattern
Groups.
>
>
>
Stop_here: halt
>
Start_here:
>
>
>
>
Stop_here: end_module
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repeat / mrepeat
• The repeat opcode allows a single
vector to be repeated N times
– N = 2 to 65536
– Saves vector memory because
vector is stored only once
• The mrepeat opcode also allows a
single vector to be repeated N times
– N maybe modified through
program code.
– Using this opcode does affect
LVM/SVM optimization.
• Use repeat unless mrepeat is
absolutely necessary
• See Help for details
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Start_here:
>
>
repeat 100
>
>
mrepeat 200 >
>
Stop_here:
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Branching
• Branch opcodes cause the PatGen to
go to a vector other than the next
sequential vector.
• The jump opcode will cause flow
control to go to the label specified.
• The ‘jump_glo’ opcode is used to
direct execution control to a vector
whose address is stored in the ‘global’
register. The vector address should
have been placed in the global
register by a ‘set_glo label’ opcode.
jump Fred
>
>
Fred:
>
set_glo Fred1
>
jump_glo
>
>
>
Fred1:
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Labels
• A vector label is a string of
characters terminated by a colon ( : ).
• When present, a label is the first field
of a Vector Data Line.
• Labels may be local or global:
− A local label may only be
referenced by its own pattern.
‘Label2’ is a local label
− A global label may be referenced
outside its own pattern. Must be
declared using the keyword
‘global’. ‘Label1’ is a global
label.
• In the pattern file(s) where a global
label is referenced, the label name
must be imported with an ‘import
label’ statement
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// Pat1.pat
global Label1:
Label2:
>
>
>
>
// Pat2.pat
import label Label1;
vector ($tset, In, Out )
{
>
jump Label1
>
:
}
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Branching - Conditions
• Branching opcodes may be set up for conditional execution.
• For conditional execution, a set of condition flags are available for testing with the
‘if’ opcode.
– if (condition) then action
• condition = a flag state or combination of flag states
• action = one of the execution control opcodes, i.e., jump, jump_glo
– Additional execution control opcodes will be presented later
• There a two sets of flags
– System flags
– CPU flags
• During a pattern burst, the pattern generator monitors the flags. If one of the flags
occurs, the corresponding condition latch is set. It remains set until it is cleared by
the pattern microcode or until another pattern start is executed. Clearing flags is
covered later.
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Conditions - Flags
• System flags are set by the tester based on vector results:
– fail - set by PatGen when a vector fails during a pattern burst
– pass - not a separate flag. The inverse of fail. Cannot be cleared.
– fail is automatically cleared when a ‘pattern start’ is executed or may be
cleared by pattern opcodes.
• CPU flags can be set or read by opcodes in the pattern file and by code included
in the test program
– cpuA, cpuB, cpuC, cpuD
– See Help, Visual Basic for Test, for details about using program code to set
the CPU flags.
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Conditions - Flags
•
•
The following flags can be used as
conditions in an ‘if’ statement :
– if (fail)
– if (pass)
– if (cpuA)
– if (!cpuA)
– if (ext)
– if (!ext)
if (cpuA) jump Fred >
>
>
Fred:
set_glo Fred1
>
if (!cpuA)jump_glo >
Use of the ‘enable’ opcode is
required to use the remaining flags
or for any combinations of flags
>
>
Fred1:
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Assigning Conditions to ‘Flag’
•
•
•
•
•
The ‘enable’ opcode and the ‘flag’
keyword are needed to use cpuB,
cpuC, cpuD or a combination of
any flags as the condition for an ‘if’
opcode.
The ‘enable’ opcode assigns a set
of condition(s) to ‘flag’
When you use the ‘if (flag)’
statement, the ‘flag’ keyword
means the condition that was set
up by the most recently executed
enable statement.
New condition assignments may
be made to ‘flag’ by subsequent
uses of the ‘enable’ opcode.
The ‘enable (none)’ statement
clears all enabled conditions
without assigning new ones.
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enable (cpuB)
if (flag) jump Fred
>
>
>
Fred: enable (fail or cpuA)>
set_glo Fred1
>
if (flag) jump_glo
>
>
>
Fred1: enable (none)
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Clearing Flag Latches
•
•
Once a system flag’s or user flag’s
condition latch has been set and
used in an ‘if’, the latch may need to
be reset before continuing with the
pattern.
To clear a latched flag within the
pattern
– The ‘clr_cond’ control bit may
be asserted on any vector that
has an ‘if’ opcode. ‘clr_cond’ will
clear the flags that the ‘if’ tests, if
the condition is true.
– The ‘clr_flag (flag-list)’ opcode
will clear the specified flags
unconditionally.
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if (fail) jump Fred,
clr_cond
>
>
>
Fred: enable (fail or cpuA)>
set_glo Fred1
>
if (flag) jump_glo
>
>
>
Fred1: clr_flag(cpuA)
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>
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Clearing Flag Latches
•
•
•
•
It is common to set a vector to branch
to itself. This seems to set an infinite
loop.
Usually this loop is waiting for some
external event to occur
– PatFlagFunc interpose function
call in a Functional Template
– Dynamic Icc measurement by a
Power Supply Template
If the loop is being used as a ‘scope’
loop, then the flags may be cleared
using a pattern-oriented Debug
Display, ‘Pattern Control Display’.
Refer to the Pattern Debug section of
this module.
Visual Basic code may also be used to
clear flag latches. Refer to Module 9,
Custom Coding.
PN 553-405-50 Rev - August 2002
Ex1:
set_cpu (cpuA)
>
Fred: if (cpuA) jump Fred
>
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>
>
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Using Pattern Opcodes for Dynamic Icc Testing
• In dynamic Icc testing, the power supply current is tested while the DUT is
performing some operation(s). As a result, a pattern will be needed.
• In the pattern, a loop will be created. This will represent the point at which the
measurement should take place.
• The loop is commonly controlled by a CPU Flag.
• There may be multiple measurement points for a given test event.
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Dynamic Icc Pattern
• This pattern will be used as a
•
•
•
•
•
HoldState pattern by a Power Supply
Instance
In this pattern, there are two
measurement points:
– measure IccH (vector 1)
– measure IccL (vector 3)
Vector 0, set cpuA = true
Vector 1, loop on this vector until cpuA
= false. cpuA will be set to false by
the template code after the
measurement is made.
Vector 2, set cpuA = true again
Vector 3, loop on this vector until cpuA
= false. See above
PN 553-405-50 Rev - August 2002
//7408_IccPat.pat
Icc_start:
set_cpu (cpuA)
>
IccH: if (cpuA) jump IccH
>
set_cpu (cpuA)
>
IccL: if (cpuA) jump IccL
>
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halt
>
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Dynamic Icc Instance
• In the instance, the pattern should be
entered as the HoldStatePat.
• The cpuA flag = True should be
selected as the WaitFlag. This
indicates that the measurement is
triggered when cpuA = true.
• Because there are multiple
measurement points, Resume Pat
should be set to Yes. As a result,
after a measurement is made, the
CPU flag will be toggled. This will
force the pattern out of the loop and
go to the next vector. If Resume Pat
= no, the template code will terminate
the pattern after the measurement is
made.
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Dynamic Icc Instance
• For multiple measurements within a
pattern, set Test Control =
Pattern\Flag-multiple tests.
• The Item Index counter, Add and
Delete buttons become active. This
allows the creation of multiple sets of
values (items) for the following fields:
– HiLimit
– LoLimit
– Settling Time
• Use the Add Button to add a new set
and then enter the values as needed.
One set (item) per measurement will
be needed. Item 0 is used with
measurement #1, etc.
• Maximum Index indicates the index
number of the last created set>
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Using Flags to trigger an Interpose Function
• The CPU flags, used in conjunction
with the PatFlagFunc Tab in a
Functional Instance, enables a pattern
to call an interpose function at given
points in the pattern.
• The calling condition is determined by
the WaitFlags.
• When the interpose function is called,
the flag(s) used to trigger the call will
be toggled to their opposite states.
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Loops
• A loop is a common technique that is used when a given set of vectors needs to be
executed multiple times
• The ‘loop’ opcodes provide a means of setting up a loop that executes N number times
• There are three (3) loop choices in the J750 Pattern Language:
– LoopA - uses a 4 level counter stack (counterA stack) to control looping. Permits
nesting up to 4 levels.
– LoopB - uses a single counter
– LoopC - uses a single counter
• The following sequence will be used to create a loop in a pattern:
– Set loopcounter to desired count
– At the end of the loop, decrement the counter and branch if not equal to zero
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Loops - setting loop counter
• Setting the loopcounter may be done
with two opcodes:
– set_loopA/B/C,
– loopA/B/C
• Both opcodes will push the count value
into the loopcounter. Count value = 1 …
65536
• The ‘set_loop’ opcode sets the
loopcounter on each execution of its
vector. Do not include the vector with
the ‘set_loop’ opcode in the loop.
• When the vector with a ‘loop’ opcode is
the target of an ‘end_loop’ opcode, the
loopcounter is not set to count value.
Because of this, the vector with the ‘loop’
opcode may be included in the loop.
PN 553-405-50 Rev - August 2002
set_loopB 10
Loop1:
>
>
end_loopB Loop1 >
Loop2: loopC 20
J750 Programming - V3.4
>
>
end_loopC Loop2 >
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Loops - end of loop
• The ‘end_loop’ opcode is used with
both the ‘loop’ and ‘set_loop’
opcodes to mark the end of the loop.
set_loopB 10
Loop1:
>
end_loopB Loop1 >
– endloopA/B/C
Loop2: loopC 20
• At this point, the designated counter is
decremented and the contents of the
counter is checked. If the counter is
not equal to zero, then branch back to
label. If the counter is equal to zero,
then go to next vector.
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>
J750 Programming - V3.4
>
>
end_loopC Loop2 >
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Nested Loops
• The LoopA structure uses a 4 level
stack to keep up with the nested loop
counts.
• In this example, the loopcount of 10 is
loaded into the top level of the stack at
vector 1.
Loop1: loopA 10
> // 1
> // 2
Loop2: loopA 5
> // 3
> // 4
end_loopA Loop2 > // 5
10
> // 6
end_loopA Loop1 > // 7
• At vector 3, the contents of the top
level are forced down to next level and
5 is placed on the top level.
5
10
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Nested Loops
• The ‘end_loopA’ opcode will always
decrement the top level. See vector
5. Top Level now = 4. Therefore,
control will go back to vector 3.
Loop1: loopA 10
> // 1
> // 2
Loop2: loopA 5
> // 3
4
> // 4
10
end_loopA Loop2 > // 5
> // 6
• When the top level decrements to 0,
control goes to vector 6 and the next
level (= 10) of the stack is moved up
to the top level.
end_loopA Loop1 > // 7
10
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Nested Loops
•
The next execution of ‘end_loopA’
(vector 7) will decrement the value in
the top level. Control goes to vector
1.
Loop1: loopA 10
> // 1
> // 2
Loop2: loopA 5
> // 3
9
> // 4
end_loopA Loop2 > // 5
> // 6
•
At vector 3, ‘loopA 5’, pushes the top
level value down and sets top level to
5.
5
end_loopA Loop1 > // 7
9
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Nested Loops
• The ‘exit_loop’ opcode provides the
opportunity to exit from a loop before
the loopcounter equals zero.
– If used in a LoopA, pops LoopA
stack before branching
– Typically used with a condition.
• At vector 5, if cpuA is true, the top
value on the loopA stack is popped
off, and the next vector to be executed
will be at Fred.
• It is good programming practice to
avoid premature exits unless
absolutely necessary.
PN 553-405-50 Rev - August 2002
Loop1: loopA 10
> // 1
> // 2
Loop2: loopA 5
> // 3
> // 4
if (cpuA) exit_loop
Fred
> // 5
end_loopA Loop2 > // 6
Fred:
J750 Programming - V3.4
> // 7
end_loopA Loop1 > // 8
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J750 Test System
Loops - other opcodes
• When a premature exit from a
nested loop is initiated by an
opcode other than ‘exit_loop’, the
LoopA stack still has the count
value in its top level.
• The ‘pop_loop’ opcode should be
used to clean up the stack by
removing this value from the top of
the loopA stack.
• See Help, using Loop opcodes, for
more details on looping.
Loop1: loopA 10
> // 1
> // 2
Loop2: loopA 5
> // 3
> // 4
if (cpuA) jump Fred
> // 5
end_loopA Loop2 > // 6
Fred:
pop_loop
> // 7
end_loopA Loop1 > // 8
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Subroutines
• A subroutine is a set of vectors introduced by a label declared as subr or
•
•
•
•
global subr.
A subroutine is typically used because a specific set of vectors is being used in
multiple locations.
Using a call mechanism allows the subroutine to be accessed from various
locations in patterns while being stored in vector memory only once.
When a subroutine is called, execution control transfers to the first vector in the
subroutine. When the subroutine is ‘finished’, execution control is passed back to
the vector after the ‘call’ vector.
The subroutine call mechanism is controlled by a subroutine stack. The subroutine
stack has a maximum of 8 levels.
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Subroutines
•
The steps for using subroutines are:
1. Create the vectors that make up the subroutine.
2. Mark the beginning of the vectors with a subroutine-type label using the ‘subr’
or ‘global subr’ label prefix.
3. Mark the exit point(s) of the subroutine with ‘return’ opcode(s)
4. Insert calls of the subroutine at desired points (vectors) in pattern(.s)
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Creating Subroutine Vectors
• If subroutines and non-subroutine
vectors are contained in the same
pattern file, the subroutines must be
at the end of the file, after all nonsubroutine vectors.
• If a subroutine is created in one
pattern file and called in another
pattern file, then the subroutine label
must be imported to the calling file.
See Help, Import Labels
>
call sub1
>
>
call sub1
>
>
halt
>
subr sub1:
>
>
return
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>
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Marking Subroutine Vectors
• The beginning vector of a subroutine
must be labeled with a subroutinetype label
• If the subroutine is accessed from its
creation file only:
– subr labelname
• If the subroutine is to be accessed
from outside its creation file:
– global subr labelname
>
halt
>
subr sub1:
>
>
return
>
global subr sub2:
>
>
return
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Subroutine Exit Points
• An exit from a subroutine is initiated
by the ‘return’ opcode
• The address of the next vector to
execute is popped off the subroutine
stack.
• Under normal circumstances, this
will be the address of the vector
after the vector that called the
subroutine. See next slide.
>
halt
>
subr sub1:
>
>
return
>
global subr sub2:
>
>
return
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Calling Subroutines
• Subroutines may be called using one
of the following:
– call label
– ccall label
label = first vector in subroutine
– call_glo
• The ‘call’ opcodes will cause the
address of the vector following the
‘call’ to be stored in top level of
subroutine stack. Any values in
subroutine stack are pushed down
one level
• ‘ccall’ opcode is similar to ‘call’
– May execute as a NOP based on
setting of a ‘ccall property’
– Property is set using program
code = ccall or nop.
• The ‘call’ opcodes may be used with
an ‘if’ opcode
PN 553-405-50 Rev - August 2002
>
call sub1
>
>
set_glo sub1
>
>
if (fail) call_glo >
>
halt
sub1:
J750 Programming - V3.4
>
>
>
return
>
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External Subroutines
• An external subroutine is a subroutine whose vectors are in one file and are called
•
•
•
•
from other pattern files.
The label on the first vector of the subroutine must be type ‘global subr’
global subr fred:
> --------- ---- ------------ --- ;
If the subroutine is in its own stand-alone file, it must be loaded into vector memory as
part of a Pattern Set or Pattern Group.
The file should be listed as the last member(s) of the Group / Set.
In the Pattern Set Sheet, the keyword ‘subr’ must be entered into the ‘Start Label’
column. This prevents the pattern file from executing as a separate burst.
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Control Bits
• The control bits do not take arguments or depend on conditions.
• There can be more than one of the control bits per vector (subject to the restrictions
•
•
•
•
•
on normal mode – note that ‘mask’ can appear on any vector, even in normal mode).
The control bits can be combined with the execution control opcodes, except that ‘ign’
and ‘halt’ are mutually exclusive.
The following control bits are failure-related control bits (see next slide)
− ign (ignore),
− mask,
− clr_fail,
− ifc (inhibit fail count)
The ‘clr_cond’ (clear condition) bit was discussed earlier (see Clearing Flags)
The ‘stv’ (store this vector) bit is used for marking vectors to be stored when using
Store This Vector mode for HRAM capture.
The ‘icc’ (inhibit cycle count) bit is used to prevent the cycle counter from
incrementing when the vector is executed.
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Control Bits – mask, stv
• mask - Mask failures on this vector.
Unlike other opcodes, mask can
appear on any vector, even in
normal mode.
• stv - Select vector for HRAM
collection for certain HRAM modes.
(Store This Vector.) See Help,
HRAM modes.
• Control bits may be combined with
opcodes.
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Failure-related Control Bits
• Several of the control bits are used to specify a non-default action based on a failing
vector. See Help, Failure-related Control Bits for default actions
• A fail counter and a fail-bit in the Accumulated Fail Register (AFR) is maintained for
each pin (channel) during a pattern burst. The fail counter will increment anytime its
channel produces a fail. The fail-bit will set on a failing vector. It does not reset on
a passing vector.
– clr_fail will reset both the fail counter and fail-bit for all channels
• In the PatGen, a fail counter is incremented anytime a vector fails. This a separate
counter from the per-channel fail counter.
– ifc (inhibit fail count) will prevent the PatGen fail counter from incrementing if
this vector fails.
• For ign and mask, see next slide.
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Failure-related Control Bits - ign and mask
• By default, when a vector fails, pattern execution halts N cycles later, where N is the
pipeline depth. The pipeline depth of the J750 is currently 34 cycles.
• The ‘ign’ and ‘mask’ bits can be used to affect the halt-on-fail result.
– When ign used on a vector, and the vector fails, the tester will not use the fail
result to stop the pattern. The fail result is still recognized and counted, i.e., fail
counters and registers are still incremented. This control bit is very useful in
match loops. Match loops are beyond the scope of this course. See Help, Notes
on Opcodes and Control Bits, Creating a Match Loop. See also,
TUG_Paper_matching in the Appendix section of the Course Notes.
– When mask is used, the vector is not tested by the Fail Processors of all
channels, therefore no fail result could be produced. No fail counters or
registers will be incremented.
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Adding Microcode with Pattern Tool
•
•
•
•
•
•
Microcode may be added to pattern
files with the PatGen Microcode Edit
window.
Opcodes are provided by 4 tabs:
– Repeat/Loop
– Branch
– Subroutine
– Miscellaneous
Conditions, when applicable to a
selected opcode, will be selectable.
Control bits are selectable.
Boxes for non-selectable items,
Label and Number are enabled when
an opcode requires them.
As appropriate opcodes, conditions
and control bits are selected, the
microcode is built in the Microcode
box.
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Minimizing SVM Usage
• Due to the limited size of SVM, it is possible that the number of vectors assigned
to SVM by the compiler may exceed its capacity.
• The following steps may be used to minimize the number of vectors assigned to
SVM:
− Set the min_period compiler option to its maximum possible value. If the
minimum period actually used for the pattern is 100 ns, then set min_period to
100ns instead of the default of 10ns or 20ns.
− Remove unnecessary labels
− Use the ‘mrepeat’ opcode only when necessary
− Use subroutines only when necessary
• To see how many SVM and LVM vectors are used by a given pattern,
− Use the Pattern Control Display: load the pattern (online or offline) and select
the “Mem Usage” tab.
− You can also see the number of SVM and LVM vectors used by a pattern by
typing “patinfo <pattern file name>” in a DOS window.
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J750 Test System
J750 Programming
V3.40
Training Manual
Module 7
Patterns
Review
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Patterns: Review/Exercise
1. List and describe the purpose of the statement types that are used in a pattern
source file.
- Pinmap - identifies the pin names/pin groups that will be used for vector data
- Preprocessor - provides the ability to use “C” preprocessor directives like #define, #include, #if, etc.
- Compiler Control - identifies how the pattern file gets compiled.
- Import Tset or Label - provides a mechanism to reference external file timing and symbols.
- Vector - encapsulating the pattern data per pin/group, timing reference and opcode.
- Comments - “C” like syntax for documenting user text.
2. Identify and describe vector data syntax.
- vector data can be expressed as a numeric form with the radix as:
X, H = Hexadecimal; O = Octal; B = Binary; D = Decimal
numeric values could be 0-9, A-F and Channel modes = Drive (.d) or Receive (.r)
or data could be represented as Symbolic (Radix = S)
0
Drive Data = 0,
Voltage Level = VDriveLow
1
Drive Data = 1,
Voltage Level = VDriveHigh
2
Drive Data = 1,
Voltage Level = Vph
H
Expect High,
VDUT >= VCompareHi
L
Expect Low,
VDUT <= VCompareLo
M
Expect Midband,
VCompareLo <= VDUT <= VCompareHi
V
Expect Valid,
VDUT <= VCompareLo OR VDUT >= VCompareHi
X
Expect Mask
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Patterns: Review/Exercise
3. Describe the difference between the pattern opcode and control bits.
- Pattern opcodes - controls the flow of execution within the pattern file
- Control bits - modify the execution of the specific vector for which they appear: for example, a mask
failure, or inhibit fail count
4. List and describe the purpose of various commonly used opcodes.
- nop - increment the vector program counter to the vector
- halt - inhibits the Patgen from fetching another vector (after the halt vector is executed)
- end_module - in a stand alone pattern, it acts like a halt, in a pattern group acts like a nop.
- repeat - allows a singe vector to be repeated up to 65K times.
- call - executes a subroutine
- jump - executes a goto a specified location
- loop - executes some number of vector based on a loop count
- if (CONDITION) then (ACTION) - a conditional branch if the flag state is true then branch
(jump, call, return, exit loop, etc).
- cpuA|B|C|D - set the state of a flag (using program code) and testing the condition for a true
or false
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Patterns: Review/Exercise
5. List the steps for creating subroutine vectors and the considerations.
- If subroutines and non-subroutine vectors are contained in the same pattern file, the
subroutines must be at the end of the file, after all non-subroutine vectors.
If a subroutine is created in one pattern file and called in another pattern file, then the
subroutine label must be imported to the calling file.
- The beginning vector of a subroutine must be labeled with a subroutine-type label.
- Mark the exit point(s) of the subroutine with ‘return’ opcode(s).
- Insert calls of the subroutine at desired points (vectors) in pattern(s)
- Considerations are: LV/SVM Optimization; inter-pattern label references; and the use of
resume vs.. return
6. List both the pattern and instance steps involved for implementing a dynamic Icc test.
- Identify the pattern to be used and the number of measurement points and setup the cpu
flag/s in order to loop on the specified vector/s
- In the instance specify the HoldStatePat pattern, select the cpu flag should be true for the
waitflag, if there are multiple measurements set Test Control = Pattern\Flag-multiple
tests and program the limits for additional measurements
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Patterns: Review/Exercise
7. Describe the difference between a pattern group and a pattern set.
- A pattern group is a list of pattern files that will be loaded in contiguous locations in vector
memory.
- A Pattern Set creates named lists of pattern files (.pat) and pattern groups to be executed or
used by a test instance, all patterns that are required for the test are listed in the set and
are loaded into tester memory for execution as a set of patterns.
8. List the programming considerations needed for creating a pattern group.
- A pattern file listed in multiple pattern groups will be loaded multiple times
If a pattern is intended to run as a stand-alone pattern and included in pattern groups,
the pattern should be terminated with an ‘end_module’ opcode instead of ‘halt’. When
the pattern is executed in a group, ‘end_module’ acts a NOP. If pattern is executed as a
stand-alone pattern, ‘end_module’ acts as a ‘halt’.
The last pattern in pattern group should always end in ‘halt’. However, some patterns
may need to execute in the middle of one group and at the end of others. If that is the
case, it is recommended to create a terminator pattern consisting of a single vector with
an ‘halt’ opcode. This pattern would then be used as the last pattern in any group. A
pattern file that is included in a pattern group can reference labels only in other pattern
files within the same group.
9. Identify an advantage of using a pattern set over a pattern group or stand-alone pattern.
- Pattern Sets allow the user to start a pattern at any labeled vector in the pattern. Standalone patterns and pattern groups must always start at the first vector.
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J750 Programming
V3.40
Training Manual
Module 7
Patterns
Lab 4 - Exercise 1 - 4
Go to Page 37 in Lab Section to complete
Lab 4 Exercises 1 - 4
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