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AntMiner ControlBoard XC7010 V1 01

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5
4
D
JP1
1
2
3
V3P3
1
2
3
R1
3
JP3
20K
PS_MIO2_NAND_ALE
3,10
1
2
3
C
1
2
3
D
V3P3
1
2
3
R2
20K
PS_MIO3_NAND_WE#
3,10
20K
PS_MIO5_NAND_DQ0
3,10
SIP_2.54mm
V3P3
1
2
3
1
Boot Mode Select
SIP_2.54mm
JP2
2
R3
JP4
20K
PS_MIO4_NAND_DQ2
SIP_2.54mm
Boot Mode
Cascade JTAG
TF Card
QSPI Flash
NOR Flash
NAND Flash
3,10
1
2
3
V3P3
1
2
3
R4
C
SIP_2.54mm
JP1
0
0
0
0
0
JP2
0
1
0
0
1
JP3
0
0
0
1
0
JP4
0
1
1
0
0
B
B
A
Title
Size
A
5
4
3
Date:
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
2
Sheet
1
1
of
15
Rev
V1.0
5
4
BANK 0
3
M10
R13
R14
0
0
L9
K10
J10
VN_0
2
4
6
8
10
12
14
HEADER 2X7
4
PS_MIO47_KEY_RESET
4
PS_SRST#
R19
PS_SRST#
JTAG_RST#
R23
R24
1K
V2P5
C8
R22
4.7K
0
0 NC
4
3
2
1
U2
A2
A1
Vref_A
GND
0.1uF
B2
B1
Vref_B
EN
LSF0102DCTR
3
5
6
7
8
R20
Q4
2N7002-7-F
S SOT23_3
1K
V3P3
JTAG_RST#
R21
B
V3P3
200K
C7
0.1uF
4
Title
Size
A
4
D
C
S1
KMR231GLFS
1
2
A
5
G
V2P5
0
JTAG_TMS
JTAG_TCK
JTAG_TDO
JTAG_TDI
V2P5
220
1
3
5
7
9
11
13
R17
B
DONE
V3P3
2 R18
4
6
8
10
12
14
V3P3
330
1
3
5
7
9
11
13
J10
4.7K
xc7z010clg400_10
0
V3P3
D1
G/25mA/0603
R182
R16
0.1uF
0.47uF
R15
0.1uF
M6
VCCBATT_0
V3P3
V3P3
0.1uF
C6
F11
CFGBVS_0
4.7K
4.7K
0.1uF
VCCADC_0
K6
T6
R6
N6
F10
DONE
10uF
VCCO_0
RSVDVCC1
RSVDVCC2
RSVDVCC3
RSVDGND
VREFP_0
VREFN_0
GNDADC_0
R10
R11
V3P3
C4
L10
R10
L6
R11
D
C3
0
INIT_B_0
PROGRAM_B_0
DONE_0
C2
R12
VP_0
J6
G6
F6
F9
4.7K
4.7K
4.7K
4.7K
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TCK
C1
0
TMS_0
TDI_0
TDO_0
TCK_0
DXN_0
K9
R9
C5
C
DXP_0
J9
FB2
100R/3A
R5
R6
R7
R8
U1A
M9
V1P8
1
V3P3
D
FB1
100R/3A
2
3
Date:
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
2
Sheet
2
1
of
15
Rev
V1.0
5
4
3
R25
C9
4
2
Y1
4.7K
VCC ENA/DSI
GND
OUT
0.1uF
33..330MHz
1
3
1
BANK 500
D
V3P3
2
D
U1B
R26
33
12,15
PS_CLK_33M33
P_GOOD
E7
C7
PS_CLK_500
PS_POR_B_500
V3P3
C
0.1uF
0.1uF
C13
C12
10uF
100uF
C11
C10
B6
D7
VCCO_MIO0_500_1
VCCO_MIO0_500_2
PS_MIO0_500
PS_MIO1_500
PS_MIO2_500
PS_MIO3_500
PS_MIO4_500
PS_MIO5_500
PS_MIO6_500
PS_MIO7_500
PS_MIO8_500
PS_MIO9_500
PS_MIO10_500
PS_MIO11_500
PS_MIO12_500
PS_MIO13_500
PS_MIO14_500
PS_MIO15_500
E6
A7
B8
D6
B7
A6
A5
D8
D5
B5
E9
C6
D9
E8
C5
C8
PS_MIO0_NAND_CS#
PS_MIO1_NAND_WP#
PS_MIO2_NAND_ALE
PS_MIO3_NAND_WE#
PS_MIO4_NAND_DQ2
PS_MIO5_NAND_DQ0
PS_MIO6_NAND_DQ1
PS_MIO7_NAND_CLE
PS_MIO8_NAND_RE#
PS_MIO9_NAND_DQ4
PS_MIO10_NAND_DQ5
PS_MIO11_NAND_DQ6
PS_MIO12_NAND_DQ7
PS_MIO13_NAND_DQ3
PS_MIO14_NAND_R/B#
PS_MIO15_LED
xc7z010clg400_10
10
10
1,10
1,10
1,10
1,10
10
10
10
10
10
10
10
10
10
C
V3P3
D2
R27
220
G/25mA/0603
V3P3
B
PLL ENABLED
BANK500:3.3V
BANK501:2.5V
PS_MIO6_NAND_DQ1
PS_MIO7_NAND_CLE
PS_MIO8_NAND_RE#
PS_MIO0_NAND_CS#
R28
R29
R30
R175
PS_MIO0_NAND_CS# R187
PS_MIO1_NAND_WP# R188
PS_MIO14_NAND_R/B#R189
20K
20K
20K
20K
B
1K
1K
1K
During an SD memory card boot sequence, the BootROM
reads the logic level on the MIO pin 0 as an SD Card
Detect. MIO pin 0 must be Low during the SDIO boot
process.
A
Title
Size
A
5
4
3
Date:
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
2
Sheet
3
1
of
15
Rev
V1.0
5
4
12
12
12
12
12
12
12
D
12
A19
E14
B18
D10
A17
F14
B17
D11
A16
F15
A15
D13
ETH_TX_CLK
ETH_TXD0
ETH_TXD1
ETH_TXD2
ETH_TXD3
ETH_TX_CTRL
ETH_RX_CLK
12
ETH_RX0
12
ETH_RX1
12
ETH_RX2
12
ETH_RX3
ETH_RX_CTRL
3
U1C
2
PS_MIO16_501
PS_MIO17_501
PS_MIO18_501
PS_MIO19_501
PS_MIO20_501
PS_MIO21_501
PS_MIO22_501
PS_MIO23_501
PS_MIO24_501
PS_MIO25_501
PS_MIO26_501
PS_MIO27_501
PS_MIO40_501
PS_MIO41_501
PS_MIO42_501
PS_MIO43_501
PS_MIO44_501
PS_MIO45_501
PS_MIO32_501
PS_MIO33_501
PS_MIO34_501
PS_MIO35_501
PS_MIO28_501
PS_MIO37_501
PS_MIO38_501
PS_MIO39_501
BANK 501
C
V2P5
2
R32
B10
E11
PS_SRST#
1K
R33
1K
A13
B16
D12
E15
V2P5
C19
C18
C17
C16
C15
C14
PS_SRST_B_501
PS_MIO_VREF_501
PS_MIO46_501
PS_MIO47_501
PS_MIO48_501
PS_MIO49_501
PS_MIO50_501
PS_MIO51_501
PS_MIO52_501
PS_MIO53_501
VCCO_MIO1_501_1
VCCO_MIO1_501_2
VCCO_MIO1_501_3
VCCO_MIO1_501_4
0.1uF
0.1uF
0.1uF
0.1uF
10uF
100uF
B
PS_MIO29_501
PS_MIO30_501
PS_MIO31_501
PS_MIO36_501
D14
C17
E12
A9
F13
B15
0.1uF
1N4148
PS_MIO39_BEEP R39
C20
A
1K
V2P5
R36
BZ1
PS_MIO51_IP_GET
2
S2
KMR231GLFS
1
2
3
Bell
C13
C15
E16
A11
D16
B14
B12
C12
B13
B9
C10
C11
V2P5
4
R37
R38
PS_MIO38_LED_G
D
13
13
13
13
13
PS_MIO29_EN2
PS_MIO30_EN3
PS_MIO31_EN4
PS_MIO36_EN9
13
13
13
13
ETH_MDC
ETH_MDIO
R34
220
Q3
R35
2N7002-7-F
S SOT23_3
G
D
220
D
C
PS_MIO46_CD_SW
11
PS_MIO47_KEY_RESET
MIO48_UART_TXD
11
MIO49_UART_RXD
11
PS_MIO50_CD_WP
11
PS_MIO51_IP_GET
G
PS_MIO32_EN5
PS_MIO33_EN6
PS_MIO34_EN7
PS_MIO35_EN8
PS_MIO28_EN1
11
11
11
11
11
11
2
12
12
4
V3P3
D3
B
3
2
1
F5G1
Q2
2N7002-7-F
S SOT23_3
4
Q1
MMBT3904
ETH_MDC
ETH_MDIO
5
4.7K
PS_MIO40_CD_CLK
PS_MIO41_CD_CMD
PS_MIO42_CD_D0
PS_MIO43_CD_D1
PS_MIO44_CD_D2
PS_MIO45_CD_D3
PS_MIO37_LED_R
PS_MIO38_LED_G
PS_MIO39_BEEP
xc7z010clg400_10
V3P3
1
33
A14
D15
A12
F12
C16
A10
E13
C18
PS_MIO37_LED_R
D4
R31
1
1K
1K
Title
Size
A
3
Date:
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
2
Sheet
4
1
of
15
Rev
V1.0
5
4
D
C
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
DDR3_A0
DDR3_A1
DDR3_A2
DDR3_A3
DDR3_A4
DDR3_A5
DDR3_A6
DDR3_A7
DDR3_A8
DDR3_A9
DDR3_A10
DDR3_A11
DDR3_A12
DDR3_A13
DDR3_A14
9
9
9
DDR3_BA0
DDR3_BA1
DDR3_BA2
N2
K2
M3
K3
M4
L1
L4
K4
K1
J4
F5
G4
E4
D4
F4
L5
R4
J5
P5
P4
M5
N1
9
9
9
9
DDR3_CAS#
DDR3_RAS#
DDR3_WE#
DDR3_CS#
9
9
9
9
DDR3_CLK_P
DDR3_CLK_N
DDR3_CKE
DDR3_ODT
V1P5
R40
80.6
R41
R42
80.6
80.6
VREF_DDR3
C22
0.1uF
0.1uF
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
10uF
10uF
100uF
100uF
5
H5
G5
V4
U1
R5
P2
L3
H4
G1
E5
D2
A3
V1P5
V1P5
L2
M2
N3
N5
P6
H6
C21
B
A
U1D
4
3
2
PS_DDR_A0_502
PS_DDR_A1_502
PS_DDR_A2_502
PS_DDR_A3_502
PS_DDR_A4_502
PS_DDR_A5_502
PS_DDR_A6_502
PS_DDR_A7_502
PS_DDR_A8_502
PS_DDR_A9_502
PS_DDR_A10_502
PS_DDR_A11_502
PS_DDR_A12_502
PS_DDR_A13_502
PS_DDR_A14_502
PS_DDR_DQ0_502
PS_DDR_DQ1_502
PS_DDR_DQ2_502
PS_DDR_DQ3_502
PS_DDR_DQ4_502
PS_DDR_DQ5_502
PS_DDR_DQ6_502
PS_DDR_DQ7_502
PS_DDR_DQ8_502
PS_DDR_DQ9_502
PS_DDR_DQ10_502
PS_DDR_DQ11_502
PS_DDR_DQ12_502
PS_DDR_DQ13_502
PS_DDR_DQ14_502
PS_DDR_DQ15_502
PS_DDR_DQ16_502
PS_DDR_DQ17_502
PS_DDR_DQ18_502
PS_DDR_DQ19_502
PS_DDR_DQ20_502
PS_DDR_DQ21_502
PS_DDR_DQ22_502
PS_DDR_DQ23_502
PS_DDR_DQ24_502
PS_DDR_DQ25_502
PS_DDR_DQ26_502
PS_DDR_DQ27_502
PS_DDR_DQ28_502
PS_DDR_DQ29_502
PS_DDR_DQ30_502
PS_DDR_DQ31_502
PS_DDR_BA0_502
PS_DDR_BA1_502
PS_DDR_BA2_502
PS_DDR_CAS_B_502
PS_DDR_RAS_B_502
PS_DDR_WE_B_502
PS_DDR_CS_B_502
PS_DDR_CKP_502
PS_DDR_CKN_502
PS_DDR_CKE_502
PS_DDR_ODT_502
PS_DDR_VRP_502
PS_DDR_VRN_502
PS_DDR_DQS_P0_502
PS_DDR_DQS_N0_502
PS_DDR_DQS_P1_502
PS_DDR_DQS_N1_502
PS_DDR_DQS_P2_502
PS_DDR_DQS_N2_502
PS_DDR_DQS_P3_502
PS_DDR_DQS_N3_502
PS_DDR_VREF1_502
PS_DDR_VREF0_502
VCCO_DDR_502_1
VCCO_DDR_502_2
VCCO_DDR_502_3
VCCO_DDR_502_4
VCCO_DDR_502_5
VCCO_DDR_502_6
VCCO_DDR_502_7
VCCO_DDR_502_8
VCCO_DDR_502_9
VCCO_DDR_502_A
PS_DDR_DM0_502
PS_DDR_DM1_502
PS_DDR_DM2_502
PS_DDR_DM3_502
PS_DDR_DRST_B_502
C3
B3
A2
A4
D3
D1
C1
E1
E2
E3
G3
H3
J3
H2
H1
J1
P1
P3
R3
R1
T4
U4
U2
U3
V1
Y3
W1
Y4
Y2
W3
V2
V3
1
DDR3_DQ0
DDR3_DQ1
DDR3_DQ2
DDR3_DQ3
DDR3_DQ4
DDR3_DQ5
DDR3_DQ6
DDR3_DQ7
DDR3_DQ8
DDR3_DQ9
DDR3_DQ10
DDR3_DQ11
DDR3_DQ12
DDR3_DQ13
DDR3_DQ14
DDR3_DQ15
DDR3_DQ16
DDR3_DQ17
DDR3_DQ18
DDR3_DQ19
DDR3_DQ20
DDR3_DQ21
DDR3_DQ22
DDR3_DQ23
DDR3_DQ24
DDR3_DQ25
DDR3_DQ26
DDR3_DQ27
DDR3_DQ28
DDR3_DQ29
DDR3_DQ30
DDR3_DQ31
C2
B2
G2
F2
R2
T2
W5
W4
9
9
9
9
9
9
9
9
9
9
D
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
DDR3_DQS0_P
DDR3_DQS0_N
DDR3_DQS1_P
DDR3_DQS1_N
DDR3_DQS2_P
DDR3_DQS2_N
DDR3_DQS3_P
DDR3_DQS3_N
A1
F1
T1
Y1
DDR3_DM0
DDR3_DM1
DDR3_DM2
DDR3_DM3
B4
DDR3_RESET#
9
9
9
9
C
9
9
9
9
9
9
9
9
B
9
xc7z010clg400_10
BANK 502
3
Title
Size
A
Date:
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
2
Sheet
5
1
of
15
Rev
V1.0
5
4
3
PL BANK34 、35
U1E
13
BANK34_0_PLUG2
13
BANK34_L1P_PLUG1
13
BANK34_L1N_RST1
13
BANK34_L2P_TXD1
13
BANK34_L2N_RXD1
D
PUDC_B
13
BANK34_L3N_RST2
13
BANK34_L4P_TXD2
13
BANK34_L4N_RXD2
13
BANK34_L5P_PLUG3
13
BANK34_L5N_RST3
13
BANK34_L6P_TXD3
13
BANK34_L6N_RXD3
13
BANK34_L7P_PLUG4
13
BANK34_L7N_RST4
13
BANK34_L8P_TXD4
13
BANK34_L8N_RXD4
13
BANK34_L9P_PLUG5
13
BANK34_L9N_RST5
13
BANK34_L10P_TXD5
13
BANK34_L10N_RXD5
13
BANK34_L11P_PLUG6
13
BANK34_L11N_RST6
13
BANK34_L12P_TXD6
13
BANK34_L12N_RXD6
BANK34_L13P_MRCC_100M
C
B
13
13
13
13
13
13
13
13
13
13
13
13
BANK34_L15P_PLUG7
BANK34_L15N_RST7
BANK34_L16P_TXD7
BANK34_L16N_RXD7
BANK34_L17P_PLUG8
BANK34_L17N_RST8
BANK34_L18P_TXD8
BANK34_L18N_RXD8
BANK34_L19P_PLUG9
BANK34_L19N_RST9
BANK34_L20P_TXD9
BANK34_L20N_RXD9
13
13
13
13
BANK34_L22P_SCL1
BANK34_L22N_SDA1
BANK34_L23P_SCL2
BANK34_L23N_SDA2
V3P3
R19
T11
T10
T12
U12
U13
V13
V12
W13
T14
T15
P14
R14
Y16
Y17
W14
Y14
T16
U17
V15
W15
U14
U15
U18
U19
N18
P19
N20
P20
T20
U20
V20
W20
Y18
Y19
V16
W16
R16
R17
T17
R18
V17
V18
W18
W19
N17
P18
P15
P16
T19
IO_0_34
IO_L1P_T0_34
IO_L1N_T0_34
IO_L2P_T0_34
IO_L2N_T0_34
IO_L3P_T0_DQS_PUDC_B_34
IO_L3N_T0_DQS_34
IO_L4P_T0_34
IO_L4N_T0_34
IO_L5P_T0_34
IO_L5N_T0_34
IO_L6P_T0_34
IO_L6N_T0_VREF_34
IO_L7P_T1_34
IO_L7N_T1_34
IO_L8P_T1_34
IO_L8N_T1_34
IO_L9P_T1_DQS_34
IO_L9N_T1_DQS_34
IO_L10P_T1_34
IO_L10N_T1_34
IO_L11P_T1_SRCC_34
IO_L11N_T1_SRCC_34
IO_L12P_T1_MRCC_34
IO_L12N_T1_MRCC_34
IO_L13P_T2_MRCC_34
IO_L13N_T2_MRCC_34
IO_L14P_T2_SRCC_34
IO_L14N_T2_SRCC_34
IO_L15P_T2_DQS_34
IO_L15N_T2_DQS_34
IO_L16P_T2_34
IO_L16N_T2_34
IO_L17P_T2_34
IO_L17N_T2_34
IO_L18P_T2_34
IO_L18N_T2_34
IO_L19P_T3_34
IO_L19N_T3_VREF_34
IO_L20P_T3_34
IO_L20N_T3_34
IO_L21P_T3_DQS_34
IO_L21N_T3_DQS_34
IO_L22P_T3_34
IO_L22N_T3_34
IO_L23P_T3_34
IO_L23N_T3_34
IO_L24P_T3_34
IO_L24N_T3_34
IO_25_34
220 G/25mA/0603
D7
BANK35_L6P_LED
R180
220 G/25mA/0603
D6
BANK35_L8P_LED
R179
220 G/25mA/0603
R181
220 G/25mA/0603
D5
BANK35_L7P_LED
D8
BANK35_L9P_LED
BANK35_L12P_MRCC_100M
CLOCK_OUT
TP1
14
14
14
14
14
14
14
BANK35_L14P_FAN_PWM
BANK35_L15P_FAN_SPEED1
BANK35_L15N_FAN_SPEED2
BANK35_L16P_FAN_SPEED3
BANK35_L16N_FAN_SPEED4
BANK35_L17P_FAN_SPEED5
BANK35_L17N_FAN_SPEED6
V3P3
R183
R184
R185
R186
Baord_ID3
Baord_ID2
Baord_ID1
Baord_ID0
4.7K
4.7K
4.7K
4.7K
V3P3
G14
C20
B20
B19
A20
E17
D18
D19
D20
E18
E19
F16
F17
M19
M20
M17
M18
L19
L20
K19
J19
L16
L17
K17
K18
H16
H17
J18
H18
F19
F20
G17
G18
J20
H20
G19
G20
H15
G15
K14
J14
N15
N16
L14
L15
M14
M15
K16
J16
J15
C42
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C19
F18
H14
J17
K20
M16
C41
C40
C39
C38
0.1uF
10uF
C37
10uF
C36
100uF
C35
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
V3P3
V3P3
Y3
VCC ENA/DSI
GND
OUT
0.1uF NC
100MHz NC
1
3
R51
33 NCBANK34_L13P_MRCC_100M
0.1uF NC
4
2
4.7K NC
C52
1K
1K
1K
1K
1K
1K NC
R48
R47
4
2
IO_0_35
IO_L1P_T0_AD0P_35
IO_L1N_T0_AD0N_35
IO_L2P_T0_AD8P_35
IO_L2N_T0_AD8N_35
IO_L3P_T0_DQS_AD1P_35
IO_L3N_T0_DQS_AD1N_35
IO_L4P_T0_35
IO_L4N_T0_35
IO_L5P_T0_AD9P_35
IO_L5N_T0_AD9N_35
IO_L6P_T0_35
IO_L6N_T0_VREF_35
IO_L7P_T1_AD2P_35
IO_L7N_T1_AD2N_35
IO_L8P_T1_AD10P_35
IO_L8N_T1_AD10N_35
IO_L9P_T1_DQS_AD3P_35
IO_L9N_T1_DQS_AD3N_35
IO_L10P_T1_AD11P_35
IO_L10N_T1_AD11N_35
IO_L11P_T1_SRCC_35
IO_L11N_T1_SRCC_35
IO_L12P_T1_MRCC_35
IO_L12N_T1_MRCC_35
IO_L13P_T2_MRCC_35
IO_L13N_T2_MRCC_35
IO_L14P_T2_AD4P_SRCC_35
IO_L14N_T2_AD4N_SRCC_35
IO_L15P_T2_DQS_AD12P_35
IO_L15N_T2_DQS_AD12N_35
IO_L16P_T2_35
IO_L16N_T2_35
130IO_L17P_T2_AD5P_35
IO_L17N_T2_AD5N_35
IO_L18P_T2_AD13P_35
IO_L18N_T2_AD13N_35
IO_L19P_T3_35
IO_L19N_T3_VREF_35
IO_L20P_T3_AD6P_35
IO_L20N_T3_AD6N_35
IO_L21P_T3_DQS_AD14P_35
IO_L21N_T3_DQS_AD14N_35
IO_L22P_T3_AD7P_35
IO_L22N_T3_AD7N_35
IO_L23P_T3_35
IO_L23N_T3_35
IO_L24P_T3_AD15P_35
IO_L24N_T3_AD15N_35
IO_25_35
4
B
4.7K NC
Y2
VCC ENA/DSI
GND
OUT
100MHz NC
1
3
33 NC BANK35_L12P_MRCC_100M
R49
A
Title
3
C
VCCO_35_1
VCCO_35_2
VCCO_35_3
VCCO_35_4
VCCO_35_5
VCCO_35_6
Size
B
5
D
xc7z010clg400_10
xc7z010clg400_10
C53
A
R50
R52
R53
R54
R190
R191
U1F
R178
VCCO_34_1
VCCO_34_2
VCCO_34_3
VCCO_34_4
VCCO_34_5
VCCO_34_6
V3P3
BANK34_L22P_SCL1
BANK34_L22N_SDA1
BANK34_L23P_SCL2
BANK34_L23N_SDA2
PUDC_B
1
V3P3
C34
C51
C50
C49
C48
C47
10uF
C46
10uF
C45
100uF
C44
C43
N19
R15
T18
V14
W17
Y20
2
2
Date:
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
Sheet
1
6
of
15
Rev
V1.0
5
4
3
2
U1G
V1P0
G13
H12
J13
K12
L13
M12
N13
P12
R13
D
V1P0
J11
L11
N9
P10
R9
N11
VCCAUX_1
VCCAUX_2
VCCAUX_3
VCCAUX_4
VCCAUX_5
VCCAUX_6
V1P0
G11
H10
G8
VCCBRAM_1
VCCBRAM_2
VCCPLL
Y10
W7
U11
T8
V3P3
10uF
VCCO_13_1
VCCO_13_2
VCCO_13_3
VCCO_13_4
FB3
100R/3A
V1P8
0.47uF
C
G9
F8
H8
K8
M8
VCCPAUX_1
VCCPAUX_2
VCCPAUX_3
VCCPAUX_4
VCCPAUX_5
D
V1P8
C55
VCCPINT_1
VCCPINT_2
VCCPINT_3
VCCPINT_4
VCCPINT_5
VCCPINT_6
V1P8
C54
G7
J7
L7
N7
P8
R7
VCCINT_1
VCCINT_2
VCCINT_3
VCCINT_4
VCCINT_5
VCCINT_6
VCCINT_7
VCCINT_8
VCCINT_9
1
C
xc7z010clg400_10
V1P0
V1P8
0.1uF
0.1uF
0.1uF
Date:
0.1uF
0.1uF
0.1uF
0.1uF
Size
A
3
C98
C97
C96
C95
0.1uF
10uF
C94
C93
100uF
0.1uF
C92
C91
0.1uF
10uF
C90
C89
100uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C88
C87
C86
C85
C84
C83
0.1uF
10uF
C82
C81
10uF
100uF
C80
C79
Title
4
B
V1P8
A
5
C78
C77
C76
0.1uF
0.1uF
V1P0
C75
C74
0.1uF
10uF
C73
C72
100uF
0.1uF
0.1uF
0.1uF
C71
C70
C69
C68
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
10uF
V1P0
C67
C66
C65
C64
C63
C62
C61
C60
10uF
100uF
C59
C58
100uF
100uF
C57
C56
B
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
2
Sheet
7
1
of
15
Rev
V1.0
5
4
D
3
2
D
U1H
A8
A18
B1
B11
C4
C14
K11
D17
E10
E20
F3
F7
G10
G12
G16
H7
H9
H11
H13
H19
J2
J8
J12
K5
K7
C9
K13
K15
L8
L12
C
GND_01
GND_02
GND_03
GND_04
GND_05
GND_06
GND_07
GND_08
GND_09
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
B
1
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
U1I
L18
M1
M7
M11
M13
N4
N8
N10
N12
N14
P7
P9
P11
P13
P17
R8
R12
R20
T3
T7
T13
U6
U16
V9
V19
W2
W12
Y5
Y15
V5
U7
V7
T9
U10
Y7
Y6
Y9
Y8
V8
W8
W10
NC_01
NC_02
NC_03
NC_04
NC_05
NC_06
NC_07
NC_08
NC_09
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
W9
U9
U8
W11
Y11
T5
U5
Y12
Y13
V11
V10
V6
W6
C
xc7z010clg400_10
B
xc7z010clg400_10
A
Title
Size
A
5
4
3
Date:
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
2
Sheet
8
1
of
15
Rev
V1.0
5
4
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
D
5
5
5
5
5
K9
J7
K7
DDR3_CKE
DDR3_CLK_P
DDR3_CLK_N
E7
D3
DDR3_DM0
DDR3_DM1
5
5
5
5
L2
L3
J3
K3
DDR3_CS#
DDR3_WE#
DDR3_RAS#
DDR3_CAS#
5
5
5
5
5
C
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
DDR3_A0
DDR3_A1
DDR3_A2
DDR3_A3
DDR3_A4
DDR3_A5
DDR3_A6
DDR3_A7
DDR3_A8
DDR3_A9
DDR3_A10
DDR3_A11
DDR3_A12
DDR3_A13
DDR3_A14
CS
WE
RAS
CAS
BA0
BA1
BA2
RESETn
ODT
ZQ
H1
M8
VREFDQ
VREFCA
DDR3_CKE
DDR3_CLK_P
DDR3_CLK_N
5
5
5
5
5
5
B1
B9
D1
D8
E2
E8
F9
G1
G9
DDR3_CS#
DDR3_WE#
DDR3_RAS#
DDR3_CAS#
VREF_DDR3
C103
0.1uF
0.1uF
0.1uF
40.2 NC
4.7K
C123
C122
C121
C120
C119
C118
C117
C116
C115
C114
C113
C112
C111
C110
C109
C108
C107
C106
C105
C104
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
100uF
C143
C142
C141
C140
C139
C138
C137
C136
C135
C134
C133
C132
C131
C130
C129
C128
C127
C126
C125
C124
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
100uF
DDR3_A0
DDR3_A1
DDR3_A2
DDR3_A3
DDR3_A4
DDR3_A5
DDR3_A6
DDR3_A7
DDR3_A8
DDR3_A9
DDR3_A10
DDR3_A11
DDR3_A12
DDR3_A13
DDR3_A14
3
R61
R63
R65
R67
R69
R71
R73
R75
R76
R77
R78
R79
R80
R81
R82
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
K9
J7
K7
E7
D3
L2
L3
J3
K3
M2
N8
M3
T2
K1
L8
H1
M8
A1
A8
C1
C9
D2
E9
F1
H2
H9
V1P5
R57
R58
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
B2
D9
G7
K2
K8
N1
N9
R1
R9
240
VREF_DDR3
J2
J8
A9
M1
M9
B3
P1
P9
E1
T1
T9
G8
DDR3_RESET#
4
DDR3_DM2
DDR3_DM3
DDR3_BA0
DDR3_BA1
DDR3_BA2
DDR3_RESET#
DDR3_ODT
V1P5
5
5
5
5
5
J1
J9
L1
L9
M7
V1P5
A
5
C102
V1P5
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
5
5
0.1uF
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
5
1
DDR3_A0
DDR3_A1
DDR3_A2
DDR3_A3
DDR3_A4
DDR3_A5
DDR3_A6
DDR3_A7
DDR3_A8
DDR3_A9
DDR3_A10
DDR3_A11
DDR3_A12
DDR3_A13
DDR3_A14
C101
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
DDR3_DQS0_P
DDR3_DQS0_N
DDR3_DQS1_P
DDR3_DQS1_N
5
5
5
5
5
5
5
5
C100
B2
D9
G7
K2
K8
N1
N9
R1
R9
NC1
NC2
NC3
NC4
NC5
DDR3_DQ0
DDR3_DQ5
DDR3_DQ2
DDR3_DQ4
DDR3_DQ3
DDR3_DQ7
DDR3_DQ1
DDR3_DQ6
DDR3_DQ14
DDR3_DQ8
DDR3_DQ12
DDR3_DQ9
DDR3_DQ13
DDR3_DQ10
DDR3_DQ15
DDR3_DQ11
2
R56
R55
VREF_DDR3
240
B
U3
MT41K256M16HA-125:E
Manufacturer = Micron
PART_NUMBER = Y091K2560000
DDR3 Device
A0
E3
A1
DQ0 F7
A2
DQ1 F2
A3
DQ2 F8
A4
DQ3 H3
A5
DQ4 H8
A6
DQ5 G2
A7
DQ6 H7
A8
DQ7 D7
A9
DQ8 C3
A10/AP
DQ9 C8
A11
DQ10 C2
A12/BCn
DQ11 A7
A13
DQ12 A2
A14
DQ13 B8
DQ14 A3
CKE
DQ15
CK_P
F3
CK_N
LDQS_P G3
LDQS_N C7
LDM
UDQS_P B7
UDM
UDQS_N
M2
N8
M3
T2
K1
L8
DDR3_BA0
DDR3_BA1
DDR3_BA2
DDR3_RESET#
DDR3_ODT
3
U4
MT41K256M16HA-125:E
Manufacturer = Micron
PART_NUMBER = Y091K2560000
DDR3 Device
A0
E3
A1
DQ0 F7
A2
DQ1 F2
A3
DQ2 F8
A4
DQ3 H3
A5
DQ4 H8
A6
DQ5 G2
A7
DQ6 H7
A8
DQ7 D7
A9
DQ8 C3
A10/AP
DQ9 C8
A11
DQ10 C2
A12/BCn
DQ11 A7
A13
DQ12 A2
A14
DQ13 B8
DQ14 A3
CKE
DQ15
CK_P
F3
CK_N
LDQS_P G3
LDQS_N C7
LDM
UDQS_P B7
UDM
UDQS_N
CS
WE
RAS
CAS
BA0
BA1
BA2
RESETn
ODT
ZQ
VREFDQ
VREFCA
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
NC1
NC2
NC3
NC4
NC5
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DDR3_DQ18
DDR3_DQ22
DDR3_DQ19
DDR3_DQ23
DDR3_DQ17
DDR3_DQ21
DDR3_DQ16
DDR3_DQ20
DDR3_DQ28
DDR3_DQ30
DDR3_DQ27
DDR3_DQ31
DDR3_DQ25
DDR3_DQ24
DDR3_DQ29
DDR3_DQ26
DDR3_DQS2_P
DDR3_DQS2_N
DDR3_DQS3_P
DDR3_DQS3_N
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
D
5
5
5
5
J1
J9
L1
L9
M7
C
B1
B9
D1
D8
E2
E8
F9
G1
G9
J2
J8
A9
M1
M9
B3
P1
P9
E1
T1
T9
G8
B
VTT_DDR3
DDR3_CKE
DDR3_CS#
DDR3_WE#
DDR3_RAS#
DDR3_CAS#
DDR3_BA0
DDR3_BA1
DDR3_BA2
DDR3_ODT
VTT_DDR3
R59
R60
R62
R64
R66
R68
R70
R72
R74
Title
Size
B
2
Date:
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
VTT_DDR3
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
Sheet
1
9
of
15
Rev
V1.0
5
4
3
2
1
NAND FLASH
D
1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
27
28
33
35
40
45
46
47
V3P3
C
C149
C148
0.1uF
0.1uF
0.1uF
0.1uF
C147
C146
1uF
10uF
C145
C144
V3P3
B
12
37
34
39
U5
NC1
NC2
NC3
NC4
NC5
R/B2#/NC
CE2#/NC
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
D
44
43
42
41
32
31
30
29
PS_MIO12_NAND_DQ7
PS_MIO11_NAND_DQ6
PS_MIO10_NAND_DQ5
PS_MIO9_NAND_DQ4
PS_MIO13_NAND_DQ3
PS_MIO4_NAND_DQ2
PS_MIO6_NAND_DQ1
PS_MIO5_NAND_DQ0
3
3
3
3
3
1,3
3
1,3
C
R/B#
ALE
CLE
WE#
WP#
RE#
CE#
NC27
NC23
VCC1
VCC2
NC24
NC25
VSS2
VSS1
NC22
NC26
7
17
16
18
19
PS_MIO14_NAND_R/B#
PS_MIO2_NAND_ALE
PS_MIO7_NAND_CLE
PS_MIO3_NAND_WE#
PS_MIO1_NAND_WP#
8
9
PS_MIO8_NAND_RE#
PS_MIO0_NAND_CS#
3
1,3
3
1,3
3
3
3
38
26
36
13
25
48
B
MT29F2G08AACWP
A
Title
Size
A
5
4
3
Date:
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
2
Sheet
10
1
of
15
Rev
V1.0
4
3
V2P5
C150
D
C151 10uF
4.7K
17
2
11
PS_MIO50_CD_WP
25
4
R177
TXS02612RTWR
4
PS_MIO46_CD_SW
V2P5
CLOCK
CMD
DAT0
DAT1
CD/DAT3
DAT2
VDD
CD
J11
VSS
GND
GND3
GND4
GND5
GND6
GND7
GND8
SCHA5B0200
R85
R86
6
9
11
12
13
14
15
16
C
0
0
4.7K
V2P5
GND1
GND2
SEL_B0#
13
12
14
15
8
10
5
3
7
8
2
1
4
10
R176
24
4.7K
CLK_B1
CMD_B1
DAT0_B1
DAT1_B1
DAT2_B1
DAT3_B1
V3P3
SDIO_CLK
SDIO_CMD
SDIO_D0
SDIO_D1
SDIO_D3
SDIO_D2
10uF
R83
CMD_A
CLK_A
19
20
18
16
22
23
C155 0.1uF
4
9
PS_MIO41_CD_CMD
PS_MIO40_CD_CLK
VCC_B1
VCC_B0
DAT0_A
DAT1_A
DAT2_A
DAT3_A
CLK_B0
CMD_B0
DAT0_B0
DAT1_B0
DAT3_B0
DAT2_B0
C154
C
4
4
6
7
1
3
PS_MIO42_CD_D0
PS_MIO43_CD_D1
PS_MIO44_CD_D2
PS_MIO45_CD_D3
T-PAD
4
4
4
4
VCC_A
5
U6
D
C153 0.1uF
21
C152 0.1uF
1
Micro SD Card
V3P3
10uF
2
microSD
5
R84
0 NC
B
MIO49_UART_RXD
MIO48_UART_TXD
V2P5
C157 0.1uF
4
3
2
1
UART
U7
A2
A1
Vref_A
GND
LSF0102DCTR
J12
RXD
TXD
A
B2
B1
Vref_B
EN
1
2
3
5
6
7
8
B
V2P5
MIO49_UART_RXD_V3P3
MIO48_UART_TXD_V3P3
R87
200K
4
V3P3
R88
R89
R90
R91
V3P3
1K
1K
1K
1K
C156 0.1uF
MIO49_UART_RXD_V3P3
MIO48_UART_TXD_V3P3
Title
HEADER_3
DEPOP
5
MIO49_UART_RXD
MIO48_UART_TXD
MIO49_UART_RXD_V3P3
MIO48_UART_TXD_V3P3
Size
A
3
Date:
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
2
Sheet
11
1
of
15
Rev
V1.0
5
4
3
2
1
V2P5
4
4
4
4
ETH_TX_CLK
ETH_TX_CTRL
39
38
37
36
ETH_TXD0
ETH_TXD1
ETH_TXD2
ETH_TXD3
29
34
1
GTXCLK
TX_EN
TXD[0]
TXD[1]
TXD[2]
TXD[3]
OVDD_RGMII_1
OVDD_RGMII_2
OVDD
4
4
40
35
C159 0.1uF
C158 0.1uF
C160 0.1uF
U8
D
TRD[0]+
TRD[0]TRD[1]+
TRD[1]TRD[2]+
TRD[2]-
24
23
22
21
20
19
18
17
16
15
14
13
PX_1
PX_2
PX_3
PX_6
PX_4
PX_5
PX_7
PX_8
R98
R97
R96
10uF
C182
75
75
75
75
TX0+
TX0-
3
6
LED1LED1+
RX0+
RX0-
4
5
LED2LED2+
TX1+
TX1-
7
8
RX1+
RX1-
SHELD1
SHELD2
9
10
R92
R93
4.7K
220
ACT_LED
11
12
R94
220
LNK_LED
V2P5
13
14
RJ45
R101
R103
R105
R106
0
0
0
0
C
REG_V1P2
FB4
100R/3A
V1P8
LED4
FB5
100R/3A
V3P3
C235 0.1uF
R107
4.7K
B
V3P3
FB6
100R/3A
PDL
6
5
TEST2
TEST3
PADDLE_GND
0.1uF
A
A
Title
Size
B
5
D
J13
1
2
0.1uF
0.1uF
C181
B50612
9
0.1uF
XTALVDD
C180
RDAC
0.1uF
10
C179
1.24K
AVDD_2
AVDD_1
BIASVDD
C178
R109
RESET
22
16
12
C177
46
0.1uF
1K
P_GOOD
T1
MCT3
MX3+
MX3MCT2
MX2+
MX2MCT1
MX1+
MX1MCT0
MX0+
MX0-
10uF
11
C175
10uF
PLLVDD
13
19
25
C176
3,15
AVDDL_1
AVDDL_2
AVDDL_3
2
30
0.1uF
R108
B
PHYA[0]
TCT3
TD3+
TD3TCT2
TD2+
TD2TCT1
TD1+
TD1TCT0
TD0+
TD0-
C167 1000PF
C165 0.1uF
0.1uF
V2P5
DVDD_1
DVDD_2
XTALO
C166 10uF
C170
41
XXCBBCNANF-25.000MHz
C171
C172
12pF
12pF
REGOUT
XTALI
3
G2405CG
V3P3
C174
7
MDC
MDIO
4
LNK_LED
ACT_LED
LED4
0.1uF
3
4
REGSUPPLY
45
44
43
42
C169
X1
X2
NC1 NC2
8
LED1
LED2
LED3
LED4
RXD[0]
RXD[1]
RXD[2]
RXD[3]
C173
48
47
ETH_MDC
ETH_MDIO
Y4
32
31
28
27
0.1uF
1
2
33
33
33
33
C168
4
4
R99
R100
R102
R104
1
2
3
4
5
6
7
8
9
10
11
12
R95
ETH_RX0
ETH_RX1
ETH_RX2
ETH_RX3
RXC
RX_DV
C164 0.1uF
4
4
4
4
33
26
24
23
C163 0.1uF
ETH_RX_CLK
ETH_RX_CTRL
20
21
C162 0.1uF
C
4
4
18
17
C161 0.1uF
TRD[3]+
TRD[3]-
14
15
4
3
2
Date:
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
Sheet
1
12
of
15
Rev
V1.0
5
4
V3P3
8
7
6
2
1
10
9
14
13
R119
HashBoard Connector
HashBoard Connector
B
V3P3
4
PS_MIO31_EN4
BANK34_L7P_PLUG4
BANK34_L7N_RST4
BANK34_L8N_RXD4
BANK34_L8P_TXD4
BANK34_L22P_SCL1
BANK34_L22N_SDA1
A0
A1
A2
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
8
7
6
2
1
10
9
14
13
HashBoard Connector
R131
R134
4.7K
4.7K
R120
R121
4.7K
4.7K
PS_MIO29_EN2
BANK34_0_PLUG2
BANK34_L3N_RST2
BANK34_L4P_TXD2
BANK34_L4N_RXD2
PS_MIO30_EN3
BANK34_L5P_PLUG3
BANK34_L5N_RST3
BANK34_L6P_TXD3
BANK34_L6N_RXD3
PS_MIO31_EN4
BANK34_L7P_PLUG4
BANK34_L7N_RST4
BANK34_L8P_TXD4
BANK34_L8N_RXD4
J7
VCC
EN
PLUG
RST
RXD
TXD
SCL
SDA
NC
A0
A1
A2
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
8
7
6
2
1
10
9
14
13
R125
R127
4.7K
4.7K
PS_MIO32_EN5
BANK34_L9P_PLUG5
BANK34_L9N_RST5
BANK34_L10P_TXD5
BANK34_L10N_RXD5
V3P3
4
PS_MIO35_EN8
BANK34_L17P_PLUG8
BANK34_L17N_RST8
BANK34_L18N_RXD8
BANK34_L18P_TXD8
BANK34_L22P_SCL1
BANK34_L22N_SDA1
16
18
5
15
12
11
4
3
17
VCC
EN
PLUG
RST
RXD
TXD
SCL
SDA
NC
A0
A1
A2
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
8
7
6
2
1
10
9
14
13
R132
R133
R135
8
7
6
2
1
10
9
14
13
D
EN1
PLUG1
RST1
TXD1
RXD1
EN2
PLUG2
RST2
TXD2
RXD2
C
EN3
PLUG3
RST3
TXD3
RXD3
EN4
PLUG4
RST4
TXD4
RXD4
EN5
PLUG5
RST5
TXD5
RXD5
B
PS_MIO34_EN7
EN7
BANK34_L15P_PLUG7 PLUG7
BANK34_L15N_RST7 RST7
BANK34_L16P_TXD7 TXD7
BANK34_L16N_RXD7 RXD7
PS_MIO35_EN8
EN8
BANK34_L17P_PLUG8 PLUG8
BANK34_L17N_RST8 RST8
BANK34_L18P_TXD8 TXD8
BANK34_L18N_RXD8 RXD8
V3P3
J8
A0
A1
A2
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
PS_MIO33_EN6
EN6
BANK34_L11P_PLUG6 PLUG6
BANK34_L11N_RST6 RST6
BANK34_L12P_TXD6 TXD6
BANK34_L12N_RXD6 RXD6
HashBoard Connector
6
6
6
6
6,13
6,13
4.7K
6,13
6,13
6
6
6
J4
VCC
EN
PLUG
RST
RXD
TXD
SCL
SDA
NC
6
6
6
6
6,13
6,13
16
18
5
15
12
11
4
3
17
4
PS_MIO34_EN7
BANK34_L15P_PLUG7
BANK34_L15N_RST7
BANK34_L16N_RXD7
BANK34_L16P_TXD7
BANK34_L22P_SCL1
BANK34_L22N_SDA1
V3P3
R136
6
16
18
5
15
12
11
4
3
17
8
7
6
2
1
10
9
14
13
4.7K
8
7
6
2
1
10
9
14
13
A0
A1
A2
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
R130
A0
A1
A2
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
PS_MIO28_EN1
BANK34_L1P_PLUG1
BANK34_L1N_RST1
BANK34_L2P_TXD1
BANK34_L2N_RXD1
V3P3
V3P3
4.7K
4.7K
4.7K
VCC
EN
PLUG
RST
RXD
TXD
SCL
SDA
NC
R126
R129
R128
16
18
5
15
12
11
4
3
17
J3
VCC
EN
PLUG
RST
RXD
TXD
SCL
SDA
NC
HashBoard Connector
V3P3
V3P3
4
PS_MIO30_EN3
6
BANK34_L5P_PLUG3
6
BANK34_L5N_RST3
6
BANK34_L6N_RXD3
6
BANK34_L6P_TXD3
6,13
BANK34_L22P_SCL1
6,13
BANK34_L22N_SDA1
6
6
6
6
6,13
6,13
16
18
5
15
12
11
4
3
17
4
PS_MIO33_EN6
BANK34_L11P_PLUG6
BANK34_L11N_RST6
BANK34_L12N_RXD6
BANK34_L12P_TXD6
BANK34_L22P_SCL1
BANK34_L22N_SDA1
J6
J9
VCC
EN
PLUG
RST
RXD
TXD
SCL
SDA
NC
HashBoard Connector
V3P3
V3P3
4.7K
6
6
6
6
6
6
16
18
5
15
12
11
4
3
17
4
PS_MIO36_EN9
BANK34_L19P_PLUG9
BANK34_L19N_RST9
BANK34_L20N_RXD9
BANK34_L20P_TXD9
BANK34_L23P_SCL2
BANK34_L23N_SDA2
4.7K
A0
A1
A2
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
8
7
6
2
1
10
9
14
13
R124
VCC
EN
PLUG
RST
RXD
TXD
SCL
SDA
NC
4.7K
4.7K
16
18
5
15
12
11
4
3
17
A0
A1
A2
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
HashBoard Connector
V3P3
R123
R122
C
4
PS_MIO29_EN2
6
BANK34_0_PLUG2
6
BANK34_L3N_RST2
6
BANK34_L4N_RXD2
6
BANK34_L4P_TXD2
6,13
BANK34_L22P_SCL1
6,13
BANK34_L22N_SDA1
J2
VCC
EN
PLUG
RST
RXD
TXD
SCL
SDA
NC
V3P3
4.7K
4.7K
4.7K
4.7K
V3P3
1
R118
R117
R116
HashBoard Connector
4
PS_MIO32_EN5
6
BANK34_L9P_PLUG5
6
BANK34_L9N_RST5
6
BANK34_L10N_RXD5
6
BANK34_L10P_TXD5
6,13
BANK34_L22P_SCL1
6,13
BANK34_L22N_SDA1
16
18
5
15
12
11
4
3
17
R110
4.7K
4.7K
8
7
6
2
1
10
9
14
13
J5
R115
R114
A0
A1
A2
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
4.7K
4.7K
4.7K
4
PS_MIO28_EN1
6
BANK34_L1P_PLUG1
6
BANK34_L1N_RST1
6
BANK34_L2N_RXD1
6
BANK34_L2P_TXD1
6,13
BANK34_L22P_SCL1
6,13
BANK34_L22N_SDA1
VCC
EN
PLUG
RST
RXD
TXD
SCL
SDA
NC
2
V3P3
V3P3
R113
R112
R111
D
16
18
5
15
12
11
4
3
17
J1
3
4.7K
4.7K
4.7K
PS_MIO36_EN9
EN9
BANK34_L19P_PLUG9 PLUG9
BANK34_L19N_RST9 RST9
BANK34_L20P_TXD9 TXD9
BANK34_L20N_RXD9 RXD9
BANK34_L22P_SCL1
BANK34_L22N_SDA1
BANK34_L23P_SCL2
BANK34_L23N_SDA2
HashBoard Connector
SCL1
SDA1
SCL2
SDA2
A
A
Title
Size
B
5
4
3
2
Date:
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
Sheet
1
13
of
15
Rev
V1.0
5
4
Date:
C198 0.1uF
3
C192 0.1uF
Size
A
FAN4
1
2
3
4
FAN HEADER_NC
C197 330uF
Title
R148
1N4148
FAN HEADER_NC
6
BANK35_L17N_FAN_SPEED6
6,14
BANK35_L14P_FAN_PWM
1
2
3
4
C
V12P0
D14
1
2
3
4
C186 0.1uF
4.7K C194 0.1uF
10K
FAN5
1
2
3
4
FAN HEADER_NC
C191 330uF
R144
R146
C196 0.1uF
1N4148
C195 330uF
D13
1
2
3
4
C185 330uF
6
BANK35_L17P_FAN_SPEED5
6,14
BANK35_L14P_FAN_PWM
1N4148
FAN HEADER_NC
10K
1
2
3
4
1
2
3
4
D
FAN2
V12P0
D12
R142
FAN3
1N4148
10K
C190 0.1uF
C189 330uF
1
2
3
4
V3P3
4.7K C199 0.1uF
4
4.7K C188 0.1uF
V3P3
A
5
R140
V12P0
D10
R138
C184 0.1uF
C183 330uF
1N4148
10K
R147
6
BANK35_L16N_FAN_SPEED4
6,14
BANK35_L14P_FAN_PWM
V12P0
R145
6
BANK35_L16P_FAN_SPEED3
6,14
BANK35_L14P_FAN_PWM
1
2
3
4
FAN HEADER_NC
4.7K C193 0.1uF
V3P3
B
D11
10K
R143
1
2
3
4
FAN1
V12P0
R141
6
BANK35_L15N_FAN_SPEED2
6,14
BANK35_L14P_FAN_PWM
1
V3P3
4.7K C187 0.1uF
V3P3
C
1N4148
10K
R139
D9
R137
6
BANK35_L15P_FAN_SPEED1
6,14
BANK35_L14P_FAN_PWM
2
V12P0
V3P3
D
3
4.7K C200 0.1uF
B
1
2
3
4
FAN6
1
2
3
4
FAN HEADER_NC
A
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
2
Sheet
14
1
of
15
Rev
V1.0
4
PG_V1P5
13
VOS
PG
SS/TR
8
C208
0.0033uF
DEF
FSW
FB
14
4
L2
Imax=1A
V2P5
1.0uH
PG_V2P5
7
5
R151
1K
R155
4.99K
17
16
15
6
0.0033uF
VOS
PG
SS/TR
FSW
FB
DEF
TP
PGND1
PGND2
AGND
TP
PGND1
PGND2
AGND
8
C216
EN
1
2
3
14
4
L4
Imax=2A
P_GOOD
R162
7
5
1.58K
R163
4.99K
17
16
15
6
17
16
15
6
2
3
4
5
U14
REFIN
VLDOIN
VO
PGND
VOSNS
TPS51200
VIN
PGOOD
GND
EN
REFOUT
GND_TH
10
9
R169
4.7K
R174
4.7K
8
7
6
V3P3
10uF
10uF
17
16
15
6
3,12
C223
10uF
TP
PGND1
PGND2
AGND
C
11
VREF_DDR3
B
C228
0.1uF
C234
C233
D16
0.1uF
0.1uF
SMBJ15(C)A
10uF
HEADER 4
10uF
1
2
3
4
C232
J16
330uF
HEADER 4
C227
V12P0
1
2
3
4
330uF
HEADER 3X2
J15
C230
6
5
4
C231
J14
D15
G/25mA/0603
V12P0
C229
1
2
3
10uF
V12P0
C226
20K
12V Power CONN
C225
TLV62130RGT
B
10uF
VTT_DDR3
C222
4.99K
10uF
R172
V1P5
P_GOOD
Termination Regulator
1
C221
1K
10K
7
5
R170
10K
1000pF
DEF
FSW
FB
PG_V1P5
R167
C220
SS/TR
14
4
1.0uH
R168
0.0033uF
VOS
PG
L5
22uF
8
C224
EN
1
2
3
17.4K R173
10uF
10uF
9
SW1
SW2
SW3
DDR3
V1P5
V1P5
C219
13
AVIN
PVIN1
PVIN2
Imax=1A
R171
C218
C217
PG_V1P8
10
11
12
220
19.6K
20K
P_GOOD
U13
R158
When all the power is given properly, The LED is ON
TLV62130RGT
TLV62130RGT
V12P0
V3P3
1.0uH
22uF
9
SW1
SW2
SW3
C214
4.99K
13
U12
AVIN
PVIN1
PVIN2
61.9K R166
R164
PG_V2P5
10
11
12
R159
7
5
FSW
FB
1K
10uF
DEF
R160
10uF
SS/TR
PG_V1P8
C213
14
4
VOS
PG
V12P0
V1P8
1.0uH
C209
0.0033uF
C
EN
Imax=1A
22uF
8
SW1
SW2
SW3
L3
24.9K R165
10uF
10uF
9
C215
AVIN
PVIN1
PVIN2
1
2
3
C212
13
U11
R161
C211
C210
PG_V1P0
10
11
12
20K
19.6K
V12P0
D
TLV62130RGT
17
16
15
6
TLV62130RGT
EN
9
1
2
3
22uF
4.99K
SW1
SW2
SW3
C206
240
AVIN
PVIN1
PVIN2
42.2K R157
R154
U10
10
11
12
1
R152
R153
10uF
DEF
PG_V1P0
7
5
FSW
FB
10uF
0.0033uF
14
4
VOS
PG
SS/TR
V12P0
22uF
8
C207
EN
4.99K R156
10uF
10uF
9
V1P0
2.2uH
C205
13
L1
2
C204
4.7K
1
2
3
SW1
SW2
SW3
C203
R149
AVIN
PVIN1
PVIN2
R150
C202
C201
D
10
11
12
Imax=3A
U9
TP
PGND1
PGND2
AGND
V12P0
3
TP
PGND1
PGND2
AGND
5
A
A
Title
Size
C
5
4
3
2
Date:
AntMiner_ControlBoard_XC7010
Document Number
<Doc>
Friday, July 01, 2016
1
Sheet
15
of
15
Rev
V1.0
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