ECEN 607 (ESS)
Bandgap Reference: Basics
Thanks for the help provided by M. Mobarak ,Faramarz Bahmani
and Heng Zhang
1
Outline
„ Introduction
„ Temperature-independent reference
„ PTAT generator
„ Supply insensitive current source
„ Design example
2
Introduction
„ Conditions to be satisfied for an IC in production:
– Work even when Vcc changes (Supply variation):
• eg: Vcc: 2.7VÆ3.0V
– Work even when temperature changes (Temperature variation):
• eg: T: -25CÆ0Æ25CÆ75C
– Work even when physical properties change (Process variation):
• BJTs: β: ±30%
• MOS: μ: ±10%, Vth: ±100mV
• Resistors: R: ±20%
• Capacitors: C: ±5%
• Inductors: L: ±1%
„ All combinations of supply voltage (Vcc), temperature (T)
and process (P) variations have to be considered in
design. This is often referred to as PVT (process, voltage
and temperature)
3
Introduction: Case study
Vcc
Small signal gain variation with PVT:
•
•
Supply variation: low frequency gain almost
insensitive to VCC variation (assuming Q in
active region)
•
Vin +
Q1
Temperature variation: gm is changing
(decreasing) with T (assuming ICQ independent
of T) Æ gain is dependent on temperature.
– Solution: Make ICQ a function of T (increases
with T) Ægain remains insensitive to T.
Process variations: In BJTs, VT=KT/q is almost
insensitive to process variation (assuming ICQ
insensitive to process variations) Ægm remained
intact. However, variations in resistor R results in
gain variation.
R
R
Q2
Vin −
I bias
Gain =
gm =
Vout
= gmR
Vin
I CQ
VT
=
I CQ
KT
↑
q
4
Introduction: Case study
Small signal gain variation with PVT:
• Supply variation: low frequency gain
Vcc
almost insensitive to VCC variation
(assuming Q in active region)
• Temperature and Process variations:
Holding R/Rs constantÆ low frequency
gain is held constant.
can be easily accomplished by
– using the same type of resistors for R & Rs
– following the standard layout practices to
achieve good component matching
• Bad news: The gain has significantly
reduced!
R
Vin +
R
Q1
Q1
Rs
Vin +
Rs
I bias
Vout
R
≈
Gain =
Vin
Rs
5
Temperature-Independent Reference
„ Reference voltages and/or currents with little dependence to
temperature prove useful in many analog circuits.
„ Key idea: add two quantities with opposite temperature coefficient
with proper weightingÆ the resultant quantity exhibits zero
temperature coefficient.
Eg: V1 and V2 have opposite temperature dependence, choose the
coefficients c1 and c2 in such a way that:
Vref = c1V1 + c 2 V2
∂Vref
∂V1
∂V2
=c1
+ c2
=0
∂T
∂T
∂T
⎧ ∂V1
⎪⎪ ∂T < 0 : NTC
⇒ if c1 , c 2 > 0 ⇒ ⎨
⎪ ∂V2 > 0 : PTC
⎪⎩ ∂T
Thus, the reference voltage Vref exhibits zero temperature coefficient.
6
Bandgap Voltage Reference
„ Target: A fixed dc reference voltage that does not
change with temperature.
– Useful in circuits that require a stable reference voltage. E.g.
ADC
„
The characteristics of BJT have proven the most welldefined quantities providing positive and negative TC
„ kT/q has a positive temperature coefficient
– "PTAT" proportional to absolute temperature
„ VBE of a BJT decreases with temperature
– "CTAT" complementary to absolute temperature
„ Can combine PTAT + CTAT to yield an approximately
zero TC voltage reference
7
Thermal behavior of BJT
I CQ
Q
VBEQ
⎛VBE ⎞
IC = IS exp⎜ ⎟
⎝ VT ⎠
VBE =
I
KT
ln( C )
q
IS
Even though KT/q increases with temperature, VBE decreases
because IS itself strongly depends on temperature
Assuming both I0 and IC are constant over T:
• I0 is a device parameter, which also depends on temperature
– We'll ignore this for now
• VG0 is the bandgap voltage of silicon "extrapolated to 0° K"
8
Extrapolated Bandgap
[Pierret, Advanced
Semiconductor
Fundamentals, p.85]
9
PTAT Generator
„
„
Amplifying the difference in VBE of two BJTsÆ PTAT term
Different VBE voltages can be obtained by:
– Applying different ICQ
– Using two BJT’s with different emitter areas but equal ICQ
Vcc
Vcc
I CQ2
I CQ1
Q1
Q2
VBE1
VBE2
ΔVBE = VBE1 - VBE2 =
if
I CQ1
I CQ2
>1⇒
KT I CQ1
ln(
)
q
I CQ2
∂ΔVBE
>0
∂T
VBEQ1 =
I
I
KT
KT
ln( CQ ) , VBEQ2 =
ln( CQ )
q
αA
q
αmA
ΔVBEQ = VBEQ1 - VBEQ2 =
KT
ln(m)
q
10
Bandgap Voltage Reference
•
•
Generate an inverse PTAT and a PTAT and sum them appropriately.
– VBE is inverse PTAT at roughly -2.2 mV/°C at room temperature
– Vt = kT/q is PTAT that has a temperature coefficient of +0.085 mV/°C
at room temperature.
Multiply Vt by a constant M and summed with the VBE to get
VREF = VBE + MVt
11
Bandgap Voltage Reference
Combining VBE and an appropriately scaled version of kT/q
produces a temperature independent voltage, equal to VG0
12
PTAT Generator
• How do we generate a voltage that is
the difference of two VBE?
VBE1 =
I
I
KT
KT
ln( CQ ) , VBE2 =
ln( CQ )
q
αA
q
αmA
VR1 = ΔVBE = VBE1 -VBE2 =
KT
ln(m)
q
VR1 Vt
I R1 =
ln(m)
=
R1 R1
VR2 = 2R 2 I R1 =
⇒
2R 2
Vt ln(m)
R1
IR1
IR1
+
VR1
-
∂VR2 2R 2 K
ln(m) > 0 ; PTC!
=
R1 q
∂T
13
Bandgap Voltage Reference
• More to come!
VBG = VBE1 + VR2
∂VBE1
<0
∂T
(NTC)
∂VR2
>0
∂T
(PTC)
14
Supply Insensitive Current Source
• How can we generate the bias currents ICQ?
– Conventional current mirror:
• Current is essentially proportional to VDD
• E.g. if VDD varies by X%, bias current will
roughly vary by the same amount.
– Supply insensitive current source:
By using a sufficiently large device,
we can make VOV << Vt, and achieve:
15
Supply Insensitive Current Source
„ In the above discussed bias generator circuits, the
supply sensitivity is still fairly high, because IIN is
essentially directly proportional to VDD
„ Idea: Mirror output current back to input instead of
using supply dependent input current!
16
Start-up Circuit
(weak)
There exists a stable operating point with all currents =0
Can use a simple start-up circuit to solve this problem
17
PTAT Current Generation
18
Compatibility with CMOS Technology
• In CMOS technologies, where the independent bipolar
transistors are not available, parasitic bipolar transistors
are used.
• Realization of PTAT voltage from the difference of the
source-gate voltages of two MOS transistors biased in
weak inversion is also reported in the literature.
"parasitic" substrate PNP transistor
available in any CMOS technology
19
CMOS Bandgap Reference With Substrate PNP BJTs
20
Design example
Specifications:
Vsupply: 5V, 0.5um CMOS process
Vref : 1.2V
Temperature dependence: < 60ppm/C
VX = VY , R1 = R 2 , A EQ2 = nA EQ1
⇒
JC 2 1
= ; Vout = VEB 2 + VR 2 + VR 3 ;
J C1 n
VR 3 = VEB1 − VEB 2 = ΔVEB = VT ln(n)
VR 2 = R2 I R 2 = R2
⎛ R ⎞
Vout = VBE 2 + (VT ln n ) ⎜1 + 2 ⎟
⎝ R3 ⎠
VR 3 R2
= VT ln(n)
R3 R3
⎛ R ⎞
⇒ Vout = VEB 2 + ⎜1 + 2 ⎟ VT ln(n)
⎝ R3 ⎠
A critical point: DC output of Op Amp should be > 700mV for start up
21
Choice of n
• Usually make n=integer2-1, e.g. n=8
Layout:
22
Simulations Result
23
A Low-Supply-Voltage CMOS Sub-Bandgap Reference
•
•
Low supply voltage
No resistor or op-amp
is used, thus it is
compatible with digital
processes
Ref: A. Becker-Gomez, T. L. Viswanathan, T.R. Viswanathan, "A Low-SupplyVoltage CMOS Sub-Bandgap Reference," IEEE Transactions on Circuits and
Systems II: Express Briefs, vol.55, no.7, pp.609-613, July 2008
24
A Low-Supply-Voltage CMOS Sub-Bandgap Reference
⎛I I ⎞
V PTAT = V BE1 − V BE2 = V T ln ⎜⎜ C1 02 ⎟⎟ = V T ln (100 ) = 4.6V T
⎝ I C2 I 01 ⎠
V PTAT = V SG1 − V SG2 = I/k − Ai I/nk
⇒I=
2
kV PTAT
(1 − A /n )
2
i
V BG − V BE2 = V SG6 − V SG2 = mI/rk − Ai I/nk
⇒ V BG = V BE2 + V PTAT
•
m/r − Ai /n
1 − Ai /n
≈ V BE2 + m/rV PTAT
•
•
r is the ratio between M6/M1
m is the ratio between M5/M1
For Ai <<1, n>>1
25
Summary
How to Build a Bandgap.1. Generate two currents and dump into
the transistors
2. Add a mechanism to force Vo1 = Vo2
3. Add a scale factor to generate zero
TC output
4. Startup circuit, some tweaking
Done!!!
26
References
„ First bandgap voltage reference:
R. J. Widlar, "New developments in IC voltage
regulators," IEEE J. Solid-State Circuits, pp. 2-7, Feb.
1971.
„ A classic implementation:
A. P. Brokaw, "A simple three-terminal IC bandgap
reference,“ IEEE J. Solid-State Circuits, pp. 388-393,
Dec. 1974.
„ Design of Analog Integrated Circuits, Behzad Razavi
„ Analysis and Design of Analog Integrated Circuits, P.R.
Gray, P. Hurst
27