VLSI VIDEO LINKS
https://drive.google.com/file/d/1Y6L2l5yGmI5hcmOe8OxCueJq1k6uw1X_/view?usp=sharing - NMOS
fabrication
https://drive.google.com/file/d/1IFCTtyaMqQFfd_zV8NN7-fGSaBcfsVQp/view?usp=sharing - CMOS
fabrication,pwell nwell,twintub process
https://drive.google.com/file/d/1EaesM7NOgS0sb-lER48orw2z5kkvsW2m/view?usp=sharing - Basic
electrical properties of MOS transistor,ids -vds relationship of nmos
https://drive.google.com/file/d/1iNAdQ8iQT7iyOtr0JxnUT2h73xAFymaS/view?usp=sharing - MOS
transistor threshold voltage,transconductance,pass transistor
https://drive.google.com/file/d/1I3xfG6Crnf_Q3gEDYG02bWNOmFwhPa3e/view?usp=sharing - NMOS
Inverter,various pull ups,CMOS Inverter,
https://drive.google.com/file/d/1bSZsJtaUcOBFyCeBc6S4u3qBlIWaR4uw/view?usp=sharing - NOR
gate,pass transistor,BICMOS,
https://drive.google.com/file/d/1GHSoKoJ2XAGWeKEOWO4EtNO-uDxYfjVV/view?usp=sharing - Stick
diagrams,
https://drive.google.com/file/d/165b56jdVcinVUMiX-IkRnGjR7e9LA3Ng/view?usp=sharing - Basic circuit
concepts,CMOS latch up,
https://drive.google.com/file/d/1JVkmeW4Zcq-ECBbFveBqowtflgW9kaRS/view?usp=sharing Transmission gate,2-1 multiplexer using TG,4x1 multiplexer using TG,
https://drive.google.com/file/d/1-XJP6OgTelSpU-lElMB13kE_tmlzGDcc/view?usp=sharing - Scaling of MOS
circuit, scaling paramaters for device,
https://drive.google.com/file/d/1yqseYh6Mvz-rchkdArZZ9HAv7F_RRH4s/view?usp=sharing - Unit3
subsytem design process Barrel Shifter,
https://drive.google.com/file/d/1M0GingAJ2y12m0YmjPibUCKOXcWUnAIw/view?usp=sharing Adders,Machester Carry Chain, 4-bit dynamic machester carry chain ,carry skip circuit,
https://drive.google.com/file/d/1ECvniX0GysseHfkxr6sdHma7pw8PZ6Nd/view?usp=sharing - Carry select
adder,square roor carry select,
https://drive.google.com/file/d/185OAgzUWutWU0rmGOEyoGPLPCZRI8Coj/view?usp=sharing - Memory
Array,ROM, 6T SRAM
https://drive.google.com/file/d/1hBFjlws1TFF3M4ck2Ntj3YXn69GoSqCn/view?usp=sharing - DRAM,ALU,
https://drive.google.com/file/d/1BQdZ494mZWtxtTpeqRlyRPIKazpSD_TY/view?usp=sharing - Baugh
wooley Multiplier,
https://drive.google.com/file/d/1exQeb1hKLQMtFCiIfN1w-JCQwGntIphW/view?usp=sharing - Unit 4
sequential logic CMOS bistable circuit, SR latch based on NOR gate ,CMOS SR latch based on NOR gate,
https://drive.google.com/file/d/1rSSUHMshWt-hD2XcZh80QmYPrYAWN_O4/view?usp=sharing - Clocked
SR latch,clocked SR latch using CMOS,clocked JK latch,CMOS D latch,Master slave edge triggered FF
VLSI VIDEO LINKS
https://drive.google.com/file/d/15gKQQ4LMzUwGmAE0tp9exBUEL2dwQwGM/view?usp=sharing Master slave waveform,Cmos testing,need for testing,testing procedures,test principles,testing simple
gates at stuck faults,
https://drive.google.com/file/d/1KB1Ts4R4ez9aeDqMaGckGOnBzO2ubQhZ/view?usp=sharing - Various
processing during testing,scan based approach,BIST,compact test,pseudo random sequence
generator,single input signature analyser,LFSR,BILBO,boundry scan test,
https://drive.google.com/file/d/1lxCmuDbQun6lbNaxz9_OJyuh09vYwAJR/view?usp=sharing - Unit-5
Analog VLSI design small signal analysis of MOSFET,simple CMOS current mirror,
https://drive.google.com/file/d/1OS-ibY-ehVDAL2DMVkTij3rCh0VeiwC-/view?usp=sharing - Coomon
source amplifier,common drain amplifier,common gate amplifier,
https://drive.google.com/file/d/1H09EZ9yVURORfh0MKqChc2AFWGUQmo2T/view?usp=sharing - Source
degenerated current mirrors ,cascode current mirror ,Wilson current mirror,
https://drive.google.com/file/d/1VPSNwnHXLrvTbtBZh2p7w_Mk3leH_ams/view?usp=sharing - Booth’s
Multiplier & Booth encoder