A HANDBOOK
ON
ELECTRONICS II
(EEC 234)
DEPARTMENT OF ELECTRICAL AND ELECTRONIC
ENGINEERING
THE POLYTECHNIC IRESI
IRESI, OSUN STATE.
COURSE CONTENT:




FIELD EFFECT TRANSISTORS (FETs)
TRANSISTOR AMPLIFIERS
INTERSTAGE COUPLING OF AMPLIFIERS
MULTISTAGE AMPLIFIERS
Page | 1
CHAPTER 1
1.2 Junction Field Effect Transistor (JFET)
FIELD EFFECT TRANSISTORS (FETs)
A junction field-effect transistor, or JFET, is a
type of transistor in which the current flow
through the device between the drain and source
electrodes is controlled by the voltage applied to
the gate electrode. A simple physical model of
the JFET is shown in Figures 2(a) and 2(b).
1.1 Introduction
Field Effect Transistor (FET) is a three-terminal
solid-state device in which current is controlled
by an electric field. There are two types of FET,
namely: (a) Junction Field Effect Transistor
(JFET)
(b) Metal-oxide semiconductor FET
(MOSFET).
It is further divided into
(i) Depletion-enhancement MOSFET i.e.
DEMOSFET
(ii) Enhancement-only MOSFET i.e. e-only
MOSFET
Both of these can be either p-channel or nchannel
devices.
Figure 2(a): Constructional features of an nchannel JFET
FET
Junction
FET(JFET)
n-channel
p-channel
MOSFET
DEMOSFET
E-only
MOSFET
Figure 2(b): Physical model of the JFET.
n-channel
n-channel
p-channel
p-channel
Figure 1: The FET family tree
In this JFET an n-type conducting channel
exists between drain and source. The gate is a
p+ region that surrounds the n -type channel.
The gate-to-channel p-n junction is normally
kept reverse-biased. As the reverse bias voltage
between gate and channel increases, the
depletion region width increases, as shown in
Figure 3.
Page | 2
1.2.1 Static characteristics of a JFET
(i)Output or Drain characteristic
Figure 3: Increase in depletion region width
The depletion region extends mostly into the ntype channel because of the heavy doping on the
p+ side. The depletion region is depleted of
mobile charge carriers and thus cannot
contribute to the conduction of current between
drain and source. Thus as the gate voltage
increases, the cross-sectional area of the n-type
channel available for current flow decreases.
This reduces the current flow between drain and
source. As the gate voltage increases, the
channel gets further constricted, and the current
flow gets smaller. Finally when the depletion
regions meet in the middle of the channel, as
shown in Figure4, the channel is pinched off in
its entirety between source and drain. At this
point the current flow between drain and source
is reduced to essentially zero. This voltage is
called the pinch-off voltage, VP. The pinch-off
voltage is also represented by VGS (off) as being
the gate-to-source voltage that turns the drain-to
source current IDS off. We have been
considering here an n-channel JFET. The
complementary device is the p-channel JFET
that has an n+ gate region surrounding a p-type
channel. The operation of a p-channel JFET is
the same as for an n-channel device, except the
algebraic signs of all dc voltages and currents
are reversed.
This gives the relation between ID and VDS for
different values of VGS. The saturated value of
drain current up in the active region for the case
of VGS = 0 is called the drain saturation
current, IDSS (the third subscript S refers to IDS
under the condition of the gate shorted to the
source).
Figure 5: Output characteristic of a JFET.
Figure 6: Transfer characteristic of a JFET.
(ii)Transfer characteristic
Figure 4: Pinched off the n-channel
It is a plot of ID versus VGS for a constant value
of VDS and is as shown in Figure 6. It is seen
that when VGS=0, ID=IDSS an when ID=0,
VGS=VP. The transfer characteristic
approximately follows the following equation.
Page | 3


 V 
V
I D  I DSS 1  GS   I DSS 1  GS 
 V

VP 
GS ( off ) 


2

ID 

VGS  VGS ( off ) 1 

I
DSS 

This characteristic can be obtained from the
drain characteristic by reading off VGS and IDSS
values for different value of VDS.
1.2.2 JFET parameters
The main parameters of a JFET when connected in
common-source mode are as under:
(i) A.C. drain resistance
It is the a.c. resistance between drain and source
terminals when JFET is operating in the pinchoff region. Given by:
rd 
VDS
VGS . It is also known as dynamic
I D
drain resistance, rds.
(ii) Transconductance, gm
This is the slope of the transfer characteristic. Its
unit is Siemens (S). It is also known as forward
transconductance, gfs.
(iii)Amplification factor, µ
(iv)  
VDS
I D . Also,   g m  rd
VGS
(v) D.C. drain resistance, RDS
Also known as static or ohmic resistance of the
channel. Given by:
RDS 
VDS
ID
Example
2I
I D
VDS , g mo   DSS
VGS
VP
The database of a JFET gives the following
information. IDSS=20mA, VGS(off) = -8V, and
 V 
ID
Or g m  g mo 1  GS   g mo
VP 
I DSS

gmo = 4000µS. calculate the value of ID and gm
for VGS= -4V.
gm 
Where gmo is gm when VGS = 0.
Page | 4
Solution


 V 
V
I D  I DSS 1  GS   I DSS 1  GS 
 V

VP 
GS ( off ) 


2
2
1
 4
3
 20  10 1 
  20  10 
4
 8
3
 5  10  5mA
2
3
g m  g mo
ID
5  10 3
 4000  10 6
I DSS
20  10 3
 2000  10 6  2000S
Exercise
(1)At a certain point on the transfer
characteristics of an n-channel JFET, following
values are read: IDSS=8.4mA, VGS= -0.5V and
VP= -3.0V. Calculate (i)gmo and (ii)gm at the
point. [(i) 5600µS (ii) 4670µS]
(2)For an n-channel JFET, IDSS=8.7mA, VP= 3V, VGS=-1V. Find the values of (i) ID (ii)gmo
(iii)gm
[(i)3.7A, (ii)5.8mS (iii)3.87mS]
1.3 Metal-Oxide Semiconductor Field-Effect
Transistor (MOSFET)
The MOSFET is a transistor that uses a control
electrode, the gate, to capacitively modulate the
conductance of a surface channel joining two
end contacts, the source and the drain. The gate
is separated from the semiconductor body
underlying the gate by a thin gate insulator,
usually silicon dioxide. The surface channel is
formed at the interface between the
semiconductor body and the gate insulator (see
Figure 7).
Figure 7: n-channel MOSFET
MOSFET could be further subdivided into:
(i)Depletion-enhancement MOSFET or DEMOSFET (ii) Enhancement-only or E-only
MOSFET.
1.3.1 DE-MOSFET
This can be operated in both depletion mode and
enhancement mode by changing the polarity of
VGS. When negative gate-to-source voltage is
applied, the n-channel DE-MOSFET operates in
the depletion mode. With positive gate voltage,
it operates in the enhancement mode. Since a
channel exists between drain and source, ID
flows when VGS = 0, hence DE-MOSFET is
known as normally-ON MOSFET. It operates in
the depletion mode with negative value of VGS.
As VGS is made more negative, ID decreases till
Page | 5
it ceases when VGS =VGS(off). It works in
enhancement mode when VGS is positive.
1.3.2 E-only MOSFET
It operates in the enhancement mode only and
works with large positive gate voltage only.
Structurally, there exists no channel between the
drain and source, hence it does not conduct
when VGS = 0. Therefore, it is called normallyOFF MOSFET. ID flows when VGS exceeds
VGS(th).
Figure 8: Output characteristic of a DEMOSFET
1.3.3 Static characteristic of MOSFET
Figure8 shows the output characteristic of a
common-source n-channel DE-MOSFET for
VGS varying from +2V to VGS(off). It works in
enhancement mode when VGS is positive.
For an E-only MSOFET, the output
characteristic and transfer characteristic are as
shown in Figures 10 and 11 respectively.
Figure 10: Output characteristic of an E-only
MOSFET
ID
VGS(th)
Figure 9: Transfer characteristic of a DEMOSFET
VGS
Figure 11: Transfer characteristic of an E-only
MOSFET.
Page | 6
Figure 12(d): Circuit symbol of an N-channel
MOSFET
Figure 12(a): P-channel DE-MOSFET
Figure 12(e): N-channel E-only MOSFET
Figure 12(b): Circuit symbol of a P-channel
MOSFET.
Figure 12(f): Circuit symbol of E-only Nchannel MOSFET
The minimum gate-source voltage which
produces drain current is called threshold
voltage VGS(th). When VGS< VGS(th), ID = 0. Drain
current starts only when VGS >VGS(th). For a
given VDS, as VGS is increased, ID increases.
Figure 12(c): N-channel DE-MOSFET
Page | 7
ID = K(VGS – VGS(th))2, where K (in A/V2) is a
constant which depends on a particular
MOSFET.
1.3.6 Disadvantages of FETs
dI D
gm 
 2 K VGS  VGS (th) 
dVGS
(ii)Greater susceptibility to damage in handling
them
(i)Small gain-bandwidth product
1.3.7 FETs applications
Example
Certain exclusive applications of FET are:
A certain E-only n-channel MOSFET has the
following parameters:
(i)For mixer operation of FM and TV receivers
ID(on) = 4mA, VGS=8V, VGS(th) = 2V, calculate ID
for VGS = 6V.
(ii)Large-scale integration (LSI) and computer
memories because of very small size.
Solution
(iii)As voltage-variable resistor (VVR) in
operational amplifiers and tone control
ID(on) = K(VGS – VGS(th))2
K
I D ( on)
V  V
GS

2
GS ( th)

4  10
3
8  2
2
 1.11  10 4 A / V 2
Hence when VGS = 6V
(iv)As input amplifiers in oscilloscopes,
electronic voltmeters and other measuring and
testing equipment because of their high input
resistance which reduces loading effect to
minimum.
ID = K(VGS – VGS(th))2
 1.11  10 4 6  2  1.78  10 3 A  1.78mA
2
1.3.4 MOSFET handling
MOSFETs require very careful handling
particularly when out of circuit. In circuit, a
MOSFET is as rugged as any other slid-state
device of similar construction and size. Picking
a MOSFET by its leads can destroy it.
1.3.5 Advantages of FETs
(i)High input impedance (ii) Ruggedness
(iii) Long life (iv) small size (v) low noise
(vi)High power gain (vii) Better thermal
stability (viii) High frequency response.
CHAPTER 2
TRANSISTOR AMPLIFIERS
2.1 Amplifier Fundamentals
One of the most basic and command blocks
used in electronics is an amplifier. An amplifier
is a circuit which raises the level of a signal in
which the output is identical to the input I all
respect except that it is larger in magnitude.
The different classifications of amplifiers are:
(1)Current amplifier (2) Voltage amplifier
(3)Power amplifier (where both current and
voltage are amplified) (4)DC amplifier (5)AC
Page | 8
amplifier (where time-varying signal is
amplified).
All amplifiers have some properties in common:
(i)They are to amplify hence; they will utilize at
least one active device
(ii)They required a dc power supply
(iii)Their operation can be summarized by
specifying the gain, input impedance, output
impedance and the frequency response.
2.2 Types of Amplifiers
(1)Small signal amplifiers (where amplification
factor is constant). Here the gain is independent
of the input signal and the property can be
determined by using the small signal equivalent
circuit
(2)Large signal amplifiers where the input
signal is very large and the output does not
behave in a linear fashion as the input.
devices because of the large linear region of
amplification required. There are three basic
configurations of amplifiers: common emitter
(CE) amplifiers, common base (CB) amplifiers,
and common collection (CC) amplifiers. The
basic configuration of each is shown in Figures
13(a), (b) and (c). In an amplifier system, the
last stage of a voltage amplifier string has to be
considered as a large signal amplifier. This then
requires that the dc bias or dc operating point
(quiescent point) be located near the center of
the load line in order to get the maximum output
voltage swing.
2.3 Biasing Load Line and Gains of BJTS
Figure 13 (a): Common emitter
Biasing is the setting of values (e.g. current,
voltage etc.) to a predetermined level to
establish a threshold or operating point in an
electronic device. Although it is common to
think of bias currents and bias voltages, other
parameters (e.g., capacitance, resistance,
illumination, magnetic intensity, etc.) can serve
as biases.
For proper working of a transistor, it is essential
to apply voltages of correct polarity across its
two junctions. For normal operation:
Figure 13(b): Common collector
(1) Emitter-base junction is always forward
biased and
(2) Collector-base junction is always reverse
biased.
Large signal amplifiers are usually confined to
using bipolar transistors as their solid state
Page | 9
Common emitter bias:  
IC
 hFE or
IB
I C  I B . hFE = forward transfer ratio.
 ac 
I C
 h fe ,
I B
I E  I B  I C  I B  I B  1   I B
Figure 13(c): Common base
From  
Also,  
I
IC
 I
and   C   E
IB
IE
 IB

1
or  

1 
Common collector bias: I E  1   I B
2.3.2 The fixed bias arrangement of
amplifiers
Figure 13(d): Direction of currents flow and
voltage polarity for npn and pnp transistors
(when in operation)
2.3.1 Currents in various transistor biases
 IC
Common base bias:  dc 
or
IE
 dc 
I C  I CBO
 I C
,  ac  h fb 
IE
I E
The voltage VBE across the forward biased
emitter junction is approximately 0.2V for a Ge
transistor and 0.7V for a Si transistor in the
active region. Since VCC is usually much larger
than VBE, the current IB is constant and the
network of Figure 14 is called a fixed bias
circuit. The point Q can be established by noting
the required current IB2 in Figure 15 and
choosing the resistance RB in Figure14 so that
the base current is equal to IB2 i.e. IB = IB2.
hfb = short-circuit gain
α of a transistor is a measure of the quality of a
transistor. Generally, IC = αIE.
From IE = IB +IC, IB = IE – IC = IE – αIE
IB = (1 – α)IE
Page | 10
Figure 14: Fixed bias circuit
Figure 16: Simplified circuit of fixed bias
transistor
From Figure 16, VBE = 0.7V,
VCC = ICRC + VCE ……… (1)
VCC = IBRB +VBE ………. (2)
From equation (2), IBRB = VCC – VBE
 RB 
IB 
VCC  0.7 , But

 VCC  0.7 
Figure 15: D.C load line
IB 
VCC
RB
Figure 16 shows the simplified circuit of a fixed
bias transistor amplifier.
I C  I B or
IC
 RB 
i.e.
IB
IC 
IC
VCC  VCE
RC
2.3.3 Potential divider arrangement of
amplifiers
Figure 17 shows the potential divider circuit for
amplifier biasing.
Page | 11
Figure 17: Potential divider circuit for amplifier
biasing
From Figure 17,
VCC = ICRC + VCE
Obtaining the Thevenin equivalent circuit, the
equivalent base resistance RB is
RB 
VT 
VT  I B RB  VBE
The circuit of Figure 17 generates distortions at
the output and this is corrected with a bias
stabilization resistor RE as shown in Figure 19.
R1 R2
, the Thevenin’s voltage VT is,
R1  R2
R2
R  R  R2 
 VCC  2 1
 VCC
R1 R2
R1 R2
R1  R2
2
 R 
R1 R2  R2 
VT 
 VCC  1  2 VCC
R1 R2
R1 

R1 
Figure 18: Thevenin’s equivalent circuit of
Figure 17
RB
RV
and R2  B CC
V
VT
1 T
VCC
Figure 18 is the Thevenin’s equivalent circuit of
the circuit in Figure17.
Figure 19: Bias stabilization circuit
IC 
VCC
for large IB,
RC  RE
VCE  VCC  I C RC  R E 
IC 
VCC
VCE

RC  R E RC  R E
Example
The reverse saturation current of an n-p-n
transistor in a CB circuit is 12.5µA. for an
Page | 12
emitter current of 2mA, collector current is
1.97mA. Determine the current gain and base
current.
Solution
ICBO = 12.5µA, IE = 2mA, IC = 1.97mA, α=?
I C   I C  I B   I CBO or
I C 1     I B  I CBO
 IC 
I B I CBO 0.98  100
5



 5.15mA
1 1
1  0.98 1  0.98
I E  I C  I B  5.15  100  10 3  5.25mA
2.3.4 Common emitter amplifier circuit
IB = ?
IC = αIE + ICBO,
I I
1.97  12.5  10 3
  C CBO 
 0.978
IE
2
IE = IC + IB, IB = IE – IC = 2 – 1.97 = 0.03mA
Example
Determine β and ICEO when α = 0.98 and ICBO =
5µA
Since the collector current in the output circuit
can be controlled by the current of the input
circuit, it means that a transistor can amplify a
small voltage applied to the input. From Figure
20, a common bias supply is used for both the
collector and/or the base. RL is used to drop the
extra voltage otherwise VCE would be too high
for the base bias and C1 is a bypass capacitor.
Solution


0.98

 49
1   1  0.98
I CEO  1   I CBO  (1  49)  5  250A
Example
For a transistor IB = 100µA, α = 0.98 and ICBO=
5µA; find the value of IC and IE.
Figure 20: Common emitter amplifier circuit
The working of the amplifier is as follows:
Solution
IC = αIE + ICBO ………. (1)
 
I C  I CBO
I
, I CBO  I C ,   C
IE
IE
Substituting IE = IC + IB into equation (1)
(i)The input voltage varies the output current i.e.
the base current in the circuit
(ii)This varying input current varies the
collector current
(iii)This results in a varied voltage drop across
load resistance RL. The variations being
proportional to the variations in collector
current.
Page | 13
(iv)The collector output voltage across RL is
much greater than the input voltage.
2.4 Small-Signal Operation of Amplifiers
To inject an input signal to the base, causing VBE
and IB to fluctuate by vbe and ib , a signal source
must be connected between the base and the
common. However, most signal sources present
a resistive path through themselves, which
would shunt R2 and so change, or even destroy
the bias conditions. Hence, a coupling capacitor
Cc must be included, as shown in Figure 21, in
series with a signal source represented by a
Thévenin equivalent. The emitter resistor RE
was included for biasing reasons but for signal
amplification purposes it must be shunted by a
high value capacitor CE so that the signal
current can flow down to ground without
producing a signal voltage drop.
Figure 21
So, for ac signals, RE is short-circuited and only
RC acts as a load. This implies that a signal or ac
load line comes into operation with a slope of –
1/RC, as shown in Figure 22.
Figure 22: The signal or ac load line
If vbe goes positive, this actually means that VBE
increases a little. This in turn implies that IC
increases by an amount ic , so the voltage drop
in RC increases by vce . Keeping in mind that the
top of RC is held at a constant voltage, this
means that the voltage at the bottom of RC must
fall by vce . This very important point shows that
because vce falls as vbe rises, there is 180° phase
shift through the stage. That is, the CE stage is
an inverting voltage amplifier. However,
because ic increases into the collector as ib
increases into the base, it is also a noninverting
current amplifier.
The amount by which vce changes with vbe ,
which is the terminal voltage gain of the stage.
The slope of the transconductance curve at any
point defines by how much IC changes with a
fluctuation in VBE. That is, it gives the ratio
ic /vbe at any operating point Q.
dI C
i
I
 c  C  g m  the transconductance
dVBE vbe VT
Where VT ≈ 26mA
The signal output voltage, vce  ic RC
The terminal voltage gain, AV
Page | 14
Av 
vce
i
 c   g m RC , where the negative
vbe vbe
When VCE  0, I C 
VCC
7

 5.83mA
RL 1200
sign implies signal inversion.
i
The small-signal current gain Ai  c  h fe  ac 
ib
The small-signal input resistance to the base,
Rin 
vbe vbe ic h fe

 
ib
ib i b g m
The small-signal power gain, A p  Ai  Av
Example
An n-p-n transistor has the following
characteristics, which may be assumed to be
linear between the values of collector voltage
stated.
Base Current
(µA)
30
50
70
Collector current (mA)
for collector voltages of
1V
5V
1.4
3.0
4.6
1.6
3.5
5.2
The transistor is used as a common-emitter
amplifier with load resistor RL = 1.2 kΩ and a
collector supply of 7V. The signal input
resistance is 1 kΩ. Estimate the voltage gain Av,
the current gain Ai and the power gain Ap when
an input current of 20 µA peak varies
sinusoidally about a mean bias of 50 µA.
Solution
The characteristics are drawn below. The load
line equation is VCC =VCE - ICRL which enables
the extreme points of the line to be calculated.
When I C  0,VCE  VC  7.0V
The load line is shown superimposed on the
characteristic curves with the operating point
marked X at the intersection of the line and the
50 µA characteristic.
From the diagram, the output voltage swing is
3.6V peak to peak. The input voltage swing is
ibRi where ib is the base current swing and Ri is
the input resistance.
Therefore vi = (70 - 30) x 10-6 x 1 x 10-3 =
40mV peak to peak
Hence voltage gain,
outputvolt
3.6
Av 

 90
inputvolt
40  10 3
From the diagram, the output current swing is
3.0mA peak to peak. The input base current
swing is 40 µA peak to peak.
Current gain,
outputcurrent
3  10 3
Ai 

 75
inputcurrent
40  10 6
For a resistive load RL the power gain, Ap, is
given by:
Ap = voltage gain x current gain = Av x Ai
= 90 x 75 = 6750
Page | 15
CHAPTER 3
INTERSTAGE COUPLING OF
AMPLIFIERS
3.1 Introduction
Many devices contain several stages of
amplification and therefore several amplifiers.
Stages of amplification are added when a single
stage will not provide the required amount of
amplification. For example, if a single stage
amplification will provide a maximum gain of
100 and the desired gain from the device is
1000, two stages of amplification will be
required.
3.2 RC Coupling
Figure 23: R-C coupled amplifier stage
determined by the input resistance Rin1 and Rin2
From Figure 23, capacitor C1 couples the input
of stages 1 and 2 and by whatever external load
signal whereas C3 couples the output signal
is to be connected to the output. Hence, to
Page | 16
achieve maximum gain and maximum input to
stage 2, RC1 should be large compared to Rin1.
A good summary of the operation are those:
The input signal vi is amplified by Q1 and
amplified input of Q1 appears across RC1. The
output of 1st stage across RC1 is coupled to be
input at RB2 by C2. The signal at the base of Q2
is further amplified and its phase is again
reversed. The ac output of Q2 appears across
RC2. The output across RC2 is coupled again by
C3 to load resistor RL. The output signal is twice
amplified replica of input signal vi. It is in phase
with vi because it has been reversed twice.
3.2.1 Advantages
(1)It requires no expensive or bulky components
and no adjustment; hence, it is lighter and
inexpensive.
(2)It has higher overall amplification than other
couplings.
(3)It has minimum distortion
(4)It has a vey flat frequency version gain curve
i.e. it gives uniform voltage amplification over a
wide range from a few Hz to a few MHz
because resistor values are independent of
frequency changes.
3.3 Direct Coupling
This is a type of coupling between amplifiers
which does not involve any frequency sensitive
components. It makes use of an ac amplifier
with very low frequency in a fraction of Hz. It is
also used in amplifying change in dc voltage
and dc amplifiers. An example of such
amplifiers utilizing this coupling is common
emitter amplifier using similar transistor as
shown in Figure 24.
Figure 24: Direct coupling circuit
From Figure 24, the resistor R1 establishes the
normal forward bias for Q1 and in indirectly for
Q2. The output of Q1 is coupled directly into
base of Q2. Since the two transistors are
identical, the current gain Ai  1   2   2 .
It has advantage of simplicity in the circuit
arrangement, inexpensive, ability to amplify dc
and low frequency signals. Since there are no
coupling or by-pass capacitors, there is no drop
in gain at low frequency. Its shortcomings are:
(i)Cannot amplify high frequency signals
(ii)Poor temperature stability
Its uses are found in the regulated circuit of
power supply, pulse amplifier, computer
circuitry and electronic measuring instruments.
3.4 Transformer Coupling
Interstage coupling can be achieved by means of
transformer as shown in Figure 25. R1 and R2
form the bias for the Q2 (bias for Q1 is not
shown). C2 is the bias coupling capacitor which
prevents any leakage from developing across
bias resistor R2. The primary windings of the
Page | 17
transformer L1 and L3 act as load for Q1 and Q2
respectively.
3.5 Amplifier Classes of Operation
The class of operation of an amplifier is
determined by the amount of time (in relation to
the input signal) that current flows in the output
circuit. This is a function of the operating point
of the amplifying device. The operating point of
the amplifying device is determined by the bias
applied to the device. There are four classes of
operation for an amplifier. These are A, B, AB
and C. Each class of operation has certain uses
and characteristics.
3.5.1 Class A operation amplifier
Figure 25: Transformer-coupled Amplifier
The output of Q1 is coupled to the base Q2
through magnetic induction. The transformer
provides the link between the input and the
output circuit. The main advantages of
transformer coupling are:
When an amplifier whether CE, CC or CB is
biased such that it operates in the linear region
for 360o of the cycle, it is class A amplifier. A
simple transistor amplifier that is operated class
A is as shown in Figure 26. Since the output
signal is a 100% (or 360o) copy of the signal,
current in the output circuit must flow for 100%
of the input signal time.
(1)More efficient
(2)Higher voltage gain
(3)Provide impedance matching
The disadvantages are:
(1)It is very costly especially when operated at
audio frequency because of its iron core.
(2)At radio frequency, the inductance and
capacitance of the windings presents a lot of
problems
(3)It has poor frequency response
(4)It tends to introduce hums at the output.
Figure 26: A simple class A transistor amplifier
Class A amplifiers have the characteristics of
good fidelity and low efficiency. Fidelity means
that the output signal is just like the input signal
Page | 18
in all respects except the amplitude. In some
cases, there may be a phase difference between
the input and output signal, but the signals are
still considered to be “good copies.” If the
output signal is not like the input signal in shape
or frequency, the signal is said to be distorted.
Distortion is any undesired change in a signal
from input to output.
3.5.1.1 Characteristics of class A amplifier
(1)Since the transistor operates over the linear
portion of the load line, the input and output
waveforms are sinusoidal and similar. Hence,
class A amplifiers are used for undistorted
output.
(2)Since its operation is limited to only the Qpoint of the load line, it is used to amplify input
signal of small amplitude. Large signals will
shift Q-point into non-linear region near
saturation and cut-off and produce clipped
output which is a distortion.
(3)It has a low efficiency of about 30% (a class
A amplifier with RL) with the large range from
the dc supply.
(4)Used in car radio where constant current
drain is unimportant.
(5)Used as amplifier and driver for the IF and
RF stages.
3.5.2 Class B operation amplifier
When an amplifier is biased such that it operates
in the linear region for 180o of the input cycle
and is in cut-off for 180o, it is a class B
amplifier. A class B amplifier operates for 50%
of the input signal. A simple class B amplifier is
as shown in Figure 27.
Figure 27: A simple class B transistor amplifier.
In Figure 27, the base-emitter bias will not
allow the transistor to conduct whenever the
input becomes positive. Therefore, only the
negative portion of the input signal is
reproduced in the output signal.
3.5.2.1 Characteristics of class B amplifiers
(1)As a result of absence of the positive halfcycle at the output, the signal distortion is high
compared to class A amplifier.
(2)With the amplitude of the input voltage equal
to VCC, the voltage amplification is reduced.
(3)A low voltage input signal represents worst
condition for class A amplifiers but least
condition for class B amplifiers.
(4)More power is dissipated in class B amplifier
with increase in signal strength contrary to that
of class A amplifier.
3.5.3 Class AB operation amplifier
If the amplifying device is biased in such a way
that current flows in the device for 51% - 99%
of the input signal (i.e. current flows more than
Page | 19
180o but less than 360o) the amplifier is
operating class AB. A simple class AB amplifier
is as shown in Figure 28.
(3)They are used when the output signal need
not be a complete reproduction of the input
signal but both positive and negative portions of
the input must be available.
(4)They are used in untuned power amplifiers
3.5.4 Class C operation amplifier
This class is biased so that conduction occurs
for much less than 180o. It is more efficient than
either class A or push-pull class B. this means
that much output power can be obtained from
class C operation. Because the output waveform
is severally distorted, class C amplifiers are
normally limited to applications as tuned
amplifiers at radio frequency. Figure 29 shows a
simple class C amplifier.
Figure 28: A simple class AB transistor
amplifier
3.5.4.1 Characteristics of class C amplifiers
The output signal is distorted and no longer has
the same shape as the input signal. The portion
of the output signal that appears to be cut off is
caused by lack of current through the transistor.
When the emitter becomes positive enough, the
transistor cannot conduct because the base-toemitter junction is no longer forward biased.
Here the amplifier is biased much beyond cutoff, hence
Class AB amplifiers are usually defined as
amplifiers operating class A and class B because
class A amplifiers operate on 100% of input
signal and class B amplifiers operate on 50% of
the input signal.
(3)Output signal has hardly any resemblance
with the input signal i.e. it consists of short
pulses only.
3.5.3.1 Characteristics of class AB amplifiers
(1)It has better efficiency and maximum output
power than class A amplifiers.
(1)The output current flows only during a part
of the negative half cycle of the input signal
(2)There is no output current flow during
positive part of the half cycle of the input signal.
(4)Class C amplifier has high efficiency of
about 85% to 90% but for high distortion, class
C amplifiers are not used for audio frequency
work; they are used as high frequency power
switchers in radio transmitter rather than power.
(2)Poorer fidelity than class A amplifiers.
Page | 20
Since the transistor bases are fed in anti-phase,
the emitter currents are also in anti-phase.
Figure 29: A simple class C transistor amplifier
3.6 Push-pull Amplifiers
When the power output from one transistor is
insufficient there are several alternatives a larger
one can be used or two may be connected in
parallel or push-pull. If distortion is to be
reduced to a minimum, then the push-pull
arrangement has a greater advantage. In addition
to providing power output for a given amount of
distortion among such advantages are:
Alternatively, consider the effect of an alternate
current Iac superimposed on the feed current ID
flowing as shown. It would be seen that the net
effect is equivalent to reducing Q2 emitter
current and increasing that of Q1. Hence, the
two anti-phase emitter currents have their ac
components connected effectively in series in
the secondary winding and much higher current
than for a single transistor therefore flows in the
output and increased power output I2RL is
achieved. Thus,
I a1  I a 2  2ia1 sin t  2ia 3 sin 3t  2ia5 sin 5t  ...
In the above expression, it can be seen that the
cosine even harmonic has been eliminated. One
of the main disadvantages of class B operation
is that provision of base bias is very difficult.
(i)Larger power output than single transistor
(ii)As the two collector currents flow in
opposite directions in the output transformer
primary, no magnetic saturation of the core can
occur.
(iii)As push-pull is usually operated in class B
mode, quiescent base or collector current are
low.
3.6.1 Operation of Push-pull amplifier
Figure 30: Transistor Push-pull amplifier
From Figure 30, the transistors Q1 and Q2 are
fed in anti-phase from a centre-tap transformer
T1 and the emitters are similarly connected to
the HT supply via a centre-tap transformer T2.
Page | 21
CHAPTER 4
needed in an amplifier circuit or that can be
provided by it.
MULTISTAGE AMPLIFIERS
4.1 Introduction
The voltage amplification or power gain or
frequency response obtained with a single stage
of amplification is insufficient to meet the
requirement of either a composite electronic
device or a load device. Therefore, two or more
single stages of amplification are frequently
used to achieve greater voltage or current
amplification or both.
The output of one stage serves as input of the
next stage. Such amplifiers may be divided into
cascaded amplifiers and compound amplifiers.
In cascaded amplifiers, the ac voltage of the first
stage becomes the input of the second stage and
the ac output of the second stage becomes the
input of the third stage and so on. The overall
voltage gain of the cascaded amplifiers is equal
to the product of the individual stages.
Av  Av1  Av 2  Av3  ...
Also, the overall current amplification is given
by Ai  Ai1  Ai 2  Ai 3  ...
The overall power gain is given by
A p  Av  Ai
In compound amplifiers, each stage may be
different from the other (one may be CE and the
other may be CC stage) and also different types
of interstage coupling may be employed.
4.2 Voltage-gain, Current-gain and Powergain in two-stage Amplifiers
It is very essential to determine the various gain
associated with amplifiers in multistage
amplifier as this will give an electronic circuit
designer an overall idea of the amplification
4.2.1 Direct-coupled 2-stage amplifier
The ac equivalent circuit of two transistors Q1
and Q2 coupled directly (see Figure 24) are
connected in CE mode is as shown in Figure 31.
Figure 31: ac equivalent circuit of 2-stage direct
coupled amplifier
Where ro1 = output resistance of stage 1
re1 = ac junction resistance of Q1
β1 = forward transfer ratio of Q1
ro2 = output resistance of stage 2
re2 = ac junction resistance of Q2
β2 = forward transfer ratio of Q2
The voltage gain of the 1st stage is Av1 =1
r
Av 2  o 2 .  Overall voltage gain, AV,
re 2
Av  Av1  Av 2  Av 2
The signal current gain, Ai = 1   2   2 {for
two identical transistors}
Hence, power gain, Ap= Av 2   2
Example
For the direct-coupled amplifier shown below,
calculate (a) current gain (b)voltage gain of 1st
stage (c)voltage gain of 2nd stage (d)input
Page | 22
resistance and (e)overall power gain. Neglect
50mV
VBE and use re 
.
IE
Solution
(a) Ai  1   2  100  50  5000
(e) Ap  Av  Ai  200  5000  110 6
4.2.2 RC-coupled 2-stage amplifier
The ac equivalent circuit of two transistors Q1
and Q2 RC-coupled amplifier (see Figure23) is
as shown in Figures 32(a) and 32(b).
Figure 32(a): ac equivalent circuit of 1st stage of
2-stage RC-coupled amplifier
(b) Av1 = 1
r
50mV
(c) Av 2  o 2 , re 2 
,
I E2
I E2
I B1 
VCC
12V

 10A
R1 1.2M
I C1  1  I B1  100  10  1000A
In the CE mode, IC ≈ IE
 I E1  I C1  1000A  1mA
IB2 = IC1 =1mA, IC2 = β2IB2 = 50 x 1 = 50mA
50mV 50mV
 IE2 = 50mA and re 2 

 1
I E2
50mA
Also, ro2 =R2 = 200Ω
r
200
 Av 2  o 2 
 200
re 2
1
(d) ri  R1 1re1 , but
re1 
50mV 50mV

 50
I E1
1mA
 ri  1.2M 50 100  5k
Figure 32(b): ac equivalent circuit of 2nd stage
of 2-stage RC-coupled amplifier
ri1  R1 1  re1 , ro1  R2 ri 2
ri 2  R3  2  re 2   2  re 2
re1 and re2 are ac junction resistances of the two
transistors and are given by:
25mV
50mV
re1 
or re1 
I E1
I E1
re 2 
25mV
50mV
or re 2 
I E2
I E2
ro 2  R4 R5
Voltage gain,
Page | 23
r
Av1  o1 ,
re1
r
Av 2  o 2
re 2
r
(ii) Av1  o1 , ro1  R2 ri 2
re1
Overall voltage gain, Av  Av1  Av 2
ri 2  R3  2 re 2  0.6M 1250  1250
Current gain, Ai  1   2
ro1  R2 ri 2  5k 1250  1000
Power gain, A p  Av  Ai
r
1000
 Av1  o1 
 80
re1 12.5
Example
For the two-stage RC-coupled amplifier shown
below, compute (i) ri (ii) AV1 (iii) AV2 (iv) Av (v)
25mV
Ai and (vi) Ap. Take re 
IE
r
(iii) Av 2  o 2 , ro 2  R4 R5
re 2
ro 2  5k 20k  4k ,
I E 2  I C 2  2mA
r
4000
re 2  12.5 ,  Av 2  o 2 
 320
re 2 12.5
(iv) Av  Av1  Av 2  80  320  25,600
(v) Ai  1   2  100  100  10,000
(vi) Ap  Av  Ai  25,600 10,000  256 106
Solution
(i) ri1  R1 1  re1
To find re, we need IE1, I c1  I B1 , I B1 
VCC
R1
12V
 20A
0.6M
 I C1  100  20  2000A  2mA
I B1 
4.2.3 Transformer-coupled 2-stage amplifier
The circuit diagram of a 2-stage transformercoupled amplifier with the biasing resistors,
emitter-stabilizing resistors and bypass
capacitors is as shown in Figure 33.
Voltage gain,
r
N
Av1  o1 , ro1  k 2 ri 2 , where k  1 for T1
re1
N2
r
ri 2  R4 R5  2 re 2 . Also, Av 2  o 2 ,
re 2
where re 2  k 2 R7
But IC ≈ IE, , hence  I E1  I C1  2mA
25mV
 12.5
2mA
1re1  100  12.5  1250
 re1 
 ri1  R1 1  re1  0.6M 1250  1250
Page | 24
Example
For the transformer-coupled 2-stage amplifier
shown below, calculate (i) Av1, (ii) Av2 and
50mV
(iii)Av. Use re 
, 1   2  50 and
IE
assume transformer is ideal. For each
transformer k = 5.
Figure 33: Transformer-coupled 2-stage amplifier
circuit diagram
Voltage drop across R3, VR3 ≈ 1.5V
Solution
I E1 
VR 3 1.5V

 1.5mA
R3
1k
re1 
50mV 50mV

 33.3 . Also re1 = 33.3Ω
I E1
1.5mA
Voltage drop across R2 = VR2
R2
4
VR 2  VCC 
 9
 1.5V
R1  R2
24
Page | 25
 2 re 2  50  33.3  1665
ri 2  R4 R5  2 re 2  20k 4k 1665  1110
ro1  k 2 ri 2  5 2  1110  27,750
r
27,750
(i) Av1  o1 
 830
re1
33.3
r
k 2 R7 25  1000
(ii) Av 2  o 2 

 750
re 2
re 2
33.3
(iii) Av  Av1  Av 2  830  750  622,550
Page | 26