US011329557B2
United States Patent
(12) Jung
et al.
( 10) Patent No.: US 11,329,557 B2
(45) Date of Patent :
May 10, 2022
( 52) U.S. CI .
( 54 ) SINGLE - INDUCTOR MULTIPLE -OUTPUT
( SIMO) CONVERTER AND CONTROL
CPC
CPC
( 71 ) Applicants : SAMSUNG ELECTRONICS CO .,
LTD ., Suwon - si (KR) ; Korea
Advanced Institute of Science and
Technology , Daejeon ( KR )
( 72 ) Inventors: Seungchul Jung , Suwon - si (KR) ;
Kye - Seok Yoon, Seoul (KR) ;
Gyu -Hyeong Cho , Daejeon ( KR) ; Sang
Joon Kim , Hwaseong - si ( KR) ; Sang
HO2M 3/157 ; HO2M 1/00 ; HO2M 1/0035 ;
HO2M 1/008 ; HO2M 1/009 ; HO2M 3/158 ;
HO2M 3/1584 ; YO2B 70/10
See application file for complete search history.
( 56 )
References Cited
U.S. PATENT DOCUMENTS
9,007,039 B2 4/2015 Kim et al .
9,106,133 B2
Jin Lim , Osan -si (KR)
FOREIGN PATENT DOCUMENTS
Suwon- si ( KR) ; Korea Advanced
Institute of Science and Technology,
Daejeon (KR)
( * ) Notice: Subject to any disclaimer, the term of this
patent is extended or adjusted under 35
U.S.C. 154 ( b ) by 15 days.
( 21 ) Appl. No .: 16 /553,405
Aug. 28, 2019
(22 ) Filed :
Prior Publication Data
( 65 )
JP
KR
KR
2009-22093 A
10-2012-0019930 A
10-2013-0067344 A
Dongsheng Ma , et al., “ Single - Inductor Multiple -Output Switching
Converters With Time - Multiplexing Control in Discontinuous Con
duction Mode ” , IEEE Journal of Solid - State Circuits, Jan. 2003 ,
vol . 38 , No. 1 , pp . 89-100 .
( Continued )
Primary Examiner — Matthew V Nguyen
(74 ) Attorney, Agent, or Firm - NSIP Law
Mar. 5 , 2020
ABSTRACT
(57)
A single - inductor multiple -output ( SIMO ) converter
includes a converter configured to provide respective volt
ages of a plurality of channels with a single inductor and a
control logic configured to control switches of the converter
based on clocks corresponding to the plurality of channels,
wherein the control logic is configured to compare an output
voltage of a selected channel of the plurality of channels that
corresponds to a control target to a reference voltage of the
29 , 2018 .
Foreign Application Priority Data
Jan. 3 , 2019
( 51 ) Int . Ci .
10-2019-0000545
( KR)
1/2009
3/2012
6/2013
OTHER PUBLICATIONS
Related U.S. Application Data
( 60 ) Provisional application No. 62 / 724,196 , filed on Aug.
( 30 )
8/2015 Gilloim
(Continued )
( 73 ) Assignees : Samsung Electronics Co. , Ltd. ,
US 2020/0076298 A1
HO2M 3/157 (2013.01 ) ; HO2M 1/00
( 2013.01 ) ; HO2M 1/009 (2021.05 )
( 58 ) Field of Classification Search
METHOD OF SIMO CONVERTER
selected channel based on a clock of the selected channel
HO2M 3/157
HO2M 1/00
and operate in one of a first mode that adaptively adjusts a
( 2006.01 )
( 2006.01 )
(Continued )
300
F????? :
330
V
bai
Luiged 310
MNA
3-4.2V
M319 Voi Moze Vuz
???
GIFT CELO CLIC
im inen
<
351
354
ZCD
353
Latched
352compV.
Freq.
rof
Mp
Adap.Duty Gen.
Rise
CLKO
MNO
Latched
comp v fef
ZCD
Ms power
Protection
switch&
Adap.Duty Gen.
M $24 controller
Rise
CLK2
1
Mo
ctrl
MiD
M53
M820D
U.
CLKI
CLK2
CLK3
ZCD D
Soft start-up Adap.Duty Gen.
356
-350
355
CLK3 C
M53 04
Clock
Latched
comp vref
Rise
???
Controller
----... --------
US 11,329,557 B2
Page 2
number of times that a pulse triggering a power transfer to
the channel is generated, and a second mode that blocks a
generation of the pulse .
27 Claims , 34 Drawing Sheets
2017/0012529 Al
2018/0062515 A1
2018/0175734 A1 *
2018/0198361 A1 *
2019/0052173 Al *
2020/0304020 A1 *
1/2017 Yamada et al.
3/2018 Jung
6/2018 Gherghescu
HO2M 3/1588
2/2019 Shumkov
HO2M 3/1582
HO2M 3/155
7/2018 Seong
HO2M 1/08
9/2020 Lu
OTHER PUBLICATIONS
( 56 )
References Cited
Dongsheng Ma , et al ., A Pseudo - CCM / DCM SIMO Switching
Converter With Freewheel Switching , IEEE Journal of Solid - State
U.S. PATENT DOCUMENTS
9,203,310 B2
2009/0085535 Al
2009/0153124 A1 *
Circuits, Jun . 2003 , vol . 38 , No. 6 , pp . 1007-1014 .
Hanh -Phuc Le , et al ., “ A Single - Inductor Switching DC - DC Con
12/2015 Huang et al .
4/2009 Wei
6/2009 Ishii
HO2M 3/156
323/290
2011/0242858 A1 * 10/2011 Strzalkowski ... HO2M 3/33523
2012/0153912 A1 *
6/2012 Demski
2012/0286576 A1 * 11/2012 Jing
2013/0015893 Al
2013/0147457 A1
2015/0311791 A1
1/2013 Severson
6/2013 Kim et al .
10/2015 Tseng et al .
363 /21.13
HO2M 3/07
323/282
HO2M 3/156
307/43
verter With Five Outputs and Ordered Power - Distributive Control ” ,
IEEE Journal of Solid - State Circuits, Dec. 2007 , vol . 42 , No. 12 , pp .
2706-2714 .
Min - Yong Jung, et al ., “ An Error- Based Controlled Single - Inductor
10 -Output DC - DC Buck Converter With High Efficiency Under
Light Load Using Adaptive Pulse Modulation ", IEEE Journal of
4
Solid - State Circuits, Dec. 2015 , vol . 50 , No. 12 , pp . 2825-2838 .
European Search Report dated Jan. 29 , 2020 in counterpart Euro
pean Application No. 19193718.4 ( 8 pages in English) .
* cited by examiner
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 1 of 34
Output
0
-12.0V
Output # 0
M
Power transfer
Skip & burst operation
(Proposed )
Light
LA
t
A
?
Heavy
load
? M ? Mi
M
**
U.S. Patent
May 10, 2022
Sheet 2 of 34
US 11,329,557 B2
FIG . 2
201
CLK Frequency controller
225
CLK 3
Rising
edge
Voutrº
Yes
Rising
edge
Rising
edge
230
245
qutz
YourV
(Pulse
No (Pulse
skip)
No skip )
(Pulse
No skip )
235
Power
Power
transfer
transfer
Burst
Burst
Power
transfer
U.S. Patent
May 10, 2022
350
355 Freq. ctrl
Vou
30
-
CIELD
ref
s
V.
300
compV
353
MBA
310
Lind limat
354
Latch352edcompVeef Rise
Latched Rise
GAdeapn.Duty
w
GZCD Adaep.nDu.ty 2D
Mp
351
3.4 2V
Latched Rise
GAdeap.nDuty DI
>
Ms3D
DCLK3 ZCD
Soft
start
up
356
CLKMs2
2 ZCD
ZCDD
Mgi
CLK1
MNO
330
ref
compV
M?20 Cut
Log
Cut
M519
3
.
FIG
Contrle
CClalock
CLKICLK2C0LK? -
LO
CLSE
M839
02
US 11,329,557 B2
Sheet 3 of 34
CH
Mp /
MN
|
|
?????
?????
sMsiP&rotectionpwiotwcehrcontrle
Msza
Mga
MB
|
Conny a
I
*****
U.S. Patent
May 10, 2022
Sheet 4 of 34
US 11,329,557 B2
FIG . 4
Sensing @ each CLK Rising edge
42
2
CLK2
CLK3
VX1.8V
02
Vox < 0.8V
V < 12V
On
KA
w
a
n
d
Sitem 1
win
41WAM
coter
1 Pulse skip
Burst mode
U.S. Patent
May 10, 2022
Freq
.
Ms
?
Vol
CLKIH CLK2
compV
1250
Rise
CLITLA
Msi
502
ret
SA
.
FIG
Di
Ms
comp,Viet
Latched Rise Gen.Softstart-upAdap.Duty CLK30
GAdeap.nDuty Do
?
503 compV
>
D
Latched Rise ? ? ?
GZCD Adeap.nDuty DI
Msi ZCDD
List lind
CLK? M?2ZOD
...
...
CLKID
EE
Mp
Contrle
Clock
Ms Cust
02
US 11,329,557 B2
Sheet 5 of 34
E
351
sMsP&rotectionpwiotwcehrc-ontroler
bat
:
V
at
Mp
|
at
My
|
M2
Mocy M53
:
M
U.S. Patent
May 10, 2022
Sheet 6 of 34
US 11,329,557 B2
FIG . SB
CLKI Rising edge
?
Ms
CLK2
V > 1.8V
no
???
03
Pulse - skip
50
*
wane
w
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 7 of 34
u
??????
Freq
.
?????
?????
????
????
Contrle
ref
paenrugtmkamnag
cLatched ompv Risa
Ms. Chat
Latched Risa
604
GAdaep.nDuty
Msig aut
6A
.
FIG
Vcomp oste
???
CLK3
Latched Rise CLK20
GZCD Adeapn.Duty MsiD
Soft
start
up
ZCDO
CLKI ZCD
Mp
sMsP&rotectionpwiotwcehrcontrle
3-4.2V
0
Mp
MN
Mya
????
GAdeap.nDuty BI
V
comp
1
lind
?????
Clock
V
find
-
CLKI CLK3
LK CLK3
Ms3 CL
MB
????
?????
MBO -Ms3
Mga ZCDD
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 8 of 34
FIG . 6B
a ????
CLK2 Rising edge
CUKO
?????
CLK3
||
??
NOWN
nin
wasoowww
V. {).8V
MMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMM
MMMMW
U.S. Patent
May 10, 2022
Freq
.
M52
US 11,329,557 B2
Sheet 9 of 34
Contrle
Clock
ctrl
CLKIH CLK2 CLK30
"
C.37
.
ref
02
Latched Rise
Mg2 Cat
Msz
Vo
Msi
A
7
.
FIG
GWAVYMZIN ELIO
Lind Visa
Latched Rise Gen.AupSoftstart-dap.Duty Der
CLK3
604 GAdaep.nDu.ty D
V.comp
o
;
Mg
.
2
-Y
ref
Latched Rise
AZCD deap.nDuty
G
CLK20 Ms2ZCD
--
Ms
D
CLKI
Mp
?????
,
bat
3.
4.25
..
MsP&rotectiosnPwiotwcehr
contrle
TMpa 712 MxQ 713M2 MBOL Ms3
-
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 10 of 34
TIG.73
?????
CLK2 Rising edge
CLK2
(CLK3
???
( 1.8V )
V. Increase
wwoon
{) 2
( 0.8V )
V.
{ 12V }
Build -up /Freewheeling
2006
Adam
w wind.
?
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 11 of 34
Contrle
Freq
. ctrl
V
CLK2CHLK30
Mo3
V
M
2
$
CLIEL O
802
803
V
Msia Cut
8A
.
FIG
MB
Lind Line
M
compVeel
...
SO1
GAdeapn.Duty DoMsDa
Latched Risc ... CLK ZCD
GAdeapn.Duty ED
Soft
start
up
Latched Rise 17
G
A
d
e
a
p
.
n
D
u
.
t
y
Di
354
CLK10 Msi
Mp
Latched
coipV
CLK2 M2ZCD
ZCD
sMCP&rotec ionpwiotwcehrcontrle
4.2V
3.
MO
como
My
811
M
2
???? ?????
?
M3 0
U.S. Patent
May 10, 2022
Sheet 12 of 34
US 11,329,557 B2
CLK2
????
? L
CLK3
2
????
V
Ve ).8V
12
w
Pulse- skip
Indi
WE
Wome
?
U.S. Patent
May 10, 2022
Freq
.
M3 CUIŽALIO
135420
V
US 11,329,557 B2
Sheet 13 of 34
Clock
CLKI CLK20 CLK3
902
Contrle
compNei
02
Latched Rise
GAdeap.nDuty
Ms2
ref
D
cV.omp
Latched Rise
GAdeap.nDuty
Msip CutLK
DCLK3 Ms3D ZCD
Latched Rise De
M52
GAdeapn.Duty D
ref
compV
Mpa
D
Soft
start
up
CLK
!
Lina00 ind
MN
CLKI Msi
351
sMsConP&rotectionpwiotwcehrcontrle
V
record
Mp
MNC
:
om
Ms.
Mpo M3Meza
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 14 of 34
FIG . 9B
W
uu
WWW
n
CLK3 Rising edge
2
CLK2
CLK3
Moving
Vo
va
V 12V
000
W
nocy
Johanes
MA
U.S. Patent
May 10, 2022
*****
*****
Freq
.
.
****
****
****
**** .
Contrle
Clock
ctrl
CLKIO CLK20 CLK3H
M33 Cest
Me
10 3
VO2
Ms2 az
CHECLIEL O
Latchedcomp Rise
GAdaep.nDu.ty DI
Latched Rise
ZCDO
C
3
L
K
5
D
6
GAdeap.nDuty
CompV
D
Mo
MSI
compVeel
Latched Rise? ?
GZCD Adaep.nDuty
MB
:
Las00 ing
D
Soft
start
up
-
CDLK2 Ms2ZCD
D
?
CLKID Msi
Mp
351
V
US 11,329,557 B2
Sheet 15 of 34
sM,P&rotectionpwiotwcehrcontrle
3-4.2V
1011
T
Mp
C
MNCH
a
Msz
1012
Mg
C
1013
M
U.S. Patent
May 10, 2022
Sheet 16 of 34
US 11,329,557 B2
FIG . 10B
(CIKI
( LK2
( LKS
????
?
????
V.
15
Vo Increases
11
Build -up/ Freewheeling
Loco* *
M
U.S. Patent
May 10 , 2022
US 11,329,557 B2
Sheet 17 of 34
---------- -.....
.....
Contrle
Freg
.
CLKICH CLKLK32 CLK3
Cuth
Mp3
C
V.comp in
Latched Rise
:
349
Ms2 49
cV.omoth
Vo
.
GDAeudnta.yp eo
cV.omp
Mo
Rise
Liza Tind
MNS
354
ZCD
Gen.DutyAdap.
CLK2
Ms2 ZCDO.
D
CD.LK1
Msi
Mp
3.2V
OD
COLK3 Mg3
Latched Rise Gen.A-Softstartupdap.Duty ZCD
Cui
M
M?
V
Mpy MO
ZCD
sMsCHP&rotectionpwiotwcehrcontrle
Ms
?
Moch 1111-Mom
U.S. Patent
May 10, 2022
Sheet 18 of 34
US 11,329,557 B2
FIG . 11B
?
CLK
CLK2
CLK3
V
_ T
????
*ow
Muc
Mum
Va
Still Vs 12V
(3
lind
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 19 of 34
1
Freq
. ctrl
Contrle
Clock
CLKI CLK20 CLK3
M.
Va
Ms
MeCherry
LAO
CHE
LILLO
CUEL
M?
???
vcomp
Q
Latched Com Rise
Msiy
ref
compV Rise
12A
.
FIG
.
Laine lind
GAdeap.nDuty
GDAeudnta.yp
Latched Rise L.
GAdeap.nDuty DR
Mis
D
CLK30
20 DV
Soft
start
up
CLK2OM2ZCD
D
1
M?
???
7
sMCP&rotecionpwiotwcehr
coMntrlCeH
bat 3-4,2
V
V
1211-MpC
1213-MC
-
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 20 of 34
FIG . 12B
wwwwwwwwwwwwwwwwwwwwwwwwww
WWW
wwwww
wwwwwwwwwwwww
W
?
CLKI
www
?
CLK2
www
CLK3
V
CONNEN
nonchalana
Window
Magewoon
No
din
V Increases
WA
und
Burst
w
U.S. Patent
May 10, 2022
----
----
----
-----
.----
Freq
.
Lako
V
Contrle
Clock
ef
O
V
CL2TILE
Mg2
Voi
$
M
2
compVref
CLIT K
Mois
Latched Rise
GAdeap.nDu.ty
ref
Mes
Line lind
Vcomp
Latched Rise
GAdeap.nDuty DI
CLK30MsiZOD
DA
Latched Rise
G
A
d
e
a
p
.
n
D
u
t
y
D
354
Soft
start
up
CLK2 Ms2ZCD
Msi ZCD
M
...
do
---- ..
CLKI CLK20 CLK30
CLI
M
US 11,329,557 B2
Sheet 21 of 34
??
351
spwoitwcehrcontrle
CH
,
M
------
-----
MyaMN
Mg
C
,
P&
rotection
----------- .. ----------------
------
Mg20 Mc
------ -----
------ -----
a
,
My
-----
------
-----
----------------
U.S. Patent
May 10, 2022
Sheet 22 of 34
US 11,329,557 B2
CLK1
CLK2
w
????
?
????
Nongono
Webova
bir
V > 12V
VS
Pulse- skip
.
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 23 of 34
1
?
Low
****
631
DT
Smal
line
1430
High
Ro m
F
n VHigh<
Large
ind
1
<MidVhar
AVO
lind
V
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 24 of 34
*****
*****
Freq
.
30
V
V.
comp,Veli
Clotho
Vol
Ms2
cV.omp
Latched Rise
GAdeap.nDuty
Cutlu
M?
14
FIG.15A
ref
Mes
and
Contrle
Clock
CLKI CLKC2LK30
M3 CL3?
2
352
comp
.
V
Rise
Mi
312V
CLK3M.MszZCD
??
D Soft
start
up
CLKIO ZCD
M
V
Latched Rise
352 GAdaep.nDu.ty
D
CLK2 Me2ZCDO
om
GAdeap.nDuty
died
???????????
sMsP&rotectionpwiotwcehrcontrle
CH
M.
Mp
MNCH
wees
C
Mg
???
2
een
.................. ......
Mp3
Msa
----
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 25 of 34
FIG . 15B
Vrat
3.0V
Adaptive duty control
Duty
MOONANDOMONDO
Constant peak lind
?????????????
lied
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 26 of 34
A
"
bat
V
Rauty
V
duty
A
16
.
FIG
OS
du
R
cellDelay
bat
C
min
V
D
?
Rise
edge
-
forma
us
V
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 27 of 34
1750
.
WOW
X
Tsw
.
cik
Light
<
T.
Vo
1730
CLK
.
t
*****
????
?????
<Heavy
Isw
Vo
T
CLK
?
t
AS1
???
<
Mid
1
>
Talk
U.S. Patent
May 10, 2022
Freq
.
355
VO
1810
Mose ist
Contrle
Clock
1830
CLKICH LK20CLK361
K
compVre46
me
Latched Rise
CUTL
M
US 11,329,557 B2
Sheet 28 of 34
o
LLC
CLIT
M519
,
V
comp
Latched Rise
MB
.
Luvina lind
Latched Rise
GAdeapn.Duty
CLK3 M93ZCD
D Soft
start
up
Ms.ZCD
Gen.DutyAdap.
CLKIMO ZCD
Mp
351
V
Gen.
Duty
Adap
,
V
con
,
3.2 V
sMP&rostecQionpwiotwcehrcontrle
MECH
????? ???
a
My
?????
Msech Moch
????? ?????????? ????? ????? ??????
CH
M
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 29 of 34
FIG . 18B
Heavy
li
Light
Light
Wwwwwwwww
Www
Frequency control
um
CLK
Vo www
?
vaincre
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 30 of 34
*
***
3bit Up / Down
counter
Up
Pulse - skipo
1950
1930
wwwrong
Vo
www
??
?L
TTTTTTTTTT
nown
CLK
como
Pulse -skip
Burst
wwwwwww
wwwwwwwwwwwwwwwwwwww
U.S. Patent
May 10, 2022
19
SQL
DE toDso
D
IND
EN
20
.
FIG
1830
US 11,329,557 B2
Sheet 31 of 34
Fall
edge
-
AD Fall-edge
cDelaly
cellDelay
cDelaly
Fall
edge
-
Rise
edge
-
DOW
D
.
B2DAR
311
51
cFrheaqnugecry
Do
We Rise-edge
V
??
--
refl
V
10
Cuk
RECE
CLK2D
CLK
MW
CLKI
ini
U.S. Patent
May 10 , 2022
Freq
.
No
Cust
,
Msal
FIG.21A
wx
US 11,329,557 B2
Sheet 32 of 34
Contrle
Clock
CLK1 CLK2 CLK32
Vad
?.
???ChatC2
I??
compV
Rise 20
MsiaVolM52
C
L
I
L
I
K
O
M
Bo st
Latched
compV
..
M53ZCD
C
L
K
3
Adap.Duty
up
start
Soft
Gen.
GAdeap.nDuty MezBI
compV
Latched Rise CLK20
GZCD Adeap.nDu.ty 7
MB
Lind land
Buck bo st
Ms
:
DZCD
CLKID
MN
sMP&rsotCecoimnpwiotwcehrcontrle
3-4.2V
a
Mp
"
"
MyC
0
Ms
Moch MC
U.S. Patent
May 10, 2022
US 11,329,557 B2
Sheet 33 of 34
FIG . 21B
V bat
03
Buck - boost
lind
W
MW
U.S. Patent
May 10, 2022
Sheet 34 of 34
US 11,329,557 B2
FIG . 22
Start
Compare output voltage of channel corresponding to control
target among plurality of channels to reference voltage of
2210
Select first mode when output voltage of channel is lower than
reference voltage of channel, and select second mode when
output voltage is higher than reference voltage
2220
channel based on clock of channel
Adaptively adjust number of times that pulse triggering
power transfer to channel is generated
Block generation of pulse when second mode is selected
Ead
US 11,329,557 B2
1
SINGLE -INDUCTOR MULTIPLE -OUTPUT
( SIMO) CONVERTER AND CONTROL
METHOD OF SIMO CONVERTER
2
The control logic may be further configured to dynami
cally control a frequency of the clock corresponding to the
selected channel based on a number of times that an opera
tion is performed in the first mode and a number of times that
5 an operation is performed in the second mode.
CROSS - REFERENCE TO RELATED
APPLICATIONS
The converter may be further configured to provide the
respective voltages of the plurality of channels based on the
This application claims the benefit under 35 U.S.C. $ clocks having different phases based on a time multiplexing
119 (e ) of U.S. Provisional Application No. 62 /724,196 filed 10 scheme.
on Aug. 29 , 2018 in the U.S. Patent and Trademark Office
In the first mode , the control logic may be further con
and claims the benefit under 35 U.S.C. $ 119 (a ) of Korean figured to adaptively adjust the number of times that the
Patent Application No. 10-2019-0000545 filed on Jan. 3 , pulse is generated in aa time interval initiated in response to
2019 in the Korean Intellectual Property Office, the entire an edge of the clock corresponding to the selected channel.
disclosures of which are incorporated herein by reference for 15 The converter may include the single inductor, and a
switching unit comprising first switches configured to select
all purposes.
the plurality of channels and second switches configured to
BACKGROUND
control a flow of a current flowing in the single inductor.
The first switches may be configured to connect output
1. Field
20 ports of the plurality of channels and the single inductor in
series.
This application relates to a single -inductor multiple-
output ( SIMO ) converter and a control method of the SIMO
converter.
2. Description of Related Art
The second switches may include a 2-1st switch, a 2-2nd
switch , and a 2-3rd switch , the 2-154 switch may be config
ured to have a first end connected to an input port of the
25 converter and a second end connected to a first end of the
single inductor, the 2-2nd switch may be configured to have
a first end connected to the first end of the single inductor,
A single - inductor multiple -output ( SIMO ) converter sup- and a second end of the 2-2nd switch isa grounded, and the
plies energy needed by a plurality of output voltages using 2-3rd switch may be configured to have a first end connected
a single inductor. The SIMO converter recurrently selects 30 to a second end of the single inductor, and aa second end of
the output voltages to supply the energy. In this instance , a the 2-3rd switch is grounded.
method of controlling the SIMO converter such as a scheme
The control logic may include aa switch controller config
for selecting the output voltages , an amount of energy to be ured select a first switch for the selected channel from
supplied to correspond to the selected output voltage, and among the first switches in response to the pulse being
35 generated, and control the second switches based on a
the like may be needed .
sequence for generating a desired voltage of the channel.
SUMMARY
The control logic may be configured to dynamically
control a duty -ratio of the second switches based on an input
This Summary is provided to introduce a selection of voltage of the converter.
concepts in a simplified form that are further described 40 The control logic may be further configured to reset a
below in the Detailed Description . This Summary is not current of the single inductor after the power transfer is
intended to identify key features or essential features of the triggered due to the generation of the pulse.
claimed subject matter, nor is it intended to be used as an aid
The control logic may be further configured to dynami
in determining the scope of the claimed subject matter.
cally control a frequency of the clock corresponding to the
In a general aspect , a single - inductor multiple -output 45 channel based on a load in the channel.
( SIMO ) converter includes a converter configured to provide
The control logic may include a comparator configured to
respective voltages of a plurality of channels with a single latch the output voltage of the channel at an edge of the clock
inductor, and a control logic configured to control switches corresponding to the channel, and compare the latched
of the converter based on clocks corresponding to the output voltage to the reference voltage of the channel.
plurality of channels, wherein the control logic is configured 50 The control logic may be further configured to generate
to compare an output voltage of a selected channel of the the clocks corresponding to the plurality of channels based
plurality of channels that corresponds to a control target to on an importance level of the plurality of channels and
a reference voltage of the selected channel based on a clock control lengths of time intervals corresponding to phases of
of the selected channel and operate in one of a first mode that the clocks .
adaptively adjusts a number of times that a pulse triggering 55 In a general aspect , a control method includes comparing,
a power transfer to the channel is generated , and a second based on a clock of a selected channel corresponding to a
control target among a plurality of channels, an output
mode that blocks a generation of the pulse .
The control logic may be further configured to repetitively voltage of the selected channel to a reference voltage of the
generate the pulse in the first mode until the output voltage selected channel, selecting a first mode when the output
of the selected channel is higher than the reference voltage 60 voltage is lower than the reference voltage , and selecting a
of the selected channel based on a determination that the second mode when the output voltage is higher than the
output voltage of the channel is lower than the reference reference voltage , adaptively adjusting, when the first mode
is selected , a number of times that a pulse triggering a power
voltage of the channel.
The control logic may be further configured to block the transfer to the selected channel is generated, and blocking a
generation of the pulse in the second mode based on a 65 generation of the pulse when the second mode is selected .
determination that the output voltage of the selected channel
The adaptively adjusting the number of times that the
is higher than the reference voltage of the selected channel. pulse is generated may include repetitively generating the
US 11,329,557 B2
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4
pulse until the output voltage of the selected channel is to a second channel is applied in a SIMO converter, in
higher than the reference voltage of the selected channel accordance with one or more embodiments.
based on the first mode .
FIGS . 9A through 13B illustrate examples of an operation
The adaptively adjusting the number of times that the in an example in which a third clock CLK3 corresponding
pulse is generated may include adaptively adjusting the 5 to a third channel is applied in a SIMO converter, in
number of times that the pulse is generated in a time interval
initiated in response to an edge of the clock corresponding
accordance with one or more embodiments .
FIGS . 14 through 16 illustrate examples of a method of
adaptively controlling a duty - ratio in an adaptive duty
The method may further include counting a number of generator of a SIMO converter, in accordance with one or
times that an operation is performed in the first mode and a 10 more embodiments .
number of times that an operation is performed in the second
FIGS . 17 through 19 illustrate examples of a method of
mode, and dynamically controlling a frequency of the clock dynamically controlling a frequency of a clock correspond
corresponding to the selected channel based on a determi- ing to each channel in aa SIMO converter, in accordance with
nation that the counted number of times corresponds to a one or more embodiments.
15
preset number of times .
FIG . 20 illustrate an example of a clock generator that
The dynamically controlling the frequency of the clock generates clocks having different phases in a SIMO con
may include increasing the frequency of the clock corre- verter, in accordance with one or more embodiments .
sponding to the selected channel when the number of times
FIGS . 21A and 21B illustrate examples of an operation of
that an operation is performed in the first mode corresponds a soft start -up circuit of a SIMO converter.
20
FIG . 22 is flowchart illustrating an example of a control
to the preset number of times .
The dynamically controlling the frequency of the clock method of aa SIMO converter.
may include reducing the frequency of the clock correspondThroughout the drawings and the detailed description ,
to the selected channel.
ing to the selected channel when the number of times that an unless otherwise described or provided, the same drawing
operation is performed in the second mode corresponds to reference numerals will be understood to refer to the same
the preset number of times .
25 elements, features, and structures. The drawings may not be
In a general aspect , a method includes comparing, in a
single inductor multiple output ( SIMO ) converter, an output
to scale , and the relative size , proportions, and depiction of
elements in the drawings may be exaggerated for clarity ,
voltage of a selected channel among a plurality of channels illustration , and convenience .
to a reference voltage of the selected channel based on a
DETAILED DESCRIPTION
clock of the selected channel, selecting a burst mode when 30
the output voltage of the selected channel is less than or
equal to the reference voltage , and selecting a pulse skip
The following detailed description is provided to assist
mode when the output voltage of the selected channel is the reader in gaining a comprehensive understanding of the
methods, apparatuses, and / or systems described herein .
greater than the reference voltage .
The method may further include adjusting a number of 35 However, various changes, modifications, and equivalents
times a pulse triggering a power transfer to the selected of the methods, apparatuses, and / or systems described
channel is generated when the burst mode is selected , and herein will be apparent after an understanding of the dis
blocking a generation of the pulse when the pulse skip mode closure of this application . For example, the sequences of
operations described herein are merely examples, and are
The SIMO converter may dynamically control a fre- 40 not limited to those set forth herein , but may be changed as
is selected .
quency of the clock corresponding to the selected channel by will be apparent after an understanding of the disclosure of
comparing a number of times that an operation is performed this application, with the exception of operations necessarily
in the burst mode to a preset number of times , and compar- occurring in a certain order. Also , descriptions of features
ing a number of times that an operation is performed in the that are known in the art may be omitted for increased clarity
45 and conciseness .
pulse skip mode to the preset number of times .
Other features and aspects will be apparent from the
The features described herein may be embodied in dif
following detailed description, the drawings, and the claims . ferent forms, and are not to be construed as being limited to
the examples described herein . Rather, the examples
BRIEF DESCRIPTION OF THE DRAWINGS
FIG . 1 illustrates an example of an operation of a singleinductor multiple output ( SIMO ) converter, in accordance
with one or more embodiments .
FIG . 2 illustrates an example of aa control order of a SIMO
described herein have been provided merely to illustrate
50 some of the many possible ways of implementing the
methods, apparatuses, and / or systems described herein that
will be apparent after an understanding of the disclosure of
this application .
The terminology used herein is for describing various
converter, in accordance with one or more embodiments . 55 examples only, and is not to be used to limit the disclosure .
FIG . 3 is a circuit diagram illustrating an example of a The articles “ a , " " an , ” and “ the” are intended to include the
SIMO converter, in accordance with one or more embodi- plural forms as well , unless the context clearly indicates
ments .
otherwise . The terms " comprises , ” “ includes , ” and “ has ”
FIG . 4 illustrates an example of aa method of operating a specify the presence of stated features, numbers, operations,
SIMO converter in aa first mode or a second mode based on 60 members, elements, and /or combinations thereof, but do not
a clock , in accordance with one or more embodiments.
preclude the presence or addition of one or more other
FIGS . 5A and 5B illustrate examples of an operation in an
example in which a first clock CLK1 corresponding to a first
channel is applied in a SIMO converter, in accordance with
features, numbers, operations, members, elements, and / or
combinations thereof.
Unless otherwise defined , all terms, including technical
one or more embodiments.
65 and scientific terms, used herein have the same meaning as
FIGS . 6A through 8B illustrate examples of an operation commonly understood by one of ordinary skill in the art to
in an example in which aa second clock CLK2 corresponding
which this disclosure pertains after an understanding of the
US 11,329,557 B2
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present disclosure. Terms, such as those defined in com- light-load voltage may be desired in the first channel. In this
monly used dictionaries, are to be interpreted as having a example, as shown in a graph 130 , the SIMO converter 110
meaning that is consistent with their meaning in the context may generate a pulse once per clock such that the light- load
of the relevant art and the present disclosure , and are not to voltage desired in the first channel is satisfied . Also , as
be interpreted in an idealized or overly formal sense unless 5 shown in the table 150 , a high load of voltage may be desired
expressly so defined herein .
in the third channel. In this example, as shown in the graph
Additionally, in the description of examples, like refer- 130 , the SIMO converter 110 may generate a pulse N times
ence numerals refer to like elements throughout the disclo- per clock such that the high load of voltage desired in the
sure of this application, and repeated description related third channel is satisfied .
thereto is omitted . Further, detailed description of well- 10 When each of the channels has sufficient energy , the
known related structures or functions will be omitted when
it is deemed that such description will cause ambiguous
SIMO converter 110 operates in the second mode to block
or skip a generation of a pulse .
The SIMO converter 110 operates based on a slow clock
interpretation of the present disclosure .
FIG . 1 illustrates an example of an operation of a single- to reduce the standby power and rectify multiple output
inductor multiple output ( SIMO ) converter. Referring to 15 voltages constantly even when a load current changes.
FIG . 1 , a SIMO converter 110 provides desired voltages of
For example, when the SIMO converter 110 operates in
a plurality of channels. The plurality of channels includes, the first mode and the second mode based on the slow clock
for example, a first channel, a second channel, and a third under aa condition requiring a high -load voltage or a high
channel. In an example, voltages of the first channel, the load current, a ripple may occur in the output voltage . In this
second channel, and the third channel are 0.8 volts (V) , 1.8 20 example, a frequency of a clock may be adaptively varied to
V , and 12.0 V , respectively . In an example, the input voltage prevent an occurrence of a ripple voltage . The SIMO con
verter 110 may adjust the frequency of the clock to be
of the SIMO converter 110 is , for example, 3.7 V.
The SIMO converter 110 may operate based on a slow decreased under a light -load condition requiring a light - load
clock to reduce a standby power . Each of the channels of the current and adjust the frequency of the clock to be increased
SIMO converter 110 may operate based on a clock . An 25 under a high - load condition requiring a high - load current.
inductor current may operate in a discontinuous conduction The SIMO converter 110 may improve voltage regulation
mode (DCM) based on a clock such that the inductor current characteristics by adjusting the frequency of the clock to be
is reset for each clock . Herein , it is noted that use of the term increased in order to reduce an output ripple under the
‘may ' with respect to an example or embodiment, e.g. , as to high - load condition .
what an example or embodiment may include or implement, 30 The following description will be made based on an
means that at least one example or embodiment exists where example in which a SIMO converter provides desired volt
such a feature is included or implemented while all ages of three channels as an example. However, a number of
examples and embodiments are not limited thereto .
channels is not limited to the example. The number of
The SIMO converter 110 may operate in a burst mode channels may vary depending on an example .
when an energy transfer to a channel is needed, and may 35 FIG . 2 illustrates an example of a control order of a SIMO
operate in a pulse skip mode when an energy is sufficient. converter. As described above , a plurality of channels of a
The SIMO converter 110 may compare an output voltage of SIMO converter is sequentially controlled based on a first
a channel corresponding to a control target to a reference clock CLK 1 , a second clock CLK 2 , and aa third clock CLK
voltage , for example, a desired voltage of the channel based 3. The SIMO converter operates in response to rising edges
on a clock of the channel. The SIMO converter 110 operates 40 of the first clock CLK 1 , the second clock CLK 2 , and the
in one of the burst mode and the pulse skip mode based on third clock CLK 3 .
a voltage comparison result.
Referring to FIG . 2 , a clock frequency controller 201 , for
In this disclosure, the burst mode may be understood to be example, a CLK frequency controller of a SIMO converter,
a mode in which a power is repetitively transferred through supplies a clock corresponding to each channel. When the
than the reference voltage of the channel. The burst mode from the clock frequency controller 201 in operation 205 ,
may also be referred to as a first mode . The pulse skip mode the SIMO converter compares a first output voltage V.outl
may be understood as a mode for blocking a generation of corresponding to the first channel to a reference voltage Vrefi
,
a pulse to the channel. The pulse skip mode may also be of the first channel, and determines if the first output voltage
referred to as a second mode .
50 Vouti is higher than the reference voltage Vrefi of the first
Hereinafter, the burst mode and the first mode are under- channel at the rising edge of the first clock in operation 210 .
stood to have the same meaning and the pulse skip mode and
When it is determined that the first output voltage Voutl is
the second mode are understood to have the same meaning. higher than the reference voltage Vrefl
, of the first channel in
When the energy is required in the channel, the SIMO operation 210 , the SIMO converter blocks a pulse genera
converter 110 supplies the energy to the plurality of channels 55 tion according to a pulse skip mode , thereby blocking an
by adaptively adjusting a number of pulse generations per additional energy supply to the first output voltage V.outl
clock , for example, a number of pulse shots per clock . The The SIMO converter transfers a pulse skip signal generated
SIMO converter 110 adaptively adjusts the number of pulse by the pulse skip mode to the second clock . Depending on
generations in a time interval initiated in response to an an example , the pulse skip signal may be transferred to the
the inductor until the output voltage of the channel is higher 45 first clock CLK 1 corresponding to a first channel is supplied
edge, for example, a rising edge corresponding to the 60 clock frequency controller 201 .
channel. For example , when the energy is still inefficient
after one shot of pulse is transferred in a time interval
When it is determined that the first output voltage V outl is
lower than or equal to the reference voltage Vrerefl of the first
channel, the SIMO converter transfers power through an
inductor according to a burst mode in operation 220. After
corresponding to one clock , the SIMO converter 110 may
supply n shots of pulses until sufficient energy is supplied .
The SIMO converter 110 adaptively adjusts a number of 65 transferring the power in operation 220 , the SIMO converter
times that a pulse triggering a power transfer to the channel compares the first output voltage Voutl to the reference
is generated. For example , as shown in a table 150 , a voltage Vren again in operation 210 and repeats a power
US 11,329,557 B2
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transfer in operation 220 until the first output voltage Vouti
is equal to the reference voltage Vrefl
, :
The SIMO converter dynamically controls a frequency of
the first clock corresponding to the first channel by counting
inductor current lind flowing in the single inductor 310 , that
is , an inductor current generated due to a power transfer
through the single inductor. The first switches Ms?, Ms2,, and
mode and / or a number of times that an operation is performed in the pulse skip mode . When the burst mode occurs
at least a preset number of times , the SIMO converter
output voltages Voi01 ,: Vo2
02, and Vo3 ) of the plurality of
channels and the single inductor 310 in series. Among the
S3 ,, a 1-154 switch , for
first switches Msi, Ms2, and Ms3
switches Mp,, MnN, and MB for controlling a flow of an
a number of times that an operation is performed in the burst 5 Ms3S3 connect output ports ( for example, ports outputting
increases a speed ( a frequency ) of the first clock . When the
SIMO converter reduces the speed ( the frequency ) of the
first clock . The aforementioned operations may also be
performed in the same manner in the second clock and / or the
example , the first switch Ms? is a switch for selecting a first
a switch for selecting a second channel, and a 1-3rd switch ,
for example, the first switch Msz is a switch for selecting a
third channel.
third clock in addition to the first clock depending on an
The second switches Mp, MyN, MB include a 2-154 switch
example .
15 Mp, aa 2-2nd switch MyN, and a 2-3rd switch MgB . One end of
After the first clock is supplied, the second clock CLK 2 the 2-1st switch Mp is connected to an input port (Vbat- side )
pulse skip mode occurs at least a preset number of times , the 10 channel, a 1-2nd switch, for example, the firstaswitch Ms2 is
is supplied from the clock frequency controller 201 based on
a time multiplexing scheme in operation 225. In response to
the second clock CLK 2 being supplied , the SIMO converter
of the SIMO converter 300 and the other end of the 2-1 st
switch Mp is connected to one end of the single inductor
310. One end of the 2-2nd switch My is connected to the one
compares a second output voltage Vout2 corresponding to the 20 end of the single inductor 310 and the other end of the 2-2nd
second channel to a reference voltage Vrer2 of the second switch My is grounded , for example , connected to a ground
channel at the rising edge of the second clock in operation GND . One end of the 2-3rd switch Mg is connected to the
other end of the single inductor 310 and the other end of the
When it is determined that the second output voltage Vout2
,
2-3rd switch M2 is grounded.
is higher than the reference voltage Vref2 of the second 25 The SIMO converter 300 uses the single inductor 310 , for
channel in operation 230 , the SIMO converter blocks a pulse example , the inductor current lind of the single inductor 310
generation according to a pulse skip mode , thereby blocking to provide the required voltages of the plurality of channels .
an additional energy supply to the second output voltage The SIMO converter 300 provides the required voltages of
V.out2
the plurality of channels based on clocks having different
When it is determined that the second output voltage V out2 30 phases using a time multiplexing scheme .
230 .
is lower than or equal to the reference voltage Vref2 of the
The control logic 350 compares an output voltage of a
second channel in operation 230 , the SIMO converter trans- channel corresponding to a control target to a reference
fers power through the inductor in operation 235. After voltage of the channel based on a clock of the channel such
transferring the power, the SIMO converter compares the that the SIMO converter 300 operates in one of the first
second output voltage V out2 to the reference voltage Vref2
, 35 mode and the second mode described above .
again in operation 230 and repeats a power transfer in
The control logic 350 controls switches , for example, the
operation 235 until the second output voltage Vout2 is equal first switches Mp, My, and Mg and the second switches Ms? ,
to the reference voltage V ref2
MszS2, Ms3S3 of the switching unit 330 based on clocks , for
After the second clock CLK 2 is supplied , the third clock example , CLK1 , CLK2 , and CLK3 corresponding to the
CLK 3 is supplied from the clock frequency controller 201 40 plurality of channels .
based on a time multiplexing scheme in operation 240. In
The control logic 350 includes a switch controller 351 , for
response to the third clock CLK 3 being supplied , the SIMO example , a protection & power switch controller, adaptive
converter compares a third output voltage V.outs correspond duty generators 352 , comparators 353 , for example, latched
ing to the third channel to a reference voltage Vref3
, of the comparators, a zero crossing detector ( ZCD ) 354 , a clock
third channel at the rising edge of the third clock in operation 45 controller 355 , and a soft start -up circuit 356 .
245 .
The switch controller 351 selects a first switch for a
When it is determined that the third output voltage V out3 corresponding channel from the first switches Ms? , Ms2S2, and
is higher than the reference voltage Vref3 of the third channel Ms3 in response to a pulse being generated and controls the
in operation 245 , the SIMO converter skips a pulse genera- second switches Mp, MyN, and MB based on a sequence for
tion to block an additional energy supply . When it is 50 generating a desired voltage of the channel. A method in
determined that the third output voltage V.out3 is lower than
or equal to the reference voltage Vref3
, of the third channel in
which the switch controller 351 controls the switches Mp,
My, MB, Msi , Ms2, and Ms3 in response to a pulse being
operation 245 , the SIMO converter transfers power through generated will be described in detail with reference to FIGS .
the inductor in operation 250. After transferring the power, 5A through 13B .
the SIMO converter compares the third output voltage V out3 55 The adaptive duty generator 352 dynamically controls a
to the reference voltage Vref
, } again in operation 245 and duty - ratio of the second switches Mp, My, and MB based on
repeats a power transfer in operation 250 until the third an input voltage of the SIMO converter 300. An operation of
output voltage Voutz is equal to the reference voltage V,ref3 the adaptive duty generator will be described in detail with
FIG . 3 is a circuit diagram illustrating an example of a reference to FIGS . 14 through 16 .
SIMO converter in accordance with one or more embodi- 60 The comparator 353 latches the output voltage of the
ments . Referring to FIG . 3 , a SIMO converter 300 includes channel at an edge, for example, a rising edge of the clock
a single inductor 310 , for example, Linda a switching unit corresponding to the channel. The comparator 353 compares
the latched output voltage to the reference voltage of the
channel.
65
plurality of channels of a converter.
The ZCD 354 resets the current lind of the single inductor
The switching unit 330 includes first switches Msi,) M32, 310 after the power transfer that is triggered due to the
and Ms3 for selecting the plurality of channels, and second generation of the pulse .
330 , and a control logic 350 .
The single inductor 310 supplies voltages desired by a
US 11,329,557 B2
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The clock controller 355 supplies clocks having different
phases to correspond to the plurality of channels based on a
channel. In this example , the SIMO converter repetitively
generates the pulse until the output voltage V03 ( 8.0 V) of
time multiplexing scheme . An operation of the clock con- the third channel is higher than the reference voltage ( for
troller 355 will be described in detail with reference to FIGS .
example , 12.0 V) according to the first mode . For example,
17 through 20 .
5 the output voltage V03 ( 8.0 V) of the third channel is
The soft start -up circuit 356 dynamically controls a fre increased to be higher than the reference voltage ( for
quency of the clock corresponding to the channel based on example , 12.0 V ) through the pulse generation performed
a load in the channel. An operation of the soft start-up circuit twice . Thereafter, the SIMO converter blocks the pulse
will be described in detail with reference to FIGS . 21A and
generation according to the second mode .
10
21B
An operation of a switching unit corresponding to each
FIG . 4 illustrates an example of a method of operating a
channel in an example in which sequential clocks are
supplied to the channel based on the time multiplexing
scheme will be described in detail with reference to FIGS .
channel, a second clock CLK 2 of a second channel, and a 5A
through 13B .
third clock CLK 3 of a third channel. The first clock CLK 1 , 15
FIGS . 5A and 5B illustrate examples of an operation in an
the second clock CLK 2 , and the third clock CLK 3 are
generated based on a common clock or a global clock . For example in which a first clock CLK1 corresponding to aa first
example, a rising edge of the first clock CLK 1 is generated channel is applied in a SIMO converter . Referring to FIG .
at a first rising edge of the common clock , a rising edge of 5A , a signal 501 is generated in response to a rising edge of
the second clock CLK 2 is generated at a second rising edge 20 a first clock CLK 1 being detected. Referring to FIG . 5B , an
of the common clock, and a rising edge of the third clock output voltage Voi of the first channel is detected at a point
CLK 3 is generated at a third rising edge of the common in time in which the rising edge of the first clock CLK 1
clock . The common clock is divided in the aforementioned corresponding to the first channel occurs .
manner to generate the first clock CLK 1 though the third
When the signal 501 is generated in response to the rising
clock CLK 3 .
25 edge of the first clock CLK 1 being detected, a switch 502
FIG . 4 illustrates an example in which an output voltage is turned on by the signal 501 such that the output voltage
01 of the first channel is transferred to a first comparator
Voi
Voi
01 of the first channel is lower than a reference voltage , for
example, 1.8 V of the first channel at the rising edge of the 503 .
first clock CLK 1 , an example in which an output voltage
The first comparator 503 compares the output voltage V 01
Voz of the second channel is lower than aa reference voltage , 30 of the first channel to a reference voltage ( for example , 1.8
for example, 0.8 V of the second channel at the rising edge V) of the first channel. A circuit for comparing the output
of the second clock CLK 2 , and an example in which an voltage Voi of the first channel to the reference voltage of
output voltage V,03 of the third channel is lower than a the first channel may be designed in various ways . A
reference voltage , for example, 12.0 V of the third channel common reference voltage Vref and a voltage divider may be
at the rising edge of the third clock CLK 3 .
35 used . For example, the output voltage V 01 of the first
A SIMO converter compares the output voltage V 01 of the channel may be divided using a voltage divider of aa ratio
first channel to the reference voltage ( for example, 1.8 V) of corresponding to the reference voltage ( for example , 1.8 V )
the first channel in response to the first clock CLK 1 of the of the first channel. The voltage divider includes a plurality
first channel being supplied . For example, when the output of sensing resistors . The first comparator 503 compares the
voltage Voi of the first channel is 1.9 V, the output voltage 40 common reference voltage Vrepand a voltage- divided output
of the first channel is higher than the reference voltage voltage , thereby comparing the output voltage Voi of the
Vol
( for example, 1.8 V) . In this example , the SIMO converter first channel and the reference voltage ( for example, 1.8 V)
blocks a generation of aa pulse according to the second mode. of the first channel.
After the first clock CLK 1 is supplied, the second clock
The output voltage Voi of the first channel is , for
CLK is supplied based on a time multiplexing scheme. The 45 example, 1.9 V as illustrated in FIG . 5B . In this example,
SIMO converter compares the output voltage Voz of the since the output voltage Voi ( 1.9 V) is higher than the
second channel to the reference voltage ( for example, 0.8 V) reference voltage ( 1.8 V) of the first channel, the SIMO
of the channel. When the output voltage V 02 of the second converter generates a pulse skip signal to block the pulse
channel is 0.7 V , the output voltage V 02 is lower than the generation according to the second mode . In response to the
reference voltage ( for example, 0.8 V) of the second chan- 50 pulse skip signal, the switch controller 351 does not generate
nel . In this example, the SIMO converter repetitively gen- a control signal for controlling a switching unit. In this
erates the pulse until the output voltage Vo2 ( 0.7 V) of the example, a power transfer to a single inductor Lind is
second channel is higher than the reference voltage ( for blocked, so that an inductor current lind is not generated .
example, 0.8 V) of the second channel according to the first
FIGS . 6A through 8B illustrate examples of an operation
mode . For example , the output voltage V 02 (0.7 V) of the 55 in an example in which a second clock CLK2 corresponding
second channel may be increased to be higher than the to a second channel is applied in a SIMO converter. FIGS .
reference voltage ( for example, 0.8 V) through a pulse 6A through 8B illustrate an operation performed in an
generation performed once . Thereafter, the SIMO converter example in which a second clock CLK 2 is supplied to a
blocks the pulse generation according to the second mode . SIMO converter based on a time multiplexing scheme after
After the second clock CLK 2 is supplied , the third clock 60 a first clock CLK 1 is supplied similar to the example of
CLK 3 is supplied based on the time multiplexing scheme. FIGS . 5A and 5B .
The SIMO converter compares the output voltage Voz of the
Referring to FIG . 6A , a signal 601 is generated in
third channel to the reference voltage ( for example , 12.0 V) response to a rising edge of the second clock CLK 2 being
of the third channel at the rising edge of the third clock CLK detected . Referring to FIG . 6B , an output voltage Voi of the
3. When the output voltage Voz of the third channel is 8.0 65 second channel is detected at a point in time in which the
V , the output voltage Voz of the third channel is lower than rising edge of the second clock CLK 2 corresponding to the
the reference voltage ( for example , 12.0 V) of the third second channel occurs .
SIMO converter in a first mode or a second mode based on
a clock . FIG . 4 illustrates a first clock CLK 1 of a first
2
2
US 11,329,557 B2
11
12
When the signal 601 is generated in response to the rising as illustrated in FIG . 8A . The ZCD 354 allows the inductor
edge of the second clock CLK 2 being detected, a switch 602 current Lind to be 0 and prevents a counter electromotive
is turned on by the signal 601 such that the output voltage force being applied to a battery. The inductor current Lind
Vo2 of the second channel is transferred to a second com- becomes zero by the ZCD 354 in the second mode as
parator 603 .
5 illustrated in FIG . 8B .
The second comparator 603 compares the output voltage
Thereafter, as illustrated in FIG . 8A , a signal 801 is
Vo2 of the second channel to a reference voltage ( for generated by the output voltage V 02 of the second channel
example , 0.8 V) of the second channel. As an example , the and the ZCD 354. The switch controller 351 transmits a
output voltage V 02 of the second channel may be divided signal 811 for the 1-2nd switch Ms2S2 in response to the signal
using a voltage divider of a ratio corresponding to the 10 801. The 1-2nd switch Ms2 is turned on in response to the
reference voltage ( for example, 0.8 V) of the second chan- signal 811 such that the output voltage Voz of the second
nel . The second comparator 603 compares a common ref- channel is transferred to a second comparator 803. As a
erence voltage Vrer and a voltage -divided output voltage, comparison result of the second comparator 803 , the
thereby comparing the output voltage Voz of the second increased output voltage Voz
02 of the second channel is higher
channel and the reference voltage ( for example, 0.8 V) of the 15 than the reference voltage ( for example, 0.8 V) as illustrated
second channel .
in FIG . 8B , the SIMO converter operates in the second
The output voltage Vo2 of the second channel is , for mode .
example, 0.7 V as illustrated in FIG . 6B . In this example ,
FIGS . 9A through 13B illustrate examples of an operation
since the output voltage V02 (0.7 V) of the second channel in an example in which aa third clock CLK3 corresponding
is lower than the reference voltage (0.8 V) , the SIMO 20 to aa third channel is applied in a SIMO converter. FIGS . 9A
converter generates a pulse according to a first mode to through 13B illustrate an operation performed in an example
increase the output voltage Vo2 of the second channel as in which a third clock CLK 3 is supplied to a SIMO
illustrated in FIG . 6B . The SIMO converter repetitively converter based on a time multiplexing scheme after a
generates the pulse until the output voltage Vo2 (0.7 V) of second clock CLK 2 is supplied .
the second channel is higher than the reference voltage ( for 25 Referring to FIG . 9A , a signal 901 is generated in
example , 0.8 V) according to the first mode .
response to a rising edge of the third clock CLK 3 being
When the output voltage Vo2 ( 0.7V ) of the second chan- detected . Referring to FIG . 9B , an output voltage Voz of the
nel is lower than the reference voltage ( for example , 0.8V) third channel is detected at a point in time in which the rising
as illustrated in FIG . 6B , the second comparator 603 trans- edge of the third clock CLK 3 corresponding to the third
30 channel occurs .
mits a signal to a second adaptive duty generator 604 .
The second adaptive duty generator 604 having received
When the signal 901 is generated in response to the rising
the signal transmitted from the second comparator 603 edge of the third clock CLK 3 being detected , a switch 902
generates a signal 701 as illustrated in FIG . 7A . The switch is turned on by the signal 901 such that the output voltage
controller 351 dynamically controls a duty -ratio of second V 03 of the third channel is transferred to a third comparator
switches Mp, MyN, and Mp based on the signal 701 received 35 903 .
from the second adaptive duty generator 604. The signal 701
The third comparator 903 compares the output voltage
generated by the second adaptive duty generator 604 is used Voz of the third channel to a reference voltage ( for example,
to dynamically control the duty - ratio of the second switches 12 V) of the third channel. As an example, the output voltage
Mp,, Mn, and M8B based on, for example , an input voltage Voz of the third channel may be divided using a voltage
V bat of the SIMO converter such that the inductor current 40 divider of a ratio corresponding to the reference voltage ( for
lind is built -up and freewheeled .
example , 12 V) of the third channel. The third comparator
The switch controller 351 controls the switching unit 330 903 compares a common reference voltage Vref and a
using the signal 701 as illustrated in FIG . 7A . The switch voltage -divided output voltage , thereby comparing the out
controller 351 having received the signal 701 transmits a put voltage Voz of the third channel and the reference
signal 711 for the second switch Mp and a signal 713 for a 45 voltage ( for example , 12 V) of the third channel.
1-2nd switch MsS2, corresponding to the second channel such
For example , as illustrated in FIG . 9B , the output voltage
that the second switch Mp and the 1-2nd switch Ms2
V03
, may be 8 V which is lower than the reference voltage
S2 are
turned on as indicated by an arrow 1. In this example of 12 V.
remaining switches are off. Through this , the input voltage
In this example, since the output voltage V03 ( 8V) of the
Vbat of the SIMO converter is supplied to the output voltage 50 third channel is lower than the reference voltage ( for
Voz of the second channel through the 1-2nd switch Ms. example, 12 V) , the SIMO converter generates a signal 1001
Thereafter, the switch controller 351 transmits a signal 712 according to a first mode to increase the output voltage V 03
for aa 2-2nd switch, for example, the second switch My and of the third channel as illustrated in FIG . 10A . The signal
a signal 713 for the 1-2nd switch Ms2 such that the 2-2nd 1001 may be a signal generated through a third adaptive duty
switch My and the 1-2nd switch Ms2 are turned on as 55 generator 1002 and the soft start-up circuit 356 .
indicated by an arrow 2. In this example remaining
A process of generating the signal 1001 is as follows, for
switches are off. Through this, a voltage obtained due to the example.
inductor current lind may also be supplied to the output
The SIMO converter repetitively generates a pulse to
voltage Voz of the second channel.
increase the output voltage Vo3
03 ( 8 V ) of the third channel
In response to the voltage being supplied to the output 60 until the output voltage Voz is higher than the reference
voltage Vo2 of the second channel, the output voltage V 02 voltage ( for example, 12 V ) according to the first mode.
of the second channel is increased to be higher than or equal When it is determined that the output voltage Vo3 ( 8 V) of
to the reference voltage ( for example, 0.8 V) as illustrated in the third channel is lower than the reference voltage ( for
FIG . 7B .
example, 12 V) , a third comparator 1003 transfers a signal
After power is transferred to the output voltage Voi of the 65 to the third adaptive duty generator 1002. The signal may be
second channel based on the signal 701 , the SIMO converter generated as the signal 1001 via the third adaptive duty
resets a current Lind of a single inductor using the ZCD 354 generator 1002 and the soft start -up circuit 356. The soft
2
US 11,329,557 B2
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14
start -up circuit 356 generates the signal 1001 and transfers
the signal 1001 to the switch controller 351 to prevent an
abrupt increase in current, for example , in rush current. The
transfers an inductor current of a single inductor to the ZCD
354 , thereby resetting the inductor current to be zero as
illustrated in FIG . 13A .
Thereafter, a signal 1301 is generated based on the ZCD
switch controller 351 having received the signal 1001
dynamically controls a duty - ratio of second switches , for 5 354 and the output voltage Voz of the third channel. In this
example, a 2-1st switch Mp, a 2-2nd switch My, and aa 2-3rd example , since the increased output voltage V 03 of the third
channel is higher than the reference voltage ( for example, 12
switch MB.
The switch controller 351 , having received the signal V) as illustrated in FIG . 13B , the SIMO converter operates
1001 , transmits a signal 1011 for the 2-15 switch Mp, a 10 in the second mode .
signal 1012 for the 2-3rd switch MpB , and a signal 1013 for
FIGS . 14 through 16 illustrate examples of a method of
a 1-3rd switch M33. The switches ( the 2-1st switch Mp, the adaptively controlling a duty - ratio in an adaptive duty
2-3rd switch MeB:, and the 1-3'd switch M93 ) having received generator of a SIMO converter . FIG . 14 illustrates situations
the corresponding signals are turned on . An input voltage in which a variation of an output voltage changes in response
Vbat of the SIMO converter is grounded through the 2-3rd 15 to a change in an input voltage Vbat of the SIMO converter
switch MB, and only a voltage due to an inductor current lind when a duty -ratio of switches is fixed .
A variation Alind of an inductor current Lind based on the
is supplied to the output voltage Voz of the third channel
input
voltage Vbat of the SIMO converter is obtained using
through the 1-3rd switch M93.
As such, the soft start-up circuit 356 increases the output Equation 1 as shown below.
voltage Voz of the third channel to reach aa level of the input 20
voltage Vbat
, ( for example, 3 V to 4.2 V) of the SIMO
Equation 1
Alind VbatLind- V. DT
converter, and then increases the output voltage Voz of the
third channel to be equal to the reference voltage ( for
example , 12 V) through a boosting operation so as to prevent
an occurrence of ripple current due to an abrupt increase in 25 In Equation 1 , Lind denotes an inductor current of the
=
an amount of current. The soft start -up circuit 356 increases
the output voltage Voz
03 of the third channel as illustrated in
SIMO converter.
Also , a variation AV. of the output voltage V, of the
be further described with reference to FIGS . 21A and 21B .
current is obtained using Equation 2 as shown below.
FIG . 10B . An operation of the soft start- up circuit 356 will
SIMO converter corresponding to a variation of the inductor
After transferring a power to the output voltage V 03 of the 30
third channel based on the signal 1001 , the SIMO converter
Equartion 2
transfers an inductor current of a single inductor to the ZCD
1
Lind
( Vbat - VDT
AV =
Alind
354 , thereby resetting the inductor current to be zero as
C.
?C
,
Lind
illustrated in FIG . 11A .
Thereafter, a signal 1101 is generated based on the ZCD 35
354 and the output voltage V 03 of the third channel. The
In Equation 2 , C , represents a capacitance value of a
switch controller 351 , having received the signal 1101 , capacitor connected to an output port of the SIMO converter.
transfers a signal 1111 for the 1-3rd switch M53 . The 1-3rd Also , DT denotes a duty - ratio of switches of the SIMO
switch Msz is turned on in response to the signal 1111. The converter. DT may have aa fixed value .
output voltage Voz
For example, when the input voltage V bat of the SIMO
03 of the third channel is transferred to the 40
third comparator 1003. As a comparison result of the third converter has an intermediate voltage Mid Vobat? the variation
comparator 1003 , since the increased output voltage Voz of Alind of the inductor current and the variation AV, of the
the third channel is lower than the reference voltage ( for output voltage may be as shown in section 1410 of FIG . 14 .
example , 12 V) as illustrated in FIG . 11B , the SIMO
When the input voltage Vbat of the SIMO converter has a
converter operates in the first mode .
45 higher voltage High V bat than the intermediate voltage Mid
As a comparison result of the third comparator 1003 , Vbar, and when DT has a fixed duty - ratio, a peak of the
when it is determined that the output voltage V 03 ( 8 V) of inductor current Lind is increased to be higher than the
the third channel is still lower than the reference voltage ( for intermediate voltage according to Equation 1 as shown in
example, 12 V) as illustrated in FIG . 11B , the SIMO section 1430 of FIG . 14. Accordingly, the output voltage V.
converter generates a signal 1201 according to the first mode 50 of the SIMO converter may also be increased to be higher
to increase the output voltage Voz of the third channel as than the intermediate voltage according to Equation 2 .
illustrated in FIG . 12A . An inductor current generated in the
When the input voltage Vbat of the SIMO converter has a
first mode increases the output voltage Voz of the third lower voltage Low V bat than the intermediate voltage Mid
channel as illustrated in FIG . 12B .
Vbat, and when DT has a fixed duty -ratio , a peak of the
The switch controller 351 having received the signal 1201 55 inductor current Lind is reduced to be lower than the inter
transmits aa signal
1211 for the 2-1st switch Mp, a signal 1212 mediate voltage according to Equation 1 as shown in section
rd
o
o
for the 2-3 switch MgB , and a signal 1213 for the 1-3rd 1450 of FIG . 14. Accordingly, the output voltage V , of the
switch M53. The switches ( the 2-1st switch Mp, the 2-3rd SIMO converter may also be reduced to be lower than the
switch MB:, and the 1-3rd switch M93) having received the intermediate voltage according to Equation 2 .
corresponding signals are turned on and remaining switches 60 As such , when the duty - ratio is fixed , a peak of the
are turned off. In this example , the input voltage bat of the inductor current Lind is changed in response to a change in
SIMO converter is grounded through the 2-3rd switch MB, the input voltage V bat of the SIMO converter, which may
and only a voltage due to the inductor current lind is supplied result in a ripple in the output voltage V. of the SIMO
to the output voltage Voz of the third channel through the converter.
65
FIG . 15A illustrates adaptive duty generators 352. FIG .
1-3rd switch M93.
o
After transferring a power to the output voltage Voz of the
third channel based on the signal 1201 , the SIMO converter
15B illustrates a graph representing a peak of an inductor
current Lind is constantly maintained by dynamically con
US 11,329,557 B2
16
15
trolling a duty - ratio of second switches when an input
ing to each channel in a SIMO converter. FIG . 17 illustrates
output voltages corresponding to load currents I , under a
between 3 V and 4.2 V.
light load condition , an intermediate load condition , and a
The adaptive duty generators 352 of FIG . 15A may 5 heavy load condition .
prevent an occurrence of aa ripple in the output voltage V. of
A relationship between the load current IL, and a clock
the SIMO converter by dynamically controlling a duty -ratio frequency is expressed by Equation 5 as shown below .
of the second switches Mp, Mn, and MB based on the input
voltage of the SIMO converter.
Equation 5
CoV N
For example, as illustrated in FIG . 15B , when the input
Il
voltage of the SIMO converter gradually increases from 3.0 10
V to 4.2 V , the adaptive duty generators 352 may gradually
reduce the duty -ratio of the second switches Mp,, My, and
In Equation 5 , N denotes a number of clock occurrences
MgB.: In response to the duty - ratio of the second switches Mp, andTclk denotes a clock frequency. Tsw denotes a period of
My, and MB being reduced , a peak value of the inductor 15 time in which switching occurs for actual power transfer, for
current lind is also maintained at a predetermined level . As example, a switching period .
such , when the peak value of the inductor current is con
In Equation 5 , when the clock frequency Telk
cik is fixed , the
stantly maintained , the output voltage V is also constantly switching
period Tsw changes in response to a change in load
maintained to prevent the occurrence of the ripple.
current as follows.
voltage Vbat of the SIMO converter changes in a range
T » = N. Tek = COY (N 21 )
2
SW
2
?
FIG . 16 illustrates aa circuit diagram of the adaptive duty 20 When the load current of the SIMO converter is an
generators 352 .
load current Mid I , as shown in section 1710 of
In the circuit diagram of FIG . 16 , a length of duty interval intermediate
. 17 , power may be transferred by performing the
Tduty corresponding to a duty - ratio is obtained using Equa FIG
switching once per 4 clocks . In addition, when the load
tion 3 as shown below .
current of the SIMO is a heavy load current Heavy I? as
25 shown in section 1730 of FIG . 17 , the power may be
transferred by performing the switching for each clock .
Equation 3
Cduty Cduty Rduty
Also , when the load current of the SIMO converter is a light
Tduty– Iduty Vth Vbat – V.-Vih
=
In Equation 3 , Cdut denotes a predetermined capacitor 30
value, R dury denotes a predetermined
resistor value (a con
stant value ) , Vth denotes aa threshold of aa transistor ( PMOS ) ,
, denotes a current generated
and V onis aa battery
constantvoltage
value . Iduty
based
Vbbat.
Iduty is determined as , for example,
– V.
Iduty VbatRduty
load current Light I, as shown in section 1750 of FIG . 17 ,
no or few switching may be performed .
FIG . 18A illustrates a clock controller 355 and FIG . 18B
illustrates a method of controlling a clock with the clock
controller 355 based on an inductor current. The clock
controller 355 dynamically controls a frequency of a clock
corresponding to a channel based on a load in the channel.
35 The clock controller 355 controls clocks to supply clock
pulses having different frequencies corresponding to a plu
rality of channels in response to a change in inductor current.
In this example, the clock controller 355 controls clocks to
sequentially supply clock pulses with different frequencies
40 corresponding to the plurality of channels based on a time
multiplexing scheme . The clock controller 355 includes a
based on the determined resistor value Rduty, the battery frequency controller 1810 and a 3 -phase (0 ) clock generator
voltage V bar, and the constant value Vo . I duty flows through 1830. An operation of the frequency controller 1810 , for
the predetermined capacitor Cduty so as to change a voltage example , a Freq controller will be described in detail with
of an upper terminal of Cduty. When the voltage changes and reference to FIG . 19. An operation of the 3 - phase clock
the voltage exceeds a threshold Vth of a rear - end transistor 45 generator
1830 will be described in detail with reference to
( PMOS ) , a status is transited so that a duty interval Tduty
is
FIG
.
20
.
determined . For example, the duty interval Tduty may be
For example, as illustrated in FIG . 18B , when aa load of a
load current of the SIMO converter is light in a correspond
50 ing channel, no or few switching may be performed. Also ,
Cduty
when the load of the load current is heavy, the power may
be transferred by performing switching for each clock .
FIG . 19 illustrates a configuration and an operation of the
frequency
controller 1810 in accordance with one or more
Also , when the duty -ratio is adaptively changed as illus
trated
in
the
circuit
diagram
of
FIG
.
16.
a
variation
AV
.
of
55
embodiments
. controller 1810 counts a number of times
The frequency
the output voltage of the SIMO converter may be obtained
that the SIMO converter operates in a first mode and a
using Equation 4 as shown below.
number of times that the SIMO converter operates in a
second mode using a 3 - bit up/ down counter 1910. The
1
1
Equation 4 60 frequency controller 1810 dynamically controls a frequency
AVO
-Cduty Rduty Vth
(Vbat – V.) Tduty
of ?a clock corresponding to a corresponding channel based
Lind Co
| LindCo
on the counted number of times . When the counted number
of times corresponds to a preset number of times , the
C. corresponds to a capacitance value of a capacitor frequency controller 1810 dynamically controls a frequency
connected to an output port of the SIMO converter.
65 of a clock corresponding to a corresponding channel. In this
FIGS . 17 through 19 illustrate examples of a method of example, a preset number of times corresponding to the first
dynamically controlling a frequency of a clock correspond- mode may be the same as or different from a preset number
Tduty Iduty Vih
=
o
=
=
US 11,329,557 B2
17
of times corresponding to the second mode . In an example,
unlike a number of first mode occurrences, a number of
second mode occurrences may be input to the 3 -bit up /down
18
on the clocks having different phases generated by the
3 -phase clock generator 1830 of FIG . 20 .
FIGS . 21A and 21B illustrate examples of an operation of
counter 1910 via another 3 - bit counter 1910. In this a soft start - up circuit of a SIMO converter . FIG . 21A
example, the number of second mode occurrences may be 5 illustrates a buck -boost operation and a boost operation for
transferred to the 3 - bit up/ down counter 1910 three times preventing an abrupt flow of a current using a soft start -up
circuit. FIG . 21B illustrates a change in an output voltage
For example, to increase the output voltage Vo0 , the SIMO Voz of aa third channel during the buck -boost operation and
converter may operate four times in the first mode (burst the boost operation .
mode) as shown in a box 1930 , and the preset number of 10 As described with reference to FIG . 10 , the soft start - up
times corresponding to the first mode may be 4. Since the circuit may prevent an abrupt increase in inductor current,
number of times that the SIMO converter operates in the first for example, in rush current.
mode , which is 4 , corresponds to the preset number of times
For example, when a signal is transferred in the soft
( 4 ) , the frequency controller 1810 may adjust a clock 15 start-up circuit , the signal is transferred through the switch
frequency to be increased .
controller 351 such that each switch performs the buck
Also , when the output voltage V. does not need to be boost
operation. The buck -boost operation is performed in
increased, the SIMO may operate nine times in the second
slower than the number of first mode occurrences .
mode (pulse skip mode ) as shown in a box 1950 , and, in a
an order indicated by arrows 1 and 2 in FIG . 21A .
In the buck -boost operation , the switch controller 351
non
limiting
example
,
the
preset
number
of
times
corre
sponding tothe second mode may be 9. Since the number of 20 turns
a 2-1"1switch
switchswitches
Mz as indicated
by theonarrow
and Mp
turnsandoffa 2-3'd
remaining
. In this
times that the SIMO converter operates in the second mode, process
, an input voltage Vbat of the SIMO converter may be
which is 9 , corresponds to the preset number of times , that grounded via the 2-3rd switch MgB . Thereafter, the switch
is , 9 , the frequency controller 1810 may adjust a clock controller 351 turns on a 2-2nd switch My and a 1-3rd switch
frequency to be decreased.
S3 as indicated by the arrow 2 and turns off remaining
In an example, a frequency of a common clock is dynami 25 M53
switches . In this process , only a voltage due to an inductor
cally controlled by monitoring modes of a single channel current
lind may be supplied to the output voltage Voz of the
( for example, 1.8 V) . Since a plurality of channels uses the
third
channel
1-3rd switch M53. The switch controller
frequency of the common clock by dividing the frequency, 351 performsviathethebuck
- boost operation until the output
clock frequencies of the plurality channels may be dynami 30 voltage
V 03 of the third channel is equal to the input voltage
cally controlled in response to the frequency of the common Vbat of the
SIMO converter. Referring to FIG . 21B , it is
clock being dynamically controlled . For example, an output shown that the
output voltage Voz
03 of the third channel is
voltage V. of FIG . 19 is an output voltage of a predeter moderately
increased
while
the
buck -boost operation is
mined channel ( 1.8 V) and a clock CLK of FIG . 19 is a performed.
common clock .
the output voltage V 03 of the third channel is equal
In an example, a frequency of a common clock is dynami 35 to When
the
input
Vbat of the SIMO converter, the switch
cally controlled by monitoring modes of a plurality of controller 351voltage
performs
the boost operation.
channels . For example, the frequency of the common clock
In
the
boost
operation
,
the switch controller 351 turns on
may be reduced by operating at least a preset number of the 2-1st switch Mp and 1-3rd
switch M93 as indicated by an
times in the second mode (pulse skip mode) in one channel.
Also
, the frequency of the common clock may beincreased 40 arrow
3
and
turns
off
remaining
switches. In this process,
in addition to the voltage due to the inductor current lind of
by operating at least a preset number of times in the first the
, the input voltage V bat of the SIMO converter
mode (burst mode ) in another channel. In this example, an mayinductor
also be supplied . In this case , the output voltage Voz of
output voltage V, of FIG . 19 is an output voltage of a the SIMO
converter rises sharply from the input voltage V bat
channel among the plurality of channels and a clock CLK of 45 as illustrated
in FIG . 21B .
FIG . 19 is a common clock .
As
such
,
a
soft
start -up circuit slowly increases the output
FIG . 20 illustrates an example of a clock generator that
V03 of the third channel to reach aa level of the input
generates clocks having different phases in a SIMO con voltage
V bat
) ( 3 V to 4.2 V) of the SIMO converter through
verter. FIG . 20 illustrates a configuration and an operation of voltage
soft start -up circuit
a 3 - phase (0 ) clock generator 1830. The 3 -phase clock the buck -boost operation . After that, the of
third channel
generator 1830 generates clocks having three different 50 quickly
the output
voltage
Vo3 the
to reachincreases
the reference
voltage
( for example
, 12 V) through
phases in the SIMO converter. The 3 -phase clock generator the
boost operation. Through this, the soft start - up circuit
1830 generates clocks having a frequency folk using Equa prevents
an occurrence of a ripple current due to the abrupt
tion 6 as shown below .
increase in the amount of current.
55
FIG . 22 is flowchart illustrating an example of a control
method
of a SIMO converter. The operations in FIG . 22 may
Equation
6
Ick
folk
be performed in the sequence and manner as shown,
3Celk · Vref1
although the order of some operations may be changed or
some of the operations omitted without departing from the
In Equation 6 , Celk denotes a capacitance value of a clock 60 spirit and scope of the illustrative examples described . Many
capacitor of a capacitor connected to an output power of a of the operations shown in FIG . 22 may be performed in
clock in parallel. Vrefi denotes a reference voltage of a parallel or concurrently. One or more blocks of FIG . 22 , and
channel ( for example, a first channel) applied to a compara- combinations of the blocks , can be implemented by special
tor. Icik denotes a clock current applied from the frequency purpose hardware -based computer that perform the specified
controller 1810 to the 3 -phase clock generator 1830 .
65 functions, or combinations of special purpose hardware and
The SIMO converter provides desired voltages of aa plu- computer instructions . In addition to the description of FIG .
rality of channels using a time multiplexing scheme based 22 below, the descriptions of FIGS . 1-21 are also applicable
=
US 11,329,557 B2
19
20
to FIG . 22 , and are incorporated herein by reference . Thus, ries storing instructions or software that are executed by the
processor or computer. Hardware components implemented
the above description may not be repeated here.
Referring to FIG . 22 , in operation 2210 , a SIMO con- by a processor or computer may execute instructions or
verter compares an output voltage of a channel correspond- software, such as an operating system (OS ) and one or more
ing to a control target among a plurality of channels to a 5 software applications that run on the OS , to perform the
reference voltage of the channel based on a clock of the operations described in this application. The hardware com
channel. In this example, the SIMO converter uses a single ponents may also access , manipulate , process , create , and
inductor to provide desired voltages of the plurality of store data in response to execution of the instructions or
channels.
software . For simplicity, the singular term “ processor" or
In operation 2220 , the SIMO converter selects a first 10 “ computer ” may be used in the description of the examples
mode when the output voltage of the channel is lower than described in this application, but in other examples multiple
the reference voltage of the channel, and selects a second processors or computers may be used, or a processor or
mode when the output voltage is higher than the reference computer may include multiple processing elements, or
voltage.
multiple types of processing elements , or both . Forexample,
When the first mode is selected, in operation 2230 , the 15 a single hardware component or two or more hardware
SIMO converter adaptively adjusts a number of times that a components may be implemented by a single processor, or
pulse triggering a power transfer to the channel is generated . two or more processors , or a processor and a controller. One
The SIMO converter adaptively adjusts the number of times or more hardware components may be implemented by one
that the pulse is generated in a time interval initiated in or more processors, or a processor and a controller, and one
response to an edge of the clock corresponding to the 20 or more other hardware components may be implemented by
channel. For example, the SIMO converter repetitively one or more other processors , or another processor and
generates the pulse until the output voltage of the channel is another controller. One or more processors, or a processor
higher than the reference voltage of the channel according to and a controller, may implement a single hardware compo
the first mode .
nent, or two or more hardware components. A hardware
In operation 2240 , the SIMO converter blocks a genera- 25 component
may have
any one orofmore
ing configurations
, examples
whichof different
include aprocess
single
tion of the pulse when the second mode is selected .
The SIMO converter counts a number of times that an processor, independent processors , parallel processors,
operation is performed in the first mode and a number of single - instruction single -data ( SISD ) multiprocessing,
times that an operation is performed in the second mode. The single - instruction multiple -data ( SIMD ) multiprocessing,
SIMO converter dynamically controls a frequency of the 30 multiple -instruction single -data ( MISD ) multiprocessing,
clock corresponding to the channel based on a result and multiple - instruction multiple -data ( MIMD ) multipro
obtained by determining whether the counted number of
times ( for example, the number of times that an operation is
cessing.
The methods illustrated and discussed with respect to
performed in the first mode and the number of times that an FIG . 1-22 that perform the operations described in this
operation is performed in the second mode ) corresponds to 35 application are performed by computing hardware, for
a preset number of times . When the number of times that an example, by one or more processors or computers, imple
operation is performed in the first mode corresponds to the mented as described above executing instructions or soft
preset number of times , the SIMO converter increases the ware to perform the operations described in this application
frequency of the clock corresponding to the channel. When that are performed by the methods. For example, a single
the number of times that an operation is performed in the 40 operation or two or more operations may be performed by a
second mode corresponds to the preset number of times , the single processor, or two or more processors, or a processor
SIMO converter reduces the frequency of the clock corre- and a controller. One or more operations may be performed
sponding to the channel.
by one or more processors, or a processor and a controller,
The SIMO converter 110 , the clock frequency controller and one or more other operations may be performed by one
201 , the SIMO converter 300 , the controller 350 , and other 45 or more other processors , or another processor and another
apparatuses, and devices, and other components described controller. One or more processors , or a processor and a
herein with respect to FIGS . 1-22 are, and are implemented controller, may perform a single operation , or two or more
by, hardware components. Examples of hardware compo- operations.
nents that may be used to perform the operations described
Instructions or software to control computing hardware,
in this application where appropriate include controllers, 50 for example, one or more processors or computers, to
sensors, generators, drivers, memories , comparators, arith- implement the hardware components and perform the meth
metic logic units , adders, subtractors, multipliers, dividers, ods as described above may be written as computer pro
integrators, and any other electronic components configured grams, code segments, instructions or any combination
to perform the operations described in this application. In thereof, for individually or collectively instructing or con
other examples, one or more of the hardware components 55 figuring the one or more processors or computers to operate
that perform the operations described in this application are as a machine or special -purpose computer to perform the
implemented by computing hardware, for example , by one operations performed by the hardware components and the
or more processors or computers. A processor or computer methods as described above . In one example, the instruc
may be implemented by one or more processing elements, tions or software include machine code that is directly
such as an array of logic gates , a controller and an arithmetic 60 executed by the one or more processors or computers, such
logic unit, a digital signal processor, a microcomputer, a as machine code produced by a compiler. In another
programmable logic controller, a field -programmable gate example , the instructions or software include higher - level
array, a programmable logic array, a microprocessor, or any code that is executed by the one or more processors or
other device or combination of devices that is configured to computers using an interpreter. The instructions or software
respond to and execute instructions in a defined manner to 65 may be written using any programming language based on
achieve a desired result . In one example, a processor or the block diagrams and the flow charts illustrated in the
computer includes , or is connected to , one or more memo- drawings and the corresponding descriptions in the specifi
US 11,329,557 B2
22
21
cation , which disclose algorithms for performing the opera-
tions performed by the hardware components and the meth
ods as described above .
The instructions or software to control computing hard
ware, for example , one or more processors or computers, to 5
implement the hardware components and perform the meth
ods as described above, and any associated data, data files,
and data structures, may be recorded , stored , or fixed in or
on one or more non - transitory computer -readable storage
media. Examples of a non -transitory computer - readable 10
storage medium include read -only memory ( ROM) , ran
dom - access programmable read only memory (PROM) ,
electrically erasable programmable read -only memory (EE
compare an output voltage of a selected channel, from
among the plurality of channels, that corresponds to
a control target to a reference voltage of the selected
channel in response to an edge of a clock of the
selected channel,
repetitively generate a pulse to transfer power to the
selected channel by selecting a burst mode when the
output voltage is less than or equal to the reference
voltage until the output voltage is greater than the
reference voltage,
block the generation of the pulse by selecting a pulse
skip mode when the output voltage of the selected
channel is greater than the reference voltage ,
increase a frequency of the clock of the selected chan
PROM) , random - access memory (RAM ), dynamic random
access memory (DRAM ), static random access memory 15
nel when the burst mode has occurred a predeter
( SRAM ), flash memory, non - volatile memory, CD - ROMs ,
mined
number of times ,
CD - Rs , CD + Rs , CD - RW , CD + RW , DVD - ROMs , DVD
decrease the frequency of the clock of the selected
Rs , DVD + Rs , DVD - RW , DVD + RWs, DVD -RAMS, BD
channel when the pulse skip mode has occurred the
ROMs , BD - Rs , BD - R LTHS, BD - REs , as non - limiting blue
ray or optical disk storage examples, hard disk drive (HDD ) , 20
predetermined number of times , and
solid state drive ( SSD ) , flash memory, a card type memory
control the clocks to supply clock pulses having dif
ferent frequencies corresponding to the plurality of
such as multimedia card micro or a card ( for example, secure
digital ( SD ) or extreme digital (XD )), magnetic tapes , floppy
channels in response to a change in inductor current.
disks , magneto -optical data storage devices, optical data
2. The SIMO converter of claim 1 , wherein the control
storage devices , hard disks , solid - state disks , and any other 25 logic is further configured to repetitively generate the pulse
device that is configured to store the instructions or software in the burst mode until the output voltage of the selected
and any associated data , data files, and data structures in a channel is higher than the reference voltage of the selected
non - transitory manner and provide the instructions or soft channel based on a determination that the output voltage of
ware and any associated data , data files, and data structures the selected channel is lower than the reference voltage of
to one or more processors or computers so that the one or 30 the selected channel.
more processors or computers can execute the instructions .
3. The SIMO converter of claim 1 , wherein the control
In one example, the instructions or software and any asso logic
is further configured to block the generation of the
ciated data , data
and data structures are distributed over pulse in
the pulse skip mode based on a determination that
network -coupled computer systems so that the instructions
and software and any associated data, data files, and data 35 the
output
voltage of the selected channel is higher than the
voltage of the selected channel.
structures are stored , accessed, and executed in aa distributed reference
4. The SIMO converter of claim 1 , wherein the control
fashion by the one or more processors or computers .
While this disclosure includes specific examples, it will logic is further configured to dynamically control a fre
be apparent to one of ordinary skill in the art that various quency of the clock corresponding to the selected channel
changes in form and details may be made in these examples 40 based on a number of times that an operation is performed
without departing from the spirit and scope of the claims and in the burst mode and a number of times that an operation
their equivalents. The examples described herein are to be is performed in the pulse skip mode .
considered in a descriptive sense only, and not for purposes
5. The SIMO converter of claim 1 , wherein the converter
of limitation . Descriptions of features or aspects in each is further configured to provide the respective voltages of the
example are to be considered as being applicable to similar 45 plurality of channels based on the clocks having different
features or aspects in other examples . Suitable results may phases based on a time multiplexing scheme.
be achieved if the described techniques are performed in a
6. The SIMO converter of claim 1 , wherein, in the burst
different order, and / or if components in a described system , mode , the control logic is further configured to adaptively
architecture , device , or circuit are combined in a different adjust the number of times that the pulse is generated in a
manner , and / or replaced or supplemented by other compo- 50 time interval initiated in response to an edge of the clock
nents or their equivalents. Therefore, the scope of the corresponding to the selected channel.
disclosure is defined not by the detailed description, but by
7. The SIMO converter of claim 1 , wherein the converter
the claims and their equivalents, and all variations within the comprises:
scope of the claims and their equivalents are to be construed
the single inductor; and
55
as being included in the disclosure.
a switching unit comprising first switches configured to
What is claimed is :
select the plurality of channels and second switches
1. A single - inductor multiple -output ( SIMO ) converter
configured to control aa flow of a current flowing in the
comprising :
single inductor.
a converter configured to provide respective voltages of a
8. The SIMO converter of claim 7 , wherein the first
plurality of channels with a single inductor ; and
60 switches are configured to connect output ports of the
a control logic configured to control switches of the plurality of channels and the single inductor in series .
converter based on clocks corresponding to the plural9. The SIMO converter of claim 7 , wherein the second
ity of channels, the clocks , corresponding to the plu- switches comprise a 2-1st switch , aa 2-2nd switch , and aa 2-3rd
rality of channels, having different phases from each switch ,
other, and each of the plurality of channels has a 65 the 2-1st switch is configured to have aa first end connected
different clock frequency ;
to an input port of the converter and a second end
wherein the control logic is configured to :
connected to a first end of the single inductor,
9
.
US 11,329,557 B2
24
23
the 2-2nd switch is configured to have a first end connected
repetitively generating the pulse until the output voltage
of the selected channel is higher than the reference
of the 2-2nd switch is grounded, and
voltage of the selected channel based on the burst
the 2-3rd switch is configured to have aa first end connected
mode.
to a second end of the single inductor, and aa second end 5 18. The control method of claim 16 , wherein the adap
of the 2-3rd switch is grounded .
tively adjusting the number of times that the pulse is
to the first end of the single inductor, and a second end
10. The SIMO converter of claim 7 , wherein the control generated comprises:
logic comprises:
adaptively adjusting the number of times that the pulse is
a switch controller configured to select a first switch for 10
generated in aa time interval initiated in response to an
the selected channel from among the first switches in
edge of the clock corresponding to the selected chan
nel.
response to the pulse being generated , and control the
second switches based on a sequence for generating a
19. The control method of claim 16 , further comprising :
counting a number of times that an operation is performed
desired voltage of the selected channel.
in the burst mode and a number of times that an
logic is configured to dynamically control a duty - ratio of the
operation is performed in the pulse skip mode ; and
second switches based on an input voltage of the converter.
dynamically controlling a frequency of the clock corre
sponding to the selected channel based on a determi
12. The SIMO converter of claim 1 , wherein the control
logic is further configured to reset a current of the single
nation that the counted number of times corresponds to
inductor after the power transfer is triggered due to the 20
a preset number of times.
generation of the pulse .
20. The control method of claim 19 , wherein the dynami
13. The SIMO converter of claim 1 , wherein the control cally controlling the frequency of the clock comprises:
logic is further configured to dynamically control a freincreasing the frequency of the clock corresponding to the
quency of the clock corresponding to the selected channel
selected channel when the number of times that an
25
based on a load in the channel .
operation is performed in the burst mode corresponds
14. The SIMO converter of claim 1 , wherein the control
to the preset number of times .
logic comprises:
21. The control method of claim 19 , wherein the dynami
a comparator configured to latch the output voltage of the cally controlling the frequency of the clock comprises:
selected channel at an edge of the clock corresponding
reducing the frequency of the clock corresponding to the
to the channel, and compare the latched output voltage 30
selected channel when the number of times that an
operation is performed in the pulse skip mode corre
to the reference voltage of the channel.
15. The SIMO converter of claim 1 , wherein the control
sponds to the preset number of times .
logic is further configured to generate the clocks correspond22. A non -transitory computer -readable storage medium
ing to the plurality of channels based on an importance level storing instructions that, when executed by a processor,
of the plurality of channels and control lengths of time 35 cause the processor to perform the control method of claim
16 .
intervals corresponding to phases of the clocks .
23. A method comprising:
16. A control method comprising:
comparing, based on a clock of a selected channel corcomparing, in a single inductor multiple output ( SIMO )
responding to a control target among a plurality of
converter, an output voltage of a selected channel
channels, an output voltage of the selected channel to 40
among a plurality of channels to a reference voltage of
a reference voltage of the selected channel, clocks
the selected channel in response to an edge of a clock
corresponding to the plurality of channels, each of the
of the selected channel, the clocks corresponding to the
clocks having different phases from each other, and
plurality of channels having phases different from each
each of the plurality of channels having a different
other, and each of the plurality of channels having a
45
clock frequency ;
different clock frequency;
selecting a burst mode when the output voltage is less than
selecting a burst mode to repetitively generate a pulse to
or equal to the reference voltage , and selecting a pulse
transfer power to the selected channel when the output
skip mode when the output voltage is higher than the
voltage of the selected channel is less than or equal to
reference voltage;
the reference voltage , and
adaptively adjusting, when the burst mode is selected , a 50 selecting a pulse skip mode to block the generation of the
number of times that a pulse triggering a power transfer
pulse when the output voltage of the selected channel
to the selected channel is generated;
is greater than the reference voltage , and
blocking a generation of the pulse when the pulse skip
controlling the clocks to supply clock pulses having
mode is selected,
different frequencies corresponding to the plurality of
increasing a frequency of the clock of the selected channel 55
channels in response to a change in inductor current.
when the burst mode has occurred a predetermined
24. The method of claim 23 , further comprising adjusting
a number of times a pulse triggering a power transfer to the
number of times ,
decreasing the frequency of the clock of the selected selected channel is generated when the burst mode is
selected, and blocking a generation of the pulse when the
channel when the pulse skip mode
has occurred the predetermined number of times , and 60 pulse skip mode is selected .
11. The SIMO converter of claim 10 , wherein the control 15
2
controlling each of the clocks to supply clock pulses
having different frequencies corresponding to the plurality of channels in response to a change in inductor
25. The method of claim 23 , wherein the SIMO converter
dynamically controls a frequency of the clock corresponding
to the selected channel by comparing a number of times that
current.
an operation is performed in the burst mode to a preset
17. The control method of claim 16 , wherein the adap- 65 number of times , and comparing a number of times that an
tively adjusting the number of times that the pulse is operation is performed in the pulse skip mode to the preset
generated comprises:
number of times .
US 11,329,557 B2
26
25
26. The method of claim 25 , wherein the SIMO converter
increases a frequency of the clock corresponding to the
selected channel when the number of times that the opera
tion is performed in the burst mode corresponds to the preset 5
number of times .
27. The method of claim 25 , wherein the SIMO converter
reduces the frequency of the clock corresponding to the
selected channel when the number of times that an operation
is performed in the pulse skip mode corresponds to the
preset number of times.
10