Translated from Chinese (Simplified) to English - www.onlinedoctranslator.com
ATT7022E/26E/28E User Manual (P73-13-45)
ATT7022E/
26E/28E
User Manual
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Tel:
Fax:
Email:
Web:
021-51035886
021-50277833
sales@hitrendtech.com
http://www.hitrendtech.com
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page1 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Version modification instructions
0B
version number
V1.0
V1.1
Modify records
2011/03/30: Create a first draft
2011/04/08:1,Revise clerical errors:A, checksum register accumulation calibration register0x01~0x39
B, effective valueoffsetRegister correction is performed before RMS correction
V1.2
2, Modify the recommended value of the calibration register.0x01=0xB9FF;0x03=0xF804, 0x31=0x3427;0x16=0x0
2011/05/24:1, modify the full-scale coefficientG=1.163
2, add algorithm flow chart
3.Add description and recommendations for calibration register control bits
V1.3
V1.4
2011/06/09:1, the chip is made ofATT7122ARename toATT7022E
2011/07/15:1, Revise the voltage angle data format description: the voltage angle parameter is an unsigned number.
2, Calibration parameter register0x03, when calculating the checksum, the highest4bitThe order is reversed, so it is recommended0x03
Register high4bitWrite in full1Right now0xFxxx
V1.5
2011/08/25:1,IncreaseSPIInterface: whenSCLKfrequency higher than500kHzneed to wait2uSto read data
2, Correct the clerical error in the checksum initial value
3, Improve the buffering and synchronization function process description
4, the synchronization buffer function is protected by the write protect command, that is, to0xC9write non0x005AThen enable the write-protect command,
The synchronous sampling function cannot be started at this time.
5, Add synchronized sampling function gain description
V1.6
V1.7
V1.8
V1.9
V2.0
V2.1
V3.0
2012/02/01:according toDCCDocument format requirements, modify the format.
2012/02/24: Add version modification instructions
2012/03/15: Modify the footer toRev1.8, modify the50PageGThe value is1.163.,ReviseADCThe data bits are19bit,
Add the first41Page "PoweroffsetCorrection" data processing instructions.
2012/06/08:Modify channel0annotate, modifyADCThe data bits are16bit, modify the power factor calculation formula
2013/2/1: Dynamic range after revision5000:1; Calibration register0x31The default value is modified, and the checksum is modified at the same time.
2013/4/25:ReviseNValue definition description, rightIstart(1DH)The coefficient 0.8 in the calculation formula is explained.
2013/6/20:Increase7026E/7028EThe corresponding description of3kindICIntegrate the data manual and modify the manual name.
Feature upgrade dynamic range5000:1, the phase is explained in three sections,SAGFunction Description
V3.1
2013/08/09: Modify the recommended value of the register:0x01ofbit7The recommended value is0,Right now0x01=0xB97E,Increase0x31register
Description, the recommended value remains unchanged; add voltage sag and overcurrent interrupt instructions; modify the "Reactive Power Phase
Correction Register (0x16)" is the "fundamental reactive power phase correction register (0x16)"
V3.2
V3.3
V3.4
2013/09/02:IncreaseSleepFunction Description:SleepCalibration parameters below:0x01~0x1Fsave
2013/10/23:IncreaseNDescription, correct the typographical error in the dynamic range in the performance indicators.
2014/01/06:1,IncreaseSleepMode description
2, Modify the description of the fast pulse register: the fast pulse is in complement form
3, modify the power effective value update rate to1.76Hz~14.4Hzand3.52Hz~28.8Hz 4. Modify the
clerical error in the calculation formula of the pressure loss threshold:FailVoltage=Un*2 5̂*D
5, add: chipIDregister0x5D, new calibration parameter checksum register0x5E, the current vector sumoffset
registerItRmsoffset, three-phase three-wire value/three-phase four-wire register control mode (calibration parameter0x70
bit0)ModSel, add fundamental wave reactive power register (measurement parameter0x57~5A), 6,powerOffsetThe correction
bits are expanded to24bit; 7. Add automatic temperature compensation function;
8, the current vector sum algorithm takes into account the three-phase four-wire system using a neutral current transformer and not using a neutral current transformer.
Case
9, Voltage angle/phase angle algorithm adds optional new algorithm;
10, Modify the fundamental harmonic function description;
11, Calibration parameters0x70Add control bitsFcntmodOptional absolute value mode; 12, Modify
the overcurrent detection function definition;
13, modify the register list and calibration parameter list;
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page2 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Table of contents
Version modification instructions................................................ ................................................................. ................................................................. .........2
1
2
Chip Overview................................................ ................................................................. ................................................................. .......6
1.1
Chip Introduction................................................ ................................................................. .................................................................6
1.2
Chip Characteristics................................................ ................................................................. .................................................................6
1.3
Chip Comparison List................................................ ................................................................. .................................................................7
1.4
Overall block diagram................................................ ................................................................. .................................................................7
1.5
Pin definition................................................ ................................................................. .................................................................8
1.6
Application diagram................................................ ................................................................. ........................................11
Function description................................................ ................................................................. ................................................................. .....12
2.1
Power management................................................ ................................................................. .................................................................12
2.2 SLEEPmodel................................................. ................................................................. .................................................................12
2.3
Resetting the system................................................ ................................................................. .................................................................12
2.4 A/DConversion................................................ ................................................................. .................................................................13
2.5
Power quality measurement................................................ ................................................................. ........................................14
2.5.1
SAGFunction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.5.2
Overcurrent detection function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.5.3Flicker function implementation solution...................................... ................................................................. ............................14
2.5.4Voltage phase sequence detection...................................... ................................................................. ..................................................14
2.5.5Current phase sequence detection........................................ ................................................................. ..................................................15
2.5.6Voltage angle measurement........................................ ................................................................. ..................................................15
2.5.7Measurement of voltage and current phase angle........................................ ................................................................. .............................15
2.5.8Power factor measurement................................................ ................................................................. .....................................15
2.5.9Voltage frequency measurement................................................ ................................................................. .....................................15
2.5.10
2.6
Pressure loss detection........................................ ................................................................. ........................................15
Effective value measurement................................................ ................................................................. ....................................................16
2.6.1Current RMS measurement........................................ ................................................................. .............................16
2.6.2Voltage rms measurement........................................ ................................................................. .............................16
2.7
Active power measurement........................................ ................................................................. .................................................................16
2.7.1Active power calculation................................................ ................................................................. .....................................16
2.7.2Active energy calculation................................................ ................................................................. ..................................................17
2.8
Reactive power measurement................................................ ................................................................. .................................................................17
2.8.1Reactive power calculation................................................ ................................................................. ..................................................18
2.8.2Reactive energy calculation........................................ ................................................................. ..................................................18
2.9
Apparent calculation................................................ ................................................................. .................................................................18
2.9.1Apparent power calculation........................................ ................................................................. ..................................................18
2.9.2Apparent Energy Calculation........................................ ................................................................. ..................................................19
2.10
Fundamental harmonic function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.11
Power direction judgment................................................ ................................................................. ........................................20
2.12
Starting/creep........................................ ................................................................. .................................................................twenty one
2.13
Hardware port detection................................................ ................................................................. ........................................twenty one
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page3 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
2.14
On-chip temperature detection........................................ ................................................................. ........................................twenty one
2.15
Fundamental wave measurement function...................................... ................................................................. ....................................................twenty one
2.16
Three-phase three-wire/four-wire applications........................................ ................................................................. ....................................twenty two
2.17
Energy pulse output................................................ ................................................................. ........................................twenty two
2.18 ADCSampling data buffer function........................................ ................................................................. .............................twenty three
3
2.19
Synchronous sampling data buffering function...................................... ................................................................. ............................twenty four
2.20
VREFDigital automatic compensation function
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . twenty four
Communication Interface................................................ ................................................................. ................................................................. .....26
3.1 SPIIntroduction to communication interface................................................ ................................................................. ....................................26
3.2 SPIRead operation........................................ ................................................................. ..................................................27
3.3 SPIWrite operation........................................ ................................................................. ..................................................28
3.4 SPIWriting special command word operations........................................ ................................................................. .............................29
4
register................................................. ................................................................. ................................................................. ........31
4.1
Measurement parameter register................................................ ................................................................. .....................................31
4.1.1 r_YIc................................................ ................................................................. .................................................................31
4.1.2 Phase angle between Ic and reference vector........................ ................................................................. .............................31
4.1.3 YUa................................................ ................................................................. ................................................................. .32
4.1.4 Phase angle between Ua and reference vector........................................ ................................................................. .............................32
4.1.5 YUb................................................ ................................................................. ................................................................. .32
4.1.6 Phase angle between Ub and reference vector........................ ................................................................. .............................32
4.1.7 YUc................................................ ................................................................. ................................................................. .32
4.1.8 Phase angle between Uc and reference vector........................................ ................................................................. .............................32
4.2
Measurement parameter register description................................................ ................................................................. .............................34
4.2.1Power register (address:0x01~0x0C,0x40~0x43,0x57~0x5A) .................................................. ...34
4.2.2Valid value register (address:0x0D~0x013,0x29,0x2B,0x48~0x4D)........................................35
4.2.3Power factor register (address:0x14~0x017)........................................................ ....................................................36
4.2.4Power angle and voltage angle register (address:0x18~0x1A,0x26~0x28)........................................................ .....37
4.2.5Line frequency register (address:0x1C)........................................................ ................................................................. ...38
4.2.6Temperature sensor data register (address:0x2A) .................................................. ........................................38
4.2.7Energy register (address:0x1E~0x25,0x35~0x38,0x44~0x47)........................................................ .......38
4.2.8Fast Pulse Count Register (Address:0x39~0x3C)........................................................ .....................................39
4.2.9Flag status register (address:0x2C)........................................................ ................................................................. ..40
4.2.10
Electric energy register working status register (address:0x1D,0x4E)........................................................ .....................41
4.2.11
Power direction register (address:0x3D)........................................................ .................................................................42
4.2.12
Interrupt flag register (address:0x1B)........................................................ .................................................................42
4.2.13 ADCSampling data register (address:0x2F~0x34,0x3F)........................................................ ..................43
4.2.14
Calibration data checksum register (address:0x3E/5E)........................................................ .............................43
4.2.15
Communication data backup register (address:0x2D)........................................................ ........................................44
4.2.16
Communication checksum register (address:0x2E)........................................................ ....................................................44
4.2.17 SAGflag register (0x4F)................................................ ................................................................. ........................ 44
4.2.18
Peak Voltage Register (0x50~0x52)................................................ ................................................................. ......... 45
4.2.19
chipID(address:0x5D) .................................................. ................................................................. .............45
4.3
Calibration parameter register................................................ ................................................................. ..................................................45
4.4
Calibration parameter register description...................................... ................................................................. ............................47
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page 4 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
4.4.1Mode configuration register (address:0x01)........................................................ ................................................................. ...47
4.4.2 ADCGain configuration register (address:0x02)........................................................ ..................................................48
4.4.3 EMUUnit configuration (address:0x03)........................................................ ................................................................. ...48
4.4.4Power gain compensation register (address:0x04~0x0C) .................................. ........................................49
4.4.5Phase correction register (address:0x00D~0x12,0x61~0x63)................................................ .............................50
4.4.6poweroffsetCorrection (address:0x13~0x15,0x21~0x23,0x64~0x69) ........................................ .........50
4.4.7Fundamental wave reactive power phase correction register (address:0x16)........................................ ............................................ 51
4.4.8Voltage gain correction register (address:0x17~0x19) ........................................ ............................................ 51
4.4.9Current gain correction register (address:0x1A~0x1C,0x20)........................................ .............................52
4.4.10
Starting current setting register (address:0x1D) ........................................ ............................................ 52
4.4.11
High frequency pulse constant setting (address:0x1E)................................................ ................................................................. 53
4.4.12
Voltage loss threshold setting register (address:0x1F)................................................ ................................................. 53
4.4.13
Valid valuesoffsetCorrection (address:0x24~0x29,0x6A)................................................ .............................54
4.4.14 ADC offsetCorrection (address:0x2A~0x2F) .................................. ................................................. 54
4.4.15
Interrupt enable register (address:0x30)................................................ ................................................................. ... 55
4.4.16
Analog module enable register (address:0x31)................................................ ..................................................55
4.4.17
All-channel gain register (address:0x32)................................................ ................................................. 56
4.4.18
Pulse doubling register (address:0x33)................................................ ................................................................. ... 56
4.4.19
Fundamental gain register (address:0x34)................................................ ................................................................. ... 57
4.4.20 IOStatus configuration register (address:0x35)................................................ ................................................. 57
4.4.21
Starting power register (address:0x36)................................................ ................................................................. ... 57
4.4.22
Phase compensation area setting register (address:0x37/0x60) ........................................ .............................58
4.4.23 SAGData length setting register (0x38)........................................ ................................................................. . 58
4.4.24 SAGDetection threshold setting register (0x39)................................................ ................................................................. . 58
5
4.4.25
Overcurrent detection threshold setting register (0x71)................................................ ................................................................. . 59
4.4.26
Automatic temperature compensation related registers (0x6B~0x6F)(New) ........................................ .....................59
4.4.27
Algorithm Control Register (0x70)................................................ ................................................................. .............60
Electrical Specifications................................................ ................................................................. ................................................................. .....62
5.1
6
Electrical Parameters........................................ ................................................................. .................................................................62
Calibration process................................................ ................................................................. ................................................................. ...63
School Timetable and Recommendations........................................ ................................................................. ................................................................. ...64
7
Chip packaging................................................ ................................................................. ................................................................. .....66
8
typical application................................................ ................................................................. ................................................................. .....67
8.1
Obtained from sampled dataFFTRecommendation process................................................ ................................................................. ...........67
8.2
Recommended process for sub-harmonic analysis of synchronized buffered data........................................ ................................................................. ........67
8.3
Typical application circuit schematic................................................ ................................................................. ............................67
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page 5 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
1
Chip overview
1B
1.1 Chip Introduction
ATT7022E/26E/28EA series of multi-functional and high-precision three-phase electric energy special metering chips, suitable for three-phase three-wire and three-phase four-wire applications.
ATT7022E/26E/28EIntegrated multi-channel second-ordersigma-delta ADC, reference voltage circuits and digital signal processing circuits for all power, energy, effective value, power factor and frequency
measurements, capable of measuring active power, reactive power, apparent power, active energy and reactive power of each phase and the combined phase At the same time, it can also measure the
current, voltage effective value, power factor, phase angle, frequency and other parameters of each phase, fully meeting the needs of three-phase multi-rate multi-functional energy meters. Please refer to
the parameter register section for detailed data definitions.
ATT7022E/26E/28ESupports full digital domain gain and phase correction, that is, pure software calibration. Active and reactive energy pulse outputCF1, CF2Provides instantaneous active and reactive
power information, which can be directly connected to the standard meter for error correction. For detailed calibration methods, please refer to the Calibration Methods section.
ATT7022E/26ETwo types of apparent power and energy measurement methods are provided:RMSapparent way andPQSapparent way, throughCF3The output apparent energy
pulse can be connected to a standard meter for apparent energy error correction.
ATT7022EProvide fundamental wave parameter measurement: fundamental wave active power, fundamental wave active electric energy, fundamental wave current, voltage effective value, through pulse outputCF4
Provides instantaneous fundamental wave active power information, which can be directly used for correction of the fundamental wave.
ATT7022E/26E/28Eprovide aSPIinterface for easy communication with externalMCUMeasurement and calibration parameters are transferred betweenSPIFor specific specifications of the interface,
seeSPIIn the detailed description section, all measurement parameters and calibration parameters can be passedSPIInterface readout.
ATT7022E/26E/28EThe built-in voltage monitoring circuit can ensure normal operation when powered on and off.
1.2 Chip characteristics
-
High accuracy over the input dynamic operating range (5000:1), the nonlinear measurement error is less than0.1% Active
power measurement satisfies0.2S,0.5S,supportIEC62053-22:2003,GB/T17215.322-2008 Reactive power measurement
meets1class,2level, supportIEC62053-23:2003,GB/T17215.323-2008 Provide fundamental active power/electric energy/
voltage/current rms value andCFPulse output providesRMS,PQSTwo types of apparent power and energy measurement
(optional) provide active power, reactive power, apparent power/electric energy andCFThe pulse output provides power
factor, phase angle, line frequency, and voltage angle parameters.
Provide voltage effective value, current effective value, in500:1dynamic range, rms accuracy better than0.1% Provides
effective value output of three-phase voltage vector sum and current vector sum
Provides phase failure indication and voltage/current phase sequence detection functions
Interrupt support: zero-crossing interrupt, sampling interrupt, energy pulse interrupt, calibration interrupt provides
active and reactive power reverse indication function
The absolute value addition and algebraic addition of conjunction energy are optional.
Adjustable meter constant
Starting current is adjustable
Can accurately measure up to41Sub-harmonic active, reactive and apparent power, electric energy support gain
and phase compensation, small current nonlinear compensation
haveSPICommunication interface, speed up to10Mbps Built-in
temperature measurement sensor
Applicable to three-phase three-wire and three-phase four-wire modes
On-chip reference voltage, external reference voltage can also be connected
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page6 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
-
Provide power quality testingSAGfunction and can be used for flicker analysis (ATT7022E) Provides
synchronous sampling data to facilitate sub-harmonic analysis without preprocessing (ATT7022E). supply
1k*16bit ADCData cachebuffer Provide pulse doubling function to facilitate small signal calibration
supportROSICoil
useLQFP44encapsulation
3.3Vpowered by
crystal5.5296MHz
1.3 Chip comparison list
ADCsampling
Chip model
Active power metering
ATT7022E
Y
ATT7026E
ATT7028E
Reactive power metering
No.7roadADC
SAGDetection
Y
Y
Y
N
N
N
N
N
N
N
N
apparent measurement
Fundamental harmonics
Y
Y
Y
Y
Y
Y
Y
N
N
Data cache
Note: No.7Channel and power quality detectionSAGfunction, fundamental harmonic function and data buffering function areATT7022EProprietary.
1.4 Overall block diagram
CLKIN CLKOUT
DEC filter
2levelADC
PGA
2levelADC
DEC filter
PGA
V1P
V1N
PGA
V0P
V0N
2levelADC
DEC filter
Clock
Generator
AVCC AGND
LVREF
Power
Monitor Unit
VDD1P8
DVCC
DGND
TEST
V2P
V2N
CF1
CF2
CF3
CF4
Pulse
output
2levelADC
PGA
V4P
V4N
PGA
V3P
V3N
2levelADC
DEC filter
SDO
SDI
EMU
SCLK
CS
DEC filter
Reset
V6P
V6N
Vref
2levelADC
DEC filter
PGA
V5N
PGA
V5P
2levelADC
DEC filter
Voltage
Reference
Temperature
sensor
Register
General
Interface
SEL
IRQ
ADC
REVP
picture1-4-1
ATT7022E/26E/28EOverall chip block diagram
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page7 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
1.5 Pin definition
NC
TEST
GND
CF2
CF1
SEL
CF4
CF3
NC
GND
SLEEP
ATT7022E/26E/28EThe series adoptsLQFP44Package form:44Pin LQFP(10x10)
ATT7022E
12 13 14 15 16 17 18 19 20 21 22
34 35 36 37 38 39 40 41 42 43 44
VCC
CS
SCLK
DIN
DOUT
VDD
REVP
VCC
OSCI
OSCO
GND
V0N
V0P
V6N
V6P
AVCC
V4N
V4P
AGND
V2N
V2P
AVCC
12 13 14 15 16 17 18 19 20 21 22
33 32 31 30 29 28 27 26 25 24 23
NC
NC
V6N
V6P
AVCC
V4N
V4P
AGND
V2N
V2P
AVCC
NC
TEST
GND
V3P
V3N
AGND
V5P
V5N
AGND
CF2
CF1
SEL
REFCAP
V1P
V1N
NC
CF3
NC
IRQ
GND
SLEEP
RESET
1 2 3 4 5 6 7 8 9 10 11
33 32 31 30 29 28 27 26 25 24 23
CS
SCLK
DIN
DOUT
VDD
REVP
VCC
OSCI
OSCO
34 35 36 37 38 39 40 41 42 43 44
VCC
ATT7026E
GND
V3P
V3N
AGND
V5P
V5N
AGND
REFCAP
V1P
V1N
IRQ
RESET
1 2 3 4 5 6 7 8 9 10 11
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page8 of 67
NC
TEST
GND
NC
CF1
SEL
NC
NC
NC
GND
SLEEP
ATT7022E/26E/28E User Manual (P73-13-45)
CS
SCLK
DIN
DOUT
VDD
REVP
VCC
OSCI
OSCO
34 35 36 37 38 39 40 41 42 43 44
VCC
12 13 14 15 16 17 18 19 20 21 22
33 32 31 30 29 28 27 26 25 24 23
ATT7028E
GND
NC
NC
V6N
V6P
AVCC
V4N
V4P
AGND
V2N
V2P
AVCC
picture1-5-1
V3P
V3N
AGND
V5P
V5N
AGND
REFCAP
V1P
V1N
IRQ
RESET
1 2 3 4 5 6 7 8 9 10 11
ATT7022E/26E/28EPin configuration
sheet1-1
Pin number
PIN name
1
Reset
enter
2
IRQ
output
Pin function
characteristic
Function description
External reset, active low level, Schmitt Trigger type; internal 47K pull-up
resistor.
After power-on reset, the IRQ signal becomes low, and becomes high after writing the calibration parameters;
after the internal IRQ function is enabled, when this event occurs, the IRQ signal outputs a low level, and after
reading the interrupt flag register, the pin becomes high. .
Channel 1 (Current Channel) Positive and Negative Analog Input Pins. Fully differential
3,4
V1P/V1N
enter
input mode, the maximum signal level in normal operation is ±0.7Vp. Channel 1 has a PGA.
For its gain selection, please refer to the register section. Both pins have ESD protection
circuits inside.
5
REFCAP
output
The reference is 1.2V and can be connected externally; this pin should be decoupled using a 10μF capacitor in
parallel with a 0.1uF ceramic dielectric capacitor.
Channel 3 (Current Channel) Positive and Negative Analog Input Pins. Fully differential
6,7
V3P/V3N
enter
input mode, the maximum signal level in normal operation is ±0.7Vp. Channel 3 has a PGA.
For its gain selection, please refer to the register section. Both pins have ESD protection
circuits inside.
8,11,15
AGND
The ground reference point for the analog circuitry (i.e. ADC and reference source), this pin should be
reference place
connected to the analog ground of the PCB.
Channel 5 (current channel) positive and negative analog input pins. Fully differential input
9,10
V5P/V5N
enter
mode, the maximum signal level in normal operation is ±0.7Vp. Channel 5 has a PGA. For
its gain selection, please refer to the register section. Both pins have ESD protection
circuits inside.
This pin provides the power supply for the analog circuit. The normal operating power supply voltage should
12,18
AVCC
power supply
be maintained at 3.3V±10%. In order to reduce the ripple and noise of the power supply to a minimum, this
pin should be connected with a 10μF capacitor in parallel with a 0.1uF ceramic capacitor. Decoupling.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page9 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Positive and negative analog input pins for channel 2 (voltage channel). Fully differential
13,14
V2P/V2N
enter
input mode, the maximum input voltage in normal operation is ±0.7Vp, and both pins have
ESD protection circuits inside.
Positive and negative analog input pins for channel 4 (voltage channel). Fully differential
16,17
V4P/V4N
enter
input mode, the maximum input voltage in normal operation is ±0.7Vp, and both pins have
ESD protection circuits inside.
Positive and negative analog input pins for channel 6 (voltage channel). Fully differential
19,20
V6P/V6N
enter
input mode, the maximum input voltage in normal operation is ±0.7Vp, and both pins have
ESD protection circuits inside.
Positive and negative analog input pins for channel 0 (voltage channel). Fully differential
21,22
V0P/V0N
23,33,44
GND
TEST
enter
input mode, the maximum input voltage in normal operation is ±0.7Vp, and both pins have
ESD protection circuits inside.
Note: ATT7026E/ATT7028E does not have this pin, it is NC
twenty four
reference place
enter
32
SLEEP
enter
25,29
NC
——
26
SEL
enter
27
CF1
output
28
CF2
output
Digital ground pin
The test pin must be connected to ground during application.
Sleep mode control pin, high effective, that is, pull it high to enter sleep mode, power consumption
is 1uA, pull it low and the chip works normally.
Not connected.
Three-phase three-wire low level, three-phase four-wire high level selection, Schmitt
Trigger type; internally programmable as 300k pull-up resistor or floating.
Frequency calibration output (high-level pulse) is used for active power calibration; it can
also be used for active energy measurement.
Frequency verification output (high-level pulse) is used for reactive power verification; it can also be
used for reactive energy measurement.
Note: ATT7028E does not have this pin, it is NC
Frequency calibration output (high-level pulse) is used for apparent power calibration; it can also be used for
30
CF3
output
apparent electric energy measurement.
Note: ATT7028E does not have this pin, it is NC
Frequency verification output (high-level pulse) is used for verification of fundamental wave active power; it can
31
CF4
output
also be used for fundamental wave active energy measurement.
Note: ATT7026E/ATT7028E does not have this pin, it is NC
Digital power supply pin; the normal operating power supply voltage should be maintained at 3.3V±5%. This
34,41
VCC
power supply
35
CS
enter
pin should be decoupled with a 10μF capacitor in parallel with a 100nF ceramic capacitor.
Select signal, which is part of the SPI interface; generated by the Host MCU,
active low, if CS is high, DOUT is in a high-impedance state, Schmitt Trigger
type. Internally programmable as 300k pull-up resistor or floating.
The serial clock configured for the synchronous serial interface is generated by the Host
36
SCLK
enter
MCU. This pin is of Schmitt Trigger type, which can easily receive the signal transmitted by
the optocoupler. Internally programmable as 300k pull-up resistor or floating.
Data input of the serial interface; from Host MCU; SCLK falling edge is
37
DIN
enter
valid data, Schmitt Trigger type. Internally programmable as 300k pullup resistor or floating.
38
DOUT
output
39
VDD
power supply
40
REVP
The data output of the serial interface; the rising edge of SCLK emits data; the falling edge
is valid data.
Digital power supply 1.8V output. Connect an external 10μF tantalum capacitor in parallel with a 100nF ceramic dielectric
capacitor for decoupling.
output
42
OSCI
enter
43
OSCO
output
Logic output, when any phase power is negative, the output is high; when all three phases
are detected to be positive power again, the output of this pin is low.
The input terminal of the system crystal oscillator, or the input of the external system clock. (5.5296MHz
recommended), the 10M resistor of the oscillator circuit has been integrated inside.
The output terminal of the crystal oscillator.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page10 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
1.6 Application diagram
/RST
UA
IA
1.2K
IRQ
33nf
Reset
1.2K
33nf
1.2K
5R1
33nf
SPI
E/26E/28
5R1
1.2K
ATT7022
MCU
33nf
EHigh precision
LCDshow
module
Multifunctional three
UB
andAconnect
UC
Phase electric energy
Communication module
Lines are the same
Measuring core
piece
IB
IC
EEPROM
andAconnect
Lines are the same
OSCO
OSCI
5.5296MHz
picture1-6-1Application diagram
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page11 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
2
Function description
2B
2.1 Power management
ATT7022E/26E/28EThe chip contains a set of power monitoring circuits to continuously monitor the analog power supply.
(AVCC)Monitor. When the supply voltage is lower than2.5V±5%, the chip will be reset. This is conducive to the correct startup and
normal operation of the chip when the circuit is powered on and off. The power supply monitoring circuit is arranged in the delay and
filtering links, which prevents errors caused by power supply noise to the greatest extent, as shown in the figure2-1shown. In order to
ensure the normal operation of the chip, the power supply should be decoupled, so thatAVCCThe fluctuation does not exceed3.3V±5%.
3.3V
2.5V
reset
2.2 SLEEP mode
run
reset
picture2-1-1On-chip power monitoring features
WillSleeppin(pin 32)pull up,ATT7022E/ATT7026E/ATT7028EEnter sleepmode, in
picture2-1-1Power monitoring
sleepIn mode, calibration parameters0x01~0x1Fsave whenSleepAfter pulling
down,ATT7022E/ATT7026E/ATT7028ERe-enter normal work.
2.3 Reset system
ATT7022E/26E/28ETwo reset directions are provided: hardware reset and software reset.
hardware reset:
via external pinRESETFinish,RRSETThere are internal pins47KPull-up resistor, so it is high level during normal operation. WhenRESETappears
greater than20usof low level,ATT7022E/26E/28EEnter the reset state whenRESETgoes high whenATT7022E/26E/28EIt will enter the normal working
state from the reset state.
software reset:
passSPIThe interface is completed, when going toSPIoral write0xD3After the command is issued, the system will be reset once. After the resetATT7022E/26E/28E
Start running from the initial state.
ATT7022E/26E/28Ein reset stateIRQThe signal is high level whenATT7022E/26E/28EAfter power-on reset to working state, approximately25msabout,IRQ
It will change from high level to low level. At this time, the chip begins to enter the normal working state, and then the calibration data can be written. Once
the calibration data is written,IRQIt will immediately become high level again.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page12 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
picture2-3-1System reset timing diagram
2.4 A/D conversion
ATT7022E/26E/28EThe chip integrates multiple19bitADC, adopts double-ended differential signal input, and inputs the maximum sinusoidal signal (full scale). The
effective value is0.5V, it is recommended that the voltage channelUncorresponding toADCThe input is selected as a valid value0.22Vleft and right, while the current channel
IbtimelyADC Enter a valid value0.05Vabout. Reference voltageRefcapTypical values are1.2V.
ATT7022E/26E/28EinternalADCSystem Block Diagram:
picture2-4-1 ADCInternal block diagram
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page13 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
2.5 Power quality measurement
2.5.1
SAGFunction
7022EThe detection method is: taking half cycle as unit (2between zero crossing points), findADCThe maximum absolute value of the sampled value.
The criterion for voltage sag of a certain phase is: the height of the peak value of the absolute value of the sampled value of the voltage waveform of the phase16bit less thanSAGThreshold setting register
SAGLVL(Calibration parameters0x39)The setting value ofSAGLength setting registerCyclength(Calibration parameters0x38) set
If the half-cycle wave number is equal to the half-cycle wave number, it is determined that the voltage of the phase drops suddenly. whenCyclength=0x0000when, closeSAGFunction.
When a phase voltage sag occurs, at the same timeSAGThe flag is set, that isSAGFlag(Metering parameters0x4F)The phase in the registerSAGUx(x=A,
B,C) register location1, and the interrupt flagINTFlagRegister (metering parameter0x1B)middleSAGIFThe register bit is also set at the same time1. Arakan
turned onSAGinterrupt i.e.EMUInterrupt configuration registerEMUIE(Calibration parameters0x30)middleSAGIE=1,SAGIFset1will lead toIRQInterrupt.
clearSAGIFAt the same time, the interrupt will be cleared.SAGFlagin registerSAGUxThe logo was also cleared at the same time.
Regardless of whether a voltage sag occurs,7022Ewill each phaseCyclength(Calibration parameters0x39) The maximum value among the half-cycle wave numbers is stored in
CorrespondingPEAKRegister (metering parameter0x50~0x52).
PEAKThe value read by the register is in peak complement form (a negative number indicates that the maximum value of the absolute peak value appears in the negative half cycle), which is the same as the effective value register.
The relationship is2times.
2.5.2
Overcurrent detection function
The criterion for overcurrent of a certain phase current is: the height of the peak value of the absolute value of the sampled value of the phase current waveform.16bit greater than current threshold setting register
OILVL(Calibration parameters0x71)If the set value is , then the phase current is judged to be overcurrent; the detection time isCyclengthThe set number of half cycles, andSAG
Set shared registerCyclength(Calibration parameters0x38).OILVL=0, turn off this function.
When overcurrent occurs in a certain phase, the overcurrent flag is set at the same time, that is,SAGFlag(Metering parameters0x4F)The corresponding phase in the registerOVIx(x=A,
B,C) register location1, while interrupt flagINTFlagRegister (metering parameter0x1B)middleOVIIFregister location1. If it has been turned on
The flow is interrupted, i.e.EMUInterrupt configuration registerEMUIE(Calibration parameters0x30)middleOVIIE=1,OVIIFset1will lead toIRQInterrupt. clearOVIIF
At the same time, the interrupt will be cleared.SAGFlagin registerOVIxThe logo was also cleared at the same time.
2.5.3
Flicker function implementation plan
by settingCyclength=1,Every10mSread oncePeakvalue, all half-wave effective values can be obtained for flicker voltage calculation. continuous reading
Pick60000half-wave peak value, you can calculate10minutes of short-term flicker; based on the short-term flicker results, long-term flicker can also be calculated.
See the "Flicker Algorithm" document for details.
2.5.4
Voltage phase sequence detection
ATT7022E/26E/28EProvide voltage phase sequence detection function, the voltage phase sequence detection basis for three-phase four-wire and three-phase three-wire modes is incomplete.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page14 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
All the same.
In three-phase four-wire mode: Voltage phase sequence detection is based onA/B/CThe zero-crossing sequence of the three-phase voltage is judged. The basis for the correct voltage phase sequence is:
whenAAfter the phase voltage crosses zero,BThe phase voltage crosses zero, and thenCThe phase voltages cross zero, otherwise the voltages are out of sequence. In addition, as long asA/B/CThree phases
When there is no voltage input to any phase of the voltage,ATT7022E/26E/28EIt is also thought to be voltage mis-sequence.
In three-phase three-wire mode: Voltage phase sequence detection is based onAPhase voltage andCJudgment based on the angle between phase voltages: whenAphase andCphase voltage angle
exist300The voltage phase sequence is considered to be normal only when the voltage is about 100 degrees. Otherwise, the voltage phase sequence is judged to be out of order.
2.5.5
Current phase sequence detection
ATT7022E/26E/28EProvides current phase sequence detection function.
In three-phase four-wire mode: Current phase sequence detection is based onA/B/CThe zero-crossing sequence of the three-phase current is judged. The basis for the correct current phase sequence is:
whenAAfter the phase current crosses zero,BThe phase current crosses zero, and thenCThe phase currents cross zero, otherwise the currents are out of sequence. In addition, as long asA/B/CThree phases
Any phase current in the current is lost,ATT7022E/26E/28EIt is also thought to be a mis-sequence of currents.
In three-phase three-wire mode: Current phase sequence detection is based onAPhase current andCJudgment based on the angle between the phase currents: whenAphase andCphase current angle
exist120The current phase sequence is considered to be normal only when the current phase sequence is about 100 degrees.
2.5.6
Voltage angle measurement
ATT7022E/26E/28EThe voltage angle measurement accuracy is0.1degree and provides three registersY U,Y U,ikBDistinguishing table
ShowAB/AC/BCThe angle between voltages, the range is0~360Spend. The data update time is3Hz.
2.5.7
Measurement of voltage and current phase angle
ATT7022E/26E/28EProvide phase angleϕdetection function,ϕExpressed as±180°.
2.5.8
Power factor measurement
f=
Power factor calculation formula:
2.5.9
abs(P)
abs(S)
Voltage frequency measurement
ATT7022E/26E/28ECan directly output voltage and frequency parameters,ATT7022E/26E/28ECan be automatically selectedA/B/Cof the three phases
Any phase voltage is the reference for voltage frequency measurement, and a low-pass filter with stable zero-crossing point is added, which can effectively reduce noise and harmonic interference.
interference influence, the voltage line frequency can be measured more accurately and reliably, with an accuracy of0.01Hz.
2.5.10Loss of pressure detection
ATT7022E/26E/28Ecan be adjusted according to the set threshold voltageA/B/CDetermine whether the three-phase voltage loses voltage. The threshold voltage can be passed
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page15 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Overvoltage threshold setting registerFailVoltageMake settings.ATT7022E/26E/28EAfter power-on reset, the voltage loss threshold setting will be based on the current
The selected operating mode (three-phase three-wire/three-phase four-wire) is set to different parameters by default. When the voltage effective value is not corrected, the three-phase
The voltage loss threshold of the four-wire mode corresponds to the voltage channel input50mVleft and right, and the voltage loss threshold of the three-phase three-wire mode corresponds to the voltage channel input
150mVabout. If the voltage effective value is corrected, the voltage loss threshold setting register must be resetFailVoltage,set up
For methods, refer to the pressure loss threshold setting section.
2.6 Effective value measurement
2.6.1
Current RMS measurement
It is obtained by performing a series of operations such as square, square root and digital filtering on the current sampling value. Current channel input effective value500mVarrive
1mVThe error of the current effective value when the signal is less than0.2%.
picture2-6-1-1Current RMS measurement
2.6.2
Voltage rms measurement
It is obtained by performing a series of operations such as square, square root and digital filtering on the voltage sample value. Voltage channel input effective value500mVarrive
1mVsignal, the error of the effective value of the voltage is less than0.2%.
picture2-6-2-1Voltage rms measurement
2.7 Active power measurement
2.7.1
Active power calculation
The active power of each phase is calculated by multiplying, adding, and digitally filtering the current and voltage signals after removing the DC component.
Obtained after word signal processing. Voltage and current sampling data include up to41harmonic information, so according to the formula
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page16 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
P=
1 ∑N(U(n)×I(n))The calculated active power also contains at least41Subharmonic information. The measurement principle diagram of active power is as follows:
Nn=0
As shown in the figure, the combined active powerPt=Pa+Pb+PC.
picture2-7-1-1Active power measurement
picture2-7-1-2Active power and energy measurement
2.7.2
Active energy calculation
Active energy is obtained by integrating instantaneous active power over time. The calculation formula of single-phase active energy is:
Ep=∫p(t)dt
.
The combined active energy can be accumulated in algebraic or absolute value mode depending on the settings. Algebra and Patterns
Ept=Epa+Epb+Epc, while the absolute value plus mode
Ept=Epa+Epb+Epc
. as the picture shows.
picture2-7-2-1Active energy measurement
2.8 Reactive power measurement
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page17 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
2.8.1
Reactive power calculation
∞
∑(Un×In×sin(ϕ)), reactive power meter
According to the definition formula of true reactive power (sinusoidal reactive power), reactive powerQ=
k=1
The quantity algorithm is similar to the active power, except that the voltage signal uses phase shifting90degree, the phase shift method adoptsHilbertfilter. Measurement bandwidth is mainly
Limited by the bandwidth of the digital phase-shifting filter,ATT7022E/26EThe measurement bandwidth of reactive power can also be up to41subharmonic.
picture2-8-1-1Reactive power measurement
2.8.2
Reactive energy calculation
Reactive energy is obtained by integrating instantaneous reactive power over time. The calculation formula of single-phase reactive energy is:
Eq.= ∫q(t)dt
. combine
The phase reactive energy can be accumulated in algebraic or absolute value mode depending on the settings. Algebra and PatternsEqt=Eqa+Eqb+Eqc,
And the absolute value plus mode
Eqt=Eqa+Eqb+Eqc
,as the picture shows.
picture2-8-2-1Reactive energy measurement
2.9 Apparent calculation
2.9.1
Apparent power calculation
There are two types of calculation formulas for apparent power:
PQSApparent power (formula 1):S=
P2+Q2
RMSApparent power (formula 2):S=Urms*Irms
ATT7022E/26ETwo types of calculation methods are provided, and users can choose to use any calculation formula through register configuration.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page18 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
usePQSApparent power (Formula 1) The apparent power value achieved. As shown below.
picture2-9-1-1Apparent power measurement
Regarding the combined apparent power,ATT7022E/26EAccording to Formula 1, it is calculated based on the combined active power and combined reactive power,
As shown below.
picture2-9-1-2Combined apparent power measurement
according toRMSThe apparent power value achieved by the apparent power formula 2 is shown in the figure below.
picture2-9-1-3Apparent power measurement
2.9.2
Apparent energy calculation
Apparent energy defines the integral of apparent power over time. Since there are two types of calculation formulas for apparent power,ATT7022E/26Esupply
The apparent energy of these two types is selected through the register control bits.
According to the formulaS=P2+Q2calculatePQSApparent energy, as shown in the figure below.
T
T
T
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page19 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
picture2-9-2-1Conjunction apparent energy measurement
According to the formulaST=Ura*Ira+Urb*Irb+Urc*IrccalculateRMSApparent energy, as shown in the figure below.
picture2-9-2-2Apparent energy measurement
2.10 Fundamental harmonic function
ATT7022EOriginally, it only had the fundamental wave function, providing fundamental wave voltage/current effective value, fundamental wave active power, and fundamental wave electric energy.
new versionATT7022EIt is necessary to provide fundamental wave/harmonic effective value, fundamental wave/harmonic active power, and active electric energy. Among them, fundamental wave/harmonic enable control
Or through register bitsHAREn (Calibration parameters0x03.bit10)Enable, and pass the register (calibration parameter0x70 bit5)EnHarmoniccarry out base
To switch between wave measurement and harmonic measurement, the specific command is:EnHarmonic=1When is the harmonic measurement, =0For fundamental wave measurement.
2.11 Judgment of power direction
ATT7022E/26E/28EProvides real-time power direction indication to facilitate four-quadrant power measurement. negative power indicationREVP: When detected
The active power of any one of the three phases is negative, thenREVPOutput high level until the next time all active power is detected to be positive,REVP
before returning to low level.
Note that when a certain phase power is in latent motion, the direction of the phase power value does not affectREVPstatus;REVPThe status needs to be sent out by the chip
The normal indication is only after the first pulse, otherwiseREVPAlways at a low level.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page20 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
2.12 Starting/Creep
ATT7022E/26E/28ETwo methods are provided to realize the starting and creeping of energy measurement:
Current threshold judgment method: That is to judge whether the current is less than the starting threshold to realize the judgment of starting and creeping. whenATT7022E/26E/28E
When it is detected that the current of a certain phase is greater than the starting threshold, the energy of this phase starts to be measured, that is, starting can be started, and when it is detected that the current of a certain phase is less than the starting threshold
At the threshold, the energy of this phase stops measuring, that is, it is in a latent state.
Power threshold judgment method: That is, it is judged whether the active power and reactive power are both less than the starting power threshold to achieve creeping. when
ATT7022E/26E/28EWhen it is detected that the active power or reactive power of a certain phase is greater than the starting power threshold, the energy of this phase starts to be measured, that is, starting.
When the active power and reactive power of a certain phase are less than the starting power threshold at the same time, the energy of this phase stops measuring, that is, creeping.
Note: It is recommended to use the power threshold judgment method to set the value more accurately.
2.13 Hardware port detection
ATT7022E/26E/28EIt can automatically detect the hardware port. When the hardware port changes, the system will automatically reset and restart.
ATT7022E/26E/28EThe external port inputs mainly includeSEL, used to select whether the chip works in three-phase three-wire or three-phase four-wire mode.
2.14 On-chip temperature detection
ATT7022E/26E/28EBuilt-in temperature sensor and provides a8bitADCSampling and outputting the ambient temperature with a resolution of0.726℃
/LSB.
2.15 Fundamental wave measurement function
ATT7022E/26E/28ESpecially provides fundamental wave active energy measurement function to separate the fundamental wave components in voltage and current signals.
Directly provide accurate fundamental wave active power and fundamental wave active energy measurement. Among them, the fundamental wave voltage/current effective value, the fundamental wave active power
Do not put them in different registers, so that users can obtain fundamental wave and full wave data at the same time to calculate the distortion rate. The fundamental wave active energy pulse passes throughCF4lose
out.
The fundamental wave extraction filter is used to complete the fundamental wave measurement function.3Second-rate(150Hz)The above harmonic signals are attenuated, leaving only the fundamental
Wave component, harmonic attenuation rate is -30dBabove.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page21 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
2.16 Three-phase three-wire/four-wire application
Three-phase four-wire mode:ATT7022E/26E/28EUsing the three-element measurement method, the combined phase power calculation formula is:
Three-phase three-wire mode:ATT7022E/26E/28EUsing the two-element measurement method, the combined phase power calculation formula is:
In three-phase three-wire modeATT7022E/26E/28EofBThe phase channel does not participate in power measurement, onlyAHarmonyCphase channel participates in three phase three
Line measurement. butATT7022E/26E/28EcanBThe parameters of the channel are released separately, as long as theBOn the voltage and current channels of the phase channel
Add corresponding signals, which can still be read in three-phase three-wire mode.Pb/Qb/Sb/Urmsb/Irmsb/Pfb/Pgbparameters, butBChannel voltage and power
The signal added to the flow channel will not have any adverse effects on the normal measurement of three-phase three-wire.
In addition, in three-phase three-wire mode.UrmsbRegister selectableBChannel input signal, you can also choose to calculate it directly through the internal vector method
uacValid values.
2.17 Energy pulse output
4high frequency pulse outputCF1/CF2/CF3/CF4,The corresponding relationship is as follows:
pulse pin
Output energy
CF1
Full wave active energyPF
CF2
Full wave reactive energyQF
CF3
Full wave apparent powerSF
CF4
Fundamental active energyPoF
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page22 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
picture2-17-1Energy pulse output
After the voltage and current signals are transformed, they are multiplied in the power measurement signal processing circuit until the instantaneous power is obtained, and then integrated over time to become electrical energy.
signal, depending on the settingsA/B/CThe three-phase power can do absolute value addition or algebraic value addition, and convert the result into a frequency signal, and then press
Divide the frequency according to the frequency division coefficient set by the user to obtain the electric energy pulse output signal that can be used for meter calibration.
The figure below shows the high frequency output constant as64Frequency division diagram at , the pulse width of the electric energy pulse output is90milliseconds, when the pulse period is less than180millimeter
seconds, the electric energy pulse has a duty cycle of1:1equal-width pulse output.
picture2-17-2CFPulse output timing
2.18 ADC sampling data buffer function
ATT7022EThere is a built-in length of1024*16bitcache storage area for real-time savingADCOriginal sampling data for users to
Further analysis. The user sends a command (task start + scheduledchanneldata),ATT7022EIn each sampling period the corresponding
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page23 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
ADCData is saved to the cache until the cache is full. As long as no new command is sent, the cached data will retain the last data.
Users can read cached content at any time. passC1command changegWaveAddress, the user can arbitrarily specify the cache to be read.
Starting address; each time the cache is read, the address will increase by one. When it is greater than the cache length, it will become0.
How to read valid data: The user can wait for more than the corresponding sampling interval before reading the cached content, for example: single pass
Daoshi1024sampling interval, dual channel512sampling interval, and the buffered data sampling rate can be configured through registers. Or, read
Take the address less thanptrWaveFormRdContent. (ptrWaveFormRdforATT7022EThe pointer when storing data internally, corresponding to7E
Content. )
SPIRead data format:high8bitfor0,Low2bytefor16bitofADCdata. The data in multi-channel mode is the actual storage order.
order, withUA UB UCFor example, the data in the cache isUA0 UB0 UC0 UA1 UB1 UC1 …UA340 UB340 UC340
UA341.
2.19 Synchronous sampling data buffer function
In order to facilitate users to realize the sub-harmonic function,ATT7022EAdditional synchronous sampling data buffering function is provided, while7roadADCSame as
Step samples are stored in1024*16bitin the buffer memory.ATT7022EAdjust the sampling rate according to the frequency of the external input signal to achieveEMU
The clock is921.6kHzdown, fixed per cycle64point data. User sends command (0xC5+0x0002) Start the automatic synchronized sampling function,
ATT7022EAfter automatically adjusting the sampling rate according to the frequency information of internal measurement, the synchronous sampling data will be saved into the cache until the cache is full.
As long as a new buffer storage command is not resent, the cached data will remain the last data.
The same user can also use the manual method (0xC5+0x03), according to your ownATT7022EFrequency value calculation synchronization data for metering
coefficients are written to0xC4, adjust the buffered data sampling rate, and then start the synchronous sampling buffering function.
After the synchronous sampling data is stored in the buffer, the user can read the cached content at any time. passC1command changegWaveAddress,
The user can arbitrarily specify the starting address of the cache to be read; each time the cache is read, the address will increase by one. If it is greater than the cache length, it will
become0.
How to read valid data: Users can wait for more than the corresponding sampling interval before reading the cached content. Or, read
address less thanptrWaveFormRdContent. (ptrWaveFormRdforATT7022EThe pointer when storing data internally, corresponding to7EWithin
Allow. )
SPIRead data format:high8bitfor0,Low2bytefor16bitofADCData (complement form).7roadADCData per channel146
data, the storage order is as followsUa,Ub,Uc,Ia,Ib,Ic,In.
2.20 Vref digital automatic compensation function
new versionATT7022E/26EAdd automatic temperature compensation function whenVrefAotu_en=1(Calibration parameters0x70 bit1)time to turn on. At the same time, this function
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page24 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
only inTPSValid only when enabled, that isTPS_En=1(Calibration parameters0x31 bit4)andVrefAotu_en=1(Calibration parameters0x70 bit1)valid.
The working mechanism is as follows:
1,TPSInitial offset correction:
New additionToffsetCalibration register (calibration parameter0x6B)
conductTPSconsistency correction such thatTPSData(Measurement parameters0x2A) value at room temperature (25degree) the output is0x00.
Correction method: direct readingTPSData(Measurement parameters0x2A) at room temperature (25degree) output value, written directlyToffsetCalibration register (calibration register
Table parameters0x6B)That’s it.
The calculation formula of the corrected temperature isTP=25-0.726*TMM.
TMMis the temperature output register (measurement parameter0x2A) is read in two's complement.
2,New additionTgainCorrection register
for compensationTPScoefficient, making the new versionATT7022EofTPSResolution compatible with originalATT7022Eof-0.726/LSB.
Chip direct adjustmentOK, no correction is required.
3, newVrefgainThe compensation curve coefficient ofTCoffA,TCoffB,TCoffC
1)compensateVrefand external resistors (optional20 ppmRecommended coefficients for positive temperature coefficient resistors):0x6D=0xFF11;0x6E=0x2B53;
0x6F=0xD483
2) only compensatesATT7022EselfVrefRecommended coefficients for temperature characteristics:0x6D=0xFF00;0x6E=0x0DB8;0x6F=0xD1DA
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page25 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
3
Communication Interface
3B
3.1 Introduction to SPI communication interface
ATT7022E/26E/28EIntegrate an internalSPISerial communication interface, working in slave mode, using2control lines and two numbers
According to line:CS/SCLK/DIN/DOUT.
CS:Chip Select(INPUT),Allow access to control lines,CSIndicates when a falling edge transition occursSPIThe operation begins,CSA rising edge transition occurs
time meansSPIThe operation ends.
DIN: Serial data input (INPUT), used to transfer data toATT7022E/26E/28Emiddle.
DOUT: Serial data output (OUTPUT), used fromATT7022E/26E/28ERead data from the register.
SCLK:Serial clock (INPUT), controls the transfer rate of data moving out or into the serial port. Data is put on the rising edge and data is taken on the falling edge.
SCLKThe rising edge willATT7022E/26E/28EThe data in the register is placed inDOUTon the output,SCLKThe falling edge willDINUp
Data sampled toATT7022E/26E/28Emiddle,MSBin front,LSBis behind.
ATT7022E/26E/28E SPIThe communication interface uses fixed-length data transmission (a total of4bytes), that is to say each time the data
Communication is1byte command and3bytes of data.
ATT7022E/26E/28Ewith externalMCUofSPIThe typical wiring of the communication interface is as shown in the figure:
picture3-1-1SPITypical wiring diagram
considerSPIThe transmission signal line may be interfered or jittered. You canSPIA small resistor is connected in series with the signal line. This electricity
blockICParasitic capacitance at inputCcombined to create a low-pass filter that eliminatesSPIAny oscillation on the interface signal, a
Generally recommended to use10~100Ωresistance. If the internal capacitance of the digital input terminal is not large enough, an external capacitor can be added to this input terminal.
Optional10pFleft and right capacitors. For the selection of these two resistor and capacitor parameters, it should be based onSPIcommunication speed and externalMCUsignal into
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page26 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Analysis is required and some related experiments are required to determine whether the resistance and capacitance values are suitable.
3.2 SPI read operation
ATT7022E/26E/28EThe measurement parameters and calibration parameter registers are passedSPIprovided to externalMCUof.
SPIRead timing diagram:
CS
SCLK
DIN
76543210
DOUT
2019181716151413121110 9 8 7 6 5 4 3 2 1 0
twentytwenty
threetwenty
two one
picture3-2-1Read operation timing
ATT7022E/26E/28EofSPIThe communication format is the same,8bit command,twenty fourbit data,MSBin front,LSBAfter, send8
After bit command, readtwenty fourbit data. in8The bit command bit format is explained as follows:
Bit7:0Indicates read command, used for externalMCUreadATT7022E/26E/28ERegister data
Bit6…0: Indicates the register address, refer to the register definition part
Notice:
passSPIwrite a8 bitsAfter the command word, there may be a waiting time before passingSPIread24bitsThe data. when SCLKFrequency lower than
500kHzWhen , no waiting time is required, that is, the waiting time is0uS;whenSCLKfrequency higher than500kHz, you need to wait 2uS,ATT7022E/
26E/28ESPI_SCLKThe rate is up to10MHz,See w_ModuleCFG( for details0x31)Configuration description.
SPIRead operation example:
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page27 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
3.3 SPI write operation
Data
Command
CS
SCLK
DIN
76543210
2019181716151413121110 9 8 7 6 5 4 3 2 1 0
twenty three
twentytwenty
two one
picture3-3-1Write operation timing
ATT7022E/26E/28EofSPIThe communication format is the same,8bit command,twenty fourbit data,MSBin front,LSBAfter, send8
bit command, followed by writingtwenty fourbit data. in8The bit command bit format is explained as follows:
Bit7:1Indicates write command, used for externalMCUWriteATT7022E/26E/28ERegister parameters
Bit6…0: Indicates the register address, refer to the register definition part
SPIWrite operation example:
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page28 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
3.4 SPI write special command word operation
ATT7022E/26E/28EProvide some special command words to cooperate with software calibration.SPIThe operation process of writing special command words is the same as
SPIThe timing of write operations is consistent.
SPITiming diagram for writing special command words:
Data
Command
CS
SCLK
DIN
76543210
2019181716151413121110 9 8 7 6 5 4 3 2 1 0
twenty three
twentytwenty
two one
picture3-4-1Writing special command word operation timing
ATT7022E/26E/28EofSPIThe communication format is the same,8bit command,twenty fourbit data,MSBin front,LSBAfter, send8
bit command, followed by writingtwenty fourbit data. in8The bit command bit format is explained as follows:
Bit7/6:1 1Indicates writing special command words
Bit7/6:1 0Indicates write command, used for externalMCUrenewATT7022E/26E/28ECalibration data
Bit7/6:0XIndicates read command, used for externalMCUreadATT7022E/26E/28EParameters
Bit5…0: Indicates the type of special command words
Instructions for using special commands:
ATT7022E/26E/28EThe special commands provided mainly include:0xC0,0xC1,0xC3,0xC4,0xC5,0xC6,xC9and0xD3.
special command
Order
Character
Sampling data buffer
0xC0
24 bit
Command description
data
0x00CCCX
Write 0x00CCCx to start waveform data buffering, other data is invalid. Here x
represents the channel number that needs to save data, 0 to B are valid,
rush start command
corresponding in order:
Ua/Ia/Ub/Ib/Uc/Ic/In/Ua+Ia/Ub+Ib/Uc+Ic/Ua
+ Ub+Uc/Ia+Ib+Ic
Buffered data read
0xC1
0x000000
0xC3
0x000000
Pointer settings
Clear calibration data
Used to specify the position of reading data. The value is valid in the range of 0 to 1023. If it
exceeds the boundary, it will automatically return to zero.
Send the command word 0xC3, the data bit is 0x000000, you can restore the
contents of the calibration data register to the initial power-on value, and then calibrate the
calibration again.
Synchronous data system
0xC4
0x000120
0xC5
0x000002
Calculation; in manual mode, calculation and writing based on signal frequency.
Number settings
Sync data enabled
move command
In the automatic mode, the synchronization data coefficient is automatically calculated according to the signal frequency.
Synchronize data function start command, write 0x000002 to enable the automatic
data synchronization function; write 0x000003 to enable the manual data synchronization
function; write 0x000000 to stop the data synchronization function. Sync data function
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page29 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
It is valid for a single time and must be stopped and then started before each start.
B232
3…4
N
ame -
1
it
GA1
P
GA0
P
Sy
nc_En
0
Syn
c_sel
Sync_En: =1 starts synchronization data buffering; =0 stops synchronization data
buffering
Sync_sel: =1 selects manual mode; =0 selects automatic mode
Mode
PGA1,0 :
Synchronous sampling data gain coefficient,
0x00/01/10/11 respectively represent gain 1/2/4/8 times (to improve subharmonic accuracy in small signals)
Note: The synchronization buffer function is protected by the write protect command, that is, to
0xC9writing does not equal0x005AWhen the write-protect command is enabled, the synchronous sampling
function cannot be started at this time.
Calibration data reading
out
0xC6
0x00005A
After power-on reset, the parameters of the metering data register are read out by default. hair
Send command 0xC6, the data is not equal to 0x000005A, choose to read the parameters of
the metering data register from 00 to 7FH through SPI. Send command 0xC6, the data is equal
to 0x00005A and select SPI to read the parameters of the calibration data register. At this time,
the value of the measurement parameter register cannot be read. When choosing to read the
parameters of the calibration data register, the value read from the 0x00 address is fixed to
0x00AAAA, otherwise the measurement parameter 0x00 address is 0x705200.
Calibration data writing
0xC9
0x00005A
SPI calibration data register write operation is enabled by default after power-on reset.
Enable
do. Send command 0xC9 and data 0x00005A to enable the SPI calibration write operation. At
this time, the parameters of the calibration data register can be modified through the SPI
port.
Send command 0xC9, the data is not equal to 0x00005A, you can turn off the writing operation of the SPI
calibration register to prevent the calibration data from being mistakenly written by SPI.
software reset
0xD3
0x000000
Send command 0xD3 and data 0x000000 to
reset ATT7022E/26E/28E.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page30 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
4
register
4B
4.1 Measurement parameter register
surface4-1-1Metering parameter register list (Read Only)
address
00H
name
r_DeviceID
Character
long
3
reset value
Function description
0x7122A0
7022E0 Device ID
7026E0 Device ID
7028E0 Device ID
0x7126A0
0x7128A0
01H
r_Pa
3
0x000000
Phase A active power
02H
r_Pb
3
0x000000
B phase active power
03H
r_Pc
3
0x000000
C phase active power
04H
r_Pt
3
0x000000
Combined active power
05H
r_Qa
3
0x000000
Phase A reactive power
06H
r_Qb
3
0x000000
Phase B reactive power
07H
r_Qc
3
0x000000
C phase reactive power
08H
r_Qt
3
0x000000
Combined reactive power
09H
r_Sa
3
0x000000
Phase A apparent power
0AH
r_Sb
3
0x000000
B phase apparent power
0BH
r_Sc
3
0x000000
C phase apparent power
0CH
r_St
3
0x000000
combined apparent power
0DH
r_UaRms
3
0x000000
A phase voltage effective value
0EH
r_UbRms
3
0x000000
B phase voltage effective value
0FH
r_UcRms
3
0x000000
C phase voltage effective value
10H
r_IaRms
3
0x000000
A phase current effective value
11H
r_IbRms
3
0x000000
B phase current effective value
12H
r_IcRms
3
0x000000
C phase current effective value
13H
r_ItRms
3
0x000000
The effective value of the three-phase current vector sum
14H
r_Pfa
3
0x000000
A phase power factor
15H
r_Pfb
3
0x000000
B phase power factor
16H
r_Pfc
3
0x000000
C phase power factor
17H
r_Pft
3
0x000000
Combined power factor
18H
r_Pga
3
0x000000
A phase current and voltage phase angle
/r_YIa
19H
r_Pgb
/Phase angle between Ia and reference vector
3
0x000000
/r_YIb
1AH
r_Pgc
B phase current and voltage phase angle
/Phase angle between Ib and reference vector
3
0x000000
C phase current and voltage phase angle
4.1.1 /r_YIc
4.1.2 Between /Ic and reference vector
phase angle
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page31 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
1BH
r_INTFlag
3
0x000000
interrupt flag,Clear after reading
1CH
r_Freq
3
0x000000
Line frequency
1DH
r_EFlag
3
0x000000
The working status of the energy register, cleared after reading
1EH
r_Epa
3
0x000000
Phase A active energy(Can be configured to clear after reading)
1FH
r_Epb
3
0x000000
Phase B active energy(Can be configured to clear after reading)
20H
r_Epc
3
0x000000
Phase C active energy(Can be configured to clear after reading)
21H
r_Ept
3
0x000000
Combined active energy(Can be configured to clear after reading)
22H
r_Eqa
3
0x000000
Phase A reactive energy(Can be configured to clear after reading)
23H
r_Eqb
3
0x000000
B phase reactive energy(Can be configured to clear after reading)
24H
r_Eqc
3
0x000000
C phase reactive energy(Can be configured to clear after reading)
25H
r_Eqt
3
0x000000
combined reactive energy(Can be configured to clear after reading)
26H
r_YUaUb
3
0x000000
The voltage angle between Ua and Ub
4.1.3 /YUa
4.1.4 Between /Ua and the reference vector
phase angle
27H
r_YUaUc
3
0x000000
The voltage angle between Ua and Uc
4.1.5/YUb
4.1.6 Between /Ub and reference vector
phase angle
28H
r_YUbUc
3
0x000000
The voltage angle between Ub and Uc
4.1.7 /YUc
4.1.8 Between /Uc and reference vector
phase angle
29H
r_RmsADC7
3
0x000000
The effective value of the seventh ADC input signal
2AH
r_TPSD
3
0x000000
Temperature sensor output
2BH
r_UtRms
3
0x000000
The effective value of the three-phase voltage vector sum
2CH
r_Sflag
3
0x000000
Store phase failure, phase sequence, SIG and other flag status
2DH
r_BckReg
3
0x0000000
Communication data backup register
2EH
r_ComChksum
3
0x000000
Communication checksum register
2FH
r_Sample_IA
3
0x000000
Phase A current channel ADC sampling data
30H
r_Sample_IB
3
0x000000
B-phase current channel ADC sampling data
31H
r_Sample_IC
3
0x000000
C-phase current channel ADC sampling data
32H
r_Sample_UA
3
0x000000
Phase A voltage channel ADC sampling data
33H
r_Sample_UB
3
0x000000
B-phase voltage channel ADC sampling data
34H
r_Sample_UC
3
0x000000
C-phase voltage channel ADC sampling data
35H
r_Esa
3
0x000000
Phase A apparent electric energy(Can be configured to clear after reading)
36H
r_Esb
3
0x000000
Phase B apparent electric energy(Can be configured to clear after reading)
37H
r_Esc
3
0x000000
C phase apparent electric energy(Can be configured to clear after reading)
38H
r_Est
3
0x000000
Conjunction apparent electric energy(Can be configured to clear after reading)
39H
r_FstCntA
3
0x000000
Phase A fast pulse counting
3AH
r_FstCntB
3
0x000000
B phase fast pulse counting
3BH
r_FstCntC
3
0x000000
C phase fast pulse counting
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page32 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
3CH
r_FstCntT
3
0x000000
Combined fast pulse counting
3DH
r_PFlag
3
0x000000
Active/reactive power direction, positive direction is 0, negative direction is 1
3EH
r_ChkSum
3
0x01D4CD
Calibration data checksum (in three-phase four-wire mode)
3
0x01E0CD
Calibration data checksum (in three-phase three-wire mode)
3FH
r_InstADC7
3
0x000000
The seventh ADC sampling data output
5CH
r_Vrefgain
3
0x000000
Vref automatic compensation coefficient
5DH
r_ChipID
3
0x000000
Chip version indication register
5EH
r_ChkSum1
3
0x01F2F5
Added calibration register checksum (0x60~0x70)
The following registers are exclusive registers for ATT7022E and are not available for ATT7026E/28E
40H
r_LinePa
3
0x000000
Phase A fundamental wave active power
41H
r_LinePb
3
0x000000
B phase fundamental wave active power
42H
r_LinePc
3
0x000000
C phase fundamental wave active power
43H
r_LinePt
3
0x000000
Combined fundamental wave active power
44H
r_LineEpa
3
0x000000
Phase A fundamental wave active energy (can be configured to be cleared after reading
)
45H
r_LineEpb
3
0x000000
Phase B fundamental wave active energy (can be configured to be cleared after reading
)
46H
r_LineEpc
3
0x000000
Phase C fundamental wave active energy (can be configured to be cleared after reading
)
47H
r_LineEpt
3
0x000000
Combined fundamental wave active energy (can be configured to be cleared after reading
)
48H
r_LineUaRrms
3
0x000000
Fundamental phase A voltage effective value
49H
r_LineUbRrms
3
0x000000
Fundamental B phase voltage effective value
4AH
r_LineUcRrms
3
0x000000
Fundamental C phase voltage effective value
4BH
r_LineIaRrms
3
0x000000
Fundamental A phase current effective value
4CH
r_LineIbRrms
3
0x000000
Fundamental B phase current effective value
4DH
r_LineIcRrms
3
0x000000
Fundamental C phase current effective value
4EH
r_LEFlag
3
0x000000
The working status of the fundamental wave energy register, cleared after reading
4FH
r_SAGFlag
3
0x000000
SAG flag register
50H
r_PeakUa
3
0x000000
Maximum value of phase A voltage
51H
r_PeakUb
3
0x000000
Maximum value of B phase voltage
52H
r_PeakUc
3
0x000000
Maximum value of phase C voltage
53~56H
Reserved
3
0c000000
reserved
57H
r_LineQa
3
0x000000
Phase A fundamental wave reactive power
58H
r_LineQb
3
0x000000
Phase B fundamental wave reactive power
59H
r_LineQc
3
0x000000
C phase fundamental wave reactive power
5AH
r_LineQt
3
0x000000
Combined fundamental wave reactive power
5BH
Reserved
3
0x000000
reserved
5CH
r_Vrefgain
3
0x000000
VrefAutomatic compensation coefficient
5DH
r_ChipID
3
0x000000
Chip version indication register
5EH
r_ChkSum1
3
0x01F2F5
Added calibration register checksum (0x60~0x70)
7EH
r_PtrWavebuff
3
0x000000
Buffer data pointer, indicating that the internal buffer buffer has
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page33 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
There is data length
7FH
3
r_WaveBuff
0x000000
Buffered data register, internal self-gain, repeated reading
Get until the buffer data length is read
4.2 Measurement parameter register description
4.2.1
Power register (address:0x01~0x0C,0x40~0x43,0x57~0x5A) The power register includes:
active power, reactive power, apparent power, and fundamental active power.
Addr
Reg
Addr
Reg
0x01
Pa
0x0B
Sc
0x02
Pb
0x0C
St
0x03
PC
0x40
LinePa
Active Power Register (Pa~Pt)
Bit23
Read:
Write:
Reset:
P23
X
0
0x04
Pt
0x41
LB
0x05
Qa
0x42
0x06
Qb
0x43
0x07
Qc
0x57
0x08
Qt
0x58
0x09
Sa
0x59
0x0A
sb
0x5A
LinePc
LinePt
LineQa
LineQb
LineQc
LineQt
Address：
twenty two
twenty one
P22
X
0
P21
X
0
Rective Power Register
01H~04H
20…3
P20…P3
X
0
Address：
2
P2
X
0
1
P1
X
0
Bit0
P0
X
0
2
Q2
X
0
1
Q1
X
0
Bit0
Q0
X
0
2
S2
X
0
1
S1
X
0
Bit0
S0
X
0
05H~08H
(Qa~Qt)
Read:
Write:
Reset:
Bit23
twenty two
twenty one
Q23
X
0
Q22
X
0
Q21
X
0
Apparent Power Register
(Sa~St)
Bit23
Read:
Write:
Reset:
S23
X
0
Read:
Write:
Reset:
LP23
X
0
Q20…Q3
X
0
Address：
twenty two
twenty one
S22
X
0
S21
X
0
Line active Power Register
(Pa~Pt)
Bit23
20…3
09H~0CH
20…3
S20…S3
X
0
Address：
twenty two
twenty one
LP22
X
0
LP21
X
0
40H~43H
20…3
LP20…LP3
X
0
2
LP2
X
0
1
LP1
X
0
Bit0
LP0
X
0
ATT7022E/26E/28EThe power register is given in complement form, and the highest bit is the sign bit, so according toATT7022E/26E/28E
The direction of active and reactive power given by the power register can directly obtain the current quadrant. Apparent power is always greater than or equal to
At0, so the sign bit of the apparent power is always0.
Power register format definition:
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page34 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
A/B/CSplit phase power parameters:X
X:twenty fourBit data, complement form
ifX>2 2̂3,butXX=X-2 2̂4
otherwiseXX=X
actualA/B/CThe split-phase power parameters are:XXX=XX*K(inKis the power parameter coefficient, common to all power parameters).
A/B/CCombined power parameters:T
T:twenty fourBit data, complement form
ifT>2 2̂3,butTT=T-2 2̂4
otherwiseTT=T
The actual combined phase power parameters are:TTT=TT*2*K(inKis the power parameter coefficient, common to all power parameters).
Unit: The power unit is watt (W),Power coefficientK=2.592*10 1̂0/(HFconst*EC*2 2̂3)
inHFconstfor registerHFconstwrite value,ECis the meter constant.
4.2.2
Valid value register (address:0x0D~0x013,0x29,0x2B,0x48~0x4D)
Addr
Reg
Addr
Reg
0x0D
wxya
0x29
0x0E
ikB
0x48
0x0F
ikB
0x49
0x10
IaRm
0x4A
InRms
LUaRms
LUbRms
LUcRms
0x11
ikB
0x4B
LMs
0x12
ikB
0x4C
ikB
0x13
0x2B
ikB
ItRms
0x4D
LcRms
Voltage Rms Register (Urms)
Bit23
twenty two
twenty one
20…3
2
1
Bit0
Read:
Urms23
Urms22
Urms21
Urms20…Urms3
Urms2
Urms1
Urms0
Write:
Reset:
X
0
X
0
X
0
X
0
X
0
X
0
X
0
Address：
0DH~0FH, 2BH
Current Rms Register (Irms)
Bit23
twenty two
twenty one
20…3
2
1
Bit0
Read:
Irms23
Irms22
Irms21
Irms20…Irms3
Irms2
Irms1
Irms0
Write:
Reset:
X
0
X
0
X
0
X
0
X
0
X
0
X
0
2
1
Bit0
Address：
Line Rms Register (Lrms)
Bit23
twenty two
10H~13H, 29H
Address：
48H~4DH
20…3
twenty one
Read:
Lrms23
Lrms22
Lrms21
Lrms20…Lrms3
Lrms2
Lrms1
Lrms0
Write:
Reset:
X
0
X
0
X
0
X
0
X
0
X
0
X
0
ATT7022E/26E/28EThe valid value register is given in complement form. The highest bit is the sign bit. The valid value is always greater than or equal to
0, so the sign bit of a valid value is always0.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page35 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
PhaseVrms:twenty fourBit data, complement form
The actual effective value of the split-phase voltage is:Urms = Vrms/2 1̂3
The actual effective value of the split-phase current is:Irms = (Vrms/2 1̂3)/N
(Proportional coefficientNDefinition: rated currentIbThe sampling voltage input to the chip is50mVWhen , the corresponding current effective value register value is
Vrms,Vrms/2 1̂3approximately equal to60,at this timeN=60/Ib,Ib=1.5A,N=60/1.5=40,Ib=6A,N=60/6=10
In the same way, when the sampling voltage input to the chip is25mVhour,Vrms/2^13approximately equal to30,Ib=1.5A,N=30/1.5=20,Ib=6A,
N=30/6=5. can be based on the currentIbActual value of current, calculatedNvalue. )
conjunctionVrms:twenty fourBit data, complement form
The actual effective value of the combined phase voltage is:Urms=Vrms/2 1̂2
The actual effective value of the combined phase current is:Irms = (Vrms/2 1̂2)/N (Nis the proportional coefficient, the calculation method is the same as above)
The unit is: Volt (V)or Ampere (A).
Regarding the calculation method of the current vector sum, this article takes into account the three-phase four-wire system using a neutral current transformer and not using a neutral current transformer.
Case:
Which algorithm is used is controlled by the register bitISUMSel(Calibration parameters0x70 bit2)Decide:
whenISUMSel=0, using the algorithm1;
whenISUMSel=1, using the algorithm2.
4.2.3
Power factor register (address:0x14~0x017)
Addr
Reg
0x14
f
0x15
f
Power Factor Register (PF)
Bit23
Read:
Write:
Reset:
PF23
X
0
0x16
fc
0x17
Pft
Address：
twenty two
twenty one
PF22
X
0
PF21
X
0
10H~13H
20…3
PF20…PF3
X
0
2
PF2
X
0
1
PF1
X
0
Bit0
PF0
X
0
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page36 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
ATT7022E/26E/28EThe power factor register is given in complement form. The highest bit is the sign bit. The sign bit of the power factor is the same as the sign bit.
The signs of the power are consistent.
PF:twenty fourBit data, complement form
ifPF>2 2̂3,butPFF=PF-2 2̂4
otherwisePFF=PF
The actual power factor is:pf=PFF/2 2̂3
4.2.4
Power angle and voltage angle register (address:0x18~0x1A,0x26~0x28)
Addr
Reg
0x18
Pga
/YIa
0x19
ikB
/YIb
0x1A
pgc
ikB
Power Angle Register (Pg/YIx)
Bit23
Read:
Write:
Reset:
Pg23
X
0
0x26
YU
/YUa
Address：
twenty two
twenty one
Pg22
X
0
Pg21
X
0
0x27
YU
/YUb
0x28
ikB
/YUc
2
Pg2
X
0
1
Pg1
X
0
18H~1AH
20…3
Pg20…Pg3
X
0
Bit0
Pg0
X
0
The phase angle register is given in complement form, and the high bit is the sign bit, which means -180°~+180angle between °.
θ:twenty oneBit valid data, complement form, high3bits are extended sign bits
If θ>=2 2̂0, then α=θ-2 2̂4
Otherwise α=θ
The actual phase angle is:Pg=(α/2 2̂0)*180Spend
orPg=(α/2 2̂0)*piradian
Voltage to voltage Angle
Register (Ug/YUx)
Bit23
twenty two
twenty one
Ug23
X
0
Ug22
X
0
Ug21
X
0
Read:
Write:
Reset:
Address：
26H~28H
20…3
Ug20…Ug3
X
0
2
Ug2
X
0
1
Ug1
X
0
Bit0
Ug0
X
0
Voltage angle register:twenty onebits of valid data, high3bits are extended sign bits, indicating0°~360angle between °. voltage clamp
The angle measurement accuracy is0.1degree, three voltage angle registersYUaUb/ YUaUc/ YUbUcRespectivelyAB/AC/BCvoltage angle.
θ:twenty onebit data
The voltage angle formula is:YUaUb=(YUaUb/2 2̂0)*180Spend
orYUaUb=(YUaUb/2 2̂0)*piradian
Note: The above is Algorithm 1 (old algorithm);
Algorithm 2 (new algorithm):
According to the sampled signalUa/Ub/UcA certain signal in theUAThe channel is the phase angle reference, thenikBexpressIbandUa
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page37 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
phase angle between. Users can know the phase angle between any two vectors through simple operations, such asIaandIbphase angleYIaIb=YIa-YIb.
Register multiplexing relationship: YUa multiplexes YikBRegister, YUb multiplexed YikBRegister, YUc multiplexing YikBRegister, YIa multiplexing YikB
Register, YIb multiplexing YikBRegister, YIc multiplexing YikBregister.
Which algorithm is used to pass the registerYmodsel(Calibration parameters0x70 bit3)control.
4.2.5
Line frequency register (address:0x1C)
Voltage Frequency Register (Freq)
Bit23
twenty two
twenty one
20…3
Read:
Freq23
Freq22
Freq21
Write:
Reset:
X
0
X
0
X
0
1CH
Address：
2
1
Bit0
Freq20…Freq3
Freq2
Freq1
Freq0
X
0
X
0
X
0
X
0
2
1
Bit0
The voltage line frequency register usestwenty fourGiven in bit's complement form, the highest bit is the sign bit, and the sign bit is always0.
Freq:twenty fourBit data, complement form
The actual frequency is:f=Freq/2 1̂3, unit: Hertz (Hz).
4.2.6
Temperature sensor data register (address:0x2A)
temperature data register (TPSD)
Bit23
Address：
twenty two
twenty one
20…3
2AH
Read:
TPSD 23
TPSD 22
TPSD 21
TPSD 20…Freq3
TPSD 2
TPSD 1
TPSD 0
Write:
Reset:
X
0
X
0
X
0
X
0
X
0
X
0
X
0
Temperature sensor requires configuration register0x31,TPS_En=1Turn on,TPS_Sel=0choosePNTemperature Sensor.
The data format isTM:twenty fourbit data low8Bit valid
ifTMmore than the128,butTMM=TM-256
otherwiseTMM=TM
externalMCURead the value of this register and convert it according to the above, and then obtain the real temperature value according to the following formula:
true temperatureTP=TC - 0.726*TMM
inTCis the correction value, when the room temperature is25temperature, perform temperature correction to obtainTC.
4.2.7
Energy register (address:0x1E~0x25,0x35~0x38,0x44~0x47)
Addr
Reg
Addr
Reg
0x1E
Epa
0x35
Esa
0x1F
Epb
0x36
Esb
0x20
Epc
0x37
Esc
0x21
Ept
0x38
Est
0x22
Eqa
0x44
0x23
Eqb
0x45
0x24
Eqc
0x46
0x25
Eqt
0x47
LineEpa
LineEpb
LineEpc
LineEpt
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page38 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Active Energy Register (EP)
Bit23
EP23
X
0
Read:
Write:
Reset:
Reactive Energy (EQ)
Bit23
Write:
Reset:
Apparent Energy (ES)
Bit23
Write:
Reset:
twenty one
EP22
X
0
EP21
X
0
twenty two
twenty one
EQ22
X
0
EQ21
X
0
X
0
twenty two
twenty one
ES22
X
0
ES21
X
0
20…3
EP20…EP3
X
0
20…3
EQ20…EQ3
Address：
ES23
X
0
Read:
20…3
twenty two
Address：
EQ23
X
0
Read:
Address：
Line Active Energy Register (LineEP)
Bit23
twenty two
Read:
LEP23
LEP22
Write:
Reset:
X
0
X
0
ES20…ES3
X
0
1E~21H
2
EP2
X
0
1
EP1
X
0
Bit0
EP0
X
0
1
EQ1
X
0
Bit0
EQ0
X
0
1
ES1
X
0
Bit0
ES0
X
0
1
LEP1
X
0
Bit0
LEP0
X
0
22~25H
2
EQ2
X
0
35~38H
2
ES2
X
0
Address：
44~47H
twenty one
20…3
LEP21
LEP20…LEP3
X
0
X
0
2
LEP2
X
0
ATT7022E/26E/28EThe energy register provided can be configured as: accumulating energy register and clearing energy register. Accumulating type
The energy register can be obtained from0x000000arrive0xFFFFFF, continue to accumulate, and return to0x000000Start accumulating, at0xFFFFFFoverflow to
0x00000When, an overflow flag will be generated, please refer to the description of the working status register of the power register.
Energy register:twenty fourBit register, unsigned number
This parameter is related to the set pulse constant, and the minimum unit is (1/EC)kWh.
For example, the set pulse constant is3200imp/kWh, then the units of these energy registers are1/3200kwh.
Fundamental wave reactive energy and full wave reactive energy are multiplexed using control bitsQEnergySelControl (calibration parameters0x70 bit4);
whenQEnergySel=0, reactive energy selects full-wave reactive power;
whenQEnergySel=1, reactive energy selects fundamental wave reactive power;
4.2.8
Fast Pulse Count Register (Address:0x39~0x3C)
Addr 0x39
Reg AHr
Fast Pulse Counter (FPC)
Bit23
twenty two
0x3A
0x3B
FstCnt
FstCntB
0x3C
FstCnt
Address：
twenty one
39H~3CH
20…3
2
1
Bit0
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page39 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Read:
FPC23
FPC22
FPC21
FPC20…FPC3
Write:
Reset:
X
0
X
0
X
0
X
0
FPC2
X
0
FPC1
X
0
FPC0
X
0
In order to prevent the loss of power when powering on and off,ATT7022E/26E/28EProvides fast pulse counting register. When the fast pulse count is registered
deviceFstCntA/FstCntB/FstCntC/FstCntTThe count value is greater than or equal toHFconstWhen, the corresponding energy registerEpa / Epb / Epc/
EptWill be added accordingly1.
Fast Pulse Count Register:twenty fourBit register, complement format, the high bit is the sign bit
This parameter is consistent with the set high-frequency pulse constant.HFconstand pulse constantECRelated, the minimum unit is (1/EC/HFconst)kWh.
Such as the set high frequency pulse constantHFconst=0x100=256, pulse constantEC=3200imp/kwh, then the fast pulse count register
The unit is:1/256/3200kwh
4.2.9
Flag status register (address:0x2C)
EMU State Register (EMUState)
Address：
Bit 23
Bit 22
Bit 21
Bit 20
2CH
Bit 19
Bit 18
Bit 17
Read:
Bit 16
-
-
-
-
Line
Cstart
Line
Bstart
Line
Start
Write:
Reset:
X
0
Bit 15
X
0
Bit 14
X
0
Bit 13
X
0
Bit 12
X
0
Bit 11
X
0
Bit 10
X
0
Bit 9
X
0
Bit 8
Read:
Sync_er
Sync_rea
Negp
Cstart
Start
-
X
0
Bit 7
IRQ
X
0
X
0
Bit 6
Revq
X
0
X
0
Bit 4
Order
X
0
X
0
Bit 3
X
0
Bit 1
PB
X
0
X
0
Bit 0
PA
X
0
r
Write:
Reset:
Read:
Write:
Reset:
dy
Negq
X
0
Bit 5
Revp
X
0
Uorder
X
0
t
Bstar
X
0
Bit 2
PC
X
0
Bit name
describe
Bit00
Bit02
PA
PB
PC
Bit03
Uorder=1, indicating that the voltage phase sequence is wrong; =0, the voltage is not in wrong phase sequence.
Bit04
Iorder=1, indicating that the current phase sequence is wrong; =0, the current has no wrong phase sequence.
Bit05
Revp=1, indicating that at least one phase active power is negative; =0, the active power of all phases is positive.
Bit06
Revq=1, indicating that at least one phase reactive power is negative; =0, the reactive power of all phases is positive.
Bit01
Bit07
=1,expressAPhase loss of pressure; =0,AThe phase has not lost pressure.
=1,expressBPhase loss of pressure; =0,BThe phase has not lost pressure.
=1,expressCPhase loss of pressure; =0,CThe phase has not lost pressure.
After power-on reset,IRQ pinThe signal automatically goes low, and at the same timeSFlag.7set high; whenSPIAfter writing data, IRQThe
signal automatically becomes high at the same timeSFlag.7automatically goes low, i.e.SFlagofbit07 IRQFlags and hardware IRQThe signals are
completely synchronized.
Bit09
=1,expressAThe phase is in a latent state; =0,AThe phase is in the starting state.
Bit10
=1,expressBThe phase is in a latent state; =0,BThe phase is in the starting state.
Bit11
=1,expressCThe phase is in a latent state; =0,CThe phase is in the starting state.
Bit12
=1, indicating that the combined active power is negative; =0, the combined active power is positive.
Bit13
=1, indicating that the combined reactive power is negative; =0, the combined reactive power is positive.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page40 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Bit14
=1, indicating that synchronization data caching is completed,Sync_EnWrite0Clear.
Bit15
=1, indicating that the synchronization data function coefficient is out of range,ync_EnWrite0Clear.
Bit17
=1,expressAThe phase fundamental wave is in a latent state; =0,AThe phase fundamental wave is not latent.
Bit18
=1,expressBThe phase fundamental wave is in a latent state; =0,BThe phase fundamental wave is not latent.
Bit19
=1,expressCThe phase fundamental wave is in a latent state; =0,CThe phase fundamental wave is not latent.
Note: Current reverse order judgment condition, originalATT7022EUse the latent sign (optional current anti-submarine or power anti-submarine) as the shielding condition, and use power to prevent latent movement.
There is a latent state in which only current is applied but no voltage is applied, causing the current to be set in reverse sequence (misjudgment);
new version (5000:1)The shielding condition for correcting the current reverse sequence is the starting current, which has nothing to do with the creeping flag. Therefore, when configuring the starting threshold, it is necessary to
When writing the starting current threshold (calibration parameter0x1D)and starting power threshold (calibration parameter0x36).
4.2.10Electric energy register working status register (address:0x1D,0x4E)
Energy Overflow Register (Eov)
Address：
Bit 15
Bit 14
Bit 13
Bit 12
Read:
Write:
Reset:
Read:
Write:
Reset:
-
-
X
0
Bit 7
QtO
X
0
X
0
Bit 6
QUR
X
0
X
0
Bit 5
QUR
X
0
1DH
Bit 11
-
StOV
X
0
Bit 4
QUR
X
0
X
0
Bit 3
PtO
X
0
Bit 10
ScOV
X
0
Bit 2
PPOV
X
0
Bit 9
Bit 8
ikB
SOV
X
0
Bit 1
ikB
X
0
X
0
Bit 0
OV
X
0
This register is automatically cleared after reading. When the energy register adopts the non-clearing mode after reading, these flags are used to indicate that the energy register is
Has an overflow occurred?
Bit name
describe
Bit00
=1,expressAPhase active energy overflow; =0, not overflowed.
Bit01
=1,expressBPhase active energy overflow; =0, not overflowed.
Bit02
=1,expressCPhase active energy overflow; =0, not overflowed.
Bit03
=1, indicating the combined active energy overflow; =0, not overflowed.
Bit04
=1,expressAPhase reactive energy overflow; =0, not overflowed.
Bit05
=1,expressBPhase reactive energy overflow; =0, not overflowed.
Bit06
=1,expressCPhase reactive energy overflow; =0, not overflowed.
Bit07
=1, indicating combined reactive energy overflow; =0, not overflowed.
Bit08
=1,expressALooking at each other at the overflow of electric energy; =0, not overflowed.
Bit09
=1,expressBLooking at each other at the overflow of electric energy; =0, not overflowed.
Bit10
=1,expressCLooking at each other at the overflow of electric energy; =0, not overflowed.
Bit11
=1, indicating the apparent electric energy overflow in conjunction; =0, not overflowed.
Fundamental Energy Overflow
Register (FEov)
Bit 15
Bit 14
Read:
Write:
Reset:
-
-
X
0
X
0
Address：
Bit 13
X
0
Bit 12
4EH
Bit 11
Bit 10
Bit 9
Bit 8
X
0
X
0
X
0
X
0
X
0
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page41 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Bit 7
Bit 6
Bit 5
Bit 4
Read:
Write:
Reset:
Bit 3
Bit 2
Bit 1
Bit 0
tO
V
X
0
LinePCO
ikB
V
X
0
LinePaO
V
X
0
V
X
0
This register is automatically cleared after reading. When the energy register adopts the non-clearing mode after reading, these flags are used to indicate that the energy register is
Has an overflow occurred?
Bit name
describe
Bit00
=1,expressAPhase fundamental wave active energy overflow; =0, not overflowed.
Bit01
=1,expressBPhase fundamental wave active energy overflow; =0, not overflowed.
Bit02
=1,expressCPhase fundamental wave active energy overflow; =0, not overflowed.
Bit03
=1, indicating the combined fundamental wave active electric energy overflow; =0, not overflowed.
4.2.11Power direction register (address:0x3D)
Power Sign Register (Psign)
Bit 15
Bit 14
Read:
Write:
Reset:
X
0
Bit 7
X
0
Bit 6
Address：
Bit 13
Bit 12
X
0
Bit 5
X
0
Bit 4
Read:
QtSign
QcSign
QbSign
QaSign
Write:
Reset:
X
0
X
0
X
0
X
0
3DH
Bit 11
X
0
Bit 3
PtSign
X
0
Bit 10
Bit 9
Bit 8
X
0
Bit 2
X
0
Bit 1
PPSI
X
0
X
0
Bit 0
Bit 9
Bit 8
-
-
X
0
Bit 1
X
0
Bit 0
IRQ
X
0
PCSign
X
0
PaSign
X
0
Power direction indication register, used to indicateA/B/C/The direction of combined active and reactive power.
Bit name
describe
Bit00
=1,expressAPhase active power is reversed; =0, forward.
Bit01
=1,expressBPhase active power is reversed; =0, forward.
Bit02
=1,expressCPhase active power is reversed; =0, forward.
Bit03
=1, indicating that the combined active power is reversed; =0, forward.
Bit04
=1,expressAPhase reactive power reverse direction; =0, forward.
Bit05
=1,expressBPhase reactive power reverse direction; =0, forward.
Bit06
=1,expressCPhase reactive power reverse direction; =0, forward.
Bit07
=1, indicating the reverse direction of the combined reactive power; =0, forward.
4.2.12Interrupt flag register (address:0x1B)
Interrupt Flag Register (Iflag)
Bit 15
Bit 14
Read:
-
TPS_Ok
Write:
Reset:
X
0
Bit 7
X
0
Bit 6
Bit 12
1BH
Bit 11
-
-
X
0
Bit 4
wxya
X
0
X
0
Bit 3
ikB
X
0
Address：
Bit 13
Buffer
Full
X
0
Bit 5
Read:
OVIIF
SAGIF
WaveIE
Write:
Reset:
X
0
X
0
X
0
Bit 10
X
0
Bit 2
wxya
X
0
Updata
X
0
When the interrupt enable is turned on, if it is set to indicate that a corresponding event occurs, the flag bit is cleared after reading (IRQexcept).
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page42 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Bit name
describe
Bit00
chipIRQsignal, =1, indicating prompting the user to calibrate the table and clear the calibration table after writing.
Bit01
=1, indicating that the measurement parameter update is interrupted; =0, this interrupt did not occur.
Bit02
=1, indicating the occurrence ofAPhase voltage zero-crossing interrupt; =0, this interrupt did not occur.
Bit03
=1, indicating the occurrence ofBPhase voltage zero-crossing interrupt; =0, this interrupt did not occur.
Bit04
=1, indicating the occurrence ofCPhase voltage zero-crossing interrupt; =0, this interrupt did not occur.
Bit05
=1, indicating the occurrence ofADCSampling data register data update interrupt; =0, this interrupt did not occur.
Bit06
=1, indicating the occurrence ofSAGevent; =0, indicating that it did not occurSAGevent
Bit07
=1, indicating that an overcurrent event occurs; =0, indicating that no overcurrent event occurred
Bit13
=1, indicating that buffering occursbufferFull interrupt; =0, this interrupt did not occur.
Bit14
=1, indicating the occurrence ofTPSConversion end interrupt; =0, this interrupt did not occur.
4.2.13 ADCSampling data register (address:0x2F~0x34,0x3F)
Addr
Reg
0x2F
0x30
0x31
0x32
0x33
0x34
0x3F
Sample_IA
Sample_IB
Sample_IC
Sample_UA
Sample_UB
Sample_UC
InstADC7
ADC Sampledata Register
(SampleData)
Read:
Write:
Reset:
Address：
0x2F~0x34, 0x3F
Bit23
twenty two
twenty one
20…3
2
1
Bit0
Sample2
Sample22
Sample21
Sample20…Sampl
Sample2
Sample1
Sample0
X
0
X
0
X
0
X
0
X
0
3
X
0
e3
X
0
ADCThe sampling data is19Bits complement data, high6The bit is the sign bit, that isbit18~23is the sign bit, stored in real timeADCSampling data can be
Cooperate with interruptionWaveIEgetADCSample data in real time.
4.2.14Calibration data checksum register (address:0x3E/5E)
Cali-Checksum Register
(Scheck)
Bit23
Address：
twenty two
twenty one
20…3
2
1
Bit0
Read:
Chksum22
Chksum2
Chksum20…..
Chksum2
Chksum1
Chksum0
X
0
X
0
X
0
Write:
Reset:
Chksum2
3
X
0
X
0
1
X
0
3EH/5EH
Chksum3
X
0
ATT7022E/26E/28EProvide checksum registerChkSum, used to storeATT7022E/26E/28ECalibration of all internal calibration data
checksum, externalMCUThe value of this register can be detected to monitorATT7022E/26E/28ECheck whether the calibration data is incorrect. Note, check
and is the slave address0x01arrive0x39The sum of all calibration data is accumulated in unsigned mode, and only the lowertwenty fourBit.
The newly added calibration register checksum (0x5E) stores the sum of all calibration data from calibration parameter addresses 0x60 to 0x71, using unsigned
Numbers are accumulated, and only the lower 24 bits are retained..
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page43 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
4.2.15Communication data backup register (address:0x2D)
BackupData Register
2DH
Address：
(BCKREG)
Read:
Bit23
twenty two
twenty one
20…3
2
1
Bit0
BCKData
BCKData2
BCKData
BCKData20…..BCK
BCKData
BCKData
BCKData0
twenty one
Data3
X
0
X
0
twenty three
Write:
Reset:
X
0
2
X
0
2
X
0
1
X
0
X
0
BCKREGThe register is saved lastSPIThe data transmitted by communication, a total of3bytes, stored separatelySPICommunication reads data or writes
the high, middle and low bytes of the last data.
4.2.16Communication checksum register (address:0x2E)
ComChecksum Register
Bit23
twenty two
2EH
Address：
(Check)
20…3
twenty one
2
1
Bit0
Read:
Ccheck23
Check 22
Check 21
Ccheck20…..Ccheck 3
Check 2
Check 1
Check 0
Write:
Reset:
X
0
X
0
X
0
X
0
X
0
X
0
X
0
Communication checksum register: every timeSPICommunication commands and data are accumulated and put intor_ComChkSumThe lower two bytes of the
register. ComChecksumheight of8Bitbit16….bit23will saveSPICommunication of the last command.
SPIThe data in communication is the addition of single-byte length.
4.2.17 SAGflag register (0x4F)
SAG Flag(SAGFlag)
Bit 15
Read:
Write:
Reset:
X
0
Bit 7
Bit 14
X
0
Bit 6
Bit 13
X
0
X
0
X
0
Bit 5
OVIc
X
0
Read:
Write:
Reset:
Address：
-
Bit 12
X
0
Bit 4
OVib
X
0
4FH
Bit 11
X
0
Bit 3
OVIa
X
0
Bit 10
X
0
Bit 2
SAGU
X
0
Bit 9
-
X
0
Bit 1
SAGUb
X
0
Bit 8
X
0
Bit 0
SAGU
X
0
Power direction indication register, used to indicateA/B/C/The direction of combined active and reactive power.
Bit name
describe
Bit00
=1,expressAPhase voltage occursSAGevent; =0,normal.
Bit01
=1,expressBPhase voltage occursSAGevent; =0,normal.
Bit02
=1,expressCPhase voltage occursSAGevent; =0,normal.
Bit03
=1,expressAPhase current occursSAGevent; =0,normal.
Bit04
=1,expressBPhase current occursSAGevent; =0,normal.
Bit05
=1,expressCPhase current occursSAGevent; =0,normal.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page44 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
4.2.18Peak Voltage Register (0x50~0x52)
Addr
Reg
0x50
0x51
0x52
PeakUa
PeakUb
PeakU
The peak voltage register is20bits complement data,bit19is the sign bit,bit20~23Invalid, withSAGFunction matching, recordSAGlong
degree setting registerCyclengthSet the maximum voltage value within the set time period. and voltage effective valueUrmsCalculation formula:
PeakU = Urms*2 9̂*1.414
and voltage rms register valueVrmsRelationship:
PeakU = Vrms/16*1.414
4.2.19chipID(address:0x5D)
Keep originalATT7022E/26EofdeviceRegister (metering parameter0x01)= 7122A0/7126A0Do not move. IncreaseIDRegister (metering parameter
0x5D), as version difference:
Corresponding chip model
DeviceID
ID
7022
0x7122A0
0x7022E0
7026
0x7126A0
0x7026E0
4.3 Calibration parameter register
surface4-3-1Calibration parameter register list: (Read/Write)
address
name
00
word length
reset value
Function description
Reserved
2
0xAAAA
Calibration parameter register start flag
01
w_ModeCfg
2
0x89AA
Mode dependent controls
02
w_PGACtrl
2
0x0000
ADC gain selection
03
w_EMUCfg
2
0x0804
EMU module configuration register
04
w_PgainA
2
0x0000
Phase A active power gain
05
w_PgainB
2
0x0000
B phase active power gain
06
w_PgainC
2
0x0000
C phase active power gain
07
w_QgainA
2
0x0000
Phase A reactive power gain
08
w_QgainB
2
0x0000
Phase B reactive power gain
09
w_QgainC
2
0x0000
Phase C reactive power gain
0A
w_SgainA
2
0x0000
Phase A apparent power gain
0B
w_SgainB
2
0x0000
Phase B apparent power gain
0C
w_SgainC
2
0x0000
C phase apparent power gain
0D
w_PhSregApq0
2
0x0000
Phase A phase correction 0
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page45 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
0E
w_PhSregBpq0
2
0x0000
Phase B phase correction 0
0F
w_PhSregCpq0
2
0x0000
C phase phase correction 0
10
w_PhSregApq1
2
0x0000
Phase A phase correction 1
11
w_PhSregBpq1
2
0x0000
Phase B phase correction 1
12
w_PhSregCpq1
2
0x0000
C phase phase correction 1
13
w_PoffsetA
2
0x0000
Phase A active power offset correction
14
w_PoffsetB
2
0x0000
Phase B active power offset correction
15
w_PoffsetC
2
0x0000
C phase active power offset correction
16
w_QPhscal
2
0x0000
Reactive phase correction
17
w_UgainA
2
0x0000
A phase voltage gain
18
w_UgainB
2
0x0000
B phase voltage gain
19
w_UgainC
2
0x0000
C phase voltage gain
1A
w_IgainA
2
0x0000
A phase current gain
1B
w_IgainB
2
0x0000
B phase current gain
1C
w_IgainC
2
0x0000
C phase current gain
1D
w_Istarup
2
0x0160
Starting current threshold setting
1E
w_Hfconst
2
0x0500
High frequency pulse output settings
1F
w_FailVoltage
2
0x0600
Voltage loss threshold setting (three-phase four-wire mode)
2
0x1200
Voltage loss threshold setting (three-phase three-wire mode)
20
w_GainADC7
2
0x0000
The seventh ADC input signal gain
twenty one
w_QoffsetA
2
0x0000
Phase A reactive power offset correction
twenty two
w_QoffsetB
2
0x0000
Phase B reactive power offset correction
twenty three
w_QoffsetC
2
0x0000
C phase reactive power offset correction
twenty four
w_UaRmsoffse
2
0x0000
Phase A voltage effective value offset correction
25
w_UbRmsoffse
2
0x0000
Phase B voltage effective value offset correction
26
w_UcRmsoffse
2
0x0000
Phase C voltage effective value offset correction
27
w_IaRmsoffse
2
0x0000
Phase A current effective value offset correction
28
w_IbRmsoffse
2
0x0000
Phase B current effective value offset correction
29
w_IcRmsoffse
2
0x0000
C phase current effective value offset correction
2A
w_UoffsetA
2
0x0000
Phase A voltage channel ADC offset correction
2B
w_UoffsetB
2
0x0000
B-phase voltage channel ADC offset correction
2C
w_UoffsetC
2
0x0000
C-phase voltage channel ADC offset correction
2D
w_IoffsetA
2
0x0000
A-phase current channel ADC offset correction
2E
w_IoffsetB
2
0x0000
B-phase current channel ADC offset correction
2F
w_IoffsetC
2
0x0000
C-phase current channel ADC offset correction
30
w_EMUIE
2
0x0001
Interrupt enable
31
w_ModuleCFG
2
0x3527
Circuit module configuration register
32
w_AllGain
2
0x0000
Full channel gain for correcting ref self-correction
33
w_HFDouble
2
0x0000
Pulse constant doubling selection
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page46 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
34
w_LineGain
2
0x2C59
Fundamental gain correction
35
w_PinCtrl
2
0x000F
Digital pin pull-up and pull-down resistor selection control
36
w_Pstartup
2
0x0030
Starting power threshold setting
37
w_Iregion0
2
0x7FFF
Phase compensation area setting register
38
w_Cyclength
2
0x1000
SAG data length setting register
39
w_SAGLvl
2
0x4500
SAG detection threshold setting register
60
w_Iregion1
2
0x0000
Phase compensation area setting register 1
61
w_PhSregApq2
2
0x0000
Phase A phase correction 2
62
w_PhSregBpq2
2
0x0000
Phase B phase correction 2
63
w_PhSregCpq2
2
0x0000
C phase phase correction 2
64
w_PoffsetAL
2
0x0000
Phase A active power offset correction low byte
65
w_PoffsetBL
2
0x0000
Phase B active power offset correction low byte
66
w_PoffsetCL
2
0x0000
Phase C active power offset correction low byte
67
w_QoffsetAL
2
0x0000
Phase A reactive power offset correction low byte
68
w_QoffsetBL
2
0x0000
Phase B reactive power offset correction low byte
69
w_QoffsetCL
2
0x0000
6A
w_ItRmsoffset
2
0x0000
Current vector and offset correction register
6B
w_TPSoffset
2
0x0000
TPS initial value correction register
6C
w_TPSgain
2
0x0000
TPS slope correction register
6D
w_TCcoffA
2
0xFEFF
Quadratic coefficient of Vrefgain
6E
w_TCcoffB
2
0xEF7A
The linear coefficient of Vrefgain
6F
w_TCcoffC
2
0x047C
Constant term of Vrefgain
70
w_EMCfg
2
0x0000
Added algorithm control register
71
w_OILVL
2
0x0000
Overcurrent threshold setting register
Phase C reactive power offset correction low byte
Note: Users are passingSPIWhen reading and writing the calibration register via communication, the calibration data needs to be placed in3data byte low2in bytes.
4.4 Calibration parameter register description
4.4.1
Mode configuration register (address:0x01)
Mode Config (ModeCfg)
Bit 15
Read:
Chop_RE
Bit 14
Address：
Bit 13
RmsLpf_
Bit 12
01H
Bit 11
Bit 10
Bit 9
Bit 8
CIB_ADC
CIB_ADC
SampleR
SampleR
Write:
F_En
UbS
Reset:
1
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
1
Bit 3
0
Bit 2
0
Bit 1
1
Bit 0
Read:
Chop_AD
EnADC6
EnADC5
EnADC4
EnADC3
EnADC2
EnADC1
EnADC0
C_En
1
0
1
0
1
0
1
0
Write:
Reset:
En
PRFCFG
1
0
1
0
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page47 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Bit name
describe
Bit00
=1Indicates turning on the neutral currentI0aisleadc;=0closure.
Bit01
=1Indicates openIaaisleadc;=0closure.
Bit02
=1Indicates openUaaisleadc;=0closure.
Bit03
=1Indicates openIbaisleadc;=0closure.
Bit04
=1Indicates openUbaisleadc;=0closure.
Bit05
=1Indicates openIcaisleadc;=0closure.
Bit06
=1Indicates openUcaisleadc;=0closure.
Bit07
=1Indicates openadcofchopfunction; =0closure.It is recommended to turn it off and configure it as0.
Bit09 Bit08
SampleR1/0: used to selectfemuclock
00
01
1.8432MHz
Bit11 Bit10
1X
460.8kHz
921.6kHz/
CIB_ADC1/0: used to selectirefbias current
11
10uA
10
01
5uA
7.5uA
00
5uA
In reducing chip power consumption and getting betterADCPerformance contradiction,A compromise recommendation0x10choose7.5uA
Bit12
Update rate selection for rms and power, =1means slow (1.76Hz);=0fast(14.4Hz). In normal operation, in order to obtain
stable effective value and power value, the slow mode is recommended; in the full voltage loss mode, in order to obtain
the current effective value quickly, it is recommended to select the fast mode. Femu=1.8432MHzWhen , the slow update
rate is3.52Hz, quickly for28.8Hz
Bit13
Select the settling time for a valid value, =1Indicates slow speed and small beating; =0Fast, big jump. In normal
use, in order to obtain stable effective values, the slow speed method is recommended;
In the full voltage loss mode, in order to quickly obtain the effective value of the current, it is recommended to select fast.
Bit14
Three-phase three-wire timeUbValid value data source selection, =1Indicates internal (ua-uc);=0expressubaisle.
Bit15
=1Indicates openrefofchopfunction; =0closure. To get a more stableVref,Recommended to open.
Note: singleadcThe power consumption is600uA,chop_adcIt can improve the jitter of small signals.
4.4.2 ADCGain configuration register (address:0x02)
Analog PGA Control(PGACtrl)
Bit 15
Bit 14
Read:
Write:
-
Address：
Bit 13
Bit 12
02H
Bit 11
Bit 10
-
-
-
-
-
Bit 9
Bit 8
UPGA1
UPGA0
Reset:
0
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
Read:
IcPGA1
IcPGA0
IbPGA1
IbGA0
IaPGA1
IaPGA0
I0PGA1
I0PGA0
Write:
Reset:
0
0
0
0
0
0
0
0
Bit name
describe
Bit01 Bit00
Represents neutral currentI0aisleADCgain amplification,00/01/10/11Respectively expressed as1/2/8/16multiple gain
Bit03 Bit02
expressAPhase current channelADCgain amplification,00/01/10/11Respectively expressed as1/2/8/16multiple gain
Bit05 Bit04
expressBPhase current channelADCgain amplification,00/01/10/11Respectively expressed as1/2/8/16multiple gain
Bit07 Bit06
expressCPhase current channelADCgain amplification,00/01/10/11Respectively expressed as1/2/8/16multiple gain
Bit09 Bit08
Indicates three-phase voltage channelADCgain amplification,00/01/10/11Respectively expressed as1/2/8/8multiple gain
4.4.3 EMUUnit configuration (address:0x03)
EMU Config (EMUCfg)
Bit 15
Read:
Write:
LinePRu
n
Address：
Bit 14
Bit 13
Bit 12
SRun
QRun
PRun
03H
Bit 11
StartSe
l
Bit 10
HAREn
Bit 9
Bit 8
WaveSel
WaveSel
1
0
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page48 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Reset:
0
Bit 7
Read:
EnergyC
Write:
Reset:
lr
0
0
Bit 6
0
Bit 5
0
Bit 4
1
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
EAddmode
Zxd1
Zxd0
Smode
SPL2
SPL1
SPL0
0
0
0
0
1
0
0
Bit name
describe
Bit02 Bit01 Bi00
SPL[2:0]: Waveform sampling frequency selection, whenfosc=5.5296M,femu=921.6kHzWhen , select the
frequency as follows:
1xx
011
7.2K
14.4K
010
3.6K
001
1.8K
000
0.9K
whenfemu=1.8432MHz /460.8kHzWhen , the selected waveform sampling frequency changes in positive proportion to the above table.
Bit03
=1, the apparent power/energy register usesRMSmethod of measurement; =0,
Bit05 Bit04
ZXD:Select voltage zero-crossing interrupt mode
the apparent power/energy register usesPQSmethod measurement.
00
01
1X
forward0interrupt
/negative pass0interrupt/
Passing both ways0interrupt
Bit06
=1, the three-phase four-wire system uses algebraic and cumulative methods, and the three-phase three-wire system uses absolute value and cumulative methods; =0, the
Bit07
=1, the energy register is cleared after reading0;
Bit09 Bit08
WaveSel[1:0]: Waveform buffer data source selection,
three-phase four-wire system uses absolute value and accumulation methods, and the three-phase three-wire system uses algebraic and accumulation methods.
=0The energy register is unclear after reading0.
=00,chooseADCThe sampling data comes from raw data without Qualcomm; =01,chooseADC
The sampling data comes from high-pass and gain-corrected data; =1x,chooseADCThe
sampling data comes from the data after the fundamental wave filter.
Bit10
=1, turn on the fundamental wave/harmonic measurement function;
=0, turn off the fundamental/harmonic measurement function.
Need to pass the register (calibration parameter0x70 bit5)EnHarmonicFor fundamental and harmonic measurements
switch
ShouldbitforATT7022Eproprietary,ATT7026E/28Einvalid.
Bit11
=1, select power as the basis for judgment of latent starting;
=0, select the current effective value as the basis for judging the creeping starting.
It is recommended to use power as the basis for judging creep start.
4.4.4
Bit12
=1, turn on the active energyCF1Channel energy measurement function; =0,closureCF1Metering function.
Bit13
=1, turn on reactive energyCF2Channel energy measurement function; =0,closureCF2Metering function.
Bit14
=1, turn on the apparent energyCF3Channel energy measurement function; =0,closureCF3Metering function.
Bit15
=1, turn on the fundamental active energyCF4Channel energy measurement function; =0,closureCF4Metering function.
Power gain compensation register (address:0x04~0x0C)
Addr
Reg
0x04
Pa
0x05
Pb
Active Power Gain (Pga~Pgc)
Bit15
14
Read:
Write:
Reset:
0x06
PC
0x07
Qa
Address：
0x08
Qb
0x09
Qc
Write:
0x0B
sb
0x0C
Sc
04H~06H
Pg15
Pg14
13
Pg13
12…3
Pg12…Pg3
2
Pg2
1
Pg1
Bit0
Pg0
0
0
0
0
0
0
0
2
Qg2
1
Qg1
Bit0
Qg0
Ractive Power Gain (Qga~Qgc)
Address：
07H~09H
Bit15
14
13
12…3
Read:
0x0A
Sa
Qg15
Qg14
Qg13
Qg12…Qg3
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page49 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Reset:
0
0
0
0
Apparent Power Gain (Sga~Sgc)
Address：
0AH~0CH
Bit15
14
13
12…3
Read:
Write:
Reset:
0
0
0
1
SG1
Bit0
Sg0
0
0
Sg15
Sg14
Sg13
Sg12…Sg3
2
Sg2
0
0
0
0
0
in power factorcos(φ)=1When performing power gain correction, the active power gain correction register and the reactive power gain correction register
The same correction value is written into the register, and the apparent power gain correction register isSmode=0choosePQSWhen measuring, it does not need to be calibrated, but when
Smode=1chooseRMSWhen measuring in this way, correction is required, and the correction value is the same as the active/reactive power gain value.
A known:
The reading error on the standard table iserr%
Calculation formula:
Pgain=
−err%
1+err%
ifPgain>=0,butGP1=INT[Pgain*2 1̂5]
otherwisePgain<0, butGP1=INT[2 1̂6+Pgain*2 1̂5]
4.4.5
Phase correction register (address:0x00D~0x12,0x61~0x63)
Power Phase Calibrate (Pha~Phc)
Write:
Reset:
0DH~12H
Ph15
14
Ph14
13
Ph13
12…3
Ph12…Ph3
2
Ph2
1
Ph1
Bit0
Ph0
0
0
0
0
0
0
0
Bit15
Read:
Address：
in power factorcos(φ)=1, after the power gain has been corrected, phase compensation is performed. The phase correction iscos(φ)=0.5L
Calibrate when necessary.
A known:0.5LThe error reading of the standard table iserr%
Phase compensation formula:
θ=
−err%
1.732
ifθ>=0,PhSregpq = INT[θ*2^15]
otherwiseθ<0,PhSregpq = INT[2^16 +θ*2^15]
4.4.6
poweroffsetCorrection (address:0x13~0x15,0x21~0x23,0x64~0x69)
Active Power Offset (Posa~Posc)
Address：
13H~15H
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page50 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Bit15
14
13
12…3
Read:
Pos15
Pos14
Pos13
Write:
Reset:
0
0
0
Reactive Power Offset
Pos12…Pos3
2
Pos2
1
Pos1
Bit0
Pos0
0
0
0
0
1
Qos1
Bit0
Qos0
0
0
Address：
21H~23H
(Qosa~Qosc)
Bit15
14
13
12…3
Read:
Qos15
Qos14
Qos13
Qos12…Qos3
Write:
Reset:
2
Qos2
0
0
0
0
0
After power gain correction and phase correction, perform poweroffsetCorrection, input small signalx%Ib(5%or2%) point of the electric meter error
The difference isErr%
x%IbClick to read the active power value output on the standard meter under resistancePreal
Use the formula to calculate,Poffset = INT[(Preal*EC*HFCONST*2 3̂1*(-Err%))/(2.592*10^10)].
CalculatedPoffsetheight of16bitWrite the original register (calibration parameter0x13~0x15/0x21~23);Low8Bit writing to the newly added register
(0x64~0x69).
4.4.7
Fundamental wave reactive power phase correction register (address:0x16)
Reactive Power Phase(Qph)
Address：
Bit15
14
13
12…3
Read:
Qph15
Qph14
Qph13
Write:
Reset:
0
0
0
16H
Qph12…Qph3
2
Qph2
1
Qph1
Bit0
Qph0
0000
0
0
0
The default value corresponds tofemu=921.6Ksituation, no further correction is required;femuis other frequencies, or the measured power frequency is not
50HzIt needs to be corrected according to the following formula:It is only used when the reactive power is selected as fundamental wave reactive power. It is not required when the reactive power is selected as full wave reactive power.
Correction.
exist30Calibration is performed when the powerQThe error value is:err%
QPhasCalThe calculation formula is:
iferr>=0,QPhscal=INT[err%*32768/1.732]
iferr<0,QPhscal=INT[65536+ err%*32768/1.732-256]
4.4.8
Voltage gain correction register (address:0x17~0x19)
Voltage Gain (Uga~Ugc)
Ug15
14
Ug14
13
Ug13
0
0
0
Bit15
Read:
Write:
Reset:
Address:17H~19H
12…3
Ug12…Ug3
2
Ug2
1
Ug1
Bit0
Ug0
0
0
0
0
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page51 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
existUgain=0When, the actual effective value of the input voltage is read on the standard meterUr,passSPIport to read the value of the measured voltage effective value register
forDataU
A known:
Actual input voltage effective valueUr
Measure voltage effective valueUrms=DataU/2 1̂3
Calculation formula:
Ugain=Ur/Urms-1
ifUgain≥0,butUgain=INT[Ugain*2 1̂5]
ifUgain<0,butUgain=INT[2 1̂6+ Ugain*2 1̂5]
4.4.9
Current gain correction register (address:0x1A~0x1C,0x20)
Address:1AH~1CH,20H
Current Gain (Iga~Igc,Ign)
Read:
Write:
Reset:
Bit15
Ig15
14
Ig14
13
Ig13
12…3
Ig12…Ig3
2
Ig2
1
Ig1
Bit0
Ig0
0
0
0
0
0
0
0
existIgain=0When, the actual input current effective value is read on the standard meterIr,passSPIport to read the value of the measured voltage effective value register as
DataI
Known: actual input current effective valueIr
Measure voltage effective valueIrms=(DataI/2 1̂3)/N (The rated current corresponding to the sampling signal is25mV,butN=30/Ib;Rated current pair
The signal that should be sampled is50mV,butN=60/Ib;See details4.2.2Valid value register description)
Calculation formula:
Igain=Ir/Irms-1
ifIgain≥0,butIgain=INT[Igain*2 1̂5]
ifIgain≤0,butIgain=INT[2 1̂6+ Igain*2 1̂5]
4.4.10Starting current setting register (address:0x1D)
Current Start (Start)
Is15
14
Is14
13
Is13
0
0
0
Bit15
Read:
Write:
Reset:
Address:1DH
12…3
Is12…Is3
2
Is2
1
Is1
Bit0
Is0
0
0
0
0
Known: starting current selectionIoat
Calculation formula:Istartup=INT[0.8*Io*2 1̂3]
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page52 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
inIo=Ib*N*The proportional set point (the rated current corresponding to the sampling signal is25mV,butN=30/Ib;The rated current corresponding to the sampling signal is
50mV,butN=60/Ib;) For example, the starting current is set to0.4%,Ib=1.5Asampled signal50mV,butIo=1.5*40*0.4%.
N——and the coefficient in the current effective value calculation formulaNsame.
When configuring the starting threshold, you need to write the starting current threshold (calibration parameter0x1D)and starting power threshold (calibration parameter0x36)
4.4.11High frequency pulse constant setting (address:0x1E)
High Freqency Constant(HFconst)
HF15
14
HF14
13
HF13
0
0
0
Bit15
Read:
Write:
Reset:
Address:1EH
12…3
HF12…HF3
2
HF2
1
HF1
Bit0
HF0
0
0
0
0
parameterHFconstDetermine the high-frequency pulse output used for calibrationCFFrequency of,HFconstCannot write greater than0x000D00, or less than
0x000002parameter value.
Known: high frequency pulse constantEC
Rated input voltageUn
Rated input currentIb
Voltage input channel sampling voltagevu(actual input signal * analog gain multiple)
Current input channel sampling voltageVi(actual input signal * analog gain multiple)
ATT7022E/26E/28EGainG
HFconstCalculation formula:
HFConst=INT[2.592*10 1̂0*G*G*Vu*Vi/(EC*Un*Ib)]
Note: in the above formulaG=1.163,INT[ ]Indicates rounding operation, such as:INT[5.68]=5.
4.4.12Voltage loss threshold setting register (address:0x1F)
Voltage Fail (Ufail)
Uf15
14
Uf14
13
Uf13
0
0
0
Bit15
Read:
Write:
Reset:
Address:1FH
12…3
Uf12…Uf3
2
Uf2
1
Uf1
Bit0
Uf0
0
0
0
0
The voltage loss threshold is set based on the corrected voltage effective value.
The specific formula is: pressure loss thresholdFailVoltage=Un*2 5̂*D
Un: Indicates the corrected voltage effective value
D: Indicates the percentage of voltage loss
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page53 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
For example, three-phase four-wire system, corrected rated voltage valueUnfor220V, voltage loss percentageDfor10%, then the voltage loss threshold is registered
The parameters of the device are220*2 5̂*10%=0x02C0. That is to say, the0x02C0After setting to the voltage loss threshold register, when the input voltage is lower than
Unof10%,Right now22V, a pressure loss indication will be given.
Three-phase three-wire system, corrected rated voltage valueUn=100V, voltage loss percentageD=60%, then the parameters of the voltage loss threshold register
for100*2 5̂*60%=0x0780. After setting the voltage loss threshold register in this way, when the voltage is lower thanUnof60%,Right now60VWhen , the error will be given
pressure indication signal.
4.4.13Valid valuesoffsetCorrection (address:0x24~0x29,0x6A)
Voltage Offset (Uosa~Uosc)
Address:24H~26H
Bit15
14
13
Read:
Uos15
Uos14
Uos13
12…3
Uos12…Uos3
Write:
Reset:
2
Uos2
1
Uos1
Bit0
Uos0
0
0
0
0
0
0
0
12…3
Ios12…Iosh3
2
Ios2
1
Ios1
Bit0
Ios0
0
0
0
0
Address:27H~29H,0x6A
Current Offset (Iosa~Iosc)
Read:
Write:
Reset:
Bit15
Ios15
14
Ios14
13
Ios13
0
0
0
Before rms gain correction, performoffsetCorrection.
Known: The input signal is0When, read the value of the registerIrms
Calculation formula:IrmsOffset = (Irms^2)/ (2 1̂5).
Before split-phase RMS gain correction, performItRmsoffsetCorrection
(Calibration parameters0x6A)
.
Known: The input signal is0When, read the value of the registerItrms
Calculation formula:ItRmsoffset = (Irms^2)/ (2 1̂5).
4.4.14 ADC offsetCorrection (address:0x2A~0x2F)
Addr
Reg
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
adc_Ua
adc_Ub
adc_Uc
adc_Ia
adc_Ib
adc_Ic
12…3
2
1
Bit0
Adc Offset (adc_Ua~adc_Ic)
Address:2AH~2FH
Bit15
14
13
Read:
ADCos15
ADCos14
ADCos13
ADCos12…ADCos3
ADCos2
ADCos1
ADCos0
Write:
Reset:
0
0
0
0
0
0
0
ADC OffsetCorrection is used with the high-pass filter turned off to filter outADCDC bias. The input signal is0case
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page54 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Read multiple timesADCThe data is sampled in real time, averaged and written into the correction register.
Notice:ADCThe real-time sampling data is19bit, and the high-order bit complements the sign bit, andADC offsetThe register is16bit, that isADC offset
andADCsampled data19high in position16Bit aligned.
4.4.15Interrupt enable register (address:0x30)
Mode Config (ModeCf)
Bit 15
-
Read:
Write:
Reset:
Read:
Bit 14
0
0
Bit 6
OVIIE
Write:
Reset:
0
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
-
-
-
-
-
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
SampleE
wxya
ikB
wxya
Updata
IRQ
0
0
0
0
0
1
BufferF
TPS_Ok
Bit 7
Address:30H
Bit 13
ull
SAGIE
0
Only when the corresponding interrupt bit is enabled, the corresponding interrupt flag will passIRQpin output.
in spite ofEMUIEIs it enabled?r_INTFlagThe register will be set after the corresponding event occurs.1.
Bit name
describe
Bit00
When the chip is in reset stateIRQis high, after reset is completedIRQThe signal is low. When the calibration parameters are written, the calibration
parameters are not the initial values.IRQThe signal is pulled high immediately. When the calibration parameters are cleared, the calibration parameters are the
initial values.IRQThe signal is immediately pulled low. This bit is required and cannot be cleared.
Bit01
Parameter register update interrupt enable bit, =1Indicates enable; =0closure.
Bit02
APhase voltage zero-crossing interrupt enable bit, =1Indicates enable; =0closure.
Bit03
BPhase voltage zero-crossing interrupt enable bit, =1Indicates enable; =0closure.
Bit04
CPhase voltage zero-crossing interrupt enable bit, =1Indicates enable; =0closure.
Bit05
ADCSampling data update interrupt enable bit, =1Indicates enable; =0closure.
Bit06
SAGInterrupt enable bit, =1Indicates enable; =0closure.
Bit07
Overcurrent interrupt enable bit, =1Indicates enable; =0closure.
Bit13
bufferbufferFull interrupt enable bit, =1Indicates enable; =0closure. Note that this bit is invalid for the synchronous
sampling function.
Bit14
Temperature sensor conversion end interrupt enable bit, =1Indicates enable; =0closure.
4.4.16Analog module enable register (address:0x31)
Analog ModuleConfig (ModuleCfg)
Bit 15
Read:
Ana_Cfg
Bit 14
Address:31H
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Ana_Cfg
Ana_Cfg
SPI_Mod
Ana_Cfg
Ana_Cfg
Ana_Cfg
Write:
6
Ana_Cfg5
Reset:
0
Bit 7
1
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
1
Bit 2
0
Bit 1
1
Bit 0
TPS_sel
IRQCFG
Bor_En
TPS_En
Rosi_en
HPFONU
HPFONI
HPFONI0
0
0
1
0
0
1
1
1
Read:
Write:
Reset:
4
3
e
2
Bit name
describe
Bit00
=1, turn on the seventh channel digital high-pass filter; =0closure.
Bit01
=1, turn on the current channel digital high-pass filter; =0closure.
1
0
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page55 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Bit02
=1, turn on the voltage channel digital high-pass filter; =0closure.
Bit03
=1, select the Rogowski coil function that enables the current channel; =0closure.
Bit04
=1, choose to turn onTPSfunction; =0closure.
Bit05
=1, choose to turn onBORfunction; =0closure.
Bit06
=1, interrupt selection is active at high level; =0Active low.
Bit07
Temperature sensor type selection signal, =0,choosePNSensor (recommended); =1, choose resistive sensing
device.
Bit11
=1,chooseSPILow speed mode (SCLKfrequency0~1.4MHz); =0chooseSPIHigh speed mode
(SCLKfrequency0~10MHz)
Bit15~12,10~8
Simulation performance configuration, the recommended configuration is0011,100
4.4.17All-channel gain register (address:0x32)
All Channel Gain (ACG)
Address:32H
Bit15
14
13
12…3
Read:
ACG15
ACG14
ACG13
Write:
Reset:
0
0
0
ACG12…ACG3
2
ACG2
1
ACG1
Bit0
ACG0
0
0
0
0
right7roadADCAdds an overall gain correction, mainly forVREFcaused by changes inADCThe full scale range changes.
Known: due toVrefcaused by changesValid valuesVarietyerr%, note that it is a valid valueerr, if it is the electric energy error, it iserr/2.
Calculation formula:Allgain=
−err%
1+err%
ifAllgain>=0,butGP1=INT[Allgain*2 1̂5]
otherwiseAllgain<0,butGP1=INT[2 1̂6+Allgain*2 1̂5]
4.4.18Pulse doubling register (address:0x33)
All Channel Gain (ACG)
Address:33H
Bit15
14
13
12…3
Read:
ACG15
ACG14
ACG13
Write:
Reset:
0
0
0
ACG12…ACG3
2
ACG2
1
ACG1
Bit0
ACG0
0
0
0
0
ATT7022E/26E/28EProvide pulse constant doubling selection registerHFDouble, used to double the pulse constant when controlling small currents,
This speeds up the calibration of the meter when the current is small,HFDoubleDoubling is achieved by amplifying the power value, and the value of the power register is also
Zoom in for easier accessPoffsetCorrection.
Note: Doubling the pulse constant is achieved by amplifying the power value, so it is only recommended to use this function when the current is small.
The pulse constant doubling function is not used when the signal is used to avoid unknown errors caused by internal register overflow due to power signal amplification when the signal is large.
This function is mainly used for meter calibration applications with small current points. Please turn off this function after the meter calibration is completed.
HFDoubleRegister contents
Pulse constant magnification
0x33CC
Pulse constant amplification2times
0x33CD
Pulse constant amplification4times
0x33CE
Pulse constant amplification8times
0x33CF
Pulse constant amplification16times
other values
The pulse constant remains unchanged
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page56 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
4.4.19Fundamental gain register (address:0x34)
Fundamental Gain (Fgain)
FG15
14
FG14
13
FG13
0
0
0
Bit15
Read:
Write:
Reset:
Address:34H
12…3
FG12…FG3
2
FG2
1
FG1
Bit0
FG0
0
0
0
0
ATT7022E/26E/28EProvides a fundamental gain correction register to compensate for the fundamental gain. In the fundamental gain register
LineGain(0x34)=0x2C59(Reset value), read the actual input fundamental wave effective value on the standard tableUr,passSPIoral reading test
The value of the fundamental wave effective value register isDataU. Under normal circumstances, it is sufficient to calibrate the full-wave effective value, and there is no need to separately calibrate the fundamental wave gain.
Known: actual input fundamental wave effective valueUr
Measure the effective value of the fundamental waveUrms=DataU/2 1̂3
Calculation formula:LineGain=INT[(Ur/Urms)*11346]
4.4.20 IOStatus configuration register (address:0x35)
Mode Config (ModeCf)
Bit 15
Read:
Write:
Reset:
Read:
Write:
Reset:
-
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
-
-
-
-
-
-
-
-
0
Bit 4
-
1
Bit 3
0
Bit 1
0
Bit 0
CsiCtrl
SelCtrl
0
0
1
0
Bit 2
SclkCtr
l
1
1
1
0
0
0
Bit 7
Bit 6
Bit 5
-
0
Address:01H
Bit 14
-
0
DinCtrl
Bit name
describe
Bit00
3P3/3P4modelSELSelect the internal state of the foot, =1express300kPull-up resistor;=0forfloating.
Bit01
SPIinterfaceCSInternal state of the foot, =1express300kPull-up resistor;=0forfloating.
Bit02
SPIinterfaceSCLKInternal state of the foot, =1express300kPull-up resistor;=0forfloating.
Bit03
SPIinterfaceDINInternal state of the foot, =1express300kPull-up resistor;=0forfloating.
4.4.21Starting power register (address:0x36)
Power Start (Pstart)
Ps15
14
Ps14
13
Ps13
0
0
0
Bit15
Read:
Write:
Reset:
Address:36H
12…3
Ps12…Ps3
2
Ps2
1
Ps1
Bit0
Ps0
0
0
0
0
Known: rated voltageUb, the basic currentIb, starting current pointk‰
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page57 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Calculation formula:Pstartup=INT[0.6*Ub*Ib*HFconst*EC* k‰*2 2̂3/(2.592*10 1̂0)]
4.4.22Phase compensation area setting register (address:0x37/0x60)
Phase Iregion (Iregion)
Ir15
14
Ir14
13
Ir13
0
1
1
Bit15
Read:
Write:
Reset:
Address:37H
12…3
Ir12…Ir3
2
Ir2
1
Ir1
Bit0
Ir0
1
1
1
1
In order to better meet the characteristics of external transformers, phase compensation can be divided into3segment, this register is used to set the current segmentation point, and the current is valid
High value16bitAlignment; phase compensation register used in conjunction with phase segmentation registerIregion0(Calibration parameters0x37/0x60)and newly added phase segmentation
memoryIregion1(Calibration parameters0x60), phase compensation register0(Calibration parameters0x0D~0x0F), phase compensation register1(Calibration parameters
0x10~0x12)Newly added phase compensation register2(0x61~0x63).
When the current value is effectiveI>Iregion0(Calibration parameters0x37),usePhSregXpq0Perform phase compensation, when the current value is effective
Iregion1<I<Iregion0,usePhSregXpq1Perform phase compensation, when the current value is effectiveI<Iregion1,usePhSregXpq2progressive phase
bit compensation.
The phase segmentation setting register is the same as the originalATT7022E/26E/28Econsistent,Pay attention to setting the thresholdIregion0> Iregion1
Known: Current setting areaIs
Calculation formula:Iregion =INT[Is*2 5̂]
inIs=Ib*N*The proportional set point (the rated current corresponding to the sampling signal is25mV,butN=30/Ib;The rated current corresponding to the sampling signal is
50mV,butN=60/Ib;) For example, the starting current is set to15%,Ib=1.5Asampled signal50mV,butIs=1.5*40*15%.
N——and the coefficient in the current effective value calculation formulaNsame.
4.4.23 SAGData length setting register (0x38)
Address:38H
Cyclength(Cyclength)
Bit15
14
13
Read:
Cyc15
Cyc14
Cyc13
12…3
Cyc12…Cyc3
Write:
Reset:
2
Cyc2
1
Cyc1
Bit0
Cyc0
0
1
1
1
1
1
1
The duration isSAGLength setting registerCyclength(Calibration parameters0x38) setCyclengthhalf-cycle wave number, then determine
The voltage of this phase drops. whenCyclength=0x0000when, closeSAGFunction.
4.4.24 SAGDetection threshold setting register (0x39)
SAG Level(SAGL)
Address:39H
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page58 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Bit15
14
13
12…3
Read:
SAGLvl15
SAGLvl14
SAGLvl13
Write:
Reset:
0
1
1
SAGLvl12…SAGLvl
3
1
2
1
Bit0
SAGLvl2
SAGLvl1
SAGLvl0
1
1
1
SAGThe detection threshold is set based on the corrected voltage peak value.
The specific formula is: detection thresholdSAGLvl=Un*2 5̂*1.414*D
Un: Indicates the corrected voltage effective value
D: expressSAGDetection voltage percentage
For example, three-phase four-wire system, corrected rated voltage valueUnfor220V, detection voltage percentageDfor50%, then the detection threshold is registered
The parameters of the device are220*2 5̂*1.414*50%=0x1372. That is to say, the0x1372After setting to the detection threshold register, when the input voltage
lower thanUnof50%,Right now110Vtime, and lasts longer thanCyclengthThe set length appearsSAG.
4.4.25Overcurrent detection threshold setting register (0x71)
Address:71H
OverCurrentLevel(oeLh)
Bit15
14
13
12…3
2
1
Bit0
Read:
OILvl15
OILvl14
OILvl13
OILvl12…OILvl3
OILvl2
OILvl1
OILvl0
Write:
Reset:
0
1
1
1
1
1
1
The overcurrent detection threshold is set based on the corrected current peak value.
The formula is:OILvl=Imax*2 5̂*1.414*N*D
OILvl——Detection threshold
Imax——Indicates the maximum current effective value after correction
D——Indicates the overcurrent detection current percentage
For example:
Maximum current value after correctionImaxfor60A, detection voltage percentageDfor150%, in the current effective value calculation formulaN=6,Then check
The parameters of the measurement threshold register are60*2 5̂*1.414*6*150%=0x5F71. That is to say, the0x5F71After setting to the detection threshold register,
When the input current is higher than90Atime, and lasts longer thanCyclengthOvercurrent occurs at the set length.
4.4.26Automatic temperature compensation related registers (0x6B~0x6F)(new)
4.4.26.1 ToffsetCalibration register (calibration parameter0x6B)
conductTPSconsistency correction such thatTPSData(Measurement parameters0x2A) value at room temperature (25degree) the output is0x00. Correction method: straight
readTPSData(Measurement parameters0x2A) at room temperature (25degree) output value, written directlyToffsetCalibration register (calibration parameter0x6B)Right now
Can.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page59 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
4.4.26.2 TgainCorrection register (0x6C)
for compensationTPSThe coefficient does not require correction.
4.4.26.3 VrefgainThe compensation curve coefficient ofTCoffA,TCoffB,TCcoffC(0x6D~0x6F)
1)considerVrefand external resistors (optional20 ppmRecommended coefficients when factoring in positive temperature coefficient resistance:
0x6D=0xFF11;0x6E=0x2B53;0x6F=0xD483
2) only compensatesATT7022EselfVrefRecommended coefficients for temperature characteristics:0x6D=0xFF00;0x6E=0x0DB8;0x6F=0xD1DA
4.4.27Algorithm Control Register (0x70)
Address:0x
Added new control register (w_EMCfg)
Write
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
-----
-----
-----
-----
-----
-----
Fcntmod
CHLSel1
0
0
0
0
0
0
0
0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
CHLSel0
-----
EnHarmon
QEnergySel
Ymodsel
ISUMSel
VrefAotu_en
ModSel
0
0
0
0
0
Read
Reset
Write
IC
Read
Reset
0
0
Bit name
Bit00
0
describe
ModSel: When the external pin SEL=1, the working mode is determined through the ModSel control bit in the register. ModSel =0 means
three-phase four-wire system; ModSel =1 means three-phase three-wire system
Bit01
VrefAotu_en: Reference automatic compensation enable
VrefAotu_en=1, use automatic compensation. At this time, the internally calculated allgain = Vrefgain comes from the internally calculated value
and is written to the register VrefGain at the same time.
VrefAotu_en=0, turn off automatic compensation, the function is the same as the original ATT7022E, that is, the internally calculated
allgain=Allgain (0x32, derived from the calibration register)
Bit02
ISUMSel: Current vector algorithm selection bit, see Chapter 4.2.2 (page36) for the
formula. ISUMSel=0, algorithm 1 is used; ISUMSel=1, algorithm 2 is used.
Bit03
Ymodsel: angle algorithm selection bit
Measurement parameter address
Ymodsel = 0 (old algorithm one) Ymodsel = 1 (new algorithm two)
0x26
0x27
0x28
0x18
0x19
0x1A
Bit04
YU
YU
ikB
Pga
ikB
pgc
YUa
YU
YU
Yya
ikB
ikB
QEnergySel: Reactive energy selection register,
QEnergySel=0, select full wave reactive power; QEnergySel=1, select fundamental wave reactive power;
Bit05
EnHarmonic: Fundamental wave measurement and harmonic measurement switching control bit EnHarmonic=1, select
harmonic measurement; EnHarmonic=0, select fundamental wave measurement.
Bit8~7
ChlSel[1..0]
Choose which signal to use as a reference when selecting a new algorithm for the included angle.
ChlSel1
0
0
1
Chlsel0
0
1
0
reference vector
Ua
Ub
Uc
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page60 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
Bit09
Fcntmod: Electric energy and fast pulse accumulation mode selection bit
Fcntmod=0, Fcnt+1 is positive, Fcnt-1 is negative (old method)
Fcntmod=1, Fcnt+1 method is used in all cases (new method)
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page61 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
5
Electrical Specifications
5B
5.1 Electrical parameters
Test Conditions:Vcc=AVcc=3.3V,EMUClock selection921.6kHz(default), room temperature.
parameter
minimum value
Typical value
maximum value
unit
Test Conditions
Electric energy measurement parameters
0.1
0.1
0.1
0.5
0.2
0.5
Active energy measurement error
Reactive energy measurement error
Voltage rms measurement error
Current effective value measurement error
%
%
%
%
5000:1
5000:1
500:1
5000:1
500:1
5000:1
ADC parameters
Input voltage range
DC input impedance
Signal-to-noise ratio (SNR)
ADC sampling rate
Bandwidth (-3dB)
Reference voltage
1.17
Reference voltage temperature coefficient
530
75
28.8
14.4
14.4
7.2
1.195
±10
±710
mV
kΩ
dB
kHz
Effective value 500mV
EMU clock 1.8432MHz
EMU clock 921.6kHz
kHz
EMU clock 1.8432MHz
EMU clock 921.6kHz
1.22
±15
V
ppm
Power consumption
4.7
2.6
7.0
4.5
EMU clock selection 921.6kHz
EMU clock selection 1.8432MHz
mA
All 7 ADCs are turned on
Only open 3 channels of current ADC
mA
All 7 ADCs are turned on
Only open 3 channels of current ADC
DC parameters
Digital supply voltage Vcc
Analog supply voltage AVcc
3.0
3.0
3.3
3.3
5
Pulse port CF output drive current
VOH(CF1\CF2\CF3\CF4\REVP)
0.9*Vcc
0.1*Vcc
VOL(CF1\CF2\CF3\CF4\REVP)
Logic input high level
0.8*Vcc
0.2*Vcc
Logic input low level
Logic output high level
0.9*Vcc
0.1*Vcc
Logic output low level
5.5296
crystal
range of working temperature
Storage temperature range
3.6
3.6
10
- 40
- 65
85
150
V
V
mA
V
V
V
V
V
V
MHz
Spend
Spend
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page62 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
6
Calibration process
6B
in the rightATT7022E/26E/28EWhen calibrating a designed electric meter, a standard electric energy meter must be provided. When calibrating the standard electric energy meter,
Active energy pulse outputCF1It can be directly connected to the standard meter, and then calibrated according to the error reading of the standard electric energy meter.
ATT7022E/26E/28EMake corrections,ATT7022E/26E/28EOnly the active power needs to be corrected, and the reactive power gain correction
Just write the same coefficient as the active power gain correction into the register. For the correction of the apparent table, please refer to the following instructions.
Calibration process:
picture6-1Calibration process
parameter settings:
picture6-2Parameter setting process
Phase correction:
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page63 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
picture6-3APhase correction process
School schedule and recommendations
1) Write to the mode configuration register (0x01):0xB97E. Turning on the Vref Chopper function improves Vref performance; turning on the effective power value is slow
high-speed mode to reduce jitter; configure the EMU clock to 921.6kHz to reduce power consumption; turn on 6 ADCs and turn off the In channel.
2) Write: 0xF804 to the EMU unit configuration register (0x03). Turn on energy measurement, use power as the basis for latent starting, turn off fundamental power
Yes, choose PQS mode for apparent power energy.
3) Analog module enable register (0x31)Write:0x3427, turn on the high-pass filter; turn onBORPower monitoring circuit.
4) Write the HFconst parameter (the same table writes the same HFconst value)
Method 1: Calculation based on input signal voltage
HFConst＝INT[25920000000*G*G*Vu*Vi/(EC*Un*Ib)]
Among them G=1.163, INT is rounded calculation
for example:
The meter constant (EC) is set to 6400 and the power factor is 1.
Un (rated voltage) is 220V, Ib (rated current) is 1.5A, Vu (voltage of voltage channel) is 0.22V
Vi (voltage of the current channel) is 50mV
Calculated according to the formula: HFConst＝2.592*Vu*Vi*10̂ 10*1.06*1.06*/(EC*Un*Ib)
HFConst = 2.592*0.22 *0.05*10̂ 10*1.163*1.163 / (6400*220*1.5) = 0x00B6
Method 2: Adjust HFconst according to the error
For example, if HFconst writes the initial value 0x0080 and reads the error from the standard table as err%, then adjust the error to ±10% according to the formula
Within: HFconst=0x0080* (1+err%)
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page64 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
for example:
Set the electric meter constant (EC) to 6400, the power factor to 1, write the value 0x0080 to the HFCONST register, and observe the standard meter
The error shown is 52.8%.
According to the formula: HFCONST = 0x0080 * (1+Err)
Calculated: HFCONST = 0x0080 * (1+52.8%) = 0x00C3
5) Power gain correction
Calculate according to the description of the power gain correction register. Note that Pgain\Qgain\Sgain can be written with the same value.
6) Phase correction
See correction register description.
7) Voltage and current effective value correction
See correction register description.
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page65 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
7
Chip packaging
7B
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page66 of 67
ATT7022E/26E/28E User Manual (P73-13-45)
8
typical application
8B
8.1 Recommended process for obtaining FFT from sampled data
1) Turn on the sampling function (0xC0 command: channel selection + start);
2) Wait for the sampling data to be completed;
3) Set the starting address of the user read pointer (via the 0xC1 command) and read the sampling data (0x7F address);
4) Preprocess the data;
5) Perform FFT transformation;
6) If the next operation is required, perform steps 1 to 5.
8.2 Recommended process for sub-harmonic analysis of synchronous buffered data
7) Turn on the synchronous sampling function (0xC5 command: select automatic synchronization or manual synchronization + start command);
8) Wait for the completion of sampling data (delay 50ms or query 0x7E write pointer);
9) Read sampling data (0x7F buffer data reading address);
10) Extract the data and extract every 7 pieces of data in order to form Ua, Ub, Uc, Ia, Ib, Ic, In
11) FFT transformation;
12) Adjust the gain coefficient on the data. The sub-harmonic gain coefficients of each 0th to 21st harmonic are:
[
]
1.00000000000000
1.00000000000000
1.00362187060665
1.00969162604172
1.01825901332331
1.02939520355364
1.04319331488342
1.05977378492696
1.07927443401769
1.10187021533519
1.12776405100967
1.15718387269867
1.19042304659018
1.22777858879375
1.26962990669109
1.31639900106378
1.36856044411429
1.42671649331348
1.49149037623292
1.56363705732262
1.64398947583697
1.73366802372421
13) If you need the next operation, first turn off the synchronous sampling function (write 0 in 0xC5), and then execute steps 1 to 6.
8.3 Typical application circuit schematic diagram
Juquan Optoelectronics Technology (Shanghai) Co., Ltd.
Rev 3.4
http://www.hitrendtech.com
Page67 of 67
R3
TEST-1-R
X12
1
2
1
2
2
3
680
2%
1
2
3
4
5
6
7
RJ14
UC
1N4007RL
mbs-6
ACIN1
3GND
R53%4
X3
1
2
1
TEST-1-R
1
R35
20805 10
R53%6
0805 10
5%
1.2K
5% 08R0453
0.1U
0805
1
2
3
4
5
6
7
8
9
10
11
AGND1
V3N
0805
0.033U
1.2K 0805
5% GND
V5P
0.033U
0805
GND
1.2K
5% 08R0455
V5N
100P
0603
C57
C28
C27
CS_AT
GND
SLEEP
CF4
CF3
NC
CF2
CF1
SEL
NC1
TEST
GND1
ATT7022E
GND
CF4
CF3
CF2
CF1
R60
GND
0805
C46
C45
44 GND
43
OSCO
42
OSCI
41 VATT3.3
40
39 VDD1.8V
38
37
36
35
34 VATT3.3
RESET
IRQ
V1P
V1N
REFC
V3P
V3N
AGND
V5P
V5N
C54
0805
GND
100P
0603
C56
2
V1P
V1N
V3P
V3N
GND
V5P
V5N
GND
GND2
OSCO
OSCI
VCC
REVP
VDD
DOUT
DIN
SCLK
CS
VCC1
1
C23
4.7U
35V
CA42
C26
R52 3
C21
V3P
0.033U
R44
PC250
1
C20
GND
1
20805 10
5%
I162
MBS-6
TP3
1.2K 0805
R33 5% GND
0805 10
4VDC_IN
D6
0805
0.033U
R42
RSGND
DC+
DC-
ACIN0
V1N
RST_AT
IRQ_AT
0.1U
0805
I79
33
32
31
30
29
28
27
26
25
twenty four
twenty three
0.1U
0805
0.1U
0805
10K
5%
VATT3.3
0.1U
0805
0.1U
0805
VATT3.3
0805
0.033U
C
201SS-1*40_1X2
FSC
4
5
6 1
7 2
GND
C24 0805
0.1U
0805
V6P
V6N
V0P
twenty two V0N
trans-dt098a
X2
1
2
RSVDC
DO-41
R53%2
15P
0805
twenty one
GND1
1
1 VD2 2
TRANS-DT098A
TP4 TEST-1-R
1
I161
PC250
T3
I6
080510
1.2K
080510
5% 5% 08R0451
201SS-1*40_1X2
1
1
2
10K
5%
U1
AVCC1
3GND
25V
10U CA42
V4P
V4N
D2
MBS-6
TP5
C9
2
4VDC_IN
DC+
DC-
0805
GND
2
0805C136
AGND2
ACIN1
0.033U
5%
0
AVCC
V2P
V2N
ACIN0
X1
1
2
V1P
R40
1.2K 0805
R31 5% GND
5% 0805
0805GND
12
13
14
V2N
GND15
16
V4P
17
V4N
T3.3 18
19
VVA6TP
20
V6N
mbs-6
PC250
2
C8
GND
GND
2 VD4 21
RSGND
MRA4007T3
VATT3.3R46
5.6M
15P
VAVT2TP3.3
1N4007RL
25V470U
CD110
twenty twoOSCO
R59
SOT-23
1 VD9 2VDD3.3
SM
SCLK_AT
G1
OSCI1 1
VTI4R
0805 5%
0.1U
0805
CRYSTAL
UF-16.384M-15-20PPM
IRLML6302
1
1.2K
DOUT_AT
DIN_AT
C44
2% RJ14
CURRENT
FSC
4
5
6 1
7 2
GND
C43
4
5
6
7
1VMAIN
2
3
GND
0.1U
0805
0.1U
0805
CTL_PATT R47
1
R2
680
1
2
1
2
3
2
3
25V 470U
CD110
DO-41
trans-dt098a
GND1
VIN
VOUT
VSS2
VSS1
NC1 ON/OFF
7
GND
VMAIN
4.7U
35V
CA42
C25
TEST-1-R
MRA4007T3
1 VD1 2RSVDC
TRANS-DT098A
VD10
GND
CD110
6
5
4
2
300MAH
C22
UB 1
ON
SM
13
6
VDD1.8V
X4
D1
s-1142bxxh
C10
C3
C4
0.1U
0805
35V 1000U
T2
I11
2
1
C1
2
I163
VOUT
JP
2
TP2
B
MBS-6
D3
VIN
2
1
2
3
1
R1
2% RJ14
m7805t M7805T
4VDC_IN1
DC+
DC-
C2
A
THIS DOCUM
E NT CONTAINS INFORMATION
R
P RO
P RIETARY TO HIT CORPORATION (HIT), USE OR DISCLOSURE
WITHOUT THE WRITTE N PER
MISSION OF AN OFFICER OF HIT IS EXPRESSLY FORBIDDEN.
mbs-6
ACIN1
ACIN0
I148
ON SM
MRA4007T3
1 1
GND2 2
BATTERY 6~7.2V
S-1142BXXH
RSGND
D5 I18
SM
C19
680
4
5
6 1
7 2
CD110
0.1U
0805
1
MRA4007T3
C18
4
5
6
7
0.1U
0805
1RSVCC
C17
1
2
3
2
3
201SS-1*40_1X2
X11
1
2
1N4007RL
trans-dt098a
GND1
X10
1
2
FSC
TRANS-DT098A
470U
25V
78L05
VCC5V
5
JUMPER-2PIN
2 VD8
VDD5.0
C16
TEST-1-R
DO-41
VIN
POWER
C15
T1
UA 1TP1 I13
3
RSVDC
D4
I22
C14
1 VD3 2
78l05
4
2
3
ON
2
ON
1
0805
0805
R22
0805
R25
UB
R5
0805
R8
0805
0805
R11
0805
R14
R17
0805
R20
0805
0805
R23
R28
5% 39K 5% 39K 5% 39K 5% 39K 5% 39K 5% 39K 5% 39K 5% 39K
0805
R26
D
UC
R6
0805
R9
0805
0805
R12
0805
R15
R18
0805
R21
0805
0805
R24
0805
R27
5% 39K 5% 39K 5% 39K 5% 39K 5% 39K 5% 39K 5% 39K 5% 39K
VOLTAGE
R29
5% 39K 5% 39K 5% 39K 5% 39K 5% 39K 5% 39K 5% 39K 5% 39K
V2P
5%
1.2K
0805
GND
V2N
0.033U
0805
0805
GND
0805
GND
0805
0.033U
R48
0.033U
0805
5%
1.2K
0805
GND
0.033U
R49
0.033U
0805
0805
GND
I153
jJ
0.033U
0805
DRAWN
CHECKED
1
2
3
U8
1
2
3
DRAWING
PS2501L-2
1
4
2
3
CF3
CF_SEL
CF4
41
2
3
1
2
201SS-1*40_1X2
4.7K
HL2
5% 0805
1
2
910
5% 0805
MODEL:
TITLE:
3MMLL-304HD2E1
GND
2
D7
R54
CF_SEL
0805
V6N
5%
1.2K
4.7K
HL1
5% 0805
1
2
910
5% 0805
HIT CORPORATION
SIZE:A4
R53
CF1
0805
V4N
V6P
5%
1.2K
5%
1.2K
GND
V4P
5%
1.2K
C11
R19
C12
0805
C13
R16
R37
0805
R13
R38
0805
R10
R39
0805
C5
R7
C6
0805
C7
R4
R30
UA
3MMLL-304HD2E1
2
GND
R50
0 0805
CF2
D8
PS2501L-2
1
2
4
3
41
2
3
X5
X6
1
2
201SS-1*40_1X2
5%
SHEET
NO.:
VERSION:
OF