Chapter 01 Semiconductor Basics Dr. Daoli Zhang Office: Rm C836 OEI Bldg Email: zhang-daoli@163.com WeChat: SIC-HUST Outline 1. Introduction 2. GaAs Crystal Structure 3. Bonding in III-V Semiconductors 4. Energy Band Structure 5. Crystal Defects 6. Other Properties III–V Integrated Circuit Fabrication Technology Introduction Gallium arsenide as a semiconductor material was originally investigated because of its superior electronic transport properties and other related advantageous material properties. Electron mobility in GaAs and other III–V compounds is higher than in silicon and these materials are useful in optical devices because of the nature of their band structure. GaAs can be made in semi-insulating form and this makes it possible to make monolithic circuits with ease on GaAs substrates. Radiation hardness was another driving force behind the original funding of research by the government and the defense industry. However, silicon devices have made tremendous progress in speed and complexity and this makes it difficult for GaAs circuits to compete in digital circuits. However, because of the simplicity and shortness of the GaAs integrated circuit (IC) fabrication process and the fact that high power and speed can be achieved simultaneously, GaAs circuits have established a niche in analog ICs. Future possibilities of combining optical and electronic functions into single chips and the possibility of combining superfast III–V compounds into silicon substrates keep the interest in III–V electronics alive. III–V Integrated Circuit Fabrication Technology Introduction Silicon and germanium are elemental semiconductors. Silicon happens to have properties that are well suited to large-scale integration. GaAs is a compound and its properties make it difficult to process it. Loss of arsenic due to dissociation and lack of a good native oxide make it less attractive from the device processing point of view. Good insulating behavior more or less makes up for the problems of lower thermal conductivity. Low hole mobility in GaAs leads to slower p-type channel devices. However, deft processing innovations have turned some of these disadvantages into advantages. The lack of oxide has been addressed by use of Schottky gates, simplifying the process and helping radiation hardness. Enhancement and depletion mode field-effect transistor (FET) circuits have been designed and built. III–V devices are commonly made using epitaxial wafers and the advances in epitaxial growth have led to devices not otherwise possible with diffusion-dominated silicon-like processing. III–V Integrated Circuit Fabrication Technology Introduction Defense and space applications were the reason for funding of GaAs process development by the government and the defense industry. As the industry matured, emphasis shifted to commercial products like front-end receivers. Emphasis shifted from digital to mixed-signal and analog circuits with the advent of the wireless era. Use of high frequencies to avoid spectrum crowding, new modulation, and channel division techniques needing linear amplifiers finally established a niche for III–V semiconductors that cannot be filled by silicon-based systems. GaAs is a direct bandgap material and is used for fabricating optical devices like lightemitting diodes (LEDs) and lasers. Some of the processing methods, from crystal growth to packaging, are common to IC fabrication and thus drive the technology. Despite the recent downturn of the telecommunications industry (2005), the market for highfrequency devices operating near 40 GHz is bound to make a comeback. III–V Integrated Circuit Fabrication Technology Introduction III–V Device Applications Here are a few applications of GaAs devices: GaAs metal semiconductor FETs (MESFETs) and epi-FETs: Front-end receiver (FER) gate arrays, low-noise amplifier (LNA), X and Ku band applications GaAs pseudomorphic high-electron-mobility transistors (PHEMTs): Power amplifier (PA) switches, low-noise amplifiers GaAs heterojunction bipolar transistors (HBTs): PA, prescalers, multiplexer (mux), demultiplexer (demux), A to D converters InP HBTs: 40 GHz optical applications InP HEMTs: 300 GHz GaN diodes, FETs: Power conversion GaN HEMTs: High-power amplifiers III–V Integrated Circuit Fabrication Technology GaAs Crystal Structure GaAs is formed by combining group III gallium with group V arsenic to form a single-crystalline semiconductor compound. Solid materials can be classified into three broad categories: amorphous, polycrystalline, and crystalline. Most semiconductor materials are single crystalline, although some practical applications require amorphous or polycrystalline material because of form requirements like flexibility and cost. In amorphous solids, there is no geometrical regularity or periodicity. The atoms are randomly distributed without any long- or short-range order and the bonding to neighbors is not uniform, although the solid is tightly bound. In a crystalline material, the structure has perfect order and the periodicity extends to the edges of the solid, with only a few imperfections or impurities in the whole solid. Polycrystalline solids are in between these two in structure. Smaller single-crystal grains are spread through the solid in random order, with grain boundaries in between (Figure 1). Figure 1 Simplified 2D representations of crystalline, amorphous, and polycrystalline solids. III–V Integrated Circuit Fabrication Technology GaAs Crystal Structure The basic building block of a crystalline solid is called a unit cell. Figure 2 shows the unit cell for a cubic solid. The unit cell for most semiconductors is of the face-centered cubic (fcc) type, where the unit cell has one atom on the corners of the cube and one atom in the center of each face. III–V compounds like GaAs have the zincblende structure, which can be regarded as two interpenetrating fcc lattices (Figure 3), one of Ga and the other of As. For silicon, which has a diamond structure, the two sublattices are identical. The lattice constant is defined as the distance between the corners of the unit cell. It can be seen in Figure 3 that each Ga or As has four neighbor atoms forming a tetrahedron. The unit cell size of GaAs is 5.65 Å. Crystalline and few other properties of GaAs are compared to silicon. Figure 2 Arrangement of unit cells in single-crystal and polycrystalline materials. Figure 3 Unit cell of a GaAs crystal and as two fcc lattices. III–V Integrated Circuit Fabrication Technology GaAs Crystal Structure Crystal growth and etching behavior of solids can be better explained if the structure in different directions and along different planes is well understood. Figures 4 and 5 show the zinc-blende unit cell truncated along the face diagonal and the body diagonal. The terminology of Miller indices is used to describe directions at planes within the crystal. A set of three integers enclosed in square brackets is used to specify direction in the lattice. [abc] defines a direction whose vector is ax^+by^+cz^, where x^, y^, and z^ are unit Cartesian vectors along x, y, and z. Surfaces perpendicular to [abc] are designated as (abc). Some common crystalline directions and planes are shown in Figure 4. Also, <abc> indicates a family of [abc] directions that are equivalent. {abc} indicates a family of planes equivalent to (abc). Figure 4 Truncation of a GaAs unit cube by the (110) plane and the (111) plane. Figure 5 GaAs wafer with (100) orientation showing cleavage planes and anisotropy in etch cross sections. III–V Integrated Circuit Fabrication Technology GaAs Crystal Structure Single-crystal boules of semiconductors are grown and then sliced into wafers for circuit fabrication along certain orientations. The most commonly used wafer orientation for GaAs is (100). The {111} family of planes contains only one type of atoms, either Ga or As. The letter A or B is attached to the plane family designation to denote Ga or As planes. {111}A contains only Ga atoms and {111}B contains only As atoms. This distinction is important for understanding etching and other directional properties of III–V semiconductors. GaAs wafers can be easily cleaved or broken into a die by scribing along the crystal orientations. Figure 5 shows the top view and cross sections of a wafer oriented along the (100) plane. The two cross sections show different behaviors in the two perpendicular directions due to atomic density differences, as shown in Figure 6, which will be discussed further in wet etching. The density of atoms in different directions is also important for epi-growth and ion implantation. (a) 110 (b) 112 Figure 6 View of a GaAs lattice from two different directions (a) along the [110] axis and (b) along the [112] axis. III–V Integrated Circuit Fabrication Technology GaAs Crystal Structure Table 2 Room temperature properties of GaAs Table 1 Comparison of silicon and GaAs Semiconductor Crystal structure Lattice constant Density Melting point Thermal expansion coefficient Thermal conductivity Energy gap Dielectric constant Intrinsic carrier concentration GaAs Zinc blende 5.646 Å 5.32 g/cm3 1238°C 6.86×10–6 @ 300K 0.46 W/cm-°C 1.42 eV 12.85 8 × 106/cm3 Si Diamond 5.431 Å 2.328 g/cm3 1412°C 2.6×10–6@ 300K 1.5 W/cm-°C 1.12 eV 11.9 1.45 × 1010/cm3 Property Crystal structure Lattice constant Density Atomic density Molecular weight Bulk modulus Sheer modulus Coefficient of thermal expansion Specific heat Lattice thermal conductivity Dielectric constant Bandgap Threshold field Peak drift velocity Electron mobility (undoped) Hole mobility (undoped) Melting point Parameter Zinc blende 5.646 Å 5.32 g/cm3 4.5×1022 atoms/cm3 144.64 7.55×1011 dyn/cm2 3.26×1011 dyn/cm2 5.8 × 10–6 /K 0.327 J/g-K 0.55 W/cm-°C 12.85 1.42 eV 3.3 kV/cm 2.1 × 107 cm/sec 8500 cm2/V-sec 400 cm2/V-sec 1238°C III–V Integrated Circuit Fabrication Technology Bonding in III–V Semiconductors Elemental semiconductors are held together by covalent bonds, in which valence electrons are shared by neighboring atoms. Insulating materials are generally ionic crystals, where the bonding is due to attraction between ions; in NaCl the ions are created by the transfer of an electron from Na to Cl. In III–V compounds, the bonding is mostly covalent but does have considerable ionic character. The ionic nature goes up for II–VI semiconductors. Figure 7 shows a schematic bonding diagram. All Ga and As atoms have eight shared electrons surrounding them (five from As and three from Ga). At higher temperatures thermal energy excites some electrons into higher energy states where they are free to move around as carriers. This free-electron concentration, which goes up with temperature, is called intrinsic carrier concentration. This concentration is very small, of the order of 1010/cm3 at room temperature (compared to 1023/cm3 atomic concentration). Figure 7 Atomic bonding in (a) p-type Bedoped GaAs and (b) n-type Si-doped GaAs. III–V Integrated Circuit Fabrication Technology Bonding in III–V Semiconductors Large concentrations of carriers are introduced in a controlled manner in semiconductors by using doping techniques. If a silicon atom is placed in place of a gallium atom on a GaAs lattice, the extra electron from the outer shell of Si is relatively free to move around at ordinary temperatures. This gives rise to an n-type semiconductor. On the other hand, if a Ga atom is replaced by a Be atom, which has only two electrons in the outer shell, it results in a missing electron or a hole. Electrons from a neighboring atom can jump into this hole and thus the hole can move around. This creates a p-type semiconductor, where the conduction is said to take place by movement of holes. The dynamics and mobility of charge carriers vary with material and crystal structure and can be better discussed after the introduction of band structure. III–V Integrated Circuit Fabrication Technology Energy Band Structure Electrons in free space can have a continuous range of energies. In an isolated atom, electrons can have only discrete energy values, which can be determined by quantum mechanics. As atoms are brought close together to form molecules and crystals, the energy levels get split into bands of energies (Figure 8). The Pauli exclusion principle is still followed—no two electrons can occupy the same quantum state. The bands of interest in semiconductors are the ones formed by the outer shells of Figure 8 Energy band diagram showing electrons. These are called the valence and the conduction creation of bands as discrete atoms come band and are separated by the energy bandgap. The size of together to form a solid. the gap determines if a material is an insulator, a semiconductor, or a conductor (Figure 9). In a semiconductor at 0 K temperature, the electrons are confined to the valence band and the material behaves as an insulator. At higher temperature, the same electrons have sufficient thermal energy to make a transition to the Figure 9 Energy band diagram of undoped (a) and heavily n-type doped semiconductor (b). conduction band, where they are free to move and carry a current. III–V Integrated Circuit Fabrication Technology Energy Band Structure The probability of an electron having enough energy to make the transition is given by the Fermi distribution function. Figure 10 shows the Fermi level within the bandgap of a semiconductor. The Fermi level, EF, is defined as the energy at which the probability function is equal to one-half. For intrinsic semiconductors, EF is at the center of the gap. For doped crystals, n- or p-type extrinsic semiconductors, the Fermi level is near the conduction band or the valence band. The energy band diagram is referenced to a potential called the vacuum potential. The electron affinity, χ, is the energy required to excite the electron from the conduction band to the vacuum level. Figure 10 Energy band diagrams of a semiconductor showing electron affinity and Fermi level. III–V Integrated Circuit Fabrication Technology Energy Band Structure The energy band diagrams of three types of materials are shown in Figure 11. In insulators, the magnitude of the gap is of the order of 5 eV and above. In metals, the conduction and valence bands overlap and or are partially filled, so electrons can move freely into other states. Since there is no gap, the number of electrons is large and conductivity is high. In semiconductors, the situation is between these—the gap is small. As mentioned earlier, just as the effective mass of electrons varies depending upon the crystal direction, the bandgap also varies. Band diagrams for GaAs and Si are shown in Figure 12 along [111] and [100] crystal directions. In GaAs, a direct bandgap material, the lowest gap is seen to be lowest at k = 0. In Si the lowest gap is along [100], and the gap is indirect. The details of the band structure are very important for the understanding of optical and electronic devices. Insulator Semiconductor Metal Figure 11 Energy band diagrams of three types of materials. Figure 12 (a) Energy band diagrams along two crystal directions for GaAs (left) and Si (right). (b) Comparison of energy bandgaps of Si and GaAs along [100]; the effective electron mass in the lower valley of the GaAs conduction band is also shown. III–V Integrated Circuit Fabrication Technology Energy Band Structure Band Structure and Mobility When an electron moves in free space its speed or momentum is determined by the applied field. In a crystal, an electron also encounters the periodic potential of the atoms, which varies along different directions in the crystal. An easy approach to deal with this complex problem is to assume the electron to have an effective mass me, which differs from the mass in free space. The kinetic energy of the electron, Ek, is given by p2 Ek 2me where p is the electron’s momentum. The effective masses of electrons (and holes) can be different in different semiconducting materials. In GaAs, the electron wave is accelerated with respect to the lattice due to the applied field, and the effective mass is 0.067 me, whereas the holes are decelerated, or the holes are heavy. Electron velocities in devices based on n-type GaAs are higher and result in a better high-frequency response. The energy band structures of GaAs and Si are shown in Figure 12b. Drift velocity of electrons in GaAs is shown in Figure 13. Figure 13 Electron velocity as a function of electric field, illustrating the mobility differences between silicon and GaAs (at two different doping levels). Peak mobility of GaAs in the linear region can be about six times greater than silicon. At typical fields may be a factor of 2 higher. Electron mobility is also influenced by impurity scattering in doped semiconductors and will be discussed further under HEMTs. III–V Integrated Circuit Fabrication Technology Energy Band Structure Free Carrier Concentration and Fermi Level The concentration of electrons and holes in a semiconductor is determined by the distribution of electrons in the valence and conduction bands and the concentration of donors and acceptors and the location of their levels in the energy bandgap. The Pauli exclusion principle leads to the Fermi–Dirac distribution (Figure 14). Figure 14 Schematic diagram for an intrinsic (a), n-type (b), and p-type (c) semiconductor, showing a band diagram, density of states, Fermi–Dirac distribution, and carrier concentration. III–V Integrated Circuit Fabrication Technology Energy Band Structure Figure 15a shows the E–k diagram for electrons in a semiconductor in which the band is almost empty, with its bottom near levels that are full, like a donor. Figure 15b shows the corresponding diagram for a band that is full, the top of which is near energy levels of acceptors, as in a p-type semiconductor. The shape of the energy curve varies with the direction in a crystal lattice. In the diagram, the x direction is shown. In the following discussion, electron concentrations are supposed to be low (nondegenerate), and equilibrium is assumed. The number of electrons is calculated by integrating the product of N(E), the density of states, and the electron distribution over the whole energy range. In Figure 15 E–k (energy–wave number diagram) for motion the case of electrons in the conduction band, that is, of electrons in the conduction band (a), which is almost empty, and in the valance band (b), which is almost full, from Ec to infinity (∞) n N E F E dE except for some holes. Ec III–V Integrated Circuit Fabrication Technology Energy Band Structure The electron concentration is given by the Fermi–Dirac distribution function. The electron distribution function Ec E F E Fn E exp kT In the case of the conduction band, the electrons are mostly near the bottom of the conduction band (see h 2k 2 Figure 15 for E1 and E2 definitions). E1 E Ec where me is the effective mass of electrons. 2me For holes, similarly (see Figure 15b) h 2k 2 E Ev E2 Ev 2mh For holes the distribution represents the probability that a valence band state with energy E is vacant. 1 E F E E2 EF E exp 1 Fp E exp E E kT F kT 1 exp kT where E = Ev – E2. On the basis of the above equations and assumptions, the electron concentration can be 3 shown to be * 2 Ec E F 2 πm kT e where n N exp N 2 c kT c h2 III–V Integrated Circuit Fabrication Technology Energy Band Structure And similarly for holes E Ev p N v exp F kT 2 πmh* kT Nv 2 2 h 3 2 The product pn is given by E Ev np N c N v exp c kT In a pure semiconductor, where Na = Nd = 0, electrons and holes are created by thermal excitation, so n = p. Namely, n = p = ni. Eg ni N c N v exp kT where Ec – Ev=Eg is the bandgap. E v Ec 3kT me Also, E F Ei 2 4 ln mh The Fermi level is close to the center of the energy bandgap, the deviation being a function of the ratio of the effective mass of holes and electrons. III–V Integrated Circuit Fabrication Technology Energy Band Structure Energy Levels in Doped Semiconductors As described earlier, donor or acceptor levels are introduced into a pure semiconductor to make these n or p type. These levels are close to the conduction band or valence band. A donor atom in GaAs, like Si (see Figure 7b) is neutral when filled with its electron but has a positive charge when empty. Similarly a Be atom is neutral when empty but has a negative charge when it picks up an electron. The donor atom can be considered as a hydrogen atom, so using the hydrogen atom model m0 e 4 EH 13.6eV 2 2 2 where ε0 is the permittivity of free space and m0 is the electron mass. 32 π ε0 h The donor level in a semiconductor can be derived to be ε mce Ed 0 E H m0 εs where mce is the effective mass of donor electrons. For GaAs this works out to Ed = 0.007 eV. This number is close to the measured values of shallow donors. In practice, Shubnikov–de-Hass and cyclotron resonance measurements are used to calculate values of effective mass. When a dopant is introduced, the Fermi level must adjust to maintain charge neutrality: n=Nd+ + p Nd Here Nd+, the number of ionized donors, is given by Nd E F Ed The Fermi level can be determined from the right 1 2 exp kT equation (numerically) using values of Nc, Nd, Nv, Ec, Ed, Ev, and temperature. III–V Integrated Circuit Fabrication Technology Energy Band Structure Energy Levels in Doped Semiconductors The electron concentration can be derived as N Na E n d N c exp F 2Na kT where E = E – E . d c D Nc Nd E exp D 2 2kT For Nd>>½Ncexp(–Ed/kT) >> Na. For Nd >> Na n It is plotted for Si in Figure 16a. Only within a certain temperature range, the electron density is equal to the donor concentration, n ≈ Nd. At high temperatures, the intrinsic electrons dominate, and at low temperatures, carrier freeze-out takes place. The concentration of electrons in an n-type material in equilibrium is nn0 ≈ Nd Eg 2 np ni exp From Equation for ni above kT and from charge neutrality n + Na = p + Nd. Figure 16 (a) Electron density as a function of temperature for an n-type semiconductor. (b) Fermi level position for GaAs as a function of temperature III–V Integrated Circuit Fabrication Technology Energy Band Structure Hole concentration in an n-type material at equilibrium is np0 ≈ Na Useful equations for doped semiconductors for the position of the Fermi level and carrier concentrations are listed below: N c EF = (Ec + Ev)/2 Ec E F kT exp Nd nn 0 kT and E F Ei e exp ni Similarly for p-type materials pp0≈ Na N E F E v kT exp v np0 = ni2/ pp0 = ni2/ Na Na pp 0 kT Figure 16 (a) Electron density as a function of Ei E F exp e ni temperature for an n-type semiconductor. (b) Fermi level Figure 16b shows the position of the Fermi level for position for GaAs as a function of temperature GaAs as a function of temperature for various n- and ptype doping levels, depending on the above equations. Note that at higher temperatures and low doping levels the Fermi level approaches the energy band center. III–V Integrated Circuit Fabrication Technology Energy Band Structure Impurities in GaAs As mentioned earlier, n-type extrinsic semiconductors are produced by incorporating donors into the lattice. These donors introduce excess electrons that are freed up with small energy excitation, so the energy states introduced by these (Ed) are very close to the conduction band, only a few kT below. See Figure 17a, where shallow dopants are defined as those within 3 kT. Conversely acceptors introduce states (Ea) near the valence band. It is easy for a valence band electron to jump into one of these states and create a hole. Thus Ea states are close to the valence band. If the doping concentrations are high, the states turn into a narrow band of states and the energy gap becomes very narrow. Carrier freezeout at low temperatures disappears under such conditions. Positions of common impurities of interest in GaAs are shown in Figure 17b. Figure 17 (a) Energy band diagram of GaAs with impurities (simplified to show only the crystal lattice center). (b) Measured ionization energies of common impurities of interest in GaAs. III–V Integrated Circuit Fabrication Technology Energy Band Structure Group VI elements, like S, Se, and Te, are incorporated substitutionally on the As sublattice. Having one more electron than As, these act as n-type donors and contribute one electron to the conduction band. These impurities are shallow in the energy gap, as shown in Figure 17b and listed in Table 3. Group IV impurities Ge, Si, Sn, etc., are incorporated substitutionally, mostly on the Ga sublattice, but are amphoteric like carbon and do go on the As sublattice. The net free n-type carrier concentration depends on the compensation on the As sublattice, which further depends upon the temperature of processing. Table 3 Ionization energy of shallow impurities in GaAs Impurity Type S Se Te Sn C Ge Si Cd Zn Be Mg Li n n n n n/p n/p n/p p p p p p Ionization energy (eV) From conduction band 0.0061 0.0059 0.0058 0.0060 0.0060 0.0061 0.0058 From valence band ~0.026 0.040 ~0.035 0.035 0.031 0.028 0.028 0.023, 0.05 III–V Integrated Circuit Fabrication Technology Energy Band Structure Specific impurities Silicon: Si is always present in III–V starting materials and crystals due to the fact that quartz or silica is used for processing. Silicon is commonly used as an n-type dopant. As discussed above, this is an amphoteric dopant, so activation efficiency depends upon how the Si is incorporated. Se and Te: Se is a good dopant because it goes only on the As site, so the carrier concentration can be high after ion implantation. Te is heavier and is not a good candidate for implantation; however, it is a good dopant for heavily doped n-type epigrown ternary layers. Tin, Sn: This is always n type and was used for liquid-phase epitaxy (LPE) and for diffusion. Carbon: Carbon is a shallow acceptor and a deep donor (on the Ga site). High levels of carbon can be incorporated. This dopant will be discussed in more detail in other chapters. Beryllium: This has good solid solubility, but it is a fast diffuser. Copper: This is a deep triple acceptor and a fast diffuser. Traditionally, copper has been carefully avoided in the fabrication process, and good barriers are used to avoid device degradation if copper is used as an interconnect or a backside metal. Chromium: Historically Cr doping was used to make semi-insulating GaAs, because Cr provides a level in the center of the energy band diagram. However, the adoption of carbon has replaced Cr. Oxygen: Oxygen is hard to avoid as an impurity during the fabrication process of crystals and wafers. It also goes to both Ga and As sites. Carbon and oxygen may be present in GaAs in the 1015 to 1016/cm3 range but still have electron concentration levels below 1014/cm3. In spite of this, it is better to avoid these impurities, because the electron mobility goes down as the background compensated impurity concentration goes up. III–V Integrated Circuit Fabrication Technology Crystal Defects Real semiconductor materials contain defects of the point, line, and surface type. These defects have a strong effect on device performance and reliability. Defects are produced during growth of the material or introduced during processing. Defects can also be intentional like those due to doping. A few types of common defects are described below. Point Defects Point defects can be missing atoms, vacancies, extra atoms, interstitials, misplaced atoms, or impurities. These have important effects on electronic properties as well as diffusion behavior. Simple point defects are listed below: Vacancies: These are missing atoms, for example, Ga or As for GaAs, also called Schottky defects. Interstitials: These are extra atoms, for example, an extra Si atom, as shown in Figure 18. Figure 18 Simple point defects in crystals. Vacancy (a), interstitial (b), and Frenkel pair (c). III–V Integrated Circuit Fabrication Technology Crystal Defects Frenkel defects: This is a pair of vacancy and interstitial defects close to each other, for example, a Si vacancy and a Si interstitial atom in a Si crystal. Antistructure defect: It is possible for a Ga atom to be on an As site and vice versa. Impurities present in the crystal are also point defects. In III–V compounds the type of vacancies depends upon the constituents and the growth conditions. Thus P vacancies are expected in InP growth due to higher vapor pressure of phosphorus. In GaAs, Ga and As vacancies are present depending upon the processing conditions. Ga and As vacancies act as deep acceptors and deep donors, respectively. EL2 is an important defect in GaAs that is present in crystals grown from As-rich melt or in epilayers grown under As-rich conditions. This defect causes levels in the middle of the energy bandgap of GaAs, thus creating an electron trap. A lightly doped p-type material becomes semi-insulating in the presence of these defects. Another deep-level defect complex, known as the DX center, was first seen in donor-doped AlGaAs and exhibits metastable behavior and persistent photoconductivity. All these defects interfere with device behavior and must be minimized. III–V Integrated Circuit Fabrication Technology Crystal Defects Dislocations A dislocation is an array of point defects forming a line in a perfect crystal. These are formed due to stress during growth or by enhanced point diffusion under thermal or mechanical stress. These defects cause electron trapping and affect device performance. The presence of these defects causes reduction of electron mobility in HEMT-type devices, recombination centers in HBT, and lower quantum efficiency in LEDs and laser devices. Also, the presence of these causes enhanced rate of diffusion and thus affects reliability. During development of crystal growth and epitaxial processes, considerable attention is given to defect reduction. There are two main types of dislocations, edge and screw. An edge dislocation is an extra plane of atoms in an otherwise perfect crystal. An extra plane ABCD, as shown in Figure 19, results in a line dislocation AD. Distortion in concentrated along this line. An edge dislocation is produced by applying shear force; the plane along which the force is applied in known as the slip plane. Figure 19 Schematic diagram of an edge dislocation along the line AD. III–V Integrated Circuit Fabrication Technology Crystal Defects Application of shear stress can also cause creation of a line defect, known as screw dislocation, illustrated in Figure 20. Dislocations can move along a slip plane under application of stress. They can also climb, which is move 90° to the slip plane, by displacement of atoms to interstitial sites. Figure 20 Screw dislocation produced by the application of shear stress. III–V Integrated Circuit Fabrication Technology Crystal Defects Other Defects A high degree of dislocations may lead to formation of large defects, a common one being twins. When one portion of a crystal is not oriented exactly with the rest, a twin is formed, as shown in Figure 21. The atoms at the boundary are in intimate contact with others, but a clear discontinuity exists. Twinning occurs when a portion of the growing crystal is not free to move during growth, but is somehow restricted, for example, by the boat or vertical container. If a large number of broken bonds is present, and the orientation difference is over a certain limit, a grain boundary is formed. A low-angle grain boundary is shown in Figure 22. A number of these may be present in a large crystal. Figure 21 A twin produced misorientation in a crystal. by Figure 22 Low-angle grain boundary between two sections of a crystal. III–V Integrated Circuit Fabrication Technology Other Properties Thermal characteristics: Thermal conductivity of GaAs is low, one-third that of silicon, 0.55W/cm-K. High thermal resistance limits the packing density of devices on GaAs. Too high a packing density would cause the temperature of the junction region to be too high for long-term, stable performance. Thus power-handling capability and reliability are related to the junction temperature during normal operation. Analog circuits that handle high power must be modeled and tested for thermal considerations. The coefficient of thermal expansion for GaAs is also larger, 5.8×10-6/K, so a mismatch to packaging materials is more likely. III–V Integrated Circuit Fabrication Technology References 1. C. Kittel, Solid State Physics, John Wiley and Sons (1971). 2. D. Biswas and D. A. Neamen, Semiconductor Physics and Devices, 4th Ed., Mc Graw Hill, Special Indian Edition (2012). 3. F. A. Kroger, The Chemistry of Imperfect Crystals, Vol. 1, North-Holland, Amsterdam; American Elsevier, New York (1973). 4. S. M. Sze, Semiconductor Device: Physics and Technology, John Wiley, New York (1985). 5. R. F. Pierret, Semiconductor Fundamentals, Addison-Wesley, New York (1989). 6. S. Markram-Ebied, Nature of EL2: the main native midgap electron trap in VPE and bulk GaAs, in SemiInsulating III-V Materials, Ed., D. Look, Shiva, England (1984). 7. J. S. Blakemore, J. Appl. Phys., 53, R123 (1982). 8. R. Williams, Modern GaAs Processing Methods, Artech House (1990). 9. W. Liu, Handbook of III-V Heterojunction Bipolar Transistors, John Wiley and Sons, New York (1998). 10. S. K. Ghandhi, VLSI Fabrication Principles, Silicon and Gallium Arsenide, Wiley Interscience, New York (1983). 11. S. Wang, Fundamentals of Semiconductor Theory and Device Physics, Prentice Hall International (1989). 12. A. Dolittle, Georgia Tech University ECE 4813. 13. P. Asbeck et al., GaAs based heterojunction bipolar transistors for very high performance electronic circuits, Proc. IEEE, 81, 1709 (1993). III–V Integrated Circuit Fabrication Technology III–V Integrated Circuit Fabrication Technology