Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Lab Manual
Digital Logic Design
(EEL-212)
Name: _____________________________________________
CMS No:
___________
SAP ID: ___________
Semester:
__________
Group: ___________
Designed By: Engr. Muhammad Ayub Khan
Checked By: Engr. Abdul Malick
Approved By: Dr. Faraz Akram
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Lab Manual
Digital Logic Design
(EEL-212)
Name: ____________________________________
Roll Number: ____________
Semester: ____________
SAP: ___________
Group: __________
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Contents
I.
Laboratory Safety Policies ................................................................................................................... 4
1.
General laboratory safety ................................................................................................................. 4
2.
Clothing: ........................................................................................................................................... 4
3.
Disposal ............................................................................................................................................ 4
4.
Equipment Failure ............................................................................................................................ 4
5.
Electrical safety ................................................................................................................................ 4
6.
Fire.................................................................................................................................................... 5
7.
Chemicals Spills. .............................................................................................................................. 5
8.
In Case of emergency ....................................................................................................................... 6
II.
Safety Undertaking ............................................................................................................................... 7
III.
Grading Policy .................................................................................................................................. 8
Rubrics...................................................................................................................................................... 9
IV.
V.
VI.
Level of Inquiry .............................................................................................................................. 13
Laboratory’s Course Learning Outcomes ........................................................................................... 14
List of Experiments ........................................................................................................................ 15
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Laboratory Safety Policies
1. General laboratory safety

Never eat or drink while working in the laboratory.

Read labels carefully.

Do not use any equipment unless you are trained and approved as a user by your supervisor.

Wear safety glasses or face shields when working with hazardous materials and/or equipment.

Wear gloves when using any hazardous or toxic agent.

Never do unauthorized experiments.

Never work alone in laboratory.

Keep your lab space clean and organized.

Do not leave an on-going experiment unattended.

Never taste anything. Never pipette by mouth; use a bulb.

Never use open flames in laboratory unless instructed by TA.

Check your glassware for cracks and chips each time you use it. Cracks could cause the glassware to fail
during use and cause serious injury to you or lab mates.
2. Clothing:

When handling dangerous substances, wear gloves, laboratory coats, and safety shield or glasses. Shorts and
sandals should not be worn in the lab at any time. Shoes are required when working in the machine shops.

If you have long hair or loose clothes, make sure it is tied back or confined.

Keep the work area clear of all materials except those needed for your work.
3. Disposal

Students are responsible for the proper disposal of used material if any in appropriate containers.
4. Equipment Failure

If a piece of equipment fails while being used, report it immediately to Lab Engineer/Assistant. Never try to fix
the problem yourself because you could harm yourself and others.

If leaving a lab unattended, turn off all ignition sources and lock the doors.

Clean up your work area before leaving.

Wash hands before leaving the lab and before eating.
5. Electrical safety

Obtain permission by the safety coordinator before operating any high voltage equipment
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan

Maintain an unobstructed access to all electrical panels.

Avoid using extension cords whenever possible.

Never, ever modify or otherwise change any high voltage equipment.

Before attaching the power supply to your setup make sure there are no “live” wires which can be touched.

When attaching a high voltage power supply ALWAYS switch off the supply
6. Fire.

If a person’s clothing catches on fire, he/she needs help.

Prevent him/her from running.

Make him/her lie down and smother the flames by rolling, wrapping with lab coats, blankets, towels,
etc.

Never turn a carbon dioxide extinguisher on a person.

If a fire breaks out, (if time allows) turn off all burners and remove solvents, place the chemical and
equipment safely to the nearest possible table/bench, exit the building calmly.

If you do not use the fire extinguisher, leave the room immediately to a safer place possibly outside.
There are carbon dioxide extinguishers in the building and the positions and operation of these should
be known.

Point the extinguisher at the base of the flames.

Very small fires can be put out with a damp towel by smothering.

Only after the safety of all is assured should the matter of extinguishing the fire be considered.
Because a few seconds delay can result in very serious injury, Laboratory staff will guide you on what to do and
how to exit during the case of such an emergency.
7. Chemicals Spills.

Notify Lab Engineer/Assistant immediately and ask for help.

Spills must be cleaned up promptly and thoroughly.

Decontaminate equipment, clothing and personnel, including any victims, on site if necessary

If corrosive chemicals are spilled on the clothing, remove the affected clothing immediately, and wash the
area with water for 15 full minutes.

If chemicals are spilled on the skin, wash them off with large volumes of water.
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan

Do not apply a burn ointment.

If the chemical is spilled in the eye, it should immediately be washed out thoroughly with water using the
eyewash.

If acid was involved, a weak solution of sodium bicarbonate in an eyecup should then be used. If a base, boric
acid is effective.

If corrosive chemicals are spilled on the desk, dilute them with a large volume of water and then neutralize
with sodium bicarbonate if an acid, or dilute acetic acid if a base.

Go to First AID Room immediately if required.
8. In Case of emergency

Report the location of the emergency; give your name, telephone number, and building and floor number.

Report the nature of the emergency whether an explosion has occurred and whether there has been a chemical
or electrical fire.
RESCUE:
1122
Police Emergency Control Room:
9203333
Army Control Room:
0332-8581614
Army Quick Response Force:
0322-5170958
Police Station (NOON):
051-9243681
Chief Security Officer (Riphah):
0321-5216311
Administrator:
0321-5216301
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
I.
Safety Undertaking
I HAVE READ ALL OF THE ABOVE, AND I AGREE TO CONFORM TO
IT’S CONTENTS.
Name: _______________________________________
Course: _______________
Student ID: ____________________________________
Section: _______________
Signature: _____________________________________
Room: _______________
Date: _________________________
Lab Instructor: ___________________
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
II.
Lab Performance
Lab Report
Lab Viva
Project Design & Implementation
Project Report
Grading Policy
30%
30%
10%
20%
10%
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Rubrics
(Lab Performance)
Sr.
#
1
2
Performance
Indicator
Ability to
Conduct
Experiment
Taking
Responsibility/
Sharing
knowledge
Exemplary (5)
Satisfactory
(4-3)
Developing
(2-1)
Unsatisfactory (0)
Fully understand the
lab instruments
including its
purpose and quite
able to conduct the
entire experiment
with negligible help
from lab instructor
Has very good
understanding of
the lab
instruments
including its
purpose and able
to conduct
experiment with
some help from lab
instructor
Has some
understanding of
the lab
instruments
including its
purpose and able
to conduct
experiment with a
lot of help from
lab instructor
Has poor
understanding of the
lab instruments
including its
purpose and unable
to conduct
experiment on his
own; lab instructor
provides help in
almost every step of
the experiment
Always Takes
responsibility for his
role and for
identifying /resolving
problems and
conflicts within the
team. Follows
through on
commitment and
shares information
and knowledge with
the team
Mostly Takes
responsibility for
his role and for
identifying
/resolving problems
and conflicts within
the team. Follows
through on
commitment and
shares information
and knowledge
with the team most
of time.
Sometimes Takes
responsibility for
his role and for
identifying
/resolving
problems and
conflicts within
the team. Follows
through on
commitment and
shares information
and knowledge
with the team
some of time.
Rarely Takes
responsibility for his
role and for
identifying /resolving
problems and
conflicts within the
team. Never follows
through on
commitment and
shares information
and knowledge with
the team
(Lab Report)
Sr.
#
Performance
Indicator
1
Data analysis
and
Calculations
2
Data
Presentation
Exemplary (5)
Satisfactory (4-3)
Developing(2-1)
Unsatisfactory (0)
All of the data
analyzed is very
accurate and
precise. Completely
logical and systematic
calculations
Most of the data
analyzed is accurate.
Quite logical and
systematic
calculations
Some of the data
analyzed is
inaccurate. Somewhat
logical and systematic
calculations.
Most of the data
analyzed is inaccurate.
No logical and
systematic calculations
Presents data very clearly
using appropriate
graphs/waveforms.
Figure captions and units
are always included.
Presents data in
appropriate manner
graphs/waveforms.
Figure captions and
units are included
most of the times.
Data presentation is
not that clear.
Graphs/waveforms,
figure captions and
units are not always
included.
Presents data in a very
obscure manner.
Graphs/waveforms,
figure captions and
units are never
included.
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
(Open Ended Labs)
Lab Performance
Sr.
#
Performance
Indicator
1
Methodology
2
Implementation
& Completion
Exemplary (5)
Satisfactory (4-3)
Developing(2-1)
Student shows high
capability of analyzing
the given problem and
designing the
appropriate solution for
it
Student shows good
capability of analyzing
the given problem and
designing the
appropriate solution
for it
Student shows fair
capability of analyzing
the given problem and
designing the
appropriate solution for
it
Task is completed
without any external
assistance and is
working properly
Task is completed with
quite less technical
assistance from
instructor or others in
order to complete the
given task and is
working properly
Task is completed
with a lot of
technical assistance
from instructor or
others in order to
complete the given
task
Unsatisfactory (0)
Student shows poor
capability of analyzing
the given problem and
unable to design the
solution for it
Task is not
completed
Lab Report
Sr.
#
Performance
Indicator
1
Organization/
Structure
Information is
presented in a logical,
interesting way,
which is easy to
follow, Objective,
Introduction,
methodology, results
and Conclusions are
stated and reflect
complete knowledge
of the experiment.
Results,
Discussion
&
Data
Presentation
Results and conclusion
are stated and reflect
complete knowledge of
the given task. Presents
data very clearly using
appropriate
graphs/waveforms.
Figure captions and units
are always included.
2
Exemplary (5)
Satisfactory (4-3)
Developing(2-1)
Unsatisfactory (0)
Information is
presented in
somewhat logical
manner. Objective,
Introduction,
methodology,
results and
Conclusion are
stated and reflect
acceptable
knowledge of the
experiment
Sequence of
Information exists with
quite less continuity
and in less logical
manner. Objective,
Introduction,
methodology, results
and Conclusion are
stated but reflect little
knowledge of the
experiment.
Sequence of
information is difficult
to follow. No logical
manner or continuity.
Objective,
Introduction,
methodology, results
and Conclusion are not
stated.
Results and conclusion
are stated and reflect
acceptable knowledge
of the experiment.
Presents data
appropriate
graphs/waveform.
Figure captions and
units are included
most of the time.
Results and conclusion
are stated but reflect
little knowledge of the
experiment.
Data presentation is not
that clear.
Graphs/waveforms,
figure captions and
units are not always
included.
.
Results and conclusion
are inaccurate.
Presents data in a very
obscure manner.
Graphs/waveforms,
figure captions and
units are never
included.
or
Unable to submit
the lab report.
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
(Lab Viva)
Sr.
#
Performance
Indicator
Responsiveness to
Questions/ Level of
Understanding of
the learned skills
1
Exemplary (5)
Satisfactory (4-3)
Responds well, quick
and very accurate all
the time.
Demonstration of full
knowledge of the
subject with
explanations and
elaboration.
Generally
responsive and
accurate most of
the times.
At ease with
content and able
to elaborate and
explain to some
degree.
Developing(2-1)
Responsive but
evasive or
inaccurate most of
the times.
Only basic
concepts are
demonstrated and
interpreted
Unsatisfactory (0)
Non-responsive.
No grasp of information.
Clearly no knowledge of
subject matter. No questions
are answered. No
interpretation made.
(LAB PROJECT)
Sr. #
Performance Indicator
Exemplary (5)
Satisfactory (4-3)
Developing(2-1)
Unsatisfactory
(0)
Project Design (Hardware/Software)
Project is completed
without any external
assistance and is
working properly.
1
Implementation and
completion
Project is
completed with
quite less
technical
assistance from
the instructor or
others in order to
complete the
project and is
working properly.
Or
Project is
completed with
no external
assistance at all
but is not
working
properly.
Project is
completed but not
working properly.
Or
Project is
completed and
working properly
but with
unreasonable
amount of
technical
assistance from
the instructor or
others in order to
complete the
project.
The project is not
implemented or
not completed
with
implementation in
initial phase only.
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
2
Problem Analysis and
Designing Solution
Student chose an
innovative,
challenging project
that required an
effort that exceeds
the normal
expectations for the
course project.
Student choose a
complex project
with good
technical
challenges that
required
innovative
problem solving
and engineering.
Student chose a
project with
acceptable scope
that solves a
technical problem
and required some
technical expertise
in hardware and/or
software.
Student chose a
simple project
with limited
scope that
required very
little creative
development or
technical
expertise.
Project Report
1
2
3
Organization/
Structure
Literature Review
Results and
Discussion
Report content;
Introduction,
methodology,
results, discussion,
conclusion and
reference sections
are well written and
easy to understand
Report content;
Introduction,
methodology,
results,
discussion,
conclusion and
reference sections
are written in a
good way with
some ambiguities
in some of the
contents
Report content;
Some of the
contents regarding
Introduction,
methodology,
results, discussion,
conclusion and
reference sections
are missing and
explanation is
unclear
Unable to submit
the project report.
Collected a great
deal of information-all relates to the
topic. .
Collected some
basic
information--most
relates to the
topic.
Collected very
little information-some relates to the
topic
Did not collect
any information
that relates to the
topic
Clearly discusses
what results mean
and what
conclusions may be
drawn from them.
Cites published
standards or other
related reports.
Generally clear
discussion of
results and
conclusions, but
may miss some
points. Some use
of references and
published
standards.
Limited discussion
of results and
conclusions. Little
or no reference to
published
standards or other
reports.
Reader can gain
very little
information about
why the project
was done and
what the results
may mean. No
reference to other
studies.
Responsive but
evasive or
inaccurate most of
the times.
Only basic
concepts are
demonstrated
and interpreted.
No grasp of
information.
Clearly no
knowledge of
subject matter.
No questions are
answered. No
interpretation
made.
Project Viva
1
Responsiveness
Questions/Accurac
y
Responds well,
quick and very
accurate all the time.
Demonstration of
full knowledge of
the project with
explanations and
elaboration.
Generally
Responsive and
accurate most of
the times.
At ease with
content and able
to elaborate and
explain to some
degree.
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
III.
Level
0
1
2
3
Problem/ Question
Provided to student
Provided to student
Provided to student
Constructed by student
Level of
inquiry
0
1
2
3
Level of Inquiry
Procedure/ Method
Provided to student
Provided to student
Constructed by student
Constructed by student
Solution
Provided to student
Constructed by student
Constructed by student
Constructed by student
Description
The problem, procedure, and methods to solutions are provided to the
student. The student performs the experiment and verifies the results with the
manual.
The problem and procedure are provided to the student. The student
interprets the data in order to propose viable solutions.
The problem is provided to the student. The student develops a procedure
for investigating the problem, decides what data to gather, and interprets the
data in order to propose viable solutions.
A “raw” phenomenon is provided to the student. The student chooses (or
constructs) the problem to explore, develops a procedure for investigating
the problem, decides what data to gather, and interprets the data in order
to propose viable solutions
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Laboratory’s Course Learning Outcomes
IV.
Course Title
Laboratory
Instructor
: EE-212 Digital Logic Design
: EEL-212 Digital Logic Design Lab
: Engr. M Ayub Khan
E-mail/
: ayub.khan@riphah.edu.pk
Students will be able to:
#
CLO 1
CLO
Practice technical skills in making circuits for combinational and sequential logics
using Digital Integrated Circuits on Digital Logic Trainers and Multisim
Taxonomy/Level
Psychomotor/ 3
(Guided response)
CLO 2
Execute the skills of designing a solution/circuit for a given problem of combinational
& sequential logic on Design Boards and Multisim
Psychomotor/ 4
(Mechanism)
CLO3
Adapting the fundamental concepts of digital logic IC’s that helps in modifying the
existing societal projects or issues
Psychomotor/ 6
(Adaption)
CLO 4
Prepare well-structured engineering lab report that clearly presents the objectives,
procedures, observations/results, and conclusions of Lab work/project
Cognitive/ 3
(Application)
CLO 5
Assume responsibility in collaborative teamwork and individual work ethics, while
consistently adhering to established lab safety protocols
Affective / 3
(valuing)
Mapping of Course Learning Outcomes (CLO) to Program Learning Outcomes (PLO) / Graduate Attribute
Course CLOs/
Code
PLOs
CLO 1
CLO 2
EECLO 3
202
CLO 4
CLO 5
PLO1
PLO2
PLO3
PLO4
PLO5
PLO6
PLO7
PLO8
PLO9
PLO 10
PLO 11
PLO 12
X
X
X
X
X
PLO1: Engineering Knowledge
PLO5: Modern Tool Usage
PLO9: Individual and Team Work
PLO2: Problem Analysis
PLO6: The Engineer and Society
PLO10: Communication
PLO3: Design/Development of
Solutions
PLO7: Environment and
Sustainability
PLO11: Project Management
PLO4: Investigation
PLO8: Ethics
PLO12: Lifelong Learning
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
V.
Experiment
Number
List of Experiments
Experiment Title
Level of
Inquiry
CLO
Experiment 1
To Verify the Behavior of Logic Gates using Truth Table and
familiarization with Digital Integrated Circuits
1
1,4,5
Experiment 2
To Verify the Behavior of NAND Gate as universal logic gate and
implementation of the cut-and-try procedure in circuit simplification.
1
1,4,5
Experiment 3
Implementation of a voting system by using transistor and
combinational digital logic IC’s.
1
1,4,5
Experiment 4
Investigate the operation of encoders and decoders
1
1,4,5
Experiment 5
Implementation of a combinational logic for a keypad input system
using the Encoders, Decoders, and 7-Segment LED Display.
1
1,4,5
Experiment 6
Implementation of Digital Logic using K-map simplification
1
1,4,5
Experiment 7
Implementation of a Half and Full subtracters circuits
1
1,4,5
Experiment 8
Implementation of a Half and Full Adder circuits
1
1,4,5
Experiment 9
Implementation of a combinational logic for a voting system using
the Full Adders and miscellaneous digital integrated circuits.
1
1,4,5
Experiment 10
Design & Implementation of Comparator Combinational Circuit using
Adder Subtractor. (OEL)
2
Experiment 11
Implementation of JK Flip- Flop
1
1,4,5
Experiment 12
Implementation of RS Latches
1
1,4,5
Experiment 13
Implementation of Time delay circuits by using 555 Timer IC
1
1,4,5
Experiment 14
Implementation of modulus 12 decimal counter circuit
1
1,4,5
Experiment 15
Developing a design for daily life Stopwatch timer by using the
knowledge of combinational logic (OEL)
2
Project Design, Project Viva, and Project Report
3
2,4
2,4
3,4,5
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 1: To Verify the Behavior of Logic Gates using Truth Table and familiarization with Digital
Integrated Circuits
Objectives:
(i)
Verification of Truth Tables of Basic Logic Gates
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET
1) Fill in the provided truth table using the digital logic trainer in your lab.
AND GATE
Inputs
Output
A
B
X
OR GATE
Inputs
Output
A
B
X
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
NOT GATE
Inputs
Output
A
X
0
1
NAND GATE
Inputs
Output
A
B
X
NOR GATE
Inputs
Output
A
B
X
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
XNOR GATE
Inputs
Output
A
B
X
XOR GATE
Inputs
Output
A
B
X
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 2: To Verify the Behavior of NAND Gate as universal logic gate and implementation of the cutand-try procedure in circuit simplification.
Objectives:
(i)
(ii)
Verification of Truth Tables for basic logic gates using NAND gate.
Verification of simplification technique in circuit optimization.
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: ………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET
1) Fill in the provided truth table after implementation of these basic logic gates using only the NAND Gate to verify its
virtue of being a universal gate.
AND LOGIC
Inputs
Output
A
B
X
OR LOGIC
Inputs
Output
A
B
X
0
0
0
0
0
0
1
0
1
1
1
0
1
0
1
1
1
1
NOT LOGIC
Inputs Output
A
X
Draw Equivalent diagrams of above truth table
2) Implement the logic circuit shown below using the two ICs 7400 and 7410 (NAND Gates) and fill in the truth table 01.
From this truth table, develop the Boolean expression for the function F and simplify using the cut and try method
and then implement the simplified logic and fill the table below 02.
Simplified Expression
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Table - 01
Inputs
x
y
z
Table - 02
Output
F
Inputs
x
y
z
Output
F
Discussion
___________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
___________________________________________________
Conclusion
___________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_______________________________________________________________
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 3: Implementation of a voting system by using transistor and combinational digital logic IC’s.
Objectives:
(i)
To practice the design process of combinational logic by implementing a useful practical applied
problem.
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET

This project introduces you for a simple logic circuit based on basic gates to practically implement a voting
system of three judges. When two or more judges vote in favor then a buzzer will sound to announce a
winner and if only one or none vote in favor, a red LED will turn on to represent a loser.

Develop a truth table and the final logical simplified expression
Truth Table

Simplified logical expression
Implement the simplified circuit by using the simplified expression.
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Discussion
___________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_______________________________________
Conclusion
___________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
___________________________________________________
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 4: Investigate the operation of encoders and decoders
Objectives:
1. To practically observe the response of 8-line-to-4 line encoder and 2-line-to-4-line decoder.
2. To practically implement the BCD-to-7-segment decoder.
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET
1. The truth table for 8-line-to-4 line encoder is given below. Implement the circuit on a breadboard using the Digital
ICs and verify the truth table.
2. The truth table for 2-line-to-4 line decoder is given below. Implement the circuit on a breadboard using the Digital
ICs and verify the truth table.
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
3. Implement the BCD to 7 segment decoder (74LS47 IC by integrating the BCD-to-7-segment decoder driver IC and
the 7 segment display
Implement the circuit diagram for the BCD-to-7-segment decoder driver IC and the 7 segment
display (both for anode and cathode)
Conclusion
________________________________________________________________________ __
_________________________________________________________________________________
_________________________________________________________________________________
_______________________________________________________________
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 5: Implementation of a combinational logic for a keypad input system using the Encoders,
Decoders, and 7-Segment LED Display.
Objectives:
(i)
(ii)
To practice the design process (Foundational and Cascaded) of combinational logic by
implementing a useful practical applied problem.
To practice using Digital Logic elements such as a 7-segment LED display, BCD Decoder IC
7447, Encoder IC 74148, etc.
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET
1) In this lab, you need to make a keypad input system with encoders and decoders. You can use a priority Encoder IC
74148 and you will attach the inputs of the priority encoder with the eight switches and the output of the encoder
with the BCD to a 7-segment decoder which will display the input on the 7-segment LED display.
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Show the interconnection of IC’s practically as shown below:
Conclusion
___________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 6: Implementation of Digital Logic using K-map Simplification
Objectives:
(i)
To demonstrate the steps of implementing the Digital Logic of a 2-bit magnitude comparator
using Boolean algebra and K-map simplification.
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET
1) The truth table for a 2-bit magnitude comparator is given below. Develop a simplified Boolean Expression from this
truth table and using K-map SOP simplification and draw the circuit diagram in the below space. Then, implement the
circuit on a breadboard using the Digital ICs and verify the truth table for the 2-bit magnitude comparator.

Develop a K-map SOP minimized Expression along with simplified circuit diagram
Simplified logical SOP expression + Circuit
A<B
Diagram
A>B
Simplified logical SOP expression + Circuit
Diagram
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
A=B
Simplified logical SOP expression + Circuit
Diagram
Conclusion
________________________________________________________________________ ___
_________________________________________________________________________________
_________________________________________________________________________________
_______________________________________________________________
Program: B.Sc. Biomedical Engineering
Semester: IV
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Date: …………….
Subject: EEL-212 Digital Logic Design
Experiment 7: Implementation of a Half and Full Subtractor circuits
Objectives:
(iii)
(iv)
To implement the half and full subtractor by using combinational logic IC’s 7408, 7404 and 7486.
To implement the 2-bit parallel binary subtractor circuit with the help of IC’s 7408, 7404 and
7486.
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
LAB WORKSHEET
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
1. In this lab, you need to construct a Half and full subtractor circuit by using IC 7408, 7404 and 7486 on
the trainers breadboard and fill their corresponding truth tables.
Half Subtractor Circuit
The half-subtractor is a combinational circuit which is used to perform subtraction of two bits. It has two
inputs, A (minuend) and B (subtrahend) and two outputs Difference and Borrow. The logic symbol and truth
table are shown below.
Figure-1: Logic Symbol of Half subtractor
Table-1: Truth Table of Half subtractor
The logic circuit has two inputs A and B and two outputs i.e. difference and borrow respectively. The logic
circuit diagram is shown below.
Figure-3: Logic circuit diagram of half subtractor
Table-2: Verify Truth Table of Half subtractor
The Boolean expressions for the two outputs, after algebraic simplification, are given below.
Difference =
Borrow =
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Full Subtractor Circuit
A full subtractor is a combinational circuit that performs subtraction involving three bits, namely A
(minuend), B (subtrahend), and Bin (borrow-in). It accepts three inputs: A (minuend), B (subtrahend) and a
Bin (borrow bit) and it produces two outputs: D (difference) and Bout (borrow out). The logic symbol and
truth table are shown below.
Figure-5: Logic Symbol of full subtractor
Table-3: Truth Table of full subtractor
The logic circuit has three inputs A, B and Bin and two outputs i.e. difference and borrow respectively. The
logic circuit diagram is shown below.
Figure-7: Logic circuit diagram of full subtractor
Table-4: Verify Truth Table of full subtractor
The Boolean expressions for the two outputs, after algebraic simplification, are given below.
Difference =
Borrow =
2. Implement the 2-bit parallel binary subtractor circuit on a trainer bread board as shown in the figure
below.
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Table-5 2-bit parallel binary subtractor
A1B1
A2B2
00
10
11
00
11
10
Bout
D1D2D3
in binary and decimal
Discussion:
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_____________________
Conclusion:
___________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_____________________________________________
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 8: Implementation of a Half and Full Adder circuits
Objectives:
(i)
(ii)
To implement the half and full adders by using combinational logic IC’s 7408 and 7486.
To implement the 2-bit parallel binary adder circuit with the help of IC’s 7408 and 7486.
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET
2) In this lab, you need to construct a Half and full adder circuit by using IC 7408 and 7486 on the trainers breadboard and fill their
corresponding truth tables.
Half Adder Circuit
Half Adder is a combinational logic circuit that generates the sum of two single-bit binary numbers. The logic circuit has two inputs
A and B and two outputs i.e. Sum and Carry respectively. The functionality of this truth table can be described by the following
two Boolean equations for Sum and Carry as shown below:
∑
=
C out =
The implementation of half adder boolean functions is shown in Fig. 1. Although the Half-Adder circuit is very basic and simple,
but it is the first stage in the design of any n-bit adder circuit.
Full Adder Circuit
As can be seen from the operation of Half-Adder, even the addition of two single-bit numbers may generate a carry. This implies
that the circuit, which is going to perform addition on the next higher bits, must take into account the carry from the previous stage.
Thus in order to build n-bit adders, we require a modification
in the Half-Adder circuit that can accept three inputs rather than two, i.e. two bits to be added and the carry from the previous stage.
Such a circuit is called a Full-Adder. In this table, x and y represent the two bits to be added and z is the carry from the previous
stage. The Boolean expressions for the two outputs, after algebraic simplification, are given below.
∑
=
C out =
Figure 2 shows an implementation of full adder Boolean functions. Especially note that how two Half-Adders are used to implement
a Full-Adder.
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
2. Implement the 2-bit parallel binary adder on a trainer bread board as shown in the figure below.
A1A2
00
10
11
B1B2
01
11
10
∑ = in binary and decimal
Conclusion
___________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
___________________________________________________
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 9: Implementation of a combinational logic for a voting system using the Full Adders and
miscellaneous digital integrated circuits.
Objectives:
(i)
To practice the design process (Foundational and Cascaded) of combinational logic by
implementing a useful practical applied problem.
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET
1) Implement the voting system on a breadboard to count the six votes generated by push switches 𝑆1 𝑡𝑜 𝑆6 . A typical
design is shown in fig. 3 below that will include two full adders and one 4-bit adder IC7483, a BCD to 7-segment
Decoder IC 7447, and a 7-segment LED display.
2) Perform the lamp test for checking the functionality of seven segment LED display.
3) Draw the logic circuit for full adder 1 and full adder 2 with the help of XOR, AND and OR IC’s respectively
4) The pin configuration for BCD 7-segment driver IC and 7-segment common anode display is shown in fig. 3.
5) Fill the outputs in table 1 accordingly.
6) Attach the results in form of pics against each number of votes generated.
Fig. 1 Full Adder logic circuit diagram
Fig. 2 Full Adder logic symbol
Fig. 3 Logic circuit for voting system
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Fig. 4 Pin configuration for BCD 7-segment driver IC 7447 and 7-segment common anode display
Table 1. Binary outputs at full adders and parallel adder respectively
Voting numbers in decimal
1
C out 1
2
C out 2
Parallel Adder
1
2
3
4
5
6
Discussion
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_____________________________________________
Conclusion
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 10: Design & Implementation of Comparator Combinational Circuit using Adder and
Subtractor
Objectives:
(i)
Designing a 4-bit comparator combinational logic circuit to compare Full Adder and Subtractor
data in a simulation software (Proteus or Multisim)
Lab Performance
Description
Total
Marks
Methodology
5
Marks
Obtained
Description
Total
Marks
Implementation &
Completion
5
Marks
Obtained
Total Marks
Lab Report
Description
Total
Marks
Organization/
Structure
5
Marks
Obtained
Description
Results, Discussion
&
Data Presentation
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Total
Marks
5
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 11: Implementation of a J-K Flip Flop circuit
Objectives:
1. To implement the J-K Flip Flop circuit by using combinational logic IC’s 74LS00 (NAND Gate) and
74LS02 (NOR Gate).
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET
The J and K inputs of the J-K flip-flop are synchronous inputs because data on these inputs are transferred to the flipflops output only on the triggering edge of the clock pulse. When J is HIGH and K is LOW, the Q output goes HIGH on
the triggering edge of the clock pulse, and the flip-flop is SET. When J is LOW and K is HIGH, the Q output goes LOW
on the triggering edge of the clock pulse, and the flip-flop is RESET. When both J and K are LOW, the output does not
change from its prior state. When J and K are both HIGH, the flip-flop changes state. This called the toggle mode.
1. Construct the circuit diagram of J-K flip flop as shown below on the breadboard with the help of NAND and
NOR IC’s respectively. Generate the 5Vp pulsating DC clock pulse through function generator. Record the
Outputs in the table 2 shown below and verify the results by comparing with the table 1.
Fig.1Simplified logic diagram for a positive edge-triggered J-K flip-flop
Table 1. Positive edge triggered J-K Flip Flop
2. Check the response of J-K Flip Flop and record the values in the table 2 given below.
Table 2. Positive edge triggered J-K Flip Flop
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
3. Attach the output results (Q & Q’) obtained through oscilloscope against each input data
J=0K=0
J=0K=1
J=1K=0
J=1K=1
Discussion
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
___________________________________________________
Conclusion
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
Program: B.Sc. Biomedical Engineering
Semester: IV
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Date: …………….
Subject: EEL-212 Digital Logic Design
Experiment 12: Implementation of RS Latches
Objectives:
2. To implement the R-S Latch circuit by using combinational logic IC’s 74LS00 (NAND Gate) and
74LS02 (NOR Gate) or by using IC 74HC279A
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
LAB WORKSHEET
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
A bi-stable element that’s output state depends on the asynchronous input is called latch. Latch become set and reset
without clock pulse so it is called asynchronous multi-vibrator. RS latch is the good example of latch. RS latch is the
simplest flip flop in all kinds of flip flops. This flip flop is called direct coupled flip flop. RS latch has two inputs R and
S. S input is use to set the latch in set condition flip flop store one binary bit. And R input is to reset the latch. In reset
case flip flop stores binary 0. RS latch consists of two outputs which are Q and Q-complement. Here Q is a normal output
and ‘Q’ is the complementary output of normal output. The logic symbol of RS latch is shown below.
4. Construct the circuit diagram of S-R Latch circuit as shown below on the breadboard with the help of NAND or
NOR IC’s respectively. You can also use the S-R latch IC 74HC279A whose pin configuration is shown in figure
1 below.
5. Generate the 5Vp pulsating DC pulse through function generator and used as input for the R-S latch circuit. Adjust
the pulse width duration according to the data sheet provided.
6. Record the Outputs in the table 2 shown below and verify the results by comparing with the table 1.
Fig.1 Simplified logic diagram for an active high and active low S-R latch circuit with its pin configuration
Data Sheet
1. Check the response of S-R latch and record the values in the table 2 given below.
Table 1. Positive edge triggered J-K Flip Flop
Table 2. Positive edge triggered J-K Flip Flop
2. Attach the output results (Q & Q’) obtained through oscilloscope against set and reset latch state
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Q Output
Q’ Output
3. Show the Outputs (Q & Q’) of oscilloscope when both inputs of latch are binary 1’s and 0’s respectively.
Discussion
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
Conclusion
________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
______________________________________________________________________________
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 13: Implementation of Time delay circuits by using 555 Timer IC
Objectives:
3. Designing a 555 Timer circuit as a mono-stable multi-vibrator to create a required time delay.
4. Analyzing the waveforms across capacitor and 555 Timer output at different values of resistors and
capacitors.
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET
The 555 timer is a versatile and widely used IC device because it can be configured in two different modes as either a
mono-stable multi-vibrator (one-shot) or as an astable multi-vibrator (pulse oscillator).
An external resistor and capacitor connected as shown in Figure 1, are used to set up the 555 timer as a non-retrigger
able one-shot. The pulse width of the output is determined by the time constant of R1 and C1 according to the following
formula:
T W 1.1 (R1) (C1)
The control voltage input is not used and is connected to a decoupling capacitor C2 to prevent noise from affecting the
trigger and threshold levels.
1. Design a mono-stable multi-vibrator circuit to turn ON the LED for about 20s with the help of a 555 timer IC
along with required external components i.e. resistors and capacitors respectively.
2. Analyze the charging and discharging output waveforms across capacitor and the change in the turn ON time
delay of an LED by changing the following parameters shown below.
a) The effect of changing the resistor (R1) value by keeping the capacitor (C1) value constant.
b) The effect of changing the capacitor (C1) value by keeping the resistor (R1) value constant
Triggering output Pulse
Fig.1 The 555 timer connected as a one-shot
Results:
 Attach the output results obtained through oscilloscope
555 Timer Output
At fixed value of R1 and C1 at 20s time delay
Output Waveform across Capacitor
At fixed value of R1 and C1 at 20s time delay
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
555 Timer Output
At fixed value of R1 and different value of C1
Output Waveform across Capacitor
At fixed value of R1 and different value of C1
555 Timer Output
At fixed value of C1 and different value of R1
Output Waveform across Capacitor
At fixed value of C1 and different value of R1
Discussion
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
Conclusion
________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
______________________________________________________________________________
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 14: Implementation of modulus 12 decimal counter circuit
Objectives:
5. Designing a counter circuit as a modulus 12 decimal counter by using IC 74LS92.
6. Analyzing the waveforms across each output and by displaying the decimal count up to 9 with the
help of BCD driver IC and 7-segment display.
Lab Performance
Description
Ability to Conduct
Experiment
Total
Marks
Marks
Obtained
Description
Taking
Responsibility/Sharing
knowledge
5
Total
Marks
Marks
Obtained
5
Total Marks
Lab Report
Description
Total
Marks
Data analysis and
Calculations
5
Marks
Obtained
Description
Total
Marks
Data Presentation
5
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Marks
Obtained
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
LAB WORKSHEET
The SN54/74LS92 is high-speed 4-bit ripple type counters partitioned into two sections. One counter has a divide-bytwo section and another counter has a divide-by-six section which are triggered by a HIGH-to-LOW transition on the
clock inputs. Each section can be used separately or tied together (Q0 to CP1) to form modulo-12 counters. The counter
have a 2-input gated Master Reset (Clear). The internal circuit diagram and the pin configuration is shown in Fig.1 and
Fig.2 respectively.
Fig.1 Internal circuit diagram of IC 74LS92
Fig. 2 Pin Configuration of IC 74LS92
3. Design a counter circuit to operate as modulo 12 counter by connecting externally ‘Q0’ output to the Clock Pulse
(CP1).
4. Input Clock Pulse ‘CP0’ a square wave with the help of a function generator of 50% duty cycle and a count
frequency value according to the data sheet.
5. Connect the BCD driver IC and 7-segent display to count value up to 9 decimal.
6. Analyze the output waveforms across each output Q0, Q1, Q2, Q3 by using oscilloscope and attach the results
Results:
 Attach the output results obtained through oscilloscope
Output Q0, Q1, Q2, Q3
Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
7-segment display counting up to 9 decimal values
Discussion
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Conclusion
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Department of Biomedical Engineering
Faculty of Engineering & Applied Sciences
Riphah International University, Islamabad, Pakistan
Program: B.Sc. Biomedical Engineering
Semester: IV
Subject: EEL-212 Digital Logic Design
Date: …………….
Experiment 15: Developing a design for daily life Stopwatch timer by using the knowledge of
combinational logic
Objectives:
(i)
Lab Performance
Description
Total
Marks
Methodology
5
Marks
Obtained
Description
Total
Marks
Implementation &
Completion
5
Marks
Obtained
Total Marks
Lab Report
Description
Total
Marks
Organization/
Structure
5
Marks
Obtained
Description
Results, Discussion
&
Data Presentation
Total Marks
Remarks (if any): ………………………………….
Name & Signature of faculty: …………………………………
Total
Marks
5
Marks
Obtained