Ain Shams University Faculty of Engineering Electronics & Comm. Eng. Dept. ECE211: Electronics 2 Year Electrical Engineering Spring 2024 nd Exercise 3 BJT 1. [Razavi, Example 4.3] For the shown circuit, Q1 and Q2 are identical and operate in the active mode. Determine (V1 − V2) such that IC1 = 10*IC2. 2. [Razavi, Example 4.7] Consider the circuit below where IS = 5 × 10−17 A and VBE = 800 mV. Assume β = 100. a. Determine the transistor terminal currents and voltages and verify that the device indeed operates in the active mode. b. Determine the maximum value of RC that permits operation in the active mode (𝑉𝐶𝐸 > 𝑉𝐶𝐸,𝑠𝑎𝑡 ). 3. [Sedra/Smith, Example 6.9, 6.10, 6.11, Problem 6.66] Analyze the circuits below. Determine the Q-point of every transistor for the following two cases: a. Taking base current into consideration and assuming β = 100 b. Neglecting base current (i.e., assuming β is very large: β = ∞) c. Comment if the approximation that β = ∞ results in an error > 10%, or if it results in incorrectly determining the operating mode (active, saturation, cutoff) (i) (ii) Page 1 of 4 4. [Sedra/Smith, Example 6.8] Analyze the circuit below. Assume β = 100. a. Determine the voltages at all nodes and the currents in all branches. b. Determine the Q-point. c. Explain why the bias arrangement in this circuit is bad. 5. [Sedra/Smith, Exercise 7.36] The figure below shows a bias arrangement using collector-tobase feedback resistor (self-biased stage). Let VCC =10 V and β = 100. Design the circuit to obtain a dc emitter current of 1 mA and a ±2-V signal swing at the collector; that is, design for VCE =+2.3 V. 6. [Razavi, Example 4.10, 4.11] Consider the circuit shown below where v1 represents the signal generated by a microphone, IS = 3 × 10−16 A, β = 100. a. Verify that the transistor operates in the active mode. b. Determine the small-signal parameters of Q1. c. If the microphone generates a 1-mV signal, how much change is observed in the collector and base currents? d. Determine the output signal level if the microphone produces a 1-mV signal. e. Determine the voltage gain. f. Determine the current gain (iout is the current flowing through RC). Page 2 of 4 7. For the CE amplifier shown below: a. Determine an expression for the maximum achievable voltage gain in terms of 𝑉𝐶𝐶 𝑎𝑛𝑑 𝑉𝐶𝐸,𝑠𝑎𝑡 . b. Over the previous decades, the supply voltage used in integrated circuits has been scaled down to reduce power consumption and avoid device breakdown. What is the effect of low supply voltage on the maximum achievable voltage gain? c. Determine an expression for 𝑅𝐶 to achieve the above gain. 8. [Sedra, Example 7.5, 7.6] Analyze the CE amplifier shown below to determine its voltage gain. Assume β = 100 and neglect the Early effect. Assume 𝑣𝑖 is a 1.6 V peak-to-peak triangular signal (amplitude = 0.8 V). Plot the waveforms of the total quantities (DC + AC) IB(t), VBE(t), IC(t), and VC(t). 9. [Sedra, Example 7.8] A CE amplifier utilizes a BJT with β =100 is biased at IC =1 mA and has a collector resistance RC =5 k. The amplifier is fed with a signal source (vsig) having a resistance of 5 k, and a load resistance RL = 5 k is connected to the output terminal. Find Rin, Rout, and Av = vout/vsig. If vπ is to be limited to 5 mV, what are the corresponding vsig and vout with the load connected? 10. [Sedra, Example 7.9] For the CE amplifier in the previous problem, what value of RE is needed to raise Rin to a value four times that of Rsig? With RE included, find Rin, Rout, and Av = vout/vsig. If vπ is to be limited to 5 mV, what are the corresponding vsig and vout with the load connected? Page 3 of 4 11. For the CE amplifier shown below, assume VCC = 6V, RE = 1.3k, RC = 2k, RL = 100k, RB1 = 40k, RB2 = 20k, Rsig = 0.5k, Cc1, Cc2 are very large. Find the midband voltage gain for the following cases: a. Re = 0 and CE is very large. b. Re = 0.2k and CE is very large. c. Re = 0 and CE = 0. VCC RB1 Rsig vsig Cc1 Rc vo vin RB2 Cc2 Q1 RL Re (RE-Re) CE 12. [Razavi, Example 5.47] Unlike the CE topology, the emitter follower can operate with a base voltage near VCC. This is because the collector is tied to VCC, allowing the same voltage for the base without driving Q1 into saturation. For this reason, followers are often biased as shown below, where RB*IB is chosen much less than the voltage drop across RE, thus lowering the sensitivity to β. The follower shown below employs RB = 10 k and RE = 1 k. a. Calculate the bias current and voltages if IS = 5 × 10−16 A, β = 100, and VCC = 2.5 V. b. What happens if β drops to 50? c. Calculate Rin and Rout. d. Calculate the voltage gain. e. Calculate the current gain (Assume 𝑖𝑜𝑢𝑡 is the current flowing through RE). Page 4 of 4