EESM 5100
Issued:
Due:
(1)
HW 3
Nov. 24, 2023 (Friday)
Dec. 10, 2023 (Sunday, 11:59pm).
For an NMOS differential pair shown below, let Vdd = Vss =
2.5V, nCox(W/L) = 3mA/V2, Vtn = 0.7V, I = 0.2mA, Rd = 5k,
and n = 0/V.
Vdd
Vd1
Vcm
Rd
Rd
Vd2
M2
M1
Vs
I
− Vss
(1a) Find Vov and Vgs of each transistor.
Vov = 0.258V, Vgs = Vtn+ Vov = 0.958V
(1b) For Vcm = 0V, find Vs, Id1, Id2, Vd1 and Vd2.
Vs = Vcm – Vtn - Vov = -0.958V
Id1 = Id2 = 0.1mA, Vd1 = Vd2 = Vdd – Id1*Rd = 2V
(1c) Repeat (1b) for Vcm = +1V.
Vs = Vcm – Vtn - Vov = 0.042V
Id1 = Id2 = 0.1mA, Vd1 = Vd2 = Vdd – Id1*Rd = 2V
(1d) Repeat (1b) for Vcm = –1V.
Vs = Vcm – Vtn - Vov = -1.958V
Id1 = Id2 = 0.1mA, Vd1 = Vd2 = Vdd – Id1*Rd = 2V
HKUST 2023 Fall
HW3 – 1
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EESM 5100
HW 3
(1e) What is the highest value of Vcm for which M1 and M2 remain in
saturation?
To ensure M1 and M2 working in saturation region,
Vd1 – Vs > Vov , and Vs = Vcm – Vtn – Vov
 Vcm(max) < Vd1 + Vtn = 2.7V.
 The highest value of Vcm is 2.7V.
(1f) If the current source I requires a minimum voltage of 0.3V to
operate properly, what is the lowest value allowed for Vs and
hence for Vcm?
Vs (min) = -2.5 + 0.3 = -2.2V.
Vcm(min) = Vs + Vtn + Vov = -1.242V
HKUST 2023 Fall
HW3 – 2
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EESM 5100
(2)
HW 3
Transient + Frequency Analysis
(2a) Compute the DC output voltage of the following NMOS inverter.
VDD = 5V
RD
40k
Cf
Is
1mA
R1
1k
Vo
M1
CL
25pF
Vtn = 0.8V
W
nCox
= 500A / V2
L
active :
1
W
ID = nCox
Vgs − Vtn 2
2
L
(
)
From Id=1/2*Kn*(Is*R1-Vtn) = (Vdd- Vo) /Rd
 Vo=Vdd - 1/2*Kn*(Is*R1-Vtn)*Rd
 Vo = 4.6V, Id = 10uA
(2b) With all capacitors equal to zero, compute the DC gain of the
inverter.
Since working in saturation region, gm = Kn*Vov = 10^-4 S
Vo/Vgs = gm*Rd= 4 V/V where Vgs = Is*R1
 Vo/Is = 4000 V/A
(2c) Let Cgs1 = Cgd1 = Cf = 0. If Is increases by 10A instantaneously
at t = 0, sketch the output voltage vs time. Indicate the final
output value and the time constant of the circuit.
The final output voltage Vo = 4.6V – 10uA*4000V/A = 4.56V
Where τ =Rd*CL = 1us.
HKUST 2023 Fall
HW3 – 3
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EESM 5100
HW 3
(2d) Compute the time required for the output voltage to settle within
1% of the final value.
0.99 = 1-e-t/τ => t = 4.6τ
Time required for 1% output error is 4.6τ = 4.6us.
(2e) With the insertion of Cf (Cgs1 = Cgd1 = 0), draw the small signal
model of the circuit.
(2f) Derive the transfer function of the inverter H(s) =
𝐻 (𝑠 ) =
𝑅1 𝑅𝐷 (𝐶𝑓 ∙ 𝑠 − 𝑔𝑚 )
vo (s)
.
is (s)
𝑅𝐷 ∙ (𝐶𝑓 + 𝐶𝐿 )𝑠 + 1
(2g) To obtain a small overshoot of 1%, the quality factor Q has to be
equal to 0.6. Find Cf such that Q = 0.6. Calculate the
corresponding o.
HKUST 2023 Fall
HW3 – 4
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EESM 5100
(3)
HW 3
Bode plots problems
(3a) Sketch the Bode plots (magnitude plot and phase plot) of the
function:
90000(𝑠 + 1000)
𝐹1(𝑠) =
(𝑠 + 30)(𝑠 + 30000)
N.B. You may convert it to the standard form for easy plotting.
Rewrite the transfer function as below:
𝐹1(𝑠) =
100(1 + s/1000)
(1 + s/30)(1 + s/30000)
Hence we got the one LHP zero at 1000, two poles at 30 and 30000
respectively.
(3b) From the Bode plots of (3a), determine the gain and phase of
F1(j) at  = 1000, that is, determine 20log|F1(j1000)| and
F1(j1000).
20log|F1(j1000)| ≈ 10dB
F1(j1000) ≈ -45°
HKUST 2023 Fall
HW3 – 5
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EESM 5100
HW 3
(3c) Sketch the Bode plots of the function:
−90000(𝑠 − 1000)
(𝑠)
𝐹2
=
(𝑠 + 30)(𝑠 + 30000)
Hint: You may make use of the results obtained in (2a).
Rewrite the transfer function as below:
𝐹1(𝑠) =
100(1 - s/1000)
(1 + s/30)(1 + s/30000)
Hence we got the one RHP zero at 1000, two poles at 30 and 30000
respectively.
(3d) From the Bode plots of (3c), determine the gain and phase of
F2(j) at  = 1000, that is, determine 20log|F2(j1000)| and
F2(j1000).
Hint: You may make use of the results obtained in (3b).
20log|F2(j1000)| ≈ 10dB
F2(j1000) ≈ -135°
HKUST 2023 Fall
HW3 – 6
Ki