Instruction Set
5 groups





Data Transfer group
Arithmetic operation group
Logical operation group
Boolean variable manipulation
Program & Machine control
Data Transfer Group
Move specified register content to Accumulator
1 Mov A, Rn
11101rrr
Mov A, R5
Move internal memory content to Accumulator
2 Mov A, direct Mov A, 14h
1 Mov A, @Ri Mov A, @R0
Move immediate data to Accumulator
2 Mov A, #data Mov A, #50h
Data Transfer Group
Move Accumulator content to specified register
1 Mov Rn, A
11111rrr
Mov R0, A
Move internal memory content to specified register
2 Mov Rn, direct Mov R1, 23h
Move immediate data to specified register
2 Mov Rn, #data Mov R3, #32h
Data Transfer Group
Move Accumulator to internal memory
Mov direct, A 11110101
2 Mov 41h, A
direct address
Move register content to internal memory
Mov direct, Rn 10001 rrr
2 Mov 14h, R2
direct address
Move internal memory to internal memory
3 Mov direct, direct - Mov 32h, 41h
Data Transfer Group
Move content of internal memory pointed by Ri to
another internal memory location
Mov direct, @Ri
2 Mov 41h, @R0
Move immediate data to internal memory
Mov direct, #data
3 Mov 32h, #50h
Data Transfer Group
Move Accumulator to internal memory pointed by Ri
Mov @Ri, A
1 Mov @R1, A
Move memory content to int. memory pointed by Ri
Mov @Ri, direct
2 Mov @R0, 50h
Move immediate data to int. memory pointed by Ri
2 Mov @Ri, #65h
Mov @R1, #65h
Data Transfer Group
Destination
Source
Accumulator
Register
Rn
Register
Direct
address
Direct
Indirect
R0, R1
Indirect
# data
Immediate
Data Transfer Group
Move Data-pointer with 16 bit number
Mov DPTR, #data16
DPH
3 Mov DPTR, #1234h
DPL
12
34
Move data from external memory to Accumulator
1 Movx A, @DPTR
1 Movx A, @Ri
5020
Accumulator
35
15
25
35
Data Transfer Group
Move code byte relative to DPTR to Accumulator
1 Movc A, @A+DPTR
1 Movc A, @A+PC
Accumulator = 01
CALL TOP
5000 Top: INC A
5001
MOVC A, @A+PC
5002
RET
5003
DB
66
5004
DB
77
5005
DB
88
5006
DB
99
Accumulator = 77
Data Transfer Group
Move data to external memory from Accumulator
1 Movx @DPTR, A
1 Movx @Ri, A
5020
Accumulator
30
10
20
30
Data Transfer Group
Copy the specified register or memory content into
stack memory
Push direct
2 Push 40h
DPTR = 1234h
Push DPL
Push DPH
SP = 07
08 = 34
09 = 12
SP = 09
Data Transfer Group
Copy the content from stack memory to the specified
register or memory
Pop direct
2 Pop 50h
DPTR = 0000h
Pop DPH
Pop DPL
DPTR = 1234h
SP = 09
09 = 12
08 = 34
SP = 07
Data Transfer Group
Exchange the content of Accumulator and specified
register or memory
1 XCH A, Rn
Accumulator = 33
R5 = 44
XCH A, R5
Accumulator = 44
R5 = 33
1 XCH A, direct
Accumulator = 22
50h = 66
XCH A, 50h
Accumulator = 66
50h = 22
Data Transfer Group
Exchange the content of Accumulator and specified
internal memory pointed by Ri
1 XCH A, @Ri
Accumulator = 11
R0 = 55
memory = 75
R0 = 55
memory = 11
R1 = 66
memory = 72
R1 = 66
memory = 77
XCH A, @R0
Accumulator = 75
1 XCHD A, @Ri
Accumulator = 27
XCHD A, @R1
Accumulator = 22
Instruction Set
5 groups





Data Transfer group
Arithmetic operation group
Logical operation group
Boolean variable manipulation
Program & Machine control
Arithmetic Operation Group
Add specified register content to Accumulator
ADD A, Rn
1 ADD A, R5 Acc
Acc + R5
Add internal memory content to Accumulator
ADD A, direct
Acc
23
2 ADD A, 14h
14H
56
Acc
23 + 56
Arithmetic Operation Group
Add specified memory content to Accumulator
ADD A, @Ri
1 ADD A, @R0 Acc
Acc + @R0
Add immediate data to Accumulator
ADD A, #data
Acc
23
2 ADD A, #45h
data
45
Acc
23 + 45
Arithmetic Operation Group
Add register content and Carry to Accumulator
ADDC A, Rn
1 ADDC A, R5 Acc
Acc + R5 + Cy
Add memory content and Carry to Accumulator
ADDC A, direct
Acc
20
2 ADDC A, 14h
14h
54
Cy
1
Acc
20 + 54 + 1
Arithmetic Operation Group
Add memory content and Carry to Accumulator
ADDC A, @Ri
1 ADDC A, @R0 Acc
Acc + @R0 + Cy
Add immediate data and Carry to Accumulator
ADDC A, #data
Acc 32
2 ADDC A, #23h
data 23
Cy
1
Acc
32 + 23 + 1
Arithmetic Operation Group
Subtract register content and Borrow from Acc.
SUBB A, Rn
1 SUBB A, R5 Acc
Acc - R5 - Cy
Subtract internal memory content and Borrow
from Accumulator
SUBB A, direct
Acc
67
2 SUBB A, 14h
14h
55
Acc
67 – 55 - Cy
Arithmetic Operation Group
Subtract memory content & Borrow from Acc.
SUBB A, @Ri
1 SUBB A, @R0 Acc
Acc - @R0 - Cy
Subtract immediate data & Borrow from Acc.
SUBB A, #data
Acc
56
2 SUBB A, #45h
data
45
Acc
56 – 45 - Cy
Arithmetic Operation Group
Increment the Accumulator content
INC A
1 INC A
Acc
Acc + 1
Increment the specified register content
INC Rn
1 INC R0
R0
R0 + 1
Arithmetic Operation Group
Increment the direct memory content
INC direct
2 INC 41h
(41h)
(41h) + 1
Increment the specified memory content
INC @Ri
1 INC @R1
(@R1)
(@R1) + 1
Arithmetic Operation Group
Increment the 16 bit Data Pointer by 1
1 INC DPTR
INC DPTR (DPTR)
(DPTR) + 1
DPH
DPL
DPH
DPL
12h
FEh
INC DPTR
INC DPTR
INC DPTR
13h
01h
Arithmetic Operation Group
Decrement the Accumulator content
DEC A
1 DEC A
Acc
Acc - 1
Decrement the specified register content
DEC Rn
1 DEC R5
R5
R5 - 1
Arithmetic Operation Group
Decrement the direct memory content
DEC direct
2 DEC 41h
(41h)
(41h) - 1
Decrement the specified memory content
DEC @Ri
1 DEC @R1
(@R1)
(@R1) - 1
Arithmetic Operation Group
Multiply unsigned Accumulator and B register
contents
MUL AB
Result-Low order byte
Result-High order byte
Acc
B register
Carry flag is always cleared
If the result is more than 255, the OV flag is set
Arithmetic Operation Group
Divide unsigned Accumulator content by
unsigned B register content
DIV AB
Result - Quotient
Result - Remainder
Acc
B register
Carry and Over-flow flags will be cleared
Arithmetic Operation Group
Decimal adjust Accumulator for Addition
DA A
This instruction adjusts the eight bit value in the accumulator, producing
the proper BCD digit
If the accumulator bits 3-0 are greater than nine, or if the AC flag is one, six
is added to the accumulator producing the proper BCD in the low order
nibble.
If the accumulator bits 7-4 are greater than nine, or if the Cy flag is one, six
is added to the accumulator producing the proper BCD in the high order
nibble.
This instruction cannot simply convert a hexadecimal number in the
accumulator to BCD notation.
Instruction Set
5 groups





Data Transfer group
Arithmetic operation group
Logical operation group
Boolean variable manipulation
Program & Machine control
Logical Operation Group
And specified register content to Accumulator
ANL A, Rn
1 ANL A, R5
Acc
Acc ^ R5
And internal memory content to Accumulator
ANL A, direct
Acc
0010 0010
2 ANL A, 14h
14h
0101 0101
Acc
00
22 ^ 55
Arithmetic Operation Group
And specified memory content to Accumulator
ANL A, @Ri
1 ANL A, @R0 Acc
Acc ^ @R0
And immediate data to Accumulator
ANL A, #data
Acc
0011 0011
2 ANL A, #55h
data
0101 0101
Acc
11
33 ^ 55
Arithmetic Operation Group
And internal memory content with Accumulator
ANL direct, A
Acc = 0010 0010
2 ANL 14h, A
(14h) = 0110 0110
(14h)
22
22 ^ 66
And immediate data with internal memory content
ANL direct, #data
(23h) = 0011 0011
3 ANL 23h, #55h
data = 0101 0101
(23h)
11
33 ^ 55
Logical Operation Group
OR the specified register with Accumulator
ORL A, Rn
1 ORL A, R5
Acc
Acc v R5
OR the internal memory with Accumulator
ORL A, direct
Acc
0010 0011
2 ORL A, 14h
14h
0101 0101
Acc
77
23 v 55
Logical Operation Group
OR the specified memory content with Acc.
ORL A, @Ri
1 ORL A, @R0 Acc
Acc v @R0
OR the immediate data with Accumulator
ORL A, #data
Acc
0011 0011
2 ORL A, #22h
data
0010 0010
Acc
33
33 v 22
Logical Operation Group
OR the Accumulator with internal memory content
ORL direct, A
Acc = 0010 0010
2 ORL 14h, A
(14h) = 0100 0100
(14h)
66
22 v 44
OR the immediate data with internal memory content
ORL direct, #data
(23h) = 0011 0011
3 ORL 23h, #45h
data = 0100 0101
(23h)
77
33 v 45
Logical Operation Group
XRL the specified register with Accumulator
XRL A, Rn
1 XRL A, R5
Acc
Acc .xr. R5
XRL the internal memory with Accumulator
XRL A, direct
Acc
0010 0011
2 XRL A, 14h
14h
0101 0101
Acc
76
23 .xr. 55
Logical Operation Group
XRL the specified memory with Accumulator
XRL A, @Ri
1 XRL A, @R0 Acc
Acc .xr. @R0
XRL the immediate data with Accumulator
XRL A, #data
Acc
0011 0011
2 XRL A, #22h
data
0010 0010
Acc
11
33 .xr. 22
Logical Operation Group
XRL the Accumulator with internal memory content
XRL direct, A
Acc = 0010 0010
2 XRL 14h, A
(14h) = 0100 0101
(14h)
67
22 .xr. 45
XRL the immediate data with internal memory content
XRL direct, #data
(23h) = 0011 0011
3 XRL 23h, #45h
data = 0100 0101
(23h)
76
33 .xr. 45
Logical Operation Group
Rotate Accumulator content to the Left
Bit 7 is rotated into the bit 0 position. No flags are affected
RL A
1
Acc = 44
01000100
Acc = 88
Rotate Accumulator content to Left through Carry flag
Bit 7 moves into the Carry flag, original Cy flag moves into the bit 0 position.
No other flags are affected
RLC A
Acc = 44
Cy = 1
Acc = 89
Cy
Cy = 0
01000100
Logical Operation Group
Rotate Accumulator content to the Right
Bit 0 is rotated into the bit 7 position. No flags are affected
RR A
1
Acc = 44
01000100
Acc = 22
Rotate Accumulator content to Right through Carry flag
Bit 0 moves into the Carry flag, original Cy flag moves into the bit 7 position.
No other flags are affected
RRC A
Acc = 44
Cy = 1
Acc = A2
Cy
Cy = 0
01000100
Logical Operation Group
Swap nibbles within the Accumulator
1 SWAP A
Interchanges the Low and High order nibbles of the
accumulator.
This operation is equivalent to four bit rotate instruction.
No flags are affected.
Acc = 15h
SWAP A
Acc = 51h
Instruction Set
5 groups





Data Transfer group
Arithmetic operation group
Logical operation group
Boolean variable manipulation
Program & Machine control
Boolean Operation Group
Clear the Carry flag
CLR C
1 CLR C
Cy
0
Clear the specified bit
CLR bit
2 CLR P1.5
The indicated bit is reset to zero. No flags are affected
P1
01010001
01110001
Boolean Operation Group
Set the Carry flag
SETB C
1 SETB C
Cy
1
Set the specified bit
SETB bit
2 SETB P1.5
The indicated bit is set to one. No flags are affected
P1
00100001
00000001
Boolean Operation Group
Clear the Accumulator. No flags are affected
CLR A
1 CLR A
Acc
0000 0000
Complement the Accumulator content.
CPL A
1 CPL A
No flags are affected
Acc
1111 1110
0000 0001
Boolean Operation Group
Complement the carry flag
1 CPL C
Cy
0
Cy
1
1
0
Complement the specified bit.
2 CPL bit
CPL P1.0
P1
P1
0000 0000
0000 1111
0000 0001
0000 1110
Boolean Operation Group
Logical-AND the specified bit with Cy flag.
No other flags are affected
ANL Cy, bit
2 ANL Cy, Acc.7
2 ANL Cy, P1.5
AND the complement of specified bit with Cy flag.
No other flags are affected
ANL Cy, /bit
2 ANL Cy, /Acc.7
2 ANL Cy, /P1.5
Boolean Operation Group
Logical-OR the specified bit with Cy flag.
No other flags are affected
ORL Cy, bit
2 ORL Cy, Acc.7
2 ORL Cy, P1.5
OR the complement of specified bit with Cy flag.
No other flags are affected
ORL Cy, /bit
2 ORL Cy, /Acc.7
2 ORL Cy, /P1.5
Boolean Operation Group
Move bit data.
No other register or flags are affected
MOV Cy, bit
2 MOV Cy, Acc.7
2 MOV Cy, P1.5
2
2
MOV bit, Cy
MOV Acc.5, Cy
MOV P3.2, Cy
Instruction Set
5 groups





Data Transfer group
Arithmetic operation group
Logical operation group
Boolean variable manipulation
Program & Machine control
3
Branching Group
If the indicated bit is 1, jump to the given address
3
JB bit, label
No flags are affected
JB Acc.5, Top
JB P1.2, Sun
If the indicated bit is 0, jump to the given address,
otherwise proceed with next instruction
3
JNB bit, label
JNB Acc.3, Top
JNB
P2.5, Sun
4
Branching Group
If the indicated bit is 1, jump to the given address,
otherwise proceed with next instruction and
clear the specified bit
3
JBC bit, label
JBC Acc.3, Top
5
Branching Group
If the Cy flag is set, branch to the given address
No flags are affected
2
JC label
JC Top
(PC)
(PC) + rel. address
If the Cy flag is 0, branch to the given address,
otherwise proceed with next instruction
2
JNC label
JNC Top
(PC)
(PC) + rel. addres
6
Branching Group
If the Accumulator is 0, branch to the given address
No flags are affected
2
JZ label
JZ Top
(PC)
(PC) + rel. address
If the Acc. is not 0, branch to the given address,
otherwise proceed with next instruction
2
JNZ label
JNZ
Top
(PC)
(PC) + rel. address
7
Branching Group
Jump indirect
Add the eight bit unsigned content of Acc. with
the data pointer and load the resulting sum to
the program counter.
Accumulator and Data pointer content is not altered.
No flags are affected.
1
JMP @DPTR+A
8
Branching Group
Absolute Call
Unconditionally calls a subroutine. Before calling, it
pushes the address of the next instruction to be
executed into the stack memory. The destination
address is obtained from op-code bits 7-5 and second
byte of the instruction. The called subroutine must
therefore start within the same 2K block.
No flags are affected
2
ACALL
ACALL
addr11
Rajan
9
Branching Group
Long Call
Unconditionally calls a subroutine. Before calling
it pushes the address of the next instruction to
be executed into the stack memory. Then the PC
is loaded with called subroutine address.
The subroutine may be anywhere in the 64K
program memory address.
No flags are affected
3
LCALL label
LCALL
Rajan
10
Branching Group
Short Jump
Unconditionally branches to the address specified.
The branch address is computed by adding the
signed displacement in the second instruction
byte to the PC. The range of destination allowed
is from 128 bytes preceding this instruction to
127 bytes following it.
No other flags are affected
2
SJMP relative address
SJMP
Rajan
11
Branching Group
Absolute Jump
Transfers program execution to the indicated
address. The destination address is obtained
from op-code bits 7-5 and second byte of the
instruction. The destination must therefore be
within the same 2K block.
No flags are affected
2
AJMP addr11
AJMP Rajan
12
Branching Group
Long Jump
Unconditionally branches to the specified address.
The PC is loaded with second and third
instruction bytes. The destination may be
anywhere in the 64K program memory address.
No flags are affected
3
LJMP addr16
LJMP
Rajan
13
Branching Group
Return from the subroutine.
Last instruction of the called subroutine must be RET.
It pops the address from the stack into the PC.
1
RET
Return from the Interrupt subroutine. Last instruction of
the called interrupt subroutine must be RETI.
It pops the address from the stack into the PC. Restores
the interrupt logic to accept additional interrupts at the
same priority level.
1
RETI
14
Branching Group
Compare the magnitudes of the first two operands and
branch if Not Equal.
The destination is computed by adding the signed relative
displacement to the PC.
The carry flag is set if the unsigned integer value of
destination byte is less than the unsigned integer
value of source. Otherwise Cy flag is cleared.
Neither operand is affected
3
CJNE A, direct, label
CJNE A, 50h, Top
Wait:
CJNE A, P1, wait
15
Branching Group
Compare the magnitudes of the first two operands and
branch if Not Equal.
The destination is computed by adding the signed relative
displacement to the PC.
The carry flag is set if the unsigned integer value of
destination byte is less than the unsigned integer
value of source. Otherwise Cy flag is cleared.
Neither operand is affected
3
CJNE A, #data, label
CJNE A, #50h, Top
Wait:
CJNE A, #50h, wait
16
Branching Group
Compare the magnitudes of the first two operands and
branch if Not Equal.
The destination is computed by adding the signed relative
displacement to the PC.
The carry flag is set if the unsigned integer value of
destination byte is less than the unsigned integer
value of source. Otherwise Cy flag is cleared.
Neither operand is affected
3
CJNE Rn, #data, label
CJNE R5, #50h, Top
17
Branching Group
Compare the magnitudes of the first two operands and
branch if Not Equal.
The destination is computed by adding the signed relative
displacement to the PC.
The carry flag is set if the unsigned integer value of
destination byte is less than the unsigned integer
value of source. Otherwise Cy flag is cleared.
Neither operand is affected
3
CJNE @Ri, #data, label
CJNE @R0, #50h, Rajan
18
Branching Group
Decrement the location indicated by 1, and branch to the
address indicated by the second operand if the
resulting value is not zero.
No flags are affected
3
DJNZ Rn, label
DJNZ R0, Rajan
DJNZ direct, label
DJNZ 40h, Top
19
Branching Group
1
NOP
No operation.
Execution continues to the next instruction.
Other than PC, no registers or flags are affected.
CLR P2.5
NOP
NOP
NOP
NOP
SETB P2.5
It will generate low going pulse lasting for 5 cycle
20