ENSC-252 September 7, 2023 1 Fundamentals of Digital Logic & Design: Semester's plan Lectures: Tuesdays: 08:30 am – 10:20 am, Room C9002 Thursdays: 08:30 am – 10:20 am, Room WMC3520 Instructors: Majid Shokoufi (mshokouf@sfu.ca) Take your own notes during the lectures. The lecturers will not be recorded, and the filled slides will not be shared. Teaching assistants: Zihao Xie <zxa43@sfu.ca> Aarya Pandya <aap19@sfu.ca> Mahsa Tadrisinoor <mta161@sfu.ca> Office hours: • Instructor: Thursdays from 10:30 am to 11:30 am, Office number: ASB 9862 • (TA) office hours: TBA Read the course information document on Canvas carefully. You can find all the information about the course on this document such as course plan, quizzes, midterm, final exam and so forth: ENSC252 Course information Fall 2023.pdf September 7, 2023 2 Fundamentals of Digital Logic & Design: Semester's plan Laboratory sessions: LA01: Mondays, 12:30 pm to 02:20 pm, Room ASB 10877 & ASB 10879 LA02: Mondays, 02:30 pm to 04:20 pm, Room ASB 10877 & ASB 10879 LA03: Mondays, 04:30 pm to 06:20 pm, Room ASB 10877 & ASB 10879 October 9th labs will be held on October 10th: LA01: Tuesday, 12:30 pm to 02:20 pm, Room ASB 10877 & ASB 10879 LA02: Tuesday, 02:30 pm to 04:20 pm, Room ASB 10877 & ASB 10879 LA03: Tuesday, 04:30 pm to 06:20 pm, Room ASB 10877 & ASB 10879 o o o o o o Labs are scheduled every week (starting from the third week of the semester). You will work in groups of 3. You must select your teammates by the end of the second week of the semester. Teammates must stay unchanged during the entire semester. You must select your teammate from the same lab session that you enrolled in. You can sign out the development board during the second week of the semester. The date and time will be announced on Canvas. September 7, 2023 3 Fundamentals of Digital Logic & Design: Semester's plan Tentatively scheduled tutorial sessions: will be held according to the following schedule. • Tutorial #1: Wednesday, Sep 27th, from 10:30 am to 12:20 pm • Tutorial #2: Wednesday, Oct 26th, from 10:30 am to 12:20 pm • Tutorial #3: Wednesday, Nov 15th, from 10:30 am to 12:20 pm • Tutorial #4: Wednesday, Nov 29th, from 10:30 am to 12:20 pm Please don't hesitate to ask questions if any part of the course material is unclear during the lectures. It's important to ensure that everyone understands the subject matter, so please don’t let me move on until you have a clear grasp of the concepts. September 7, 2023 4 Fundamentals of Digital Logic & Design: Objectives • Get familiar with different type of number representation especially binary numbers • Get familiar with fundamental components of digital logic gates, like AND, OR, XOR, … • Get familiar with Combinational and arithmetic-circuit building blocks, like Encoder, Decoder, MAX, DEMAX, adder, subtracter, …. • Get familiar with fundamental components of memory, like Flip-flops, registers, and counters • Get familiar with sequential circuits, like counters, shift registers, … • Digital system design, like BUS structure, a simple processor • Get familiar with digital logic circuits technology, CMOS • You were able to construct complete VHDL models • Generate logic functions using the VHDL • Create hierarchical VHDL designs By the end of the course, you will be able to design, simulate, build, and debug complex digital circuits using basic digital gates as well as hardware description language (HDL). September 7, 2023 5 Fundamentals of Digital Logic & Design: Objectives A synchronous up-down counter with load and clear capabilities September 7, 2023 6 Fundamentals of Digital Logic & Design: Objectives A 12-hour digital clock Digital Fundamentals, by Thomas L. Floyd September 7, 2023 7 Fundamentals of Digital Logic & Design: Objectives A VHDL code to perform 16 bit add operation with carry out and overflow -- 16-bit adder in VHDL LIBRARY ieee; USE ieee.std_logic_1164.all USE ieee.std_logic_arith.all ENTITY adder16 IS PORT ( X, Y : IN SIGNED ( 15 DOWNTO 0 ); S : OUT SIGNED ( 15 DOWNTO 0 ); Cout, Overflow : STD_LOGIC END adder16; ARCHITECTURE Behavior OF adder16 IS SIGNAL Sum : SIGNED ( 16 DOWNTO 0 ); BEGIN Sum <= (‘0’ & X ) + (‘0’ & Y ); S <= Sum ( 15 DOWNTO 0 ); Cout <= Sum (16); Overflow <= Sum (16) XOR X(15) XOR Y(15) XOR Sum(15); END Behavior; September 7, 2023 8 Fundamentals of Digital Logic & Design: Objectives • 1971 • 4-bit, 46 instructions, 740KHz • roughly eight clock cycles per instruction cycle (fetch, decode, execute) • 2,300 transistors, 10 micron September 7, 2023 https://wikimedia.org/ 9 Fundamentals of Digital Logic & Design: Course outline • • • • • • • • • Introduction digital logic & design Number representation and arithmetic circuits Introduction to logic circuits Combinational-circuit building blocks Flip-flops, registers, and counters Synchronous sequential circuits Digital system design Computer aided design tools Implementation of digital logic circuits technology Fundamentals of Digital Logic with VHDL Design 4th edition, Stephen Brown | Zvonko Vranesic, McGraw-Hill Digital Design, by M. Morris Mano | Michael D. Ciletti September 7, 2023 10 Introduction to Digital Logic & Design : Lecture outline • • • • Digital hardware components An overview of the design process Binary numbers Digital representation of information Fundamentals of Digital Logic with VHDL Design 4th edition, Stephen Brown | Zvonko Vranesic, McGraw-Hill September 7, 2023 11 Introduction to Digital Logic & Design In today’s world, the term digital has become part of our everyday vocabulary because of the dramatic way that digital circuits and digital techniques have become so widely used in almost all areas of life: computers, automation, robots, medical science and technology, transportation, telecommunications, entertainment, space exploration, and on and on. We start by introducing some underlying concepts that are a vital part of digital technology; these concepts will be expanded on as they are needed later. To understand the operation of each digital module, it is necessary to have a basic knowledge of digital circuits and their logical function. September 7, 2023 12 Introduction to Digital Logic & Design https://en.wikipedia.org/ September 7, 2023 13 Introduction to Digital Logic & Design: Signals representation An arbitrary analog voltage signal ๐ฃ๐ (๐ก) Analog signals: • • • can take on any value for amplitude have continuous variation over its range can be corrupted by noise Discrete signals: • • • • can take on any value for amplitude is defined at the sampling instance no longer is a continuous function of time Can be corrupted by noise Example: A sample rate of 96KHz/44.1 kHz is commonly used for music reproduction, the main source used for creating MP3 files. Bit depth is a measure of the numerical detail used to describe each audio sample. A bit Depth of 16-bit is commonly used for MP3. 7 September 2023 14 Introduction to Digital Logic & Design: Signals representation Digital signals: • can take on a sequence of numbers (binary 2) • Each number representing the signal magnitude at an instant of time (binary 0 and 1) • can withstand some noise while still being able to distinguish between logic levels without any loss of information 7 September 2023 An arbitrary digital voltage signal ๐ฃ(๐ก) 15 Introduction to Digital Logic & Design: Signals representation There are basically two ways of representing the numerical value of quantities : analog and digital. • Analog Representations : In analog representation, a quantity is represented by a continuously variable, proportional indicator. Analog quantities have an important characteristic, no matter how they are represented: they can vary over a continuous range of values. • Digital Representations : In digital representation the quantities are represented not by continuously (discrete) variable indicators but by symbols called digits. September 7, 2023 16 Introduction to Digital Logic & Design: Signals representation Advantage of Digital Techniques • Easy to design. • Data storage is easy. • Accuracy and precision are easier to maintain throughout the system. • Operation can be programmed. • Digital circuits are less affected by noise. • More digital circuitry can be fabricated on IC chips. September 7, 2023 Limitations of Digital Techniques • The real world is analog • Processing digitized signals takes time. 17 Introduction to Digital Logic & Design Example: Block diagram of a digital temperature control system September 7, 2023 18 Introduction to Digital Logic & Design Example: Microphone Digital inputs Speaker Pre-Amp ADC Audio processor DAC Amplifier Power Amp Digital outputs 7 September 2023 19 Introduction to Digital Logic & Design • Until the 1960s logic circuits were constructed with bulky components, such as transistors and resistors that came as individual parts. • By 1970 it was possible to implement all circuitry needed to realize a microprocessor on a single chip. An estimate of the maximum number of transistors per chip over time (Moore’s law). September 7, 2023 20 Introduction to Digital Logic & Design Discrete digital gates and components We can use discrete digital gates and components (such as TTL and CMOS) to design and implement our circuit. For simple circuit we can use this approach but for complex circuit this is not a practical approach. Programmable Logic Devices (PLDs) The most commonly-used type of PLD is known as a field-programmable gate array (FPGA). Advantages: • Flexible design • Reprogrammable • Easy prototyping Drawbacks: • Switches consume valuable chip area • Switches limit the speed of operation of implemented circuits Application-specific integrated circuits (ASICs) • Costly • Design and implementation process take considerable amount of time • Large quantities September 7, 2023 21 Introduction to Digital Logic & Design Required product Design process Define specifications Initial design Simulation Redesign Is design correct? No Yes Prototype implementation Testing Meets specifications? Make corrections Yes No Minor errors? Yes Finished product September 7, 2023 23 No Introduction to Digital Logic & Design Development kit will be used during the semester. FPGA development board • Altera • DE2-115 Cyclone IV (4CE115 FPGA) : Maximum Operating Frequency:200 MHz Number of Logic Elements:114,480 LE Number of I/Os:153 I/O Computer aided design (CAD) • Quartus II Hardware description language • VHDL September 7, 2023 24 Introduction to Digital Logic & Design: Digital Representation of Information Many number systems are in use in digital technology. The most common are the decimal, binary, octal, and hexadecimal systems. • • • • • Decimal Hexadecimal Octal Quaternary Binary – > 10 symbols (base-10) –> 16 symbols (base-16) –> 8 symbols (base-8) –> 4 symbols (base-4) –> 2 symbols (base-2) The decimal system is a positional-value system in which the value of a digit depends on its position. For example, consider the decimal number 453. We know that the digit 4 actually represents 4 hundreds, the 5 represents 5 tens, and the 3 represents 3 units. In essence, the 4 carries the most weight of the three digits; it is referred to as the most significant digit (MSD). The 3 carries the least weight and is called the least significant digit (LSD). September 7, 2023 25 Introduction to Digital Logic & Design: Digital Representation of Information The decimal system is composed of 10 numerals or symbols . These 10 symbols are 0, 1, 2, 3, 4, 5, 6, 7, 8, 9; using these symbols as digits of a number. 2 × 10+3 + (7 × 10+2 ) + (4 × 10+1 ) + (5 × 100 ) + (5 × 100 ) + (2 × 10−1 ) + (1 × 10−2 ) + (4 × 10−3 ) = 2745.214 Most significant digit (MSD) & least significant digit (LSD) In general, with N places or digits, we can count through 10N different numbers, starting with and including zero. The largest number will always be 10N-1 September 7, 2023 26 Introduction to Digital Logic & Design: Digital Representation of Information The octal system is composed of 8 numerals or symbols . These 8 symbols are 0, 1, 2, 3, 4, 5, 6, 7. Example: (762)8 =? (762)8 = 7 × 82 + (6 × 81 ) + (2 × 80 ) = (498)10 The hexadecimal system is composed of 16 numerals or symbols . These 16 symbols are 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F. Example: (3๐น๐ต)16 =? (3๐น๐ต)16 = 3 × 162 + (15 × 161 ) + (11 × 160 ) = (1019)10 The binary system is composed of 2 numerals or symbols . These 2 symbols are 0, 1. Example: (1001)2 =? September 7, 2023 (1001)2 = 1 × 23 + (0 × 22 ) + (0 × 21 ) + (1 × 20 ) 27 Introduction to Digital Logic & Design: Digital Representation of Information Binary Numbers (Base-2) General formula to convert binary number to a decimal number B = bn−1bn−2 · · · b1b0 an n-bit unsigned number ๐−1 V(B) = bn−1 × 2n−1 + bn−2 × 2n−2 +· · ·+b1 × 21 + b0 × 20 = เท ๐๐ × 2๐ 0 Example: (1101)2 = (??)10 (0111)2 = (??)10 LSB, MSB, Byte, Nibble September 7, 2023 (1000)2 = (??)10 (10000111)2 = (???)10 Decimal (Base 10) Hexadecimal (base 16) Binary (base 2) 00 0 0000 01 1 0001 02 2 0010 03 3 0011 04 4 0100 05 5 0101 06 6 0110 07 7 0111 08 8 1000 09 9 1001 10 A 1010 11 B 1011 12 C 1100 13 D 1101 14 E 1110 15 F 1111 28 Introduction to Digital Logic & Design: Conversion between Decimal and other base Systems Consider converting a decimal number into an octal number. Approach #1: (35)10= (???)8 = a2 × 82 + a1 × 81+ a0 × 80=(a2a1a0)8 Approach #2: Quotient Remainder 35 ÷ 8 4 3 4÷8 0 4 (35)10= (???)8 = (43)8 Example: convert (153)10 into an octal number using both approach. (153)10= (???)8 = a2 × 82+ a1 × 81+ a0 × 80=(a2 a1a0)8 September 7, 2023 Quotient Remainder 153 ÷ 8 19 1 19 ÷ 8 2 3 2÷8 0 2 = (231)8 29 Introduction to Digital Logic & Design: Conversion between Decimal and other base Systems Example: convert (35)10 into a hexadecimal number using both approach. Approach #1: (35)10= (??)16 = a1 × 161+ a0 × 160=(a1a0)8 (35)10= (??)16 Approach #2: Quotient Remainder 35 ÷ 16 2 3 2 ÷ 16 0 2 = (23)16 Example: convert (153)10 into a hexadecimal number using both approach. Approach #1: Approach #2: (153)10= (???)16 = a2 × 162+ a1 × 161+ a0 × 160=(a2 a1a0)16 September 7, 2023 Quotient Remainder 153 ÷ 16 9 1 9 ÷ 16 0 9 = (91)16 30 Introduction to Digital Logic & Design: Conversion between Decimal and other base Systems Example: convert (35)10 into a binary number using both approach. Approach #1: (35)10= (?????)2 = b5 × 25+ b4 × 24+ b3 × 23+ b2 × 22+ b1 × 21+ b0 × 20=(b5b4b3b2b1b0)2 Approach #2: Example: convert (857)10 into a binary number using both approach. Convert (857)10 = (?????)2 September 7, 2023 31 Introduction to Digital Logic & Design: Conversion between Decimal and other base Systems Converting fractional decimal to other bases (0.29)10= (0.???)2 = b-1 × 2-1+ b-2 × 2-2+ b-3 × 2-3=(0.b-1b-2b-3b-4b-5)2 0.29 × 2 = 0.58 0.58 × 2 = 1.16 0.16 × 2 = 0.32 0.32 × 2 = 0.64 0.64 × 2 = 1.28 0.28 × 2 = 0.56 0.56 × 2 = 1.12 0.12 × 2 = 0.24 . . . . . . September 7, 2023 (0.6875)10= (0.????)2 (0.6875)10= (0.????)8 0.6875 × 2 = 1.3750 0.6875 × 8 = 5. 50 0.3750 × 2 = 0.7500 0.50 × 8 = 4. 00 0.7500× 2 = 1.5000 0.5000 × 2 = 1.0000 =(0.54)8 =(0.1011)2 =(0.01001010…)2 32 Introduction to Digital Logic & Design: Conversion between Decimal and other base Systems Conversion between binary and hexadecimal, octal and quaternary systems (10 110 001 101 011 . 111 100 000 11)2= ( . (10 1100 0110 1011 . 1111 0000 011)2= ( (673.124)8= ( (3B6.D0)16= ( September 7, 2023 . . )8 )16 )2 . )2 33 Introduction to Digital Logic & Design ASCII Character Code American Standard Code for Information Interchange September 7, 2023 34 Introduction to Digital Logic & Design An example of Digital system September 7, 2023 35 Questions? September 7, 2023 36