PRACTICAL GUIDE
Faculty
ENGINEERING AND TECHNOLOGY
Department
COMPUTER SYSTEMS
Course
DIPLOMA: COMPUTER SYSTEMS
Subject
DIGITAL SYSTEMS 2
Subject Code
EIDSY2A
Technician/Technologist
Mr. R BAXTER
Year
2023
NQF Level
6
Credits
11.5 ECSA; 10 SAQA
Laboratory Venue
T201
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Word of Welcome
The Department of Electrical Engineering at the Vaal University of Technology welcomes you as a student to the
Faculty of Engineering and Technology. The goal of the Practical is to help students gain the knowledge,
understanding, and abilities they will need to continue their education and become qualified Engineering Technicians.
Its purpose is to enable applicant Engineering Technicians to demonstrate that they can apply their newly gained
information, understanding, skills, attitudes, and values in South African and international work situations.
It is also intended to provide value to the qualifying student in terms of personal enrichment, status, and recognition.
A qualified individual can work as a technician in one of the following fields of specialization: Electrical machines,
electricity generation, electricity transmission and distribution, and electrical protection are all examples of electrical
machines. Careers in Design and Development and Maintenance are available in each of the specialized sectors listed
above.
The Vision of the Department is to be a Prominent Department in Engineering and institutions.
The core values of this Department are:
•
Integrity & Mutual Respect
•
Honesty
•
Punctuality & Professionalism
•
High academic standards &
•
Excellence
•
Trust
Designed by
Contact details
R Baxter
Mr. R Baxter
Vaal University of
Technology
Vanderbjilpark Campus
Andries Potgieter Blvd
016 950 9610
Private Bag X021
robin@vut.ac.za
VanderbijlPark, 1900
Page 2 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
DISCLAIMER
Please note that all the information or examples shown here are derived from
the scope of courses required this semester. Be aware that while the
composition may adjust, the content will always be based on the syllabus of
Digital Systems 1. Students must conduct their own research to deepen their
understanding of the MULTISIM software for self-directed learning.
GENERAL LABORATORY SAFETY RULES AND REGULATIONS (T201)
1. Smoking, drinking, and eating are prohibited in the laboratory.
2. All lab sessions are compulsory, and no more than one absence.
3. Each and every student only has one practical class per week and this is
allocated on their timetable.
4. Students are only permitted to attend when stated on their timetable no
additional classes will be given.
5. If students are found attending an additional practical class, other that the
time stated on their timetable the student will be asked to leave that
class and marks will be deducted.
6. All students must be punctual, no later than 10 minutes is allowed.
7. All absenteeism must be reported as soon as the student returns to
practical class.
8. No students are allowed in the laboratory without supervision.
9. No students are allowed in the technician’s area at the back of the
laboratory.
10.Make sure all emergency exits are always clear.
11.The student is responsible for the equipment allocated to this position
therefore you must report any damage, faulty or missing
equipment as well as damage to the furniture (scratches or writing
on tables) immediately to the technician before commencing with
your practical.
12.Every student must do his own practical, however students are allowed to
help one another in a constructive manner.
13.All students must have their own practical guide, no second hand book or a
copy of the practical assignment book will be allowed.
14.Practical assignments must be built by the student him/herself during the
practical period.
15.Students must write their initials, surname and student number on
every single practical assignment that they are attempting or completed
including the cover page.
16.Preparation of practical assignments will be evaluated on the following
criteria:
Neatness, logic circuit layout
Completeness, initiative
Truth tables correctly completed
17.Construction of practical assignments will be evaluated using the following
criteria:
Overall neatness, correct wiring techniques, correct
layout of components
Correct working of circuit
Student’s knowledge of circuit
Correctness of truth table.
Page 3 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Ability to do fault finding
18.Students must prepare their practical assignments before attempting to
build any of the logic circuits. Due to the limited time available during the
practical period these preparations must be done before entering the
practical room.
19.Students must prepare their practical assignments before attempting to
build any of the logic circuits. Due to the limited time available during the
practical period these preparations must be done before entering the
practical room.
20.All practical work (preparations, truth tables etc.) must be done in the
practical book.
21.Students not obeying these rules could face disciplinary steps against
him/her which can lead to the expulsion out of the practical class or
deduction of marks.
22.It is a must to follow the given instructions when experimenting with each
assignment.
23.No student will be allowed to conduct any practical experiment unless
prior preparation has been completed before the practical period.
24.Only those students who were present during the laboratory session will
receive marks.
25.Leave the workbench and working area as clean as possible.
26.Students must also contribute to the neatness of the lab, by
Cleaning the table
Replacing used equipment in a neat position on the
table
Push the chair back under the table, only one chair at a
work space
27.No bags are allowed on the Workbench.
28.Playing around in the laboratory is STRICTLY PROHIBITED.
29.Do not play games with the computer, change the background or access
anything online other that relevant digital systems 1 material. You will be
expelled from the practical class.
30.Do not plug in smart phones, cell phones, tablets, iPod, iPad, flash driver
or any other devices into the computers.
31.Do not unplug the computer or screens to charger your smart phones, cell
phones, tablets, iPod, iPad, or any other devices.
32.Fire extinguisher: T201 uses a CO2 fire extinguisher, never use it on a
person, as it is extremely cold.
33.Plagiarism is prohibited, and failure will occur as a result.
34.No cell phones/tablets or electronic devices are permitted on the
work bench during the practical session.
35.No practical related information what so ever is permitted on
student’s cell/phones or electronic devices inside the practical
class e.g. Pictures of practical circuits, truth tables, or definitions
of practicals.
36.If students are found using any electronic devices in the practical
session they will forfeit that practical class.
37.Practical books must be handed in at the end of the semester with the
student’s initials, surname and student number on the cover page.
38.Practical books count as the 4th test for digital systems 1.
Page 4 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
39.If a student fails the practical semester he/she may fail the entire
semester for digital systems 1.
40.Late submission and absenteeism during the submission will be penalized
by 10% deduction per day.
41.No excuses to be taken seriously after the submissions unless the proof is
valid.
42.If you missed an assessment and your reason is invalid, your case will be
handled as closed.
43.Any violation of the above rules will result in dismissal from the
laboratory.
The practical work will be evaluated and will form part of the year mark!
Final Mark Calculation as per Dr T Otunniyi (Head of Subject for
Digital Systems 1 and 2): Final mark calculation does not include
practical sub-minimum. The average of the three tests and
practical are calculated for the year mark. The student fails the
module if he/she does not attend the practical classes throughout
the semester. But does not fail the module if he/she attends and
his year mark average is 50 and above.
Students can always be tested on the above-mentioned safety rules and
regulations.
Therefore, the students are expected to know them.
All students are urged to acquaint themselves with the following statutes:
•
General computer lab safety rules.
•
Occupational Safety and Health Act (OHS act.).
A copy of the above-mentioned statutes is available at the library.
DECLARATION
I, the undersigned, hereby declare that the Laboratory Safety Rules &
Regulations and the Rules Governing Minimum Class Attendance were
read and understood. I agree to abide by these rules & regulations as of this
day______of___________20____.
Initial & Surname: ______________________ Student Number: ____________
Page 5 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
PRACTICAL ASSIGNMENTS
All practical assignments will be built, simulated, trouble shooted and assessed
on the Multisim simulation software as shown in figure 1 bellow.
Equipment to be used in T201:
1. Laboratory Computer
2. NI (National Instruments) Multisim simulation software – NI Multisim is an
electronic simulation program used for simulation and circuit design for
analog, digital and power electronics in education and research.
3. Faronics Deepfreeze - Deep Freeze makes workstation configurations
indestructible. Guarantees 100% workstation recovery upon restart.
Provides password protection and complete security. Protects multiple
hard drives and partitions. Prevents configuration drift and accidental
system misconfiguration. Helps maintain Software compliance across all
workstations. Protects workstations from unauthorized changes with a
simple restart.
4. Insight - Faronics Insight is an effective classroom management software
that helps teachers create a better learning experience, while streamlining
IT administration and supporting multiple labs with ease. User Guide.
Provides step-by-step instructions for installing, configuring and using
Faronics Insight.
References
1. https://www.ni.com/en-za.html
2. https://www.ni.com/en-za/shop/electronic-testinstrumentation/application-software-for-electronic-test-andinstrumentation-category/what-is-multisim.html
3. https://www.faronics.com/en-uk/products/deep-freeze
4. https://www.faronics.com/en-uk/products/insight
Page 6 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
NI (National Instruments) Multisim simulation software
Figure 1 – NI (National Instruments) Multisim Simulation Software
Page 7 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Topics:
TABLE 1.1
Digital systems 2 practical’s
Objective:
Topic 1: Active Low SRLatch
Topic 2: Gated D-Latch
Test the Set and Reset and complete a truth table.
Test the enable/disable function and obverse the output on the
probe and output wave form in the oscilloscope.
Topic 3: Edge Triggered D
Flip-Flop
Test the preset and clear and observe the output probe and
Topic 4: Edge Triggered JK Flip-Flop
Test the clear, preset and toggle functions. Observe the output
Topic 5: One Shot
Test the operation of the non-retriggerable one shot and the
the output wave form in the oscilloscope.
probe and the output wave form in the oscilloscope.
potentiometer. Observe the output probe and the output wave
form in the oscilloscope.
Topic 6: One shot
Test the operation of the retriggerable one shot and the
potentiometer. Observe the output probe and the output wave
form in the oscilloscope.
Topic 7: The 555 Timer as
a One-Shot
Test the operation of the 555 timer as one shot and the
potentiometer. Observe the output probe and the output wave
form in the oscilloscope.
Topic 8: The 555 Time as
an Astable Multivibrator
Test the operation of the 555 timer as an astable
multivibrator. Observe the output probe and the output wave
form in the oscilloscope.
Topic 9: 4-Bit
Asynchronous Counter
Build and test the circuit according to the 3 requirements
Topic 10: 4-Bit
Synchronous Binary
Counter
Topic 11: Up-Down
Synchronous Counter
Build the logic circuit according to the requirements and test
Topic 12: 4-Bit
Synchronous Counter
Build the logic circuit, test and observe the operation of the
Topic 13: Bi-Directional
shift register
Build the logic circuit, test and observe the operation of the
Topic 14: Shift Register
Build the logic circuit, test and observe the operation of the
modulus 10, 12 and 16 counters.
the circuit.
Build the logic circuit; test and observe the operation of the
counter for both up and down counting.
count, load and clear.
shift register shifting both left and right.
parallel in/serial out according to the instructions.
Topic 15: Special Function
Registers Counter –
Johnson Counter.
Topic 16: Special Function
Register Counter – Ring
Counter.
Topic 17: 7 Segment
Display
Build the logic circuit, test and observe the operation of the
Johnson Counter and the clear function.
Build the logic circuit, test and observe the operation of the
Johnson Counter and the preset and clear function.
Build the logic circuit, test and observe the operation of the 7
Segment Display and the complete the truth table.
Page 8 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 1:
ACTIVE LOW SR-LATCH
OBJECTIVE:
Draw and simulate a circuit to test the operation of the Active Low S-R
Latch
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
Build the circuit below using the Multisim program.
2.
Start simulation by pressing the F5 key or by clicking on the simulated switch in
the top right hand corner of the screen. To stop simulation press the F5 key or the
simulated key again.
3.
Use the key S on the keyboard to represent SET and key R on the keyboard to
represent RESET.
The output of the circuit will be indicated by the probe.
Draw a truth table.
4.
5.
Page 9 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 2:
GATED D-LATCH
OBJECTIVE:
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
Draw and simulate a circuit to test the operation of a Gated D-Latch.
Manufacturers data sheets
Multisim simulation software package.
1.
Build the circuit below using the Multisim program.
2.
Start simulation and test all possible inputs and outputs for the circuit.
3.
If the circuit is connected properly the PROBE with flash on and off if the latch is
enabled, if the latch is disabled the PROBE will stay in one condition.
Double click on the oscilloscope and observe the output pulse in relation to the
input. The top pulse is the input and the bottom pulse is the output. Enable and
disable the latch once again while observing the output on the PROBE on the
oscilloscope as well as the actual PROBE.
4.
Page 10 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 3:
EDGE TRIGGERED D FLIP-FLOP
OBJECTIVE:
Draw and simulate a circuit to test the operation of an Edge Triggered D
Flip-Flop
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
Build the circuit below using the Multisim program.
2.
Start simulation and test all possible inputs and outputs for the circuit.
3.
Double click on the oscilloscope and observe the output pulse in relation to the
input. The top pulse is the input and the bottom pulse is the output. PRESET and
CLEAR the flip-flop while observing the output on the oscilloscope and the output
PROBE.
Page 11 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 4:
EDGE TRIGGERED J-K FLIP-FLOP
OBJECTIVE:
Draw and simulate a circuit to test the operation of an Edge Triggered J-K
Flip-Flop
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
Build the circuit below using the Multisim program.
2.
Start simulation and test all possible inputs and outputs for the circuit.
3.
Test the following conditions: Toggle, Preset and Clear and complete the truth
table.
4.
Double click on the oscilloscope and observe the Q output.
PR (Key = P)
CLR (Key = C)
J (Key = J)
K (Key = K)
PB (Key = Space)
Q
Page 12 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 5:
ONE SHOTS
OBJECTIVE:
Draw and simulate a circuit to test the operation of a Non -Retriggerable
One-Shot
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
Build the circuit below using the Multisim program.
2.
Start simulation and test all possible inputs and outputs for the circuit.
3.
Change the value of the potentiometer and trigger the Non-Retriggerable One-Shot
4.
Observer the Q output on the oscilloscope.
Page 13 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 6:
ONE SHOTS
OBJECTIVE:
Draw and simulate a circuit to test the operation of a Retriggerable OneShot
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
Build the circuit below using the Multisim program.
2.
Start simulation and test all possible inputs and outputs for the circuit.
3.
Change the value of the potentiometer and trigger the Retriggerable One-Shot
4.
Observer the Q output on the oscilloscope.
Page 14 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 7:
THE 555 TIMER AS A ONE-SHOT
OBJECTIVE:
Draw and simulate a circuit to test the operation of a 555 Timer as a OneShot
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
Build the circuit below using the Multisim program.
2.
Change the value of the potentiometer and trigger the 555 Timer as a One-Shot
3.
Observer the Q output on the oscilloscope.
Page 15 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 8:
THE 555 TIMER AS AN ASTABLE MULTIVIBRATOR
OBJECTIVE:
Draw and simulate a circuit to test the operation of a 555 Timer as an
astable multivibrator
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
2.
Build the circuit below using the Multisim program.
Change the value of the potentiometer and trigger the 555 Timer as an astable
multivibrator
3.
Observer the Q output on the oscilloscope.
Page 16 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 9:
4-BIT ASYNCHRONOUS COUNTER
OBJECTIVE:
Draw and simulate a circuit to test the operation of a 4-Bit Asynchronous
Counter
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
2.
3.
Build the circuit below using the Multisim program to function as a modulus 16
counter.
Change the connection of the counter to function as a modulus 12 (MOD 12)
counter.
Change the connection of the counter to function as a modulus 10 (MOD 10)
counter.
Page 17 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 10:
4-BIT SYNCHRONOUS BINARY COUNTER
OBJECTIVE:
Draw and simulate a circuit to test the operation of a 4-Bit Synchronous
Counter
Manufacturers data sheets
Multisim simulation software package, 74LS163N, 74LS04N
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
2.
3.
Design the circuit so that it will count from 0 to 15 in binary repeatedly.
Change the circuit so that it will count from any number to 15 repeatedly.
This is a problem solving circuit.
Page 18 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 11:
UP/DOWN SYNCHRONOUS COUNTERS
OBJECTIVE:
Draw and simulate a circuit to test the operation of a 4-Bit Synchronous
Up/Down Counter.
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
2.
Build the circuit below using the Multisim program.
Switch 1 is connected to the Up/Down control input of the counter. Use Key 1 on
the keyboard to make the counter count up or down.
Page 19 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 12:
4-BIT SYNCHRONOUS COUNTER
OBJECTIVE:
Draw and simulate a circuit to test the operation of a 4-Bit Synchronous
Counter with Clean and Load connections.
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
2.
3.
4.
5.
Build the circuit below using the Multisim program.
Switch S1 (Key is 1) is connected to LOAD.
Switch S2 (Key is 2) is connected to CLR.
Switch A, B, C, D are used to represent the binary value that will be loaded into
the counter.
Simulate the following conditions: CLR, LOAD and COUNTING.
Page 20 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 13:
BI-DIRECTIONAL SHIFT REGISTER
OBJECTIVE:
Draw and simulate a circuit to test the operation of a Bi-Directional Shift
Register.
Manufacturers data sheets
Multisim simulation software package.
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
2.
3.
Build the circuit below using the Multisim program.
Clear the registers using Key 1.
Using switch 2 and 3 shift the register to the right and shift the register to the left.
Page 21 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 14:
SHIFT REGISTERS
OBJECTIVE:
Draw and simulate a circuit to test the operation of a parallel in/serial out
shift register.
Manufacturers data sheets
Multisim simulation software package, 74LS165N
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
1.
2.
3.
4.
5.
6.
7.
Build the circuit below using the Multisim program.
8 switches are needed for the 8 D-Inputs.
Another 2 switches are needed for the inputs of data load signal (SH/LD) and serial
input (SER).
A pulse switch of frequency can be used to clock the data through.
Load the following data and shift it out serially:
1 0 1 1 0 1 0 0
S7 S6 S5 S4 S3 S2 S1 S0
Hint: serial input (SER) must be a 1.
This is a problem solving circuit.
Page 22 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 15:
SPECIAL FUNCTION REGISTER COUNTERS – JOHNSON
COUNTER
OBJECTIVE:
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
Draw and simulate a circuit to test the operation of a Johnson Counter.
Manufacturers data sheets
Multisim simulation software package.
1.
2.
3.
Build the circuit below using the Multisim program.
Test the operation of the Johnson Counter.
Test the clear function.
Page 23 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 16:
SPECIAL FUNCTION REGISTER COUNTERS – RING
COUNTER
OBJECTIVE:
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
Draw and simulate a circuit to test the operation of a Ring Counter.
Manufacturers data sheets
Multisim simulation software package.
1.
2.
3.
Build the circuit below using the Multisim program.
Test the operation of the Ring Counter.
Test the preset and clear function.
Page 24 of 25
Copyright © 2023 VUT. All rights reserved.
Practical Guide
EIDSY2A – DIGITAL SYSTEMS 2
Initials:
Surname:
Student No:
TOPIC 17:
7 SEGMENT DISPLAY
OBJECTIVE:
REFERENCE:
EQUIPMENT:
INSTRUCTIONS:
Draw and simulate a circuit to test the operation of a 7 Segment Display.
Manufacturers data sheets, 74LS47N, SEVEN_SEG display
Multisim simulation software package.
1.
2.
3.
4.
5.
Build the circuit below using the Multisim program.
Use switches A, B, C, and D to represent the inputs of the driver.
Draw a truth table for the input as well as the HEX display.
Simulate all input numbers from 0 to 9 and complete the truth table.
This is a problem solving circuit.
Page 25 of 25
Copyright © 2023 VUT. All rights reserved.