Department of Electrical Engineering
Faculty Member: Shazia Malik
Dated: 5th February, 2024
Course/Section: BEE-14-A
Semester: Spring 2024
EE-222 Microprocessors Systems
Lab #1 Introduction to AVR Programming: Simulation &
Hardware Implementation
PLO4 -CLO3
Name
Reg. No
Syed Arij Aziz
404809
Wassi Haider
Kabir
410398
Wahhaj
Waheed
423280
EE-233 Microprocessor Systems
Viva /
Quiz /
Lab
Perform
ance
5 Marks
PLO5CLO4
PLO8-CLO5
PLO9CLO6
Analysis
of data
in Lab
Report
Modern
Tool
µsage
Ethics and
Safety
Individual
and Team
Work
5 Marks
5 Marks
5 Marks
5 Marks
Page 1
Lab #1 Introduction to AVR Programming: Simulation &
Hardware Implementation
Objective:
The objectives of this lab include familiarization with
1.
2.
3.
4.
5.
Create Project in Atmel Studio
Simulate Assembly code for AVR ATmega16A
Burn Hex file in ATmega16A µsing the Universal Programmer
Simulate and understand an Assembly code implementation.
Qualitatively and quantitatively Compare similar implementations.
Hardware Required:
1.
2.
3.
4.
5.
ATmega16A Microcontroller Unit
Universal Programmer
LEDs (may µse from trainer kit)
Power source with voltage regulator (may µse from trainer kit)
Switch or button (may µse from trainer kit)
Code: (for both lab 00 and 01)
•
Lab 00:
; initial constants
ldi R16, 0xFF
ldi R17, 0xFF
; set DDRB as output
out DDRA, R17
; code to toggle LEDs
toggler:
subi R16, 0xFF
out PORTA, R16
rjmp idle_loop
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; delay loop
idle_loop :
ldi R19, 0xFF
ldi R20, 0x0F
ldi R21, 0x01
idle_loop_0 :
idle_loop_1 :
idle_loop_2 :
dec R19
brne idle_loop_2
dec R20
brne idle_loop_1
dec R21
brne idle_loop_0
rjmp toggler
•
Lab 01:
; initial constants
ldi R16, 0xFF
ldi R17, 0xFF
; set DDRB as output
out DDRA, R17
; code to toggle LEDs
toggler:
EE-233 Microprocessor Systems
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subi R16, 0xFF
out PORTA, R16
rjmp idle_loop
; delay loop
idle_loop :
ldi R19, 0xFF
ldi R20, 0xFF
; only change here
ldi R21, 0x01
idle_loop_0 :
idle_loop_1 :
idle_loop_2 :
dec R19
brne idle_loop_2
dec R20
brne idle_loop_1
dec R21
brne idle_loop_0
rjmp toggler
Explanation of Code: (for both lab 00 and 01)
This code is written in Assembly language for ATmega16A, as indicated by the instructions
such as "ldi" (load immediate), "out" (write to I/O port), "subi" (subtract immediate), and "rjmp"
(relative jump). The code seems to be controlling LEDs connected to port A of the
microcontroller.
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Let's go through the code step by step:
1. Initial Constants:
•
•
ldi R16, 0xFF
ldi R17, 0xFF
It initializes registers R16 and R17 with the value 0xFF. These values are commonly µsed in
AVR programming to set all bits of a register to 1.
2. Set DDRA as Output:
•
out DDRA, R17
It sets the Data Direction Register (DDRA) for port A as an output. Setting all bits of the
DDRA register to 1 makes all corresponding pins of port A configured as output.
3. Toggle LEDs:
•
toggler:
o subi R16, 0xFF
o out PORTA, R16
o rjmp idle_loop
This is a loop that toggles the state of the LEDs connected to port A. It subtracts 1 from the
value in R16 and writes the result to the PORTA register. It then jumps to the `idle_loop` label.
4. Delay Loop (idle_loop):
•
idle_loop:
o ldi R19, 0xFF
o ldi R20, 0x0F
o ldi R21, 0x01
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▪
▪
▪
idle_loop_0:
idle_loop_1:
idle_loop_2:
• dec R19
o brne idle_loop_2
• dec R20
o brne idle_loop_1
• dec R21
o brne idle_loop_0
This is a simple delay loop. It µses three nested counters (R19, R20, R21) to create a delay.
The loop will keep decrementing the counters until they become zero.
5. Jump Back to Toggler
rjmp toggler
After the delay loop, it jumps back to the `toggler` label, restarting the LED toggling process.
In summary, the code initializes some constants, sets up port A as an output, and then enters a
loop where it toggles the LEDs and introduces a delay between each toggle. The delay is
achieved through a simple nested loop µsing three counters. The process repeats indefinitely.
For both labs the code is essentially the same the difference is in line 14 where initialization of
R20 is 0x0F in lab 00 and 0xFF in lab 01. This value determines the delay loop, so a larger value
means larger Time (µs) delay.
Simulated observations in a tabular form: (for both lab 00 and 01)
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Lab 00:
Iteration 1
Cycle
Counter
I
0
Cycles
4
Time (µs)
4
R16
00
PORTA
0
T
H
S
V
N
Z
C
0
0
0
0
0
1
0
0
0
0
0
0
0
0
Iteration 2
Cycle
Counter
I
0
Cycles
11561
Time (µs)
11561
R16
01
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
0
0
0
Iteration 3
Cycle
Counter
I
0
Cycles
23118
Time (µs)
23118
R16
02
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
0
0
1
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Iteration 4
Cycle
Counter
I
0
Cycles
34675
Time (µs)
34675
R16
03
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
0
1
0
Iteration 5
Cycle
Counter
I
0
Cycles
46232
Time (µs)
46232
R16
04
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
0
1
1
Iteration 6
Cycle
Counter
I
0
Cycles
57789
Time (µs)
57789
R16
05
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
1
0
0
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Iteration 7
Cycle
Counter
I
0
Cycles
69346
Time (µs)
69346
R16
06
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
1
0
1
Iteration 8
Cycle
Counter
I
0
Cycles
80903
Time (µs)
80903
R16
07
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
1
1
0
Iteration 9
Cycle
Counter
I
0
Cycles
92460
Time (µs)
92460
R16
08
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
1
1
1
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Iteration 10
Cycle
Counter
I
0
Cycles
104017
Time (µs)
104017
R16
09
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
0
0
0
Iteration 11
Cycle
Counter
I
0
Cycles
115574
Time (µs)
115574
R16
0A
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
0
0
1
Iteration 12
Cycle
Counter
I
0
Cycles
127131
Time (µs)
127131
R16
0B
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
0
1
0
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Iteration 13
Cycle
Counter
I
0
Cycles
138688
Time (µs)
138688
R16
0C
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
0
1
1
Iteration 14
Cycle
Counter
I
0
Cycles
150245
Time (µs)
150245
R16
0D
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
1
0
0
Iteration 15
Cycle
Counter
I
0
Cycles
161802
Time (µs)
161802
R16
0E
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
1
0
1
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Iteration 16
Cycle
Counter
I
0
Cycles
173359
Time (µs)
173359
R16
0F
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
1
1
0
Iteration 17
Cycle
Counter
I
0
Cycles
184916
Time (µs)
184916
R16
10
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
1
1
1
Iteration 18
Cycle
Counter
I
0
Cycles
196473
Time (µs)
196473
R16
11
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
1
0
0
0
0
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Iteration 19
Cycle
Counter
I
0
Cycles
208030
Time (µs)
208030
R16
12
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
1
0
0
0
1
Iteration 20
Cycle
Counter
I
0
Cycles
219587
Time (µs)
219587
R16
13
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
1
0
0
1
0
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Lab 01:
Iteration 1
Cycle
Counter
I
0
Cycles
4
Time (µs)
4
R16
00
PORTA
0
T
H
S
V
N
Z
C
0
0
0
0
0
1
0
0
0
0
0
0
0
0
Iteration 2
Cycle
Counter
I
0
Cycles
196361
Time (µs)
196361
R16
01
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
0
0
0
Iteration 3
Cycle
Counter
I
0
Cycles
392718
Time (µs)
392718
R16
02
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
0
0
1
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Iteration 4
Cycle
Counter
I
0
Cycles
589075
Time (µs)
589075
R16
03
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
0
1
0
Iteration 5
Cycle
Counter
I
0
Cycles
785432
Time (µs)
785432
R16
04
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
0
1
1
Iteration 6
Cycle
Counter
I
0
Cycles
981789
Time (µs)
981789
R16
05
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
1
0
0
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Iteration 7
Cycle
Counter
I
0
Cycles
1178146
Time (µs)
1178146
R16
06
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
1
0
1
Iteration 8
Cycle
Counter
I
0
Cycles
1374503
Time (µs)
1374503
R16
07
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
1
1
0
Iteration 9
Cycle
Counter
I
0
Cycles
1570860
Time (µs)
1570860
R16
08
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
0
1
1
1
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Iteration 10
Cycle
Counter
I
0
Cycles
1767217
Time (µs)
1767217
R16
09
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
0
0
0
Iteration 11
Cycle
Counter
I
0
Cycles
1963574
Time (µs)
1963574
R16
0A
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
0
0
1
Iteration 12
Cycle
Counter
I
0
Cycles
2159931
Time (µs)
2159931
R16
0B
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
0
1
0
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Iteration 13
Cycle
Counter
I
0
Cycles
2356288
Time (µs)
2356288
R16
0C
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
0
1
1
Iteration 14
Cycle
Counter
I
0
Cycles
2552645
Time (µs)
2552645
R16
0D
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
1
0
0
Iteration 15
Cycle
Counter
I
0
Cycles
2749002
Time (µs)
2749002
R16
0E
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
1
0
1
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Iteration 16
Cycle
Counter
I
0
Cycles
2945359
Time (µs)
2945359
R16
0F
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
0
1
1
1
0
Iteration 17
Cycle
Counter
I
0
Cycles
3141716
Time (µs)
3141716
R16
10
PORTA
0
T
H
S
V
N
Z
C
0
0
0
0
0
0
1
0
0
0
1
1
1
1
Iteration 18
Cycle
Counter
I
0
Cycles
3338073
Time (µs)
3338073
R16
11
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
1
0
0
0
0
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Iteration 19
Cycle
Counter
I
0
Cycles
3534430
Time (µs)
3534430
R16
12
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
1
0
0
0
1
Iteration 20
Cycle
Counter
I
0
Cycles
3730787
Time (µs)
3730787
R16
13
PORTA
0
T
H
S
V
N
Z
C
0
1
0
0
0
0
1
0
0
1
0
0
1
0
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Hardware Implementation: (for both lab 00 and 01)
Following is the hardware implementation of both:
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What changes you have Observed in lab01 by changing only one line in the
code write them in submission. (Qualitative and Quantitative Comparison
both)
In Lab 01, the only observed change is the modification of the line:
ldi R20, 0x0F ; Lab 00
to
ldi R20, 0xFF ; Lab 01
Let's analyze the qualitative and quantitative differences:
1. Qualitative Comparison:
•
•
Delay Duration: The change in Lab 01 implies a significant increase in the initial value
of the R20 register (from 0x0F to 0xFF). This modification likely results in a longer
delay period within the idle loop.
LED Blinking Pattern: Due to the extended delay, the LEDs will blink at a slower rate
in Lab 01 compared to Lab 00.
2. Quantitative Comparison:
If look at the iteration tables, then by comparing the Time (µs) taken we can verify the above
stated theory.
Let’s see iteration number 5:
Lab 00: 46232 µs
Lab 01: 785432 µs
Similarly, let’s also compare iteration number 20:
Lab 00: 219587 µs
Lab 01: 3730787 µs
In summary, the change in Lab 01 results in a longer delay and, consequently, a slower LED
blinking pattern compared to Lab 00. This change can be attributed to the modification of the
initial value loaded into register R20.
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Conclusion:
In conclusion, the observed modifications in Lab 01, specifically changing the initial value loaded
into register R20 from 0x0F to 0xFF, had a tangible impact on the microcontroller's behavior. The
increased delay introduced in the idle loop resulted in a slower LED blinking pattern. This
experiment showcased the direct influence of timing parameters on the overall system
performance, emphasizing the importance of fine-tuning such parameters for achieving desired
outcomes.
No difficulty was encountered thanks to our dedicated lab engineer for designing and guiding us
through this lab. Her commitment to fostering hands-on learning experiences has enriched our
educational journey and contributed significantly to the success of this laboratory session.
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