A case study of a short failure analysis by voltage
applied EBAC
Junichi Fuse1), Takeshi Sunaoshi1), Takashi Kanemura1), Yasuhiko Nara1), Akira Kageyama1),
and Takayuki Mizuno2)
1) Science Systems Design Division, Hitachi High-Technologies Corporation,
1040, Ichige, Hitachinaka-shi, Ibaraki 312-0033, Japan
2) Science Systems Sales & Marketing Division, Hitachi High-Technologies Corporation,
1-24-14, Nishi-Shimbashi 1-chome, Minato-ku, Tokyo 105-8717, Japan
Tel: +81- 29-276-8080 Fax: +81- 29-276-2223 Email: junichi.fuse.gv@hitachi-hightech.com
Abstract - Miniaturization scaling of technology node is advancing
in recent years, we are almost facing to the age of mass production
for ultra-fine devices with the design rule of one-digit nanometers.
Along with the scaling of technology node, distance of neighboring
wires or contact plugs is inevitably reduced, and so, occurrences of
short circuit defect are increasing. So far, various methods had
been applied for investigating short-circuit failures. The failure
analysis by SEM based electron beam absorbed current (EBAC)
technique recently becomes main-stream technique among them
because of its spatial resolution to determine the failure position.
The DI EBAC that is the EBAC observation acquired by applying
some voltage to the failure short circuit and forcing to run bias
current through it was known to be effective to fix the malfunction
position of failure short circuit. However, it is necessary for making
the evaluation condition of the DI EBAC to have the best results.
Especially, malfunction area localization for low resistive short
failure is difficult by conventional technique, thus, the focus point
of measurement condition is to find out DI EBAC short failure
localization ability for low resistive short failure mode. In this study,
several samples and measuring parameters were evaluated to find
the most effective conditions in the DI EBAC. We confirmed that
suitable measurement condition was possible to obtain hotspot
signals in actual short failure analyses as low resistive shorted
failure sample.
visualize variation of a short failure area [5]. The Voltage
applied EBAC system is needed to optimize the electrical
condition such as resistance of short failure, electron
acceleration voltage, irradiation current, and bias current.
In this study, we confirmed the suitable measurement
condition for the correlation parameter of the voltage applied
EBAC for low resistive failure.
II. FUNDAMENTAL EVALUATION 1
(EFFECT OF RESISTANCE)
EBAC observation results differ due to difference of their
short failure resistance even though their structure is the same.
At first, DI EBAC images of 4 samples with different resistance
were observed at arbitrary condition, and the results were
analyzed. As shown in Fig. 1, the sample with a resistance made
of different materials from those of peripheral circuits was
embedded in the center was used for each evaluation.
Resistances used were 4.5 kΩ, 854 Ω, 334 Ω and 174 Ω.
Keywords – Short failure analysis, EBAC, DI EBAC, Sample
resistance, Accelerating voltage, Irradiation current, Bias current
I. INTRODUCTION
Demands for short failure analyses are increasing in recent
semiconductor research, development and yield enhancement.
Current techniques such as IR-OBIRCH and Emission
microscopy have been utilized to localize short failures [1] [2].
However, along with the miniaturization scaling of technology
node, area of analysis is also inevitably decreasing. Therefore,
localization of short failure has become difficult with these
current techniques.
Recently, EBAC [3] [4] technique has been known to be
effective for localization in this kind of short failure analyses.
Conventional non-bias condition EBAC is hard to localize
the malfunction area with low resistive short failure due to
the lack of electron beam excitation power to the circuit,
therefore the Voltage applied EBAC which is working with
similar principle as IR-OBIRRCH system is expected to
Fig. 1 Schematic Image of the evaluated sample with a
register made of different materials from those of peripheral
circuits
The DI EBAC applying some voltage to the sample as
schematically shown in Fig. 2 was used for these evaluations.
Fig. 3 shows DI EBAC results of 4 different resistance samples
under fixed measurement condition in table 1. These DI EBAC
images display tendency of stronger hotspot signal not only at
short failure points but also in peripheral areas as the resistance
increased. From these results, it has become clear that lower
resistance generates weaker signal at the same measuring
condition even with the DI EBAC technique.
kinetic energy of electrons emitted from the electron gun. As Fig.
4 show, electrons at lower acceleration voltage reach only in
shallow range from the sample surface, but those at the higher
can penetrate to deeper region of the sample.
Fig. 2 Image of DI EBAC measurement
Fig. 4 Comparison of electron beam penetration length
between low and high accelerating voltages
Fig. 5 shows relation of the irradiation current and EBAC
signal intensity. Low irradiation current generates low EBAC
signal, and high irradiation current does high EBAC signal.
Fig. 5 Relation of the irradiation current
and EBAC signal intensity
Fig. 3 DI EBAC results of 4 different resistance samples
Table 1 Fixed measurement condition
for different resistance sample
As Fig. 6 shows, the larger bias current runs, the stronger
stress to the short-failure point becomes. The bias current is one
of the most important parameter in the DI EBAC measurement
because there are none in common EBAC.
Fig. 6 Relation of the bias current and fail stress
III. FUNDAMENTAL EVALUATION 2
(RELATIONS WITH ACCELERATION VOLTAGE,
IRRADIATION CURRENT, AND BIAS CURRENT)
Then, using the sample with the smallest hotspot signal, DI
EBAC image responses to the changes of acceleration voltage,
irradiation current and bias current were evaluated.
The acceleration voltage is parameter revealing average
Fig. 7 shows DI EBAC results of 4 different acceleration
voltages of fixed measurement condition in Table 2. No EBAC
signal is observable at 5 kV of acceleration voltage, it appears at
15 kV, and then the EBAC signal became gradually stronger as
higher acceleration voltage was applied. This phenomenon is
caused by insufficient penetration depth of lower acceleration
voltage electrons prevent themselves from reaching the shortfailure point to generate EBAC signal, and that the electrons
with higher acceleration voltage could reach to the failure point
to generate the signal.
Fig. 8 DI EBAC results of 4 different irradiation currents
Fig. 7. DI EBAC results of 4 different accelerating voltages
Table 3 Fixed measurement condition
for different irradiation currents
Table 2 Fixed measurement condition
for different accelerating voltages
Fig. 8 shows DI EBAC results of 4 different irradiation
currents of fixed measurement condition in Table 3. Similar to
the acceleration voltage experiments, there is no EBAC signal
at low irradiation current of 77 pA, it appears at 800 pA 10 times
larger to 77 pA, and the EBAC signal become gradually stronger
as larger irradiation current was used. From these results, the
irradiation current for EBAC evaluation is necessary to use
higher irradiation current than the threshold value of 800 pA.
Smaller current could generate EBAC signal below detection
limit of the system (77 pA was too low to try).
Fig. 9 shows DI EBAC results of 4 different bias currents of
fixed measurement condition in Table 4. Hotspot signal
intensity turn out to be constant to how large increment of the
bias current was added once the reaction had been activated.
This result shows that acceleration voltage and irradiation
current are more important than bias current to cause hotspot
reaction of the DI EBAC signal.
Fig. 9 DI EBAC results of 4 different bias currents
Table 4 Fixed measurement condition
for different bias currents
Ⅳ. FUNDAMENTAL EVALUATION 3
(EVALUATION OF SHORT DEFECTS IN THE SAME
METAL WITH BIAS CURRENT)
Then, using another samples with an embedded resistance
made of the same materials with the peripheral circuits as shown
in Fig. 10, EBAC image behavior to the change of bias current
was evaluated.
Fig. 11 DI EBAC results of 4 different bias currents in
the sample with an embedded register made of the same
materials with the peripheral circuits
V. ACTUAL DEVICE SHORT FAILURE ANALYSES
(A 3D NANDS AND SHORT FAILURES IN A COMB TYPE
SHORT CHECK PATTERN)
Fig. 10 Image of the evaluated sample with an embedded
register made of the same materials with the peripheral
circuits
Fig. 11 shows DI EBAC results of 4 different bias currents of
fixed measurement condition in table 4. Unlike the previous
experimental results with resistances made of different materials,
the hotspot contrast became weaker when 1 nA of bias current
was changed to 10 nA. Contrast reversal with stronger signal
generation is observed after applying further larger bias current.
In contrast to the results of previous short sample with different
metals, EBAC contrast become weaker when the bias current
increased from 1 nA to 10, nA, but the contrast is reversed and
become stronger when the bias current increased further larger.
This result implies that changing the bias current is effective to
detect a hotspot reaction by kinds of substances in the short
failure. As the bias current may add stress to the point of short
failure, the lowest possible current to generate detectable
hotspot signal is preferable. For this sample, 1 nA is enough to
judge appropriate.
Actual device short failure analyses were implemented based
on the fundamental evaluations. Evaluated samples were a 3D
NAND flash memory and a comb type short check pattern. Short
failures of the 3D NAND flash memory often occur between top
word line layer and bottom word line layer, because of the
memory structure with parallel word lines widely spreading in
top and bottom layers. While the other sample of comb type
short check pattern has a lot of thin metal lines with narrow
space, therefore, short failures are easily caused by some
influences. Fig. 12 shows diagram of the 3D NAND flash
memory evaluated this time which top and bottom word lines
are shorted each other with resistance of approximately 2 kΩ.
Fig. 12 Diagram of the 3D NAND flash memory evaluated
this time
Fig. 13 shows the measurement results of this 3D NAND flash
memory. (a) is SE image, (b) is DI EBAC image with
inappropriate adjustment and (c) is in appropriate condition. In
low magnification measurement, the DI EBAC image with
appropriate adjustment (c) could localize the hotspot signal,
though both SE image (a) and DI EBAC image with
inappropriate adjustment (b) couldn’t perform. In higher
magnification, SE image show that there are some damaged
memory holes, while DI EBAC image shows only one memory
hole which is presumed to cause short failure in it.
(a) SE image
(a) SE image
(b) DI EBAC image with inappropriate condition
(c) DI EBAC image with appropriate condition
Fig. 13 Measurement result of this 3D NAND flash
memory
Fig. 14 shows image of the comb type short check pattern
made of the same material and with a low resistance
(approximately 780 ohm) short circuit.
(b) DI EBAC image in inappropriate condition
Fig. 14 Image of the comb type short check pattern
evaluated this time
Fig. 15 shows analytical results of the comb type short check
pattern. (a) is SE image, (b) is the DI EBAC image in
inappropriate condition and (c) is that with appropriate condition.
Low magnification SE image and DI EBAC image in
inappropriate condition is hard to localize the hotspot of short
failure, however, the DI EBAC image in appropriate condition
localizes the failure location.
(c) DI EBAC image in appropriate condition
Fig. 15 Measurement result of the comb type short
check pattern
VI. CONCLUSION
The low resistive malfunction area localization for 3D-NAND
device which have vertical short between word line and word
line, and shorted comb type short check pattern are
demonstrated with suitable DI EBAC condition in this paper.
The localization of low resistive short failure becomes difficult
with the semiconductor device structure shrink. The DI EBAC
evaluation technique with optimized setup will be the more
beneficial in localizing the malfunction area, the finer
semiconductor devices are developed.
REFERENCES
[1] K.Nikawa, S.Inoue, K.Morimoto, S.Sone, ‘’Failure analysis case studies
using the IR-OBIRCH (infrared optical beam induced resistance change)
method’’ Test Symposium, 1999. (ATS’99) Proceedings. Eighth Asian
[2] Stephane Alves, Philippe Rousseille, and Thomas Zirilli
‘’Fault localization of metal defects with Si-CCD camera in Analog device
functional failure’’ ISTFA2013 November 3-7, 2013, California, USA
[3] Akira Shimase, Akihito Uchikado, Yoshikazu Matsumoto, Shinichi Watarai,
Shinji Kawanabe, Takeshi Suzuki, Toshiyuki Majima, Kazuhiro Hotta and
Hirotoshi Terada.‘’Failure analysis Navigation System Connecting Hardware
Analysis to Software Diagnosis’’ ISTFA2006 November 12-16, 2006, Austin,
Texas, USA
[4] P.Larre, H.Tupin, C.Charles, R.H.Newton, and A.Reverdy‘’Precise
localization of 28nm via chain resistive defect using EBAC and nanoprobing’’
ISTFA2012 November 11-15, 2012, Phoenix, Arizona, USA
[5] Junichi Fuse, Takeshi Sunaoshi, Yasuhiko Nara, Akira Kageyama, and
Takayuki Mizuno ‘’Study on short failure localization approach by newly
developed EBAC technique’’ IPFA2017 July 5-7, 2017, Chengdu, China